coreboot-gerrit November 2021

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Change in coreboot[master]: soc/mediatek/mt8195: Add driver to configure PCIe
by Paul Menzel (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Hung-Te Lin, Jianjun Wang. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56792 ) Change subject: soc/mediatek/mt8195: Add driver to configure PCIe ...................................................................... Patch Set 3: (1 comment) File src/soc/mediatek/mt8195/pcie.c: https://review.coreboot.org/c/coreboot/+/56792/comment/719c1faf_0cfb0b28 PS3, Line 54: int i; `unsigned int` or `size_t` -- To view, visit https://review.coreboot.org/c/coreboot/+/56792 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6799c53b03a33be91157ea088d829beb4272976 Gerrit-Change-Number: 56792 Gerrit-PatchSet: 3 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Fri, 26 Nov 2021 08:40:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: ec/google/chromeec: Add powerinfo support
by Paul Menzel (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Tim Wawrzynczak, Sumeet R Pawnikar, Nick Vaccaro. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59189 ) Change subject: ec/google/chromeec: Add powerinfo support ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59189/comment/f18df312_84237a4c PS5, Line 9: powerinfo support What is “powerinfo support”? Where is it documented? -- To view, visit https://review.coreboot.org/c/coreboot/+/59189 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I75b109592b327df11d1101bcf32a364c2ae7feac Gerrit-Change-Number: 59189 Gerrit-PatchSet: 5 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Fri, 26 Nov 2021 08:38:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add get powerinfo support
by Paul Menzel (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Tim Wawrzynczak, Sumeet R Pawnikar, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59190 ) Change subject: soc/intel/alderlake: Add get powerinfo support ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59190/comment/030264b6_ba1dced4 PS2, Line 13: test on brya system How? -- To view, visit https://review.coreboot.org/c/coreboot/+/59190 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e7ea3b34130abd1bc09e3e90d1666a929c88c5b Gerrit-Change-Number: 59190 Gerrit-PatchSet: 2 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 26 Nov 2021 08:37:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: [RFC]Documentation: Plan some deprecations / mandatory features
by Paul Menzel (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Arthur Heymans. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59618 ) Change subject: [RFC]Documentation: Plan some deprecations / mandatory features ...................................................................... Patch Set 2: (1 comment) File Documentation/releases/coreboot-4.16-relnotes.md: https://review.coreboot.org/c/coreboot/+/59618/comment/57166536_0664811f PS1, Line 72: PCENGINES_APU1_ : PCENGINES_APU2_ : PCENGINES_APU3_ : PCENGINES_APU4_ : PCENGINES_APU5_ : PCENGINES_APU1 : PCENGINES_APU2 : PCENGINES_APU3 : PCENGINES_APU4 : PCENGINES_APU5 > Or those the same? *Are -- To view, visit https://review.coreboot.org/c/coreboot/+/59618 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7dcf9343b999d435a3a1cdac6bb5f680ed02d388 Gerrit-Change-Number: 59618 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Comment-Date: Fri, 26 Nov 2021 08:25:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: Flush cache before triggering EC reset
by Hung-Te Lin (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Rex-BC Chen. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59683 ) Change subject: soc/mediatek: Flush cache before triggering EC reset ...................................................................... Patch Set 3: (1 comment) File src/soc/mediatek/common/wdt.c: https://review.coreboot.org/c/coreboot/+/59683/comment/55859161_2632434d PS3, Line 31: flush the cache onto cbmem. This is slightly incorrect. clean the data cache so the logs in cbmem console (either in SRAM or DRAM) can be flushed. -- To view, visit https://review.coreboot.org/c/coreboot/+/59683 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1bd900beb4cc84f7121c5fb66907fa73b62517fa Gerrit-Change-Number: 59683 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Fri, 26 Nov 2021 08:25:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86/mmu: Port armv8 MMU to x86_64
by Paul Menzel (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30119 ) Change subject: arch/x86/mmu: Port armv8 MMU to x86_64 ...................................................................... Patch Set 17: (1 comment) File src/arch/x86/include/arch/mmu.h: https://review.coreboot.org/c/coreboot/+/30119/comment/ea8c5f88_d0b95c7d PS17, Line 10: */ It’d be great if the recommended multi-line comment styles could be used [1]. [1]: https://doc.coreboot.org/contributing/coding_style.html#commenting -- To view, visit https://review.coreboot.org/c/coreboot/+/30119 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e8b46e65925823a84b8ccd647c7d6848aa20992 Gerrit-Change-Number: 30119 Gerrit-PatchSet: 17 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 26 Nov 2021 08:22:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: log watchdog status
by Hung-Te Lin (Code Review) 26 Nov '21

26 Nov '21

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59641 ) Change subject: soc/mediatek: log watchdog status ...................................................................... soc/mediatek: log watchdog status Reveal watchdog status value on bootblock stage. BUG=b:207646327 TEST=build pass Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I2c5ad222a41085616565dd5c10b0e967bb64ec63 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59641 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> --- M src/soc/mediatek/common/wdt.c 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved diff --git a/src/soc/mediatek/common/wdt.c b/src/soc/mediatek/common/wdt.c index b228e56..f06fbf0 100644 --- a/src/soc/mediatek/common/wdt.c +++ b/src/soc/mediatek/common/wdt.c @@ -16,6 +16,8 @@ mtk_wdt_clr_status(wdt_sta); + printk(BIOS_INFO, "WDT: Status = %#x\n", wdt_sta); + printk(BIOS_INFO, "WDT: Last reset was "); if (wdt_sta & MTK_WDT_STA_HW_RST) { printk(BIOS_INFO, "hardware watchdog\n"); 3 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/59641 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2c5ad222a41085616565dd5c10b0e967bb64ec63 Gerrit-Change-Number: 59641 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/brya/variants/primus: update gpios for power consumption
by Paul Menzel (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Malik Hsu. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59563 ) Change subject: mb/google/brya/variants/primus: update gpios for power consumption ...................................................................... Patch Set 6: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59563/comment/7075364e_23450ba8 PS6, Line 13: and check power How did you do it, and how much power was saved? -- To view, visit https://review.coreboot.org/c/coreboot/+/59563 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I753e41dec1825299e6cd437b5f67e2d957bc6148 Gerrit-Change-Number: 59563 Gerrit-PatchSet: 6 Gerrit-Owner: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-Comment-Date: Fri, 26 Nov 2021 08:18:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: Add PCIe support
by Yu-Ping Wu (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Shelley Chen, Hung-Te Lin, Jianjun Wang. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56791 ) Change subject: soc/mediatek: Add PCIe support ...................................................................... Patch Set 3: (1 comment) File src/include/device/pci_mmio_cfg.h: https://review.coreboot.org/c/coreboot/+/56791/comment/467ba3b4_2d3d9909 PS3, Line 50: pcicfg > If it's necessary to rename it to pci_map_bus(), I think I can send a patch to do it. Okay, but please do it in a separate patch. Please also move the change in this file to that patch. -- To view, visit https://review.coreboot.org/c/coreboot/+/56791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0 Gerrit-Change-Number: 56791 Gerrit-PatchSet: 3 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Fri, 26 Nov 2021 08:16:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add get powerinfo support
by Sumeet R Pawnikar (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph. Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59190 ) Change subject: soc/intel/alderlake: Add get powerinfo support ...................................................................... Patch Set 2: Code-Review-1 -- To view, visit https://review.coreboot.org/c/coreboot/+/59190 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e7ea3b34130abd1bc09e3e90d1666a929c88c5b Gerrit-Change-Number: 59190 Gerrit-PatchSet: 2 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 26 Nov 2021 08:16:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit November 2021