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Change subject: soc/mediatek: Flush cache before triggering EC reset
......................................................................
Patch Set 5:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59683/comment/096d58e3_7ac0d286
PS4, Line 9: log
> not uart console, it's log stored in cbmem.
Done
https://review.coreboot.org/c/coreboot/+/59683/comment/bc7f1499_112ec4a8
PS4, Line 9: There will be no log on cbmem if we trigger ec reset on bootblock
: stage.
> [1] will trigger wdt to send signal to ec and ec will do reset on bootblock stage. […]
Done
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Change subject: soc/mediatek: move bustracker_init before watchdog resets again
......................................................................
Patch Set 7:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59667/comment/8183db05_8d8d4ee2
PS7, Line 7: again
> the reset flow of our system is: […]
Done
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Change subject: cbfs: Add unverified_area APIs
......................................................................
Patch Set 2:
(1 comment)
File src/include/cbfs.h:
https://review.coreboot.org/c/coreboot/+/59678/comment/ff9bb067_b27765b3
PS2, Line 58: * ..._unverified_area_...: Will look for the CBFS file in the named FMAP area, rather than
: * any of the default (RO or RW) CBFSs. Files accessed this way are *not* verified in any
: * way (even if CONFIG(CBFS_VERIFICATION) is enabled) and should always be treated as
: * untrusted (potentially malicious) data. Mutually exclusive with the ..._ro_... variant.
: *
If one will pass "COREBOOT" as area name, they will be able to bypass verification. Should it be possible?
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Change subject: mb/google/dedede/var/beetley: Enable GEO_SAR_ENABLE for beetley
......................................................................
Patch Set 4:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59544/comment/a30bc55d_3e8eef63
PS3, Line 2: wizard
> Wizard Shen
The label has been changed, thanks for checking.
https://review.coreboot.org/c/coreboot/+/59544/comment/5685df26_6200e398
PS3, Line 15: wizard
> Wizard Shen
The label has been changed, thanks for checking.
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Change subject: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build time
......................................................................
Patch Set 27:
(1 comment)
File src/arch/x86/bootblock.ld:
https://review.coreboot.org/c/coreboot/+/51671/comment/2c8c19db_4be7fa41
PS22, Line 57: _ID_SECTION_END - _ECFW_PTR
> ECFW_PTR_ADDR is not a user configurable symbol, and should be a fixed value according to the EC mod […]
Nico: Is the current approach okay? Is there any further changes needing to be made?
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Change subject: emulation/qemu-i440fx: Use a 4MB ROM by default
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS1:
> All other emulation boards besides Q35 use 4M. […]
Actually having 256 KB sometimes should unintended size increases. Though that should probably be monitored/checked differently.
Should QEMU Q35 then also be updated?
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Change subject: soc/mediatek: log watchdog status
......................................................................
Patch Set 5:
(1 comment)
File src/soc/mediatek/common/wdt.c:
https://review.coreboot.org/c/coreboot/+/59641/comment/6218287e_33cd3711
PS5, Line 19: printk(BIOS_INFO, "WDT: Status = %#x\n", wdt_sta);
> We need this message to identify what happened to our system.
Done
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Change subject: soc/mediatek: move bustracker_init before watchdog resets again
......................................................................
Patch Set 7:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59667/comment/9163ac51_7e73e662
PS7, Line 7: again
> Why “again”? If it was done in some earlier commit, and some other commit reverted it, please mentio […]
the reset flow of our system is:
if we counter wdt hw reset, we will detect wdt status is hw watchdog reset and make ec reset again.
So actually, we reset twice when the system encounter wdt hw reset.
It's not related to another patch.
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Change subject: soc/mediatek: Flush cache before triggering EC reset
......................................................................
Patch Set 5:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59683/comment/e752d761_942ad509
PS4, Line 9: log
> console log?
not uart console, it's log stored in cbmem.
https://review.coreboot.org/c/coreboot/+/59683/comment/fbd62025_f50afd09
PS4, Line 9: on
> in?
Done
https://review.coreboot.org/c/coreboot/+/59683/comment/f69eb797_e64988c1
PS4, Line 9: There will be no log on cbmem if we trigger ec reset on bootblock
: stage.
> Why is there no log?
[1] will trigger wdt to send signal to ec and ec will do reset on bootblock stage.
for this reset flow, we observed there is no log remained in cbmem.
After checking this issue, the root cause is cache is not flush before ec resets.
So we add this patch to fix this issue.
[1]:write32(&mtk_wdt->wdt_swrst, MTK_WDT_SWRST_KEY);
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Hello Hung-Te Lin, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/59683
to look at the new patch set (#5).
Change subject: soc/mediatek: Flush cache before triggering EC reset
......................................................................
soc/mediatek: Flush cache before triggering EC reset
There will be no log in cbmem if we trigger ec reset on bootblock
stage. Therefore, call dcache_clean_all() before triggering ec
reset to flush cache to store logs on cbmem.
BUG=b:207743045
TEST=show logs on cbmem
Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com>
Change-Id: I1bd900beb4cc84f7121c5fb66907fa73b62517fa
---
M src/soc/mediatek/common/wdt.c
1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/59683/5
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