Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59641 )
Change subject: soc/mediatek: log watchdog status
......................................................................
Patch Set 5:
(1 comment)
File src/soc/mediatek/common/wdt.c:
https://review.coreboot.org/c/coreboot/+/59641/comment/52a7800d_694086b9
PS5, Line 19: printk(BIOS_INFO, "WDT: Status = %#x\n", wdt_sta);
> Looks more like a debug message?
We need this message to identify what happened to our system.
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Change subject: soc/mediatek: move bustracker_init before watchdog resets again
......................................................................
Patch Set 7:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59667/comment/4ea59128_ccd43bfb
PS7, Line 7: again
Why “again”? If it was done in some earlier commit, and some other commit reverted it, please mention these commits. (Also a Fixes: tag might be useful.)
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Change subject: soc/mediatek: Flush cache before triggering EC reset
......................................................................
Patch Set 4:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59683/comment/77f46036_cf6a8bdc
PS4, Line 9: log
console log?
https://review.coreboot.org/c/coreboot/+/59683/comment/cd66ca0b_9a68e1c2
PS4, Line 9: on
in?
https://review.coreboot.org/c/coreboot/+/59683/comment/6e66705a_20fd5b91
PS4, Line 9: There will be no log on cbmem if we trigger ec reset on bootblock
: stage.
Why is there no log?
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Change subject: soc/mediatek: log watchdog status
......................................................................
Patch Set 5:
(1 comment)
File src/soc/mediatek/common/wdt.c:
https://review.coreboot.org/c/coreboot/+/59641/comment/965d175d_ad25eee0
PS5, Line 19: printk(BIOS_INFO, "WDT: Status = %#x\n", wdt_sta);
Looks more like a debug message?
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Change subject: soc/mediatek: Flush cache before triggering EC reset
......................................................................
Patch Set 4:
(1 comment)
File src/soc/mediatek/common/wdt.c:
https://review.coreboot.org/c/coreboot/+/59683/comment/7d02e4f4_9fafa964
PS3, Line 31: flush the cache onto cbmem.
> This is slightly incorrect. […]
Done
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Hello Hung-Te Lin, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/59683
to look at the new patch set (#4).
Change subject: soc/mediatek: Flush cache before triggering EC reset
......................................................................
soc/mediatek: Flush cache before triggering EC reset
There will be no log on cbmem if we trigger ec reset on bootblock
stage. Therefore, call dcache_clean_all() before triggering ec
reset to flush cache to store logs on cbmem.
BUG=b:207743045
TEST=show logs on cbmem
Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com>
Change-Id: I1bd900beb4cc84f7121c5fb66907fa73b62517fa
---
M src/soc/mediatek/common/wdt.c
1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/59683/4
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Change subject: cbfs: Remove deprecated APIs
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
tests/lib/cbfs-verification-test.c:82:29: error: unknown type name 'cbfs_dev_t'
82 | cb_err_t __real_cbfs_lookup(cbfs_dev_t dev, const char *name, union cbfs_mdata *mdata_out,
| ^~~~~~~~~~
tests/lib/cbfs-verification-test.c:85:22: error: unknown type name 'cbfs_dev_t'
85 | cb_err_t cbfs_lookup(cbfs_dev_t dev, const char *name, union cbfs_mdata *mdata_out,
| ^~~~~~~~~~
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Change subject: soc/mediatek: Add PCIe support
......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56791/comment/11917e04_925aebbc
PS3, Line 11:
1. What datasheets (name, revision and section) were used to implement this?
2. How has this been tested?
File src/soc/mediatek/common/pcie.c:
https://review.coreboot.org/c/coreboot/+/56791/comment/27557066_71cba0ba
PS3, Line 85: static inline int mtk_fls(int x)
Should this be a common function?
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Change subject: cpu/x86: Rename X86_AMD_INIT_SIPI to X86_INIT_NEED_1_SIPI
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS2:
> Subrata there are two changes that happen under X86_AMD_INIT_SIPI/X86_INIT_SIPI: […]
Just for note: we are working with Intel CPU program team to make the required changes in the doc which might breaks those legacy assumption for newer CPUs.
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