Hello build bot (Jenkins), Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/49025
to look at the new patch set (#5).
Change subject: mb/clevo/cml-u: Rework Kconfig
......................................................................
mb/clevo/cml-u: Rework Kconfig
Rework Kconfig file so that each variant has its own config option with
their specific selects / configuration and move common selects to a
seperate config option, which is used as base for each variant.
Built clevo/l140cu with BUILD_TIMELESS=1, coreboot.rom remains the same.
Change-Id: I1f5b6f535597149f28dd8c8322acc2e988f11505
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/clevo/cml-u/Kconfig
M src/mainboard/clevo/cml-u/Kconfig.name
2 files changed, 11 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/49025/5
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Gerrit-Change-Id: I1f5b6f535597149f28dd8c8322acc2e988f11505
Gerrit-Change-Number: 49025
Gerrit-PatchSet: 5
Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net>
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46602 )
Change subject: mb/clevo/l140cu: Add vboot support
......................................................................
Patch Set 6:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46602/5//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/46602/5//COMMIT_MSG@15
PS5, Line 15:
the filenames look odd to me:
- vboot-ro is ok
- vboot-roa should be vboot-ro-rwa
- vboot-roab should be vboot-ro-rwab
if you don't agree, just mark as resolved
https://review.coreboot.org/c/coreboot/+/46602/5/src/mainboard/clevo/cml-u/…
File src/mainboard/clevo/cml-u/variants/l140cu/fmds/vboot-roab.fmd:
https://review.coreboot.org/c/coreboot/+/46602/5/src/mainboard/clevo/cml-u/…
PS5, Line 33: COREBOOT(CBFS)
0xc00000-0x3df000-0x3df000-0x82000-0x4000-0x800-0x40-0x7c0-0xef000 = 0x2cc000
FW_MAIN_A(CBFS) and FW_MAIN_B(CBFS) are 0x3befc0
shouldn't they be equal?
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49044 )
Change subject: cpu/intel: add PC10 residency counter MSR
......................................................................
Patch Set 2:
> The PC10 residency MSR is not generic,it will not apply for generation before glodmont, and start from 4th gene in core. Also not supported yet in xeon yet. But the implemented here seems okay.
What kind of Xeon do you mean?
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49077 )
Change subject: mb/clevo/l140cu: Move FSP-M config hook to mainboard level
......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/49077/4/src/mainboard/clevo/cml-u/…
File src/mainboard/clevo/cml-u/romstage.c:
https://review.coreboot.org/c/coreboot/+/49077/4/src/mainboard/clevo/cml-u/…
PS4, Line 6: ry_init_params(FSPM_UPD *memupd)
: {
: variant_configure_fspm(memupd);
: }
:
do we really want to create this redirection hell before it's really needed? as long as we have no code that runs for all variants in cml-u/romstage.c it doesn't hurt to have a romstage.c for each variant
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Gerrit-Comment-Date: Tue, 05 Jan 2021 00:11:45 +0000
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Hello build bot (Jenkins), Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/49025
to look at the new patch set (#4).
Change subject: mb/clevo/cml-u: Rework Kconfig
......................................................................
mb/clevo/cml-u: Rework Kconfig
Rework Kconfig file so that each variant has its own config option with
their specific selects / configuration and move common selects to a
seperate config option, which is used as base for each variant.
Built clevo/l140cu with BUILD_TIMELESS=1, coreboot.rom remains the same.
Change-Id: I1f5b6f535597149f28dd8c8322acc2e988f11505
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/clevo/cml-u/Kconfig
M src/mainboard/clevo/cml-u/Kconfig.name
2 files changed, 11 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/49025/4
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Gerrit-Change-Number: 49025
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Hello build bot (Jenkins), Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46602
to look at the new patch set (#6).
Change subject: mb/clevo/l140cu: Add vboot support
......................................................................
mb/clevo/l140cu: Add vboot support
Add proper vboot configuration and add fmap files for the following
partition schemes:
* read-only
* read-only + updateable A partition
* read-only + updateable A/B partition
All partition schemes were tested and are working.
Change-Id: Ibb5e93eb55ece5b0e0d91b1a374d33e259c65cac
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/clevo/cml-u/Kconfig
A src/mainboard/clevo/cml-u/variants/l140cu/fmds/vboot-ro.fmd
A src/mainboard/clevo/cml-u/variants/l140cu/fmds/vboot-roa.fmd
A src/mainboard/clevo/cml-u/variants/l140cu/fmds/vboot-roab.fmd
4 files changed, 108 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/46602/6
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Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47892 )
Change subject: mb/system76/oryp5: Add System76 Oryx Pro 5
......................................................................
Patch Set 5:
(3 comments)
https://review.coreboot.org/c/coreboot/+/47892/2/src/mainboard/system76/ory…
File src/mainboard/system76/oryp5/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/47892/2/src/mainboard/system76/ory…
PS2, Line 26: register "SaGv" = "SaGv_Enabled"
> I'm not sure if this has any effect on Halo
What's Halo? Is there a way I can verify that?
https://review.coreboot.org/c/coreboot/+/47892/3/src/mainboard/system76/ory…
File src/mainboard/system76/oryp5/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/47892/3/src/mainboard/system76/ory…
PS3, Line 87: subsystemid 0x1558 0x95e6 inherit
> Values in static.c are correct. […]
FSP integration guide only lists the registers with abbreviated names. Passing a custom SiSsidTablePtr prevents FSP from writing the default values (this is explained much better in the TGL guide).
https://review.coreboot.org/c/coreboot/+/47892/2/src/mainboard/system76/ory…
File src/mainboard/system76/oryp5/hda_verb.c:
https://review.coreboot.org/c/coreboot/+/47892/2/src/mainboard/system76/ory…
PS2, Line 25: // Enable DMIC microphone on ALC1220
: 0x02050036,
: 0x02042a6a,
> What does the microphone have to do with beep?
Jeremy got these magic numbers from the Windows driver, and putting them here happens to make the DMIC work. So I suppose just convenience? There seems to be several boards doing this (using pc_beep_verbs for init verbs).
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