coreboot-gerrit September 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: libpayload/xhci: Fix Slot State field width definition
by Julius Werner (Code Review) 02 Sep '20

02 Sep '20

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45023 ) Change subject: libpayload/xhci: Fix Slot State field width definition ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/45023 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ae735af3d0840aeee846fa939c37af9aea3dff1 Gerrit-Change-Number: 45023 Gerrit-PatchSet: 2 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 02 Sep 2020 23:21:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso: fix tsc_freq_mhz
by Kangheui Won (Code Review) 02 Sep '20

02 Sep '20

Kangheui Won has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45054 ) Change subject: soc/amd/picasso: fix tsc_freq_mhz ...................................................................... soc/amd/picasso: fix tsc_freq_mhz According to Core::X86::Msr::PStateDef explanation from PPR 55570, cpufid is bit[7:0] and cpudid is bit[13:8]. And correct calcuation based on the same section. Signed-off-by: Kangheui Won <khwon(a)chromium.org> Change-Id: Ia225c9d4fedc5097c8861eae73ca81c9cc344fe5 --- M src/soc/amd/picasso/tsc_freq.c 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/45054/1 diff --git a/src/soc/amd/picasso/tsc_freq.c b/src/soc/amd/picasso/tsc_freq.c index a86080c..c3dd000 100644 --- a/src/soc/amd/picasso/tsc_freq.c +++ b/src/soc/amd/picasso/tsc_freq.c @@ -22,9 +22,9 @@ if (!(msr.hi & 0x80000000)) die("Unknown error: cannot determine P-state 0\n"); - cpufid = (msr.lo & 0x3f); - cpudid = (msr.lo & 0x1c0) >> 6; + cpufid = (msr.lo & 0xff); + cpudid = (msr.lo & 0x3f00) >> 8; - mhz = (100 * (cpufid + 0x10)) / (0x01 << cpudid); + mhz = (200 * cpufid) / cpudid; return mhz; } -- To view, visit https://review.coreboot.org/c/coreboot/+/45054 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia225c9d4fedc5097c8861eae73ca81c9cc344fe5 Gerrit-Change-Number: 45054 Gerrit-PatchSet: 1 Gerrit-Owner: Kangheui Won <khwon(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: security
by Eugene Myers (Code Review) 02 Sep '20

02 Sep '20

Hello Eugene Myers, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/45051 to review the following change. Change subject: security ...................................................................... security Change-Id: I07fbac253dea50fd9caa02e84c33386b27909d50 Signed-off-by: Eugene D Myers <cedarhouse(a)comcast.net> --- M src/security/intel/stm/Makefile.inc 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/45051/1 diff --git a/src/security/intel/stm/Makefile.inc b/src/security/intel/stm/Makefile.inc index dfe613b..57a2814 100644 --- a/src/security/intel/stm/Makefile.inc +++ b/src/security/intel/stm/Makefile.inc @@ -20,4 +20,3 @@ CONFIG_STM_CBMEM_CONSOLE=$(CONFIG_STM_CBMEM_CONSOLE) .PHONY: stm 3rdparty/stm/Stm/build/StmPkg/Core/stm.bin - -- To view, visit https://review.coreboot.org/c/coreboot/+/45051 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I07fbac253dea50fd9caa02e84c33386b27909d50 Gerrit-Change-Number: 45051 Gerrit-PatchSet: 1 Gerrit-Owner: Eugene Myers <cedarhouse1(a)comcast.net> Gerrit-Reviewer: Eugene Myers <cedarhouse(a)comcast.net> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/alderlake/bootblock: Do initial SoC commit till bootblock
by Tim Wawrzynczak (Code Review) 02 Sep '20

02 Sep '20

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44857 ) Change subject: soc/intel/alderlake/bootblock: Do initial SoC commit till bootblock ...................................................................... Patch Set 3: Code-Review+1 (2 comments) https://review.coreboot.org/c/coreboot/+/44857/3/src/soc/intel/alderlake/bo… File src/soc/intel/alderlake/bootblock/cpu.c: https://review.coreboot.org/c/coreboot/+/44857/3/src/soc/intel/alderlake/bo… PS3, Line 16: memory memory mapped https://review.coreboot.org/c/coreboot/+/44857/2/src/soc/intel/alderlake/in… File src/soc/intel/alderlake/include/soc/espi.h: https://review.coreboot.org/c/coreboot/+/44857/2/src/soc/intel/alderlake/in… PS2, Line 5: 621483 > doc is same gotcha thanks -- To view, visit https://review.coreboot.org/c/coreboot/+/44857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I204e692fabb84fce297bebee465f4ca624c6fe56 Gerrit-Change-Number: 44857 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Comment-Date: Wed, 02 Sep 2020 20:49:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Subrata Banik <subi.banik(a)gmail.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/system76/lemp9: gpio: convert the remaining raw pads to macros
by Michael Niewöhner (Code Review) 02 Sep '20

02 Sep '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43648 ) Change subject: mb/system76/lemp9: gpio: convert the remaining raw pads to macros ...................................................................... Patch Set 27: (3 comments) https://review.coreboot.org/c/coreboot/+/43648/26/src/mainboard/system76/le… File src/mainboard/system76/lemp9/gpio.h: https://review.coreboot.org/c/coreboot/+/43648/26/src/mainboard/system76/le… PS26, Line 281: PAD_CFG_GPI_SCI(GPP_D9, NONE, DEEP, LEVEL, INVERT), > this is, what the vendor sets; I'm not sure how to check if that is correct. […] checked with system76 cb repo and ec firmware code https://review.coreboot.org/c/coreboot/+/43648/26/src/mainboard/system76/le… PS26, Line 364: PAD_CFG_GPI_SMI(GPP_E15, NONE, PLTRST, EDGE_SINGLE, NONE), > this is, what the vendor sets; I'm not sure how to check if that is correct. checked with system76 cb repo and ec firmware code and corrected accordingly (difference is that vendor does not invert, while s76 needs it, because the ec output is active low; further, reset is DEEP for s76) https://review.coreboot.org/c/coreboot/+/43648/26/src/mainboard/system76/le… PS26, Line 366: PAD_CFG_GPI_SCI(GPP_E16, NONE, PLTRST, LEVEL, INVERT), > this is, what the vendor sets; I'm not sure how to check if that is correct. […] checked with system76 cb repo and ec firmware code -- To view, visit https://review.coreboot.org/c/coreboot/+/43648 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79d2cca0f300e6daf1c1923a1882e4cc1ffc3c8b Gerrit-Change-Number: 43648 Gerrit-PatchSet: 27 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 02 Sep 2020 18:54:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michael Niewöhner Gerrit-MessageType: comment

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Change in coreboot[master]: mb/system76/lemp9: gpio: convert gpio.h to a cleaner format
by Michael Niewöhner (Code Review) 02 Sep '20

02 Sep '20

Hello Felix Singer, build bot (Jenkins), Nico Huber, Patrick Georgi, Jeremy Soller, Paul Menzel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/43652 to look at the new patch set (#27). Change subject: mb/system76/lemp9: gpio: convert gpio.h to a cleaner format ...................................................................... mb/system76/lemp9: gpio: convert gpio.h to a cleaner format This converts gpio.h to a compacter, cleaner format by keeping gpios in a single line, where possible. Test: images built with TIMELESS do not differ. Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> Change-Id: I9054274dc4c8942935b6a4789bfc1547dd3d4017 --- M src/mainboard/system76/lemp9/gpio.h 1 file changed, 213 insertions(+), 512 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/43652/27 -- To view, visit https://review.coreboot.org/c/coreboot/+/43652 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9054274dc4c8942935b6a4789bfc1547dd3d4017 Gerrit-Change-Number: 43652 Gerrit-PatchSet: 27 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/system76/lemp9: gpio: convert the remaining raw pads to macros
by Michael Niewöhner (Code Review) 02 Sep '20

02 Sep '20

Hello Felix Singer, build bot (Jenkins), Nico Huber, Patrick Georgi, Jeremy Soller, Paul Menzel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/43648 to look at the new patch set (#27). Change subject: mb/system76/lemp9: gpio: convert the remaining raw pads to macros ...................................................................... mb/system76/lemp9: gpio: convert the remaining raw pads to macros Convert the EC and touchpad interrupt pads from raw to macros. Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> Change-Id: I79d2cca0f300e6daf1c1923a1882e4cc1ffc3c8b --- M src/mainboard/system76/lemp9/gpio.h 1 file changed, 8 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/43648/27 -- To view, visit https://review.coreboot.org/c/coreboot/+/43648 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79d2cca0f300e6daf1c1923a1882e4cc1ffc3c8b Gerrit-Change-Number: 43648 Gerrit-PatchSet: 27 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mainboard: add Dell Latitude E7240
by Angel Pons (Code Review) 02 Sep '20

02 Sep '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40300 ) Change subject: mainboard: add Dell Latitude E7240 ...................................................................... Patch Set 2: (20 comments) https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… File src/mainboard/dell/latitude_e7240/Kconfig: https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 6: select CPU_INTEL_HASWELL > already selected by 'NORTHBRIDGE_INTEL_HASWELL' CB:44976 removes this from in-tree mainboards https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 20: default dell/latitude_e7240 > default "dell/latitude_e7240" that is, guard the board directory with quotes, because newer Kconfig dislikes unquoted slashes: CB:42480 https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… File src/mainboard/dell/latitude_e7240/Makefile.inc: https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 2: bootblock-y += gpio.c gpio.c shouldn't be required in bootblock. https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… File src/mainboard/dell/latitude_e7240/bootblock.c: https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 10: pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, 0x007c0901); Uh, this will overwrite what `pch_enable_lpc` programmed (happens just before calling this function). Why not use the correct the value in the devicetree instead? https://review.coreboot.org/c/coreboot/+/40300/1/src/mainboard/dell/latitud… File src/mainboard/dell/latitude_e7240/devicetree.cb: https://review.coreboot.org/c/coreboot/+/40300/1/src/mainboard/dell/latitud… PS1, Line 90: Unsupported PCI device 8086:282a > Hmmm Done https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… File src/mainboard/dell/latitude_e7240/devicetree.cb: https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 4: register "gpu_ddi_e_connected" = "0" N/A for Haswell-LP https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 7: register "gpu_dp_d_hotplug" = "4" N/A for Haswell-LP https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 8: register "gpu_panel_port_select" = "0" I'm going to kill this (it's reserved MBZ on haswell) https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 38: register "gen2_dec" = "0x005c0921" This value is programmed on the hardware, but then overwritten in `mainboard_config_superio`, so the hardware ends up with a different value than the one in the devicetree. The allocator will use the devicetree value when reading resources, even though the actual register contains a different value. https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 47: (eSATA?) Schematics say DOCK https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 50: device pci 14.0 on end # xHCI Controller nit: IMHO, having the `end` keywords aligned (one extra space for the "on" case) eases reading the devicetree: device pci 14.0 on end # xHCI Controller device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 63: device pci 1c.5 off end # PCIe Port #6 This can be muxed between PCIe and SATA, depending on the state of GPIO37 (called mCARD_PCIE_SATA# in the schematics and controlled by GPIOE3 of the SMSC ECE5048) https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 64: device pci 1c.6 off end # PCIe Port #7 : device pci 1c.7 off end # PCIe Port #8 These devices don't exist on HSW-LP https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… File src/mainboard/dell/latitude_e7240/gma-mainboard.ads: https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 11: -- FIXME: check this The only ports that should be in here are DP2, HDMI1 and eDP: DDI1 is used for HDMI, so DP1 isn't supported. DDI2 is used for DP, and there's no hardware to support for HDMI alt mode, so HDMI2 is not possible. DP3, HDMI3, Analog and LVDS do not exist on Haswell-LP. https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… File src/mainboard/dell/latitude_e7240/gpio.c: https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 6: LP_GPIO_OUT_LOW, /* 0: OUTPUT LOW */ Instead of adding the GPIO number in comments, just use positional initializers for the array components: [0] = LP_GPIO_OUT_LOW, [1] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL }, This is better because the numbers can't be wrong (and if they are, it won't build) https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 14: { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL, .pirq = GPIO_PIRQ_APIC_ROUTE }, /* 8 */ > line over 96 characters I'd define macros for these before the GPIO array, so as to make Jenkins happy and use one line per GPIO. https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 102: }; > adding a line without newline at end of file Just add a final newline to make Jenkins happy. https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… File src/mainboard/dell/latitude_e7240/romstage.c: https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 32: { 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_DOCK }, Schematics say this is WLAN + BT (that means, USB is wired to a mPCIe slot). The length seems rather long and the port type isn't accurate. https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 34: { 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL }, nit: schematics say this is USH / Smart Card https://review.coreboot.org/c/coreboot/+/40300/2/src/mainboard/dell/latitud… PS2, Line 37: { 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL }, nit: schematics say this is for the touchscreen -- To view, visit https://review.coreboot.org/c/coreboot/+/40300 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6933bdbcc8d0bbb85d62657624740266284ac71c Gerrit-Change-Number: 40300 Gerrit-PatchSet: 2 Gerrit-Owner: Iru Cai (vimacs) <mytbk920423(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 02 Sep 2020 16:21:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: build bot (Jenkins) <no-reply(a)coreboot.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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Change in coreboot[master]: treewide: stop using hexdumps for spd files
by Aaron Durbin (Code Review) 02 Sep '20

02 Sep '20

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44775 ) Change subject: treewide: stop using hexdumps for spd files ...................................................................... Patch Set 14: (1 comment) https://review.coreboot.org/c/coreboot/+/44775/14/src/lib/Makefile.inc File src/lib/Makefile.inc: https://review.coreboot.org/c/coreboot/+/44775/14/src/lib/Makefile.inc@363 PS14, Line 363: cat $(LIB_SPD_DEPS) > $@ > iow. "Should we fail the build, when the spd. […] That's what I was suggesting. However, my broader concern is that we're associating the proper expectations for a particular Kconfig option. I didn't want semantic changes leaking in. Basically double check we're not silently failing things. -- To view, visit https://review.coreboot.org/c/coreboot/+/44775 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0f24183a872924cddcfdf7587cc0c126da900f91 Gerrit-Change-Number: 44775 Gerrit-PatchSet: 14 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 02 Sep 2020 15:25:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michael Niewöhner Comment-In-Reply-To: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: comment

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Change in gerrit-avatars[master]: Add my avatar
by Scott Chao (Code Review) 02 Sep '20

02 Sep '20

Scott Chao has uploaded this change for review. ( https://review.coreboot.org/c/gerrit-avatars/+/44978 ) Change subject: Add my avatar ...................................................................... Add my avatar Signed-off-by: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Change-Id: Ie5804f54da04d104b0890ea1e17ca475a8bf0a74 --- A 1002712.jpg 1 file changed, 0 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/gerrit-avatars refs/changes/78/44978/1 diff --git a/1002712.jpg b/1002712.jpg new file mode 100644 index 0000000..a05f7be --- /dev/null +++ b/1002712.jpg Binary files differ -- To view, visit https://review.coreboot.org/c/gerrit-avatars/+/44978 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: gerrit-avatars Gerrit-Branch: master Gerrit-Change-Id: Ie5804f54da04d104b0890ea1e17ca475a8bf0a74 Gerrit-Change-Number: 44978 Gerrit-PatchSet: 1 Gerrit-Owner: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-MessageType: newchange

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2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit September 2020