coreboot-gerrit September 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: ec/system76: undefine PECI gpio in ACPI to prevent build failure
by Angel Pons (Code Review) 13 Sep '20

13 Sep '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45323 ) Change subject: ec/system76: undefine PECI gpio in ACPI to prevent build failure ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/c/coreboot/+/45323/2//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/45323/2//COMMIT_MSG@9 PS2, Line 9: PECI Why not rename the GPIO definition? -- To view, visit https://review.coreboot.org/c/coreboot/+/45323 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I60b752b906d95f858195965544d91c0b9cc9ff8a Gerrit-Change-Number: 45323 Gerrit-PatchSet: 2 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 13 Sep 2020 15:33:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/cannonlake: add missing special function pads
by Michael Niewöhner (Code Review) 13 Sep '20

13 Sep '20

Hello Felix Singer, build bot (Jenkins), Nico Huber, Patrick Georgi, Paul Menzel, Subrata Banik, Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/45211 to look at the new patch set (#10). Change subject: soc/intel/cannonlake: add missing special function pads ...................................................................... soc/intel/cannonlake: add missing special function pads The following parameters do nothing else than configuring the corresponding pads to native mode: - DdiPortEdp - DdiPort*Hpd - DdiPort*Ddc - GpioDdp* - SpiGpioAssign - I2c*GpioAssign - SerialIoUartDebugEnable - Gp*GpioAssign - Uart*GpioAssign - GpioEnableHdaLink - AudioLinkDmic* - AudioLinkSsp* - GpioEnableHdaSspMasterClock - AudioLinkSndw* - SmbAlertEnable Add the missing special function gpio pad groups for CNL, to be able to configure them via gpio.h instead having to set various FSP parameters. The groups and names are documented in the PCH EDS, in Linux (linux/drivers/pinctrl/intel/pinctrl-cannonlake.c) and other places. Also, see soc/intel/tigerlake for reference. Change-Id: Ia3bc1df1a14dbca7c7213577cb2d5b98bb0acf64 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/cannonlake/acpi/gpio.asl M src/soc/intel/cannonlake/gpio.c M src/soc/intel/cannonlake/gpio_cnp_h.c M src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h M src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h 5 files changed, 38 insertions(+), 30 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/45211/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/45211 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia3bc1df1a14dbca7c7213577cb2d5b98bb0acf64 Gerrit-Change-Number: 45211 Gerrit-PatchSet: 10 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/cannonlake: rename "RSVD" GPIOs to their correct names
by Michael Niewöhner (Code Review) 13 Sep '20

13 Sep '20

Hello Felix Singer, build bot (Jenkins), Nico Huber, Patrick Georgi, Paul Menzel, Subrata Banik, Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/45210 to look at the new patch set (#12). Change subject: soc/intel/cannonlake: rename "RSVD" GPIOs to their correct names ...................................................................... soc/intel/cannonlake: rename "RSVD" GPIOs to their correct names The names of the GPIO_RSVD_* are documented in the PCH EDS, in Linux (linux/drivers/pinctrl/intel/pinctrl-cannonlake.c) and other places. Also, see soc/intel/tigerlake for reference. Change-Id: I59df09c8fd464e75f918455aa1972765abc51459 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/cannonlake/acpi/gpio.asl M src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl M src/soc/intel/cannonlake/gpio.c M src/soc/intel/cannonlake/gpio_cnp_h.c M src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h M src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h 6 files changed, 130 insertions(+), 130 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/45210/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/45210 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I59df09c8fd464e75f918455aa1972765abc51459 Gerrit-Change-Number: 45210 Gerrit-PatchSet: 12 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/cannonlake: fix GPIO community numbering in ACPI
by Michael Niewöhner (Code Review) 13 Sep '20

13 Sep '20

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Change in coreboot[master]: ec/system76: undefine PECI gpio in ACPI to prevent build failure
by Michael Niewöhner (Code Review) 13 Sep '20

13 Sep '20

Hello Felix Singer, Jeremy Soller, Paul Menzel, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/45323 to look at the new patch set (#2). Change subject: ec/system76: undefine PECI gpio in ACPI to prevent build failure ...................................................................... ec/system76: undefine PECI gpio in ACPI to prevent build failure PECI is defined as GPIO 268 in CNL-LP soc code. Thus, it gets replaced by the literal number '268' in ACPI code, failing the build. Undefine PECI in the ACPI code to fix this. Change-Id: I60b752b906d95f858195965544d91c0b9cc9ff8a Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/ec/system76/ec/acpi/ec_ram.asl 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/45323/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/45323 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I60b752b906d95f858195965544d91c0b9cc9ff8a Gerrit-Change-Number: 45323 Gerrit-PatchSet: 2 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: ec/system76: undefine PECI gpio to prevent build failure
by Michael Niewöhner (Code Review) 13 Sep '20

13 Sep '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45323 ) Change subject: ec/system76: undefine PECI gpio to prevent build failure ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/45323 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I60b752b906d95f858195965544d91c0b9cc9ff8a Gerrit-Change-Number: 45323 Gerrit-PatchSet: 1 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sun, 13 Sep 2020 15:21:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: libpayload: malloc: Fix realloc for overlapping buffers
by Yu-Ping Wu (Code Review) 13 Sep '20

13 Sep '20

Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45284 ) Change subject: libpayload: malloc: Fix realloc for overlapping buffers ...................................................................... libpayload: malloc: Fix realloc for overlapping buffers The current realloc() works by freeing the origin buffer, allocating a new one, and copying the data over. It's true that free() won't touch the actual memory. However, the alloc() following it will potentially modify the memory that belongs to the old buffer in order to create a new free block (right after the newly allocated block). This causes 8 bytes (HDRSIZE) to be overwritten before being copied to the new buffer. To fix the problem, we must create the header of the new free block after the data is copied. In this patch, the content of alloc() is split into two functions: 1. find_free_block(): Find a free block with large enough size, without touching the memory 2. use_block(): Update the header of the newly allocated block, and create the header of the new free block right after it Then, inside realloc(), call memmove() call right after find_free_block() while before use_block(). BUG=b:165439970 TEST=emerge-puff libpayload TEST=Puff boots TEST=Verified realloc() correctly copied data when buffers overlapped Change-Id: I9418320a26820909144890300ddfb09ec2570f43 Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M payloads/libpayload/libc/malloc.c 1 file changed, 57 insertions(+), 34 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/45284/1 diff --git a/payloads/libpayload/libc/malloc.c b/payloads/libpayload/libc/malloc.c index 8b22daa..48bf32e 100644 --- a/payloads/libpayload/libc/malloc.c +++ b/payloads/libpayload/libc/malloc.c @@ -123,7 +123,8 @@ return !dma_initialized() || (dma->start <= ptr && dma->end > ptr); } -static void *alloc(int len, struct memory_type *type) +/* Find free block of size >= len */ +static hdrtype_t volatile *find_free_block(int len, struct memory_type *type) { hdrtype_t header; hdrtype_t volatile *ptr = (hdrtype_t volatile *)type->start; @@ -156,37 +157,53 @@ halt(); } - if (header & FLAG_FREE) { - if (len <= size) { - hdrtype_t volatile *nptr = (hdrtype_t volatile *)((uintptr_t)ptr + HDRSIZE + len); - int nsize = size - (HDRSIZE + len); - - /* If there is still room in this block, - * then mark it as such otherwise account - * the whole space for that block. - */ - - if (nsize > 0) { - /* Mark the block as used. */ - *ptr = USED_BLOCK(len); - - /* Create a new free block. */ - *nptr = FREE_BLOCK(nsize); - } else { - /* Mark the block as used. */ - *ptr = USED_BLOCK(size); - } - - return (void *)((uintptr_t)ptr + HDRSIZE); - } - } + if ((header & FLAG_FREE) && len <= size) + return ptr; ptr = (hdrtype_t volatile *)((uintptr_t)ptr + HDRSIZE + size); } while (ptr < (hdrtype_t *) type->end); /* Nothing available. */ - return (void *)NULL; + return NULL; +} + +/* Mark the block with length 'len' as used */ +static void use_block(hdrtype_t volatile *ptr, int len) +{ + /* Align the size. */ + len = ALIGN_UP(len, HDRSIZE); + + hdrtype_t volatile *nptr = (hdrtype_t volatile *) + ((uintptr_t)ptr + HDRSIZE + len); + int size = SIZE(*ptr); + int nsize = size - (HDRSIZE + len); + + /* + * If there is still room in this block, then mark it as such otherwise + * account the whole space for that block. + */ + if (nsize > 0) { + /* Mark the block as used. */ + *ptr = USED_BLOCK(len); + + /* Create a new free block. */ + *nptr = FREE_BLOCK(nsize); + } else { + /* Mark the block as used. */ + *ptr = USED_BLOCK(size); + } +} + +static void *alloc(int len, struct memory_type *type) +{ + hdrtype_t volatile *ptr = find_free_block(len, type); + + if (ptr == NULL) + return NULL; + + use_block(ptr, len); + return (void *)((uintptr_t)ptr + HDRSIZE); } static void _consolidate(struct memory_type *type) @@ -277,6 +294,7 @@ void *realloc(void *ptr, size_t size) { void *ret, *pptr; + hdrtype_t volatile *block; unsigned int osize; struct memory_type *type = heap; @@ -300,18 +318,23 @@ * reallocated the new space. */ free(ptr); - ret = alloc(size, type); + + block = find_free_block(size, type); + if (block == NULL) + return NULL; + + ret = (void *)((uintptr_t)block + HDRSIZE); /* - * if ret == NULL, then doh - failure. - * if ret == ptr then woo-hoo! no copy needed. + * If ret == ptr, then no copy is needed. Otherwise, move the memory to + * the new location, which might be before the old one and overlap since + * the free() above includes a _consolidate(). */ - if (ret == NULL || ret == ptr) - return ret; + if (ret != ptr) + memmove(ret, ptr, osize > size ? size : osize); - /* Move the memory to the new location. Might be before the old location - and overlap since the free() above includes a _consolidate(). */ - memmove(ret, ptr, osize > size ? size : osize); + /* Mark the block as used. */ + use_block(block, size); return ret; } -- To view, visit https://review.coreboot.org/c/coreboot/+/45284 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9418320a26820909144890300ddfb09ec2570f43 Gerrit-Change-Number: 45284 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: lenovo/x60: Enable TPM
by Masanori Ogino (Code Review) 13 Sep '20

13 Sep '20

Masanori Ogino has uploaded a new patch set (#9) to the change originally created by Denis Carikli. ( https://review.coreboot.org/c/coreboot/+/13410 ) Change subject: lenovo/x60: Enable TPM ...................................................................... lenovo/x60: Enable TPM Enable the TPM device in the devicetree, and select the Kconfig option to add the appropriate ASL code. This is adapted from the commit below: 3d02b9c mainboard/lenovo/{t430s,t420s,t520,t530,x220}: Add TPM 1.2 mainboard support Without that patch, coreboot doesn't touch the TPM, and, in GNU/Linux, the TPM is not detected automatically. It can still be used by running: modprobe tpm_tis force=1 which initializes it. From dmesg: tpm_tis tpm_tis: 1.2 TPM (device-id 0x3202, rev-id 5) tpm tpm0: A TPM error (38) occurred attempting to determine the timeouts tpm tpm0: Issuing TPM_STARTUP tpm tpm0: [Hardware Error]: Adjusting reported timeouts: A 10000->10000us B 10000->10000us C 0->750000us D 0->750000us With this patch, the TPM is found detected automatically, and we have the folliwing in dmesg: tpm_tis 00:07: 1.2 TPM (device-id 0x3202, rev-id 5) tpm tpm0: A TPM error (38) occurred attempting to determine the timeouts tpm tpm0: Issuing TPM_STARTUP tpm tpm0: [Hardware Error]: Adjusting reported timeouts: A 10000->10000us B 10000->10000us C 0->750000us D 0->750000us TEST=Linux 4.10.8 creates `/dev/tpm0` automatically. Change-Id: I6e65b37507c111af1c0c56822327d5497f58f085 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Signed-off-by: Masanori Ogino <mogino(a)acm.org> --- M src/mainboard/lenovo/x60/Kconfig M src/mainboard/lenovo/x60/devicetree.cb 2 files changed, 5 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/13410/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/13410 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e65b37507c111af1c0c56822327d5497f58f085 Gerrit-Change-Number: 13410 Gerrit-PatchSet: 9 Gerrit-Owner: Denis Carikli <GNUtoo(a)no-log.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Denis 'GNUtoo' Carikli <GNUtoo(a)cyberdimension.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Masanori Ogino <mogino(a)acm.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: lenovo/x60: Enable TPM
by Masanori Ogino (Code Review) 13 Sep '20

13 Sep '20

Masanori Ogino has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/13410 ) Change subject: lenovo/x60: Enable TPM ...................................................................... Patch Set 8: > Patch Set 8: > > > Patch Set 8: > > > > I have rebased this, adjusted Kconfig to address comment by Philipp, and remove romstage.c as it is no longer needed. > > It compiles and boots, but does not work yet. (I got the very same log as Arthur had commented.) > > > > Would you mind if I upload new revision? > > Thanks a lot for working on this. That would be great! > > In general anyone should free to pickup any of my unfinished work as what's most important for me is to have the work done regardless on how it's done or who does it. > > Denis. Thank you! -- To view, visit https://review.coreboot.org/c/coreboot/+/13410 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e65b37507c111af1c0c56822327d5497f58f085 Gerrit-Change-Number: 13410 Gerrit-PatchSet: 8 Gerrit-Owner: Denis Carikli <GNUtoo(a)no-log.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Denis 'GNUtoo' Carikli <GNUtoo(a)cyberdimension.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Masanori Ogino <mogino(a)acm.org> Gerrit-Comment-Date: Sun, 13 Sep 2020 12:46:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/cnl: Add ACPI support for PMC core OS driver
by Angel Pons (Code Review) 13 Sep '20

13 Sep '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45318 ) Change subject: soc/intel/cnl: Add ACPI support for PMC core OS driver ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/45318 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibf7c8ba7449df15c2ca30d23791e17fc878204f2 Gerrit-Change-Number: 45318 Gerrit-PatchSet: 3 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 13 Sep 2020 11:29:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit September 2020