coreboot-gerrit September 2020

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Change in coreboot[master]: mb/amd/olivehill/bootblock.c: Add missing <arch/io.h>
by HAOUAS Elyes (Code Review) 14 Sep '20

14 Sep '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45314 ) Change subject: mb/amd/olivehill/bootblock.c: Add missing <arch/io.h> ...................................................................... mb/amd/olivehill/bootblock.c: Add missing <arch/io.h> Change-Id: I75ea4fc71cf22e5ad547329db2451342cee528b2 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/amd/olivehill/bootblock.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/45314/1 diff --git a/src/mainboard/amd/olivehill/bootblock.c b/src/mainboard/amd/olivehill/bootblock.c index d1bdd09..0dd836f 100644 --- a/src/mainboard/amd/olivehill/bootblock.c +++ b/src/mainboard/amd/olivehill/bootblock.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <amdblocks/acpimmio.h> +#include <arch/io.h> #include <bootblock_common.h> #include <device/pnp_ops.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/45314 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I75ea4fc71cf22e5ad547329db2451342cee528b2 Gerrit-Change-Number: 45314 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: [UNTESTED] nb/intel/ironlake: Reserve gap betwen TSEG and BGSM
by Nico Huber (Code Review) 14 Sep '20

14 Sep '20

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45325 ) Change subject: [UNTESTED] nb/intel/ironlake: Reserve gap betwen TSEG and BGSM ...................................................................... [UNTESTED] nb/intel/ironlake: Reserve gap betwen TSEG and BGSM There may be a gap between TSEG and the graphics stolen memory due to the alignment done in `raminit.c`. If we allocate MMIO resources in this range, it misbehaves unpredictably, so reserve it. Change-Id: If305e9751ebf4edc945cf038ed72698f3696e52d Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/northbridge/intel/ironlake/northbridge.c 1 file changed, 7 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/45325/1 diff --git a/src/northbridge/intel/ironlake/northbridge.c b/src/northbridge/intel/ironlake/northbridge.c index 9b7ea85..cf014fe 100644 --- a/src/northbridge/intel/ironlake/northbridge.c +++ b/src/northbridge/intel/ironlake/northbridge.c @@ -92,7 +92,7 @@ static void mc_read_resources(struct device *dev) { - uint32_t tseg_base; + uint32_t tseg_base, tseg_end; uint64_t touud; uint16_t reg16; int index = 3; @@ -102,6 +102,7 @@ mmconf_resource(dev, 0x50); tseg_base = pci_read_config32(pcidev_on_root(0, 0), TSEG); + tseg_end = tseg_base + CONFIG_SMM_TSEG_SIZE; touud = pci_read_config16(pcidev_on_root(0, 0), TOUUD); @@ -131,6 +132,11 @@ pci_read_config32(pcidev_on_root(0, 0), IGD_BASE); gtt_base = pci_read_config32(pcidev_on_root(0, 0), GTT_BASE); + if (gtt_base > tseg_end) { + /* Reserve the gap. MMIO doesn't work in this range. Keep + it uncacheable, though, for easier MTRR allocation. */ + mmio_resource(dev, index++, tseg_end >> 10, (gtt_base - tseg_end) >> 10); + } mmio_resource(dev, index++, gtt_base >> 10, uma_size_gtt << 10); mmio_resource(dev, index++, igd_base >> 10, uma_size_igd << 10); -- To view, visit https://review.coreboot.org/c/coreboot/+/45325 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If305e9751ebf4edc945cf038ed72698f3696e52d Gerrit-Change-Number: 45325 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: src/mainboard: Remove unused include <device/pnp_ops.h>
by HAOUAS Elyes (Code Review) 14 Sep '20

14 Sep '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45313 ) Change subject: src/mainboard: Remove unused include <device/pnp_ops.h> ...................................................................... src/mainboard: Remove unused include <device/pnp_ops.h> Change-Id: I278fb20aa176bb09f1ff135fdfd732f0096d3808 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/amd/olivehill/bootblock.c M src/mainboard/ocp/deltalake/bootblock.c M src/mainboard/ocp/tiogapass/bootblock.c 3 files changed, 0 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/45313/1 diff --git a/src/mainboard/amd/olivehill/bootblock.c b/src/mainboard/amd/olivehill/bootblock.c index d1bdd09..d3f9235 100644 --- a/src/mainboard/amd/olivehill/bootblock.c +++ b/src/mainboard/amd/olivehill/bootblock.c @@ -2,7 +2,6 @@ #include <amdblocks/acpimmio.h> #include <bootblock_common.h> -#include <device/pnp_ops.h> void bootblock_mainboard_early_init(void) { diff --git a/src/mainboard/ocp/deltalake/bootblock.c b/src/mainboard/ocp/deltalake/bootblock.c index 312a7f9..402b572 100644 --- a/src/mainboard/ocp/deltalake/bootblock.c +++ b/src/mainboard/ocp/deltalake/bootblock.c @@ -3,7 +3,6 @@ #include <bootblock_common.h> #include <device/pci_def.h> #include <device/pci_ops.h> -#include <device/pnp_ops.h> #include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> #include <soc/intel/common/block/lpc/lpc_def.h> diff --git a/src/mainboard/ocp/tiogapass/bootblock.c b/src/mainboard/ocp/tiogapass/bootblock.c index 9fc34d7..b5c2aa1 100644 --- a/src/mainboard/ocp/tiogapass/bootblock.c +++ b/src/mainboard/ocp/tiogapass/bootblock.c @@ -3,7 +3,6 @@ #include <bootblock_common.h> #include <device/pci_def.h> #include <device/pci_ops.h> -#include <device/pnp_ops.h> #include <intelblocks/pcr.h> #include <soc/pci_devs.h> #include <soc/pcr_ids.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/45313 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I278fb20aa176bb09f1ff135fdfd732f0096d3808 Gerrit-Change-Number: 45313 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: src: include <device/pnp_def.h> only when needed
by HAOUAS Elyes (Code Review) 14 Sep '20

14 Sep '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45312 ) Change subject: src: include <device/pnp_def.h> only when needed ...................................................................... src: include <device/pnp_def.h> only when needed Change-Id: I835e8786b84ec16889fd08f566328bc7a0a60c90 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/device/pnp_device.c M src/ec/hp/kbc1126/early_init.c M src/ec/kontron/it8516e/ec.c M src/include/device/pnp.h M src/mainboard/facebook/monolith/com_init.c M src/mainboard/lenovo/t400/dock.c M src/superio/aspeed/common/early_config.c M src/superio/fintek/common/early_serial.c M src/superio/fintek/f71808a/f71808a_hwm.c M src/superio/fintek/f71863fg/superio.c M src/superio/fintek/f71869ad/f71869ad_hwm.c M src/superio/fintek/f81866d/f81866d_hwm.c M src/superio/fintek/f81866d/f81866d_uart.c M src/superio/ite/common/early_serial.c M src/superio/ite/it8613e/superio.c M src/superio/ite/it8623e/superio.c M src/superio/ite/it8718f/superio.c M src/superio/ite/it8720f/superio.c M src/superio/ite/it8728f/superio.c M src/superio/ite/it8772f/superio.c M src/superio/ite/it8783ef/superio.c M src/superio/ite/it8786e/superio.c M src/superio/nuvoton/common/early_serial.c M src/superio/nuvoton/npcd378/superio.c M src/superio/serverengines/pilot/early_serial.c M src/superio/smsc/kbc1100/superio.c M src/superio/smsc/lpc47m10x/early_serial.c M src/superio/smsc/lpc47m15x/early_serial.c M src/superio/smsc/lpc47n217/superio.c M src/superio/smsc/lpc47n227/superio.c M src/superio/smsc/sch5545/sch5545_early_init.c M src/superio/smsc/sch5545/sch5545_emi.c M src/superio/smsc/sch5545/superio.c M src/superio/winbond/common/early_init.c M src/superio/winbond/w83627ehg/superio.c M src/superio/winbond/w83627hf/superio.c 36 files changed, 38 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/45312/1 diff --git a/src/device/pnp_device.c b/src/device/pnp_device.c index cd7adf3..1f5a8ee 100644 --- a/src/device/pnp_device.c +++ b/src/device/pnp_device.c @@ -5,6 +5,7 @@ #include <arch/io.h> #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> /* PNP config mode wrappers */ diff --git a/src/ec/hp/kbc1126/early_init.c b/src/ec/hp/kbc1126/early_init.c index 415ebab..45a7c62 100644 --- a/src/ec/hp/kbc1126/early_init.c +++ b/src/ec/hp/kbc1126/early_init.c @@ -3,6 +3,8 @@ #include <arch/io.h> #include <device/pnp_ops.h> #include <device/pnp.h> +#include <device/pnp_def.h> + #include "ec.h" void kbc1126_enter_conf(void) diff --git a/src/ec/kontron/it8516e/ec.c b/src/ec/kontron/it8516e/ec.c index 9af670a..3ace04a 100644 --- a/src/ec/kontron/it8516e/ec.c +++ b/src/ec/kontron/it8516e/ec.c @@ -3,6 +3,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <ec/acpi/ec.h> #include <option.h> diff --git a/src/include/device/pnp.h b/src/include/device/pnp.h index 800bcc0..ffc5036 100644 --- a/src/include/device/pnp.h +++ b/src/include/device/pnp.h @@ -3,7 +3,6 @@ #include <stdint.h> #include <device/device.h> -#include <device/pnp_def.h> #include <device/pnp_type.h> #include <arch/io.h> diff --git a/src/mainboard/facebook/monolith/com_init.c b/src/mainboard/facebook/monolith/com_init.c index 98a0232..f0c2157 100644 --- a/src/mainboard/facebook/monolith/com_init.c +++ b/src/mainboard/facebook/monolith/com_init.c @@ -3,6 +3,8 @@ #include <bootblock_common.h> #include <device/pnp_ops.h> #include <device/pnp.h> +#include <device/pnp_def.h> + #include "onboard.h" #define SERIAL_DEV1 PNP_DEV(ITE8528_CMD_PORT, 1) /* ITE8528 UART1 */ diff --git a/src/mainboard/lenovo/t400/dock.c b/src/mainboard/lenovo/t400/dock.c index b8163e71..043f3ac 100644 --- a/src/mainboard/lenovo/t400/dock.c +++ b/src/mainboard/lenovo/t400/dock.c @@ -6,6 +6,7 @@ #include <device/pnp_ops.h> #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <delay.h> #include "dock.h" #include <superio/nsc/pc87382/pc87382.h> diff --git a/src/superio/aspeed/common/early_config.c b/src/superio/aspeed/common/early_config.c index b0aab89..716a896 100644 --- a/src/superio/aspeed/common/early_config.c +++ b/src/superio/aspeed/common/early_config.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include <arch/io.h> -#include <device/pnp_def.h> #include <device/pnp_ops.h> #include <stdint.h> #include <commonlib/helpers.h> diff --git a/src/superio/fintek/common/early_serial.c b/src/superio/fintek/common/early_serial.c index 79af111..843e209 100644 --- a/src/superio/fintek/common/early_serial.c +++ b/src/superio/fintek/common/early_serial.c @@ -22,6 +22,7 @@ #include <arch/io.h> #include <device/pnp_ops.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <stdint.h> #include "fintek.h" diff --git a/src/superio/fintek/f71808a/f71808a_hwm.c b/src/superio/fintek/f71808a/f71808a_hwm.c index 340bc30..992a870 100644 --- a/src/superio/fintek/f71808a/f71808a_hwm.c +++ b/src/superio/fintek/f71808a/f71808a_hwm.c @@ -3,6 +3,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include "fintek_internal.h" #include "chip.h" diff --git a/src/superio/fintek/f71863fg/superio.c b/src/superio/fintek/f71863fg/superio.c index c4e8dc9..11e1600 100644 --- a/src/superio/fintek/f71863fg/superio.c +++ b/src/superio/fintek/f71863fg/superio.c @@ -2,6 +2,7 @@ #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <superio/conf_mode.h> #include <pc80/keyboard.h> diff --git a/src/superio/fintek/f71869ad/f71869ad_hwm.c b/src/superio/fintek/f71869ad/f71869ad_hwm.c index 6333ae1..408e0e1 100644 --- a/src/superio/fintek/f71869ad/f71869ad_hwm.c +++ b/src/superio/fintek/f71869ad/f71869ad_hwm.c @@ -3,6 +3,8 @@ #include <console/console.h> #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> + #include "chip.h" #include "fintek_internal.h" diff --git a/src/superio/fintek/f81866d/f81866d_hwm.c b/src/superio/fintek/f81866d/f81866d_hwm.c index a7ed96b..41f9d47 100644 --- a/src/superio/fintek/f81866d/f81866d_hwm.c +++ b/src/superio/fintek/f81866d/f81866d_hwm.c @@ -7,6 +7,8 @@ #include <console/console.h> #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> + #include "fintek_internal.h" #include "chip.h" diff --git a/src/superio/fintek/f81866d/f81866d_uart.c b/src/superio/fintek/f81866d/f81866d_uart.c index 7d98a7f..23dda77 100644 --- a/src/superio/fintek/f81866d/f81866d_uart.c +++ b/src/superio/fintek/f81866d/f81866d_uart.c @@ -3,6 +3,8 @@ #include <console/console.h> #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> + #include "fintek_internal.h" #include "f81866d.h" diff --git a/src/superio/ite/common/early_serial.c b/src/superio/ite/common/early_serial.c index 6b05a38..b26680b 100644 --- a/src/superio/ite/common/early_serial.c +++ b/src/superio/ite/common/early_serial.c @@ -3,6 +3,7 @@ #include <arch/io.h> #include <device/pnp_ops.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <stdint.h> #include "ite.h" diff --git a/src/superio/ite/it8613e/superio.c b/src/superio/ite/it8613e/superio.c index 4d12457..83b1858 100644 --- a/src/superio/ite/it8613e/superio.c +++ b/src/superio/ite/it8613e/superio.c @@ -2,6 +2,7 @@ #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <pc80/keyboard.h> #include <superio/conf_mode.h> #include <superio/ite/common/env_ctrl.h> diff --git a/src/superio/ite/it8623e/superio.c b/src/superio/ite/it8623e/superio.c index ca3455a..b7a4b49 100644 --- a/src/superio/ite/it8623e/superio.c +++ b/src/superio/ite/it8623e/superio.c @@ -2,6 +2,7 @@ #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <pc80/keyboard.h> #include <superio/conf_mode.h> #include <superio/ite/common/env_ctrl.h> diff --git a/src/superio/ite/it8718f/superio.c b/src/superio/ite/it8718f/superio.c index aab554f..47ecb27 100644 --- a/src/superio/ite/it8718f/superio.c +++ b/src/superio/ite/it8718f/superio.c @@ -2,6 +2,7 @@ #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <pc80/keyboard.h> #include <superio/ite/common/env_ctrl.h> #include <superio/conf_mode.h> diff --git a/src/superio/ite/it8720f/superio.c b/src/superio/ite/it8720f/superio.c index c395953..dd399f8 100644 --- a/src/superio/ite/it8720f/superio.c +++ b/src/superio/ite/it8720f/superio.c @@ -2,6 +2,7 @@ #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <pc80/keyboard.h> #include <option.h> #include <superio/ite/common/env_ctrl.h> diff --git a/src/superio/ite/it8728f/superio.c b/src/superio/ite/it8728f/superio.c index 22e6ecb..7943f13 100644 --- a/src/superio/ite/it8728f/superio.c +++ b/src/superio/ite/it8728f/superio.c @@ -2,6 +2,7 @@ #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <superio/conf_mode.h> #include <pc80/keyboard.h> #include <superio/ite/common/env_ctrl.h> diff --git a/src/superio/ite/it8772f/superio.c b/src/superio/ite/it8772f/superio.c index 6672cdc..dc323ae 100644 --- a/src/superio/ite/it8772f/superio.c +++ b/src/superio/ite/it8772f/superio.c @@ -2,6 +2,7 @@ #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <console/console.h> #include <pc80/keyboard.h> #include <arch/io.h> diff --git a/src/superio/ite/it8783ef/superio.c b/src/superio/ite/it8783ef/superio.c index feb373f..36651a1 100644 --- a/src/superio/ite/it8783ef/superio.c +++ b/src/superio/ite/it8783ef/superio.c @@ -2,6 +2,7 @@ #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <pc80/keyboard.h> #include <superio/conf_mode.h> #include <superio/ite/common/env_ctrl.h> diff --git a/src/superio/ite/it8786e/superio.c b/src/superio/ite/it8786e/superio.c index 55fff91..df4b3e7 100644 --- a/src/superio/ite/it8786e/superio.c +++ b/src/superio/ite/it8786e/superio.c @@ -2,6 +2,7 @@ #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <pc80/keyboard.h> #include <superio/conf_mode.h> #include <superio/ite/common/env_ctrl.h> diff --git a/src/superio/nuvoton/common/early_serial.c b/src/superio/nuvoton/common/early_serial.c index 22d882e..b87feea 100644 --- a/src/superio/nuvoton/common/early_serial.c +++ b/src/superio/nuvoton/common/early_serial.c @@ -22,6 +22,7 @@ #include <arch/io.h> #include <device/pnp_ops.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <stdint.h> #include "nuvoton.h" diff --git a/src/superio/nuvoton/npcd378/superio.c b/src/superio/nuvoton/npcd378/superio.c index b7f98af..949e278 100644 --- a/src/superio/nuvoton/npcd378/superio.c +++ b/src/superio/nuvoton/npcd378/superio.c @@ -4,6 +4,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <option.h> #include <pc80/keyboard.h> #include <superio/conf_mode.h> diff --git a/src/superio/serverengines/pilot/early_serial.c b/src/superio/serverengines/pilot/early_serial.c index e415413..11d6631 100644 --- a/src/superio/serverengines/pilot/early_serial.c +++ b/src/superio/serverengines/pilot/early_serial.c @@ -5,6 +5,8 @@ #include <arch/io.h> #include <device/pnp_ops.h> #include <device/pnp.h> +#include <device/pnp_def.h> + #include "pilot.h" /* Pilot uses 0x5A/0xA5 pattern to activate deactivate config access. */ diff --git a/src/superio/smsc/kbc1100/superio.c b/src/superio/smsc/kbc1100/superio.c index 91457a1..1743624 100644 --- a/src/superio/smsc/kbc1100/superio.c +++ b/src/superio/smsc/kbc1100/superio.c @@ -4,6 +4,7 @@ #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <superio/conf_mode.h> #include <pc80/keyboard.h> diff --git a/src/superio/smsc/lpc47m10x/early_serial.c b/src/superio/smsc/lpc47m10x/early_serial.c index 38a13f5..7a8e18f 100644 --- a/src/superio/smsc/lpc47m10x/early_serial.c +++ b/src/superio/smsc/lpc47m10x/early_serial.c @@ -3,6 +3,7 @@ #include <arch/io.h> #include <device/pnp_ops.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <stdint.h> #include "lpc47m10x.h" diff --git a/src/superio/smsc/lpc47m15x/early_serial.c b/src/superio/smsc/lpc47m15x/early_serial.c index 5921a48..6c78edc 100644 --- a/src/superio/smsc/lpc47m15x/early_serial.c +++ b/src/superio/smsc/lpc47m15x/early_serial.c @@ -5,6 +5,7 @@ #include <arch/io.h> #include <device/pnp_ops.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <stdint.h> #include "lpc47m15x.h" diff --git a/src/superio/smsc/lpc47n217/superio.c b/src/superio/smsc/lpc47n217/superio.c index a716d19..b721f4b 100644 --- a/src/superio/smsc/lpc47n217/superio.c +++ b/src/superio/smsc/lpc47n217/superio.c @@ -5,6 +5,7 @@ #include <arch/io.h> #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <console/console.h> #include <assert.h> diff --git a/src/superio/smsc/lpc47n227/superio.c b/src/superio/smsc/lpc47n227/superio.c index 376fddb..90a06ff 100644 --- a/src/superio/smsc/lpc47n227/superio.c +++ b/src/superio/smsc/lpc47n227/superio.c @@ -4,6 +4,7 @@ #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <console/console.h> #include <assert.h> #include <pc80/keyboard.h> diff --git a/src/superio/smsc/sch5545/sch5545_early_init.c b/src/superio/smsc/sch5545/sch5545_early_init.c index 4841571..ed4fa53 100644 --- a/src/superio/smsc/sch5545/sch5545_early_init.c +++ b/src/superio/smsc/sch5545/sch5545_early_init.c @@ -3,7 +3,6 @@ #include <arch/io.h> #include <device/pnp.h> #include <stdint.h> -#include <device/pnp_def.h> #include <device/pnp_ops.h> #include "sch5545.h" diff --git a/src/superio/smsc/sch5545/sch5545_emi.c b/src/superio/smsc/sch5545/sch5545_emi.c index 2bb150c..367148a 100644 --- a/src/superio/smsc/sch5545/sch5545_emi.c +++ b/src/superio/smsc/sch5545/sch5545_emi.c @@ -3,7 +3,6 @@ #include <assert.h> #include <arch/io.h> #include <device/pnp.h> -#include <device/pnp_def.h> #include <device/pnp_ops.h> #include <superio/conf_mode.h> diff --git a/src/superio/smsc/sch5545/superio.c b/src/superio/smsc/sch5545/superio.c index b6e5308..ce8cdd2 100644 --- a/src/superio/smsc/sch5545/superio.c +++ b/src/superio/smsc/sch5545/superio.c @@ -3,6 +3,7 @@ #include <arch/io.h> #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <superio/conf_mode.h> #include <console/console.h> #include <pc80/keyboard.h> diff --git a/src/superio/winbond/common/early_init.c b/src/superio/winbond/common/early_init.c index 4b9497e..2fa0144 100644 --- a/src/superio/winbond/common/early_init.c +++ b/src/superio/winbond/common/early_init.c @@ -22,6 +22,7 @@ #include <arch/io.h> #include <device/pnp_ops.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <stdint.h> #include "winbond.h" diff --git a/src/superio/winbond/w83627ehg/superio.c b/src/superio/winbond/w83627ehg/superio.c index 7793fa4..8edf0a2 100644 --- a/src/superio/winbond/w83627ehg/superio.c +++ b/src/superio/winbond/w83627ehg/superio.c @@ -2,6 +2,7 @@ #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <superio/conf_mode.h> #include <superio/hwm5_conf.h> #include <console/console.h> diff --git a/src/superio/winbond/w83627hf/superio.c b/src/superio/winbond/w83627hf/superio.c index c6d2f57..1469baf 100644 --- a/src/superio/winbond/w83627hf/superio.c +++ b/src/superio/winbond/w83627hf/superio.c @@ -2,6 +2,7 @@ #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <superio/conf_mode.h> #include <superio/hwm5_conf.h> #include <console/console.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/45312 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I835e8786b84ec16889fd08f566328bc7a0a60c90 Gerrit-Change-Number: 45312 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

2 3

Change in coreboot[master]: src/{device,include}: Use PNP_IDX_EN instead of magic number
by HAOUAS Elyes (Code Review) 14 Sep '20

14 Sep '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44835 ) Change subject: src/{device,include}: Use PNP_IDX_EN instead of magic number ...................................................................... src/{device,include}: Use PNP_IDX_EN instead of magic number Change-Id: I68590605e261ecaace9f3cea28cfa6ec3b913a8a Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/device/pnp_device.c M src/include/device/pnp_ops.h 2 files changed, 7 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/44835/1 diff --git a/src/device/pnp_device.c b/src/device/pnp_device.c index cd7adf3..9fa032e 100644 --- a/src/device/pnp_device.c +++ b/src/device/pnp_device.c @@ -5,6 +5,7 @@ #include <arch/io.h> #include <device/device.h> #include <device/pnp.h> +#include <device/pnp_def.h> /* PNP config mode wrappers */ @@ -56,7 +57,7 @@ { u8 tmp, bitpos; - tmp = pnp_read_config(dev, 0x30); + tmp = pnp_read_config(dev, PNP_IDX_EN); /* Handle virtual devices, which share the same LDN register. */ bitpos = (dev->path.pnp.device >> 8) & 0x7; @@ -66,14 +67,14 @@ else tmp &= ~(1 << bitpos); - pnp_write_config(dev, 0x30, tmp); + pnp_write_config(dev, PNP_IDX_EN, tmp); } int pnp_read_enable(struct device *dev) { u8 tmp, bitpos; - tmp = pnp_read_config(dev, 0x30); + tmp = pnp_read_config(dev, PNP_IDX_EN); /* Handle virtual devices, which share the same LDN register. */ bitpos = (dev->path.pnp.device >> 8) & 0x7; diff --git a/src/include/device/pnp_ops.h b/src/include/device/pnp_ops.h index 0cfdd61..18b35be 100644 --- a/src/include/device/pnp_ops.h +++ b/src/include/device/pnp_ops.h @@ -6,6 +6,7 @@ #include <stdint.h> #include <arch/io.h> #include <device/pnp.h> +#include <device/pnp_def.h> #include <device/pnp_type.h> #if ENV_PNP_SIMPLE_DEVICE @@ -32,13 +33,13 @@ static __always_inline void pnp_set_enable(pnp_devfn_t dev, int enable) { - pnp_write_config(dev, 0x30, enable?0x1:0x0); + pnp_write_config(dev, PNP_IDX_EN, enable?0x1:0x0); } static __always_inline int pnp_read_enable(pnp_devfn_t dev) { - return !!pnp_read_config(dev, 0x30); + return !!pnp_read_config(dev, PNP_IDX_EN); } static __always_inline -- To view, visit https://review.coreboot.org/c/coreboot/+/44835 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I68590605e261ecaace9f3cea28cfa6ec3b913a8a Gerrit-Change-Number: 44835 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

2 7

Change in coreboot[master]: drivers/elog: Enable ELOG_PRERAM for all boards
by Shelley Chen (Code Review) 14 Sep '20

14 Sep '20

Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45303 ) Change subject: drivers/elog: Enable ELOG_PRERAM for all boards ...................................................................... drivers/elog: Enable ELOG_PRERAM for all boards BUG=b:117884485, b:150502246 BRANCH=None TEST=emerge-nami coreboot Change-Id: Id76cabc38e41e9bf79e1580a530c871a4ecef4ec Signed-off-by: Shelley Chen <shchen(a)google.com> --- M src/drivers/elog/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/45303/1 diff --git a/src/drivers/elog/Kconfig b/src/drivers/elog/Kconfig index bc25d1c..c71abbf 100644 --- a/src/drivers/elog/Kconfig +++ b/src/drivers/elog/Kconfig @@ -25,7 +25,7 @@ config ELOG_PRERAM bool - default n + default y help This option will enable event logging from the preram stage. -- To view, visit https://review.coreboot.org/c/coreboot/+/45303 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id76cabc38e41e9bf79e1580a530c871a4ecef4ec Gerrit-Change-Number: 45303 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-MessageType: newchange

4 12

Change in coreboot[master]: mb/kontron: Add the Kontron mAL10 COMe module support
by Maxim Polyakov (Code Review) 14 Sep '20

14 Sep '20

Hello Felix Singer, build bot (Jenkins), Patrick Georgi, Angel Pons, Andrey Petrov, Patrick Rudolph, Aaron Durbin, Lance Zhao, Nico Huber, Martin Roth, Werner Zeh, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39133 to look at the new patch set (#46). Change subject: mb/kontron: Add the Kontron mAL10 COMe module support ...................................................................... mb/kontron: Add the Kontron mAL10 COMe module support This patch adds support for the Kontron mAL10 COMe module with the Apollo Lake SoC together with Kontron T10-TNI carrierboard. Working: - Console (Kontron CPLD/EC) - I2C (Kontron CPLD/EC) - USB2/3 - Ethernet network - eMMC - SATA - PCIe ports - IGD/DP - SMBus - HWM Not tested: - IGD/LVDS - SDIO TODO: - HDA (codec IDT 92HD73C1X5, currently disabled) - Documentation As the payload was used: - SeaBIOS - Tianocore, UEFIPayload - without video, EFI-shell in console only Tested on COMe module with Intel Atom x5-E3940 processor (4 Core, 1.6/1.8GHz, 9.5W TDP). Xubuntu 18.04.2 was used as a bootable OS (5.0.0-32-generic linux kernel) Change-Id: Ib8432e10396f77eb05a71af1ccaaa4437a2e43ea Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- A src/mainboard/kontron/mal10/Kconfig A src/mainboard/kontron/mal10/Kconfig.name A src/mainboard/kontron/mal10/Makefile.inc A src/mainboard/kontron/mal10/acpi/cpld.asl A src/mainboard/kontron/mal10/acpi/dptf.asl A src/mainboard/kontron/mal10/board_info.txt A src/mainboard/kontron/mal10/bootblock.c A src/mainboard/kontron/mal10/carriers/t10-tni/Makefile.inc A src/mainboard/kontron/mal10/carriers/t10-tni/board_info.txt A src/mainboard/kontron/mal10/carriers/t10-tni/gpio.c A src/mainboard/kontron/mal10/carriers/t10-tni/include/carrier/gpio.h A src/mainboard/kontron/mal10/carriers/t10-tni/overridetree.cb A src/mainboard/kontron/mal10/cmos.default A src/mainboard/kontron/mal10/cmos.layout A src/mainboard/kontron/mal10/data.vbt A src/mainboard/kontron/mal10/dsdt.asl A src/mainboard/kontron/mal10/mal10.fmd A src/mainboard/kontron/mal10/ramstage.c A src/mainboard/kontron/mal10/romstage.c A src/mainboard/kontron/mal10/variants/mal10/Makefile.inc A src/mainboard/kontron/mal10/variants/mal10/board_info.txt A src/mainboard/kontron/mal10/variants/mal10/devicetree.cb A src/mainboard/kontron/mal10/variants/mal10/gma-mainboard.ads A src/mainboard/kontron/mal10/variants/mal10/gpio.c A src/mainboard/kontron/mal10/variants/mal10/include/variant/gpio.h 25 files changed, 1,474 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/39133/46 -- To view, visit https://review.coreboot.org/c/coreboot/+/39133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8432e10396f77eb05a71af1ccaaa4437a2e43ea Gerrit-Change-Number: 39133 Gerrit-PatchSet: 46 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <anpetrov(a)fb.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: lib: add ENV_SMM check to setup_preram_cache
by Josie Nordrum (Code Review) 14 Sep '20

14 Sep '20

Josie Nordrum has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45274 ) Change subject: lib: add ENV_SMM check to setup_preram_cache ...................................................................... lib: add ENV_SMM check to setup_preram_cache Add check in setup_preram_cache to return if ENV_SMM is true. This avoids false warning that post-RAM FMAP is accessed too early caused by ENV_ROMSTAGE_OR_BEFORE evaluation in SMI handler. BUG=b:167321319 BRANCH=None TEST=None Signed-Off-By: Josie Nordrum <josienordrum(a)google.com> Change-Id: I3a4c199c42ee556187d6c4277e8793a36e4d493b --- M src/lib/fmap.c 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/45274/1 diff --git a/src/lib/fmap.c b/src/lib/fmap.c index e1e6a57..fc51122 100644 --- a/src/lib/fmap.c +++ b/src/lib/fmap.c @@ -46,6 +46,9 @@ if (CONFIG(NO_FMAP_CACHE)) return; + if (ENV_SMM) + return; + if (!ENV_ROMSTAGE_OR_BEFORE) { /* We get here if ramstage makes an FMAP access before calling cbmem_initialize(). We should avoid letting it come to that, -- To view, visit https://review.coreboot.org/c/coreboot/+/45274 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a4c199c42ee556187d6c4277e8793a36e4d493b Gerrit-Change-Number: 45274 Gerrit-PatchSet: 1 Gerrit-Owner: Josie Nordrum <josienordrum(a)google.com> Gerrit-MessageType: newchange

5 14

Change in coreboot[master]: drivers/spi/tpm: Improve error checking
by Tim Wawrzynczak (Code Review) 14 Sep '20

14 Sep '20

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45232 ) Change subject: drivers/spi/tpm: Improve error checking ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/45232 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia8a1202000abce1857ee694b06b1478e6b045069 Gerrit-Change-Number: 45232 Gerrit-PatchSet: 3 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Vadim Bendebury <vbendeb(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 14 Sep 2020 15:43:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: drivers/spi/tpm: Improve error checking
by Jes Klinke (Code Review) 14 Sep '20

14 Sep '20

Jes Klinke has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45232 ) Change subject: drivers/spi/tpm: Improve error checking ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/45232 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia8a1202000abce1857ee694b06b1478e6b045069 Gerrit-Change-Number: 45232 Gerrit-PatchSet: 3 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Vadim Bendebury <vbendeb(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 14 Sep 2020 15:39:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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