Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45324 )
Change subject: nb/intel/ironlake: Use an `index` variable for resources ......................................................................
nb/intel/ironlake: Use an `index` variable for resources
Change-Id: Ic587231b57c51db592c1647de138a67c55161e58 Signed-off-by: Nico Huber nico.h@gmx.de --- M src/northbridge/intel/ironlake/northbridge.c 1 file changed, 9 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/45324/1
diff --git a/src/northbridge/intel/ironlake/northbridge.c b/src/northbridge/intel/ironlake/northbridge.c index 1272f5a..9b7ea85 100644 --- a/src/northbridge/intel/ironlake/northbridge.c +++ b/src/northbridge/intel/ironlake/northbridge.c @@ -95,6 +95,7 @@ uint32_t tseg_base; uint64_t touud; uint16_t reg16; + int index = 3;
pci_dev_read_resources(dev);
@@ -108,10 +109,10 @@ printk(BIOS_DEBUG, "TOUUD: 0x%x\n", (unsigned int)touud);
/* Report the memory regions */ - ram_resource(dev, 3, 0, 640); - ram_resource(dev, 4, 768, ((tseg_base >> 10) - 768)); + ram_resource(dev, index++, 0, 640); + ram_resource(dev, index++, 768, ((tseg_base >> 10) - 768));
- mmio_resource(dev, 5, tseg_base >> 10, CONFIG_SMM_TSEG_SIZE >> 10); + mmio_resource(dev, index++, tseg_base >> 10, CONFIG_SMM_TSEG_SIZE >> 10);
reg16 = pci_read_config16(pcidev_on_root(0, 0), GGC); const int uma_sizes_gtt[16] = @@ -130,17 +131,17 @@ pci_read_config32(pcidev_on_root(0, 0), IGD_BASE); gtt_base = pci_read_config32(pcidev_on_root(0, 0), GTT_BASE); - mmio_resource(dev, 6, gtt_base >> 10, uma_size_gtt << 10); - mmio_resource(dev, 7, igd_base >> 10, uma_size_igd << 10); + mmio_resource(dev, index++, gtt_base >> 10, uma_size_gtt << 10); + mmio_resource(dev, index++, igd_base >> 10, uma_size_igd << 10);
if (touud > 4096) - ram_resource(dev, 8, (4096 << 10), ((touud - 4096) << 10)); + ram_resource(dev, index++, (4096 << 10), ((touud - 4096) << 10));
/* This memory is not DMA-capable. */ if (touud >= 8192 - 64) - bad_ram_resource(dev, 9, 0x1fc000000ULL >> 10, 0x004000000 >> 10); + bad_ram_resource(dev, index++, 0x1fc000000ULL >> 10, 0x004000000 >> 10);
- add_fixed_resources(dev, 10); + add_fixed_resources(dev, index); }
static void northbridge_init(struct device *dev)
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45324 )
Change subject: nb/intel/ironlake: Use an `index` variable for resources ......................................................................
Patch Set 1: Code-Review+2
Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45324 )
Change subject: nb/intel/ironlake: Use an `index` variable for resources ......................................................................
nb/intel/ironlake: Use an `index` variable for resources
Change-Id: Ic587231b57c51db592c1647de138a67c55161e58 Signed-off-by: Nico Huber nico.h@gmx.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/45324 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/ironlake/northbridge.c 1 file changed, 9 insertions(+), 8 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/northbridge/intel/ironlake/northbridge.c b/src/northbridge/intel/ironlake/northbridge.c index 1272f5a..9b7ea85 100644 --- a/src/northbridge/intel/ironlake/northbridge.c +++ b/src/northbridge/intel/ironlake/northbridge.c @@ -95,6 +95,7 @@ uint32_t tseg_base; uint64_t touud; uint16_t reg16; + int index = 3;
pci_dev_read_resources(dev);
@@ -108,10 +109,10 @@ printk(BIOS_DEBUG, "TOUUD: 0x%x\n", (unsigned int)touud);
/* Report the memory regions */ - ram_resource(dev, 3, 0, 640); - ram_resource(dev, 4, 768, ((tseg_base >> 10) - 768)); + ram_resource(dev, index++, 0, 640); + ram_resource(dev, index++, 768, ((tseg_base >> 10) - 768));
- mmio_resource(dev, 5, tseg_base >> 10, CONFIG_SMM_TSEG_SIZE >> 10); + mmio_resource(dev, index++, tseg_base >> 10, CONFIG_SMM_TSEG_SIZE >> 10);
reg16 = pci_read_config16(pcidev_on_root(0, 0), GGC); const int uma_sizes_gtt[16] = @@ -130,17 +131,17 @@ pci_read_config32(pcidev_on_root(0, 0), IGD_BASE); gtt_base = pci_read_config32(pcidev_on_root(0, 0), GTT_BASE); - mmio_resource(dev, 6, gtt_base >> 10, uma_size_gtt << 10); - mmio_resource(dev, 7, igd_base >> 10, uma_size_igd << 10); + mmio_resource(dev, index++, gtt_base >> 10, uma_size_gtt << 10); + mmio_resource(dev, index++, igd_base >> 10, uma_size_igd << 10);
if (touud > 4096) - ram_resource(dev, 8, (4096 << 10), ((touud - 4096) << 10)); + ram_resource(dev, index++, (4096 << 10), ((touud - 4096) << 10));
/* This memory is not DMA-capable. */ if (touud >= 8192 - 64) - bad_ram_resource(dev, 9, 0x1fc000000ULL >> 10, 0x004000000 >> 10); + bad_ram_resource(dev, index++, 0x1fc000000ULL >> 10, 0x004000000 >> 10);
- add_fixed_resources(dev, 10); + add_fixed_resources(dev, index); }
static void northbridge_init(struct device *dev)
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45324 )
Change subject: nb/intel/ironlake: Use an `index` variable for resources ......................................................................
Patch Set 2:
Automatic boot test returned (PASS/FAIL/TOTAL): 8/1/9 "QEMU x86 q35/ich9" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/19344 "QEMU x86 q35/ich9" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/19343 "QEMU x86 i440fx/piix4" (x86_64) using payload SeaBIOS : FAIL : https://lava.9esec.io/r/19342 "QEMU x86 i440fx/piix4" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/19341 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/19340 "HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/19348 "HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/19347 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/19346 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/19345
Please note: This test is under development and might not be accurate at all!
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9elements QA (Code Review) -
Angel Pons (Code Review)
-
Nico Huber (Code Review)