Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44121 )
Change subject: nb/intel/sandybridge: Refactor `get_pcie_bar`
......................................................................
Patch Set 4: Code-Review+1
(2 comments)
https://review.coreboot.org/c/coreboot/+/44121/4/src/northbridge/intel/sand…
File src/northbridge/intel/sandybridge/northbridge.c:
https://review.coreboot.org/c/coreboot/+/44121/4/src/northbridge/intel/sand…
PS4, Line 50: return 0;
It might be personal preference but I think return 1 on error is more common.
https://review.coreboot.org/c/coreboot/+/44121/4/src/northbridge/intel/sand…
PS4, Line 143: decode_pcie_bar
if this return an 'error' it should probably die given the pci mmconfig accesses done pretty much everywhere
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44113 )
Change subject: mb/**/{devicetree,overridetree}.cb: Indent with tabs
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Patch Set 3: Code-Review+2
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44113 )
Change subject: mb/**/{devicetree,overridetree}.cb: Indent with tabs
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Patch Set 3:
> Patch Set 3: Code-Review+2
>
> could we also add indent-checking (linting) for *.cb files too to help prevent this in the future? I don't know much about how jenkins is set up.
I think it should be doable, but I don't know much about checkpatch to know for sure.
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Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44137 )
Change subject: soc/intel/skylake: acpi: drop HWP's dependency on EIST
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Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/44137/3//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/44137/3//COMMIT_MSG@14
PS3, Line 14: it's
its
https://review.coreboot.org/c/coreboot/+/44137/3//COMMIT_MSG@21
PS3, Line 21: relation to the current workload.
On what device?
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Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44117 )
Change subject: mb/google/volteer/*/gpio.c: add GPP_D16 to early_gpio_table
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Patch Set 1:
This is missing changes for baseboard, Halvor, and Trondo. They each export their own early_gpio_table under certain conditions.
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Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44116 )
Change subject: mb/google/volteer: pull-up GPP_D16 instead of driving it
......................................................................
Patch Set 1: Code-Review+2
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