coreboot-gerrit July 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/common: Only touch Time Window Tau bits in supported SoCs
by Tim Wawrzynczak (Code Review) 03 Jul '20

03 Jul '20

Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42979 ) Change subject: soc/intel/common: Only touch Time Window Tau bits in supported SoCs ...................................................................... soc/intel/common: Only touch Time Window Tau bits in supported SoCs The Time Window Tau bits are only supported by Comet Lake/Cannon Lake onwards, so skip setting those bits for earlier SoCs. Change-Id: Iff899ee8280a9b9bbcea57d4e98b92d5410be21d Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/soc/intel/common/block/cpu/cpulib.c 1 file changed, 9 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/42979/1 diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index e4ab664..0cebe32 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -272,9 +272,17 @@ wrmsr(MSR_TEMPERATURE_TARGET, msr); } - msr = rdmsr(MSR_TEMPERATURE_TARGET); + /* + * SoCs prior to Comet Lake/Cannon Lake do not support the time window + * bits, so return early. + */ + if (CONFIG(SOC_INTEL_APOLLOLAKE) || CONFIG(SOC_INTEL_SKYLAKE) || + CONFIG(SOC_INTEL_KABYLAKE) || CONFIG(SOC_INTEL_BRASWELL) || + CONFIG(SOC_INTEL_BROADWELL)) + return; /* Time Window Tau Bits [6:0] */ + msr = rdmsr(MSR_TEMPERATURE_TARGET); msr.lo &= ~0x7f; msr.lo |= 0xe6; /* setting 100ms thermal time window */ wrmsr(MSR_TEMPERATURE_TARGET, msr); -- To view, visit https://review.coreboot.org/c/coreboot/+/42979 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iff899ee8280a9b9bbcea57d4e98b92d5410be21d Gerrit-Change-Number: 42979 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI F...
by Johnny Lin (Code Review) 03 Jul '20

03 Jul '20

Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40308 ) Change subject: drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI FRU data ...................................................................... Patch Set 52: (1 comment) https://review.coreboot.org/c/coreboot/+/40308/51/src/drivers/ocp/dmi/smbio… File src/drivers/ocp/dmi/smbios.c: https://review.coreboot.org/c/coreboot/+/40308/51/src/drivers/ocp/dmi/smbio… PS51, Line 176: *p+ > I simply use the same smbios_add_string() in arch/x86/smbios.c […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/40308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I08c958dfad83216cd12545760a19d205efc2515b Gerrit-Change-Number: 40308 Gerrit-PatchSet: 52 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Morgan Jang Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 03 Jul 2020 01:08:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Johnny Lin <Johnny_Lin(a)wiwynn.com> Comment-In-Reply-To: Christian Walter <christian.walter(a)9elements.com> Gerrit-MessageType: comment

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Change in coreboot[master]: chromeec: fix error path return value
by Caveh Jalali (Code Review) 03 Jul '20

03 Jul '20

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43045 ) Change subject: chromeec: fix error path return value ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/43045 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6bf8d74229f4ac2bf87f9ee83e0c88c3c94de765 Gerrit-Change-Number: 43045 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 03 Jul 2020 01:00:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: volteer: enable VBOOT_EC_EFS
by Caveh Jalali (Code Review) 03 Jul '20

03 Jul '20

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43044 ) Change subject: volteer: enable VBOOT_EC_EFS ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/43044 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie71bb169242b2511b4a4102d46a6981d72d07806 Gerrit-Change-Number: 43044 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 03 Jul 2020 00:57:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Wyvern
by Edward O'Callaghan (Code Review) 03 Jul '20

03 Jul '20

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42994 ) Change subject: mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Wyvern ...................................................................... mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Wyvern BUG=b:1603699358 BRANCH=none TEST=none Change-Id: Ideacac417a46b96f3e82b53bbb341ecce79ee420 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M src/mainboard/google/hatch/variants/wyvern/overridetree.cb 1 file changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/42994/1 diff --git a/src/mainboard/google/hatch/variants/wyvern/overridetree.cb b/src/mainboard/google/hatch/variants/wyvern/overridetree.cb index 55ce5ea..244e678 100644 --- a/src/mainboard/google/hatch/variants/wyvern/overridetree.cb +++ b/src/mainboard/google/hatch/variants/wyvern/overridetree.cb @@ -81,6 +81,18 @@ register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port 0 register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port 4 + # Bitmap for Wake Enable on USB attach/detach + register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(2) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(5) | \ + USB_PORT_WAKE_ENABLE(6)" + register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(2) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(5) | \ + USB_PORT_WAKE_ENABLE(6)" + # Enable eMMC HS400 register "ScsEmmcHs400Enabled" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/42994 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ideacac417a46b96f3e82b53bbb341ecce79ee420 Gerrit-Change-Number: 42994 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Noibat
by Edward O'Callaghan (Code Review) 03 Jul '20

03 Jul '20

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42975 ) Change subject: mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Noibat ...................................................................... mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Noibat BUG=b:160296662 BRANCH=none TEST=none Change-Id: I5298e1779461995a98722099b397692351767089 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M src/mainboard/google/hatch/variants/noibat/overridetree.cb 1 file changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/42975/1 diff --git a/src/mainboard/google/hatch/variants/noibat/overridetree.cb b/src/mainboard/google/hatch/variants/noibat/overridetree.cb index c223bb0..18f33ab 100644 --- a/src/mainboard/google/hatch/variants/noibat/overridetree.cb +++ b/src/mainboard/google/hatch/variants/noibat/overridetree.cb @@ -74,6 +74,18 @@ register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port 0 register "usb3_ports[5]" = "USB3_PORT_EMPTY" # Type-A Port 4 + # Bitmap for Wake Enable on USB attach/detach + register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(4) | \ + USB_PORT_WAKE_ENABLE(5) | \ + USB_PORT_WAKE_ENABLE(6)" + register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(2) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(5) | \ + USB_PORT_WAKE_ENABLE(6)" + # Enable eMMC HS400 register "ScsEmmcHs400Enabled" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/42975 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5298e1779461995a98722099b397692351767089 Gerrit-Change-Number: 42975 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Faffy
by Edward O'Callaghan (Code Review) 03 Jul '20

03 Jul '20

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42974 ) Change subject: mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Faffy ...................................................................... mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Faffy BUG=b:160295948 BRANCH=none TEST=none Change-Id: I3600340d3448457942c827a463b458b280fea19a Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M src/mainboard/google/hatch/variants/faffy/overridetree.cb 1 file changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/42974/1 diff --git a/src/mainboard/google/hatch/variants/faffy/overridetree.cb b/src/mainboard/google/hatch/variants/faffy/overridetree.cb index ffb9cb3..f3e710b 100644 --- a/src/mainboard/google/hatch/variants/faffy/overridetree.cb +++ b/src/mainboard/google/hatch/variants/faffy/overridetree.cb @@ -88,6 +88,18 @@ register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port 0 register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port 4 + # Bitmap for Wake Enable on USB attach/detach + register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(4) | \ + USB_PORT_WAKE_ENABLE(5) | \ + USB_PORT_WAKE_ENABLE(6)" + register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(2) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(5) | \ + USB_PORT_WAKE_ENABLE(6)" + # Enable eMMC HS400 register "ScsEmmcHs400Enabled" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/42974 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3600340d3448457942c827a463b458b280fea19a Gerrit-Change-Number: 42974 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Kaisa
by Edward O'Callaghan (Code Review) 03 Jul '20

03 Jul '20

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42973 ) Change subject: mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Kaisa ...................................................................... mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Kaisa BUG=b:160296661 BRANCH=none TEST=none Change-Id: Id5a03f2cbdca2723ab1882c619d2d34387996b27 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M src/mainboard/google/hatch/variants/kaisa/overridetree.cb 1 file changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/42973/1 diff --git a/src/mainboard/google/hatch/variants/kaisa/overridetree.cb b/src/mainboard/google/hatch/variants/kaisa/overridetree.cb index 1068b59..bde868f 100644 --- a/src/mainboard/google/hatch/variants/kaisa/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kaisa/overridetree.cb @@ -81,6 +81,18 @@ register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port 0 register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port 4 + # Bitmap for Wake Enable on USB attach/detach + register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(4) | \ + USB_PORT_WAKE_ENABLE(5) | \ + USB_PORT_WAKE_ENABLE(6)" + register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(2) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(5) | \ + USB_PORT_WAKE_ENABLE(6)" + # Enable eMMC HS400 register "ScsEmmcHs400Enabled" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/42973 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5a03f2cbdca2723ab1882c619d2d34387996b27 Gerrit-Change-Number: 42973 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Duffy
by Edward O'Callaghan (Code Review) 03 Jul '20

03 Jul '20

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42972 ) Change subject: mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Duffy ...................................................................... mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Duffy BUG=b:160296325 BRANCH=none TEST=none Change-Id: Iffa6997029d0babfd6dd504a6cc212bd74de3a8f Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M src/mainboard/google/hatch/variants/duffy/overridetree.cb 1 file changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/42972/1 diff --git a/src/mainboard/google/hatch/variants/duffy/overridetree.cb b/src/mainboard/google/hatch/variants/duffy/overridetree.cb index 55ce5ea..b0c4d2a 100644 --- a/src/mainboard/google/hatch/variants/duffy/overridetree.cb +++ b/src/mainboard/google/hatch/variants/duffy/overridetree.cb @@ -81,6 +81,18 @@ register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port 0 register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port 4 + # Bitmap for Wake Enable on USB attach/detach + register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(4) | \ + USB_PORT_WAKE_ENABLE(5) | \ + USB_PORT_WAKE_ENABLE(6)" + register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(2) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(5) | \ + USB_PORT_WAKE_ENABLE(6)" + # Enable eMMC HS400 register "ScsEmmcHs400Enabled" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/42972 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iffa6997029d0babfd6dd504a6cc212bd74de3a8f Gerrit-Change-Number: 42972 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/tmpl/puff: Allow USB2/3 wakeups to (un)plug events
by Edward O'Callaghan (Code Review) 03 Jul '20

03 Jul '20

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42990 ) Change subject: util/tmpl/puff: Allow USB2/3 wakeups to (un)plug events ...................................................................... util/tmpl/puff: Allow USB2/3 wakeups to (un)plug events BUG=b:159187889 BRANCH=none TEST=none Change-Id: Ib59108ec42955b5414f76b591cce5073f7dad1a9 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M util/mainboard/google/puff/template/overridetree.cb 1 file changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/42990/1 diff --git a/util/mainboard/google/puff/template/overridetree.cb b/util/mainboard/google/puff/template/overridetree.cb index 55ce5ea..244e678 100644 --- a/util/mainboard/google/puff/template/overridetree.cb +++ b/util/mainboard/google/puff/template/overridetree.cb @@ -81,6 +81,18 @@ register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port 0 register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port 4 + # Bitmap for Wake Enable on USB attach/detach + register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(2) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(5) | \ + USB_PORT_WAKE_ENABLE(6)" + register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(2) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(5) | \ + USB_PORT_WAKE_ENABLE(6)" + # Enable eMMC HS400 register "ScsEmmcHs400Enabled" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/42990 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib59108ec42955b5414f76b591cce5073f7dad1a9 Gerrit-Change-Number: 42990 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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coreboot-gerrit July 2020