coreboot-gerrit July 2020

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Change in coreboot[master]: post_code: add defines for missing postcode values
by Sindhoor Tilak (Code Review) 09 Jul '20

09 Jul '20

Hello build bot (Jenkins), Patrick Georgi, Frans Hendriks, Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/42278 to look at the new patch set (#13). Change subject: post_code: add defines for missing postcode values ...................................................................... post_code: add defines for missing postcode values The change introduces new POST codes missing their respective defines The newly added POST code sets are arranged in logical order of coreboot stages. The change also is an effort to ensure the added defines reflect postcodes at the entry of function. Signed-off-by: Sindhoor Tilak <sindhoor(a)sin9yt.net> Change-Id: I02d09d0b2bad3f9a93fff54d11a5ba5e53fadbcc --- M src/include/console/post_codes.h 1 file changed, 325 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/42278/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/42278 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I02d09d0b2bad3f9a93fff54d11a5ba5e53fadbcc Gerrit-Change-Number: 42278 Gerrit-PatchSet: 13 Gerrit-Owner: Sindhoor Tilak <sindhoor(a)sin9yt.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Christian Walter <christian.walter(a)9elements.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/xeon_sp: Add RTC failure checking
by build bot (Jenkins) (Code Review) 09 Jul '20

09 Jul '20

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43004 ) Change subject: soc/intel/xeon_sp: Add RTC failure checking ...................................................................... Patch Set 4: (1 comment) https://review.coreboot.org/c/coreboot/+/43004/4/src/soc/intel/xeon_sp/pmut… File src/soc/intel/xeon_sp/pmutil.c: https://review.coreboot.org/c/coreboot/+/43004/4/src/soc/intel/xeon_sp/pmut… PS4, Line 19: if (rtc_fail) { braces {} are not necessary for single statement blocks -- To view, visit https://review.coreboot.org/c/coreboot/+/43004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6da84277e71a5c51dfa4d97d5d0c0184478e8f0 Gerrit-Change-Number: 43004 Gerrit-PatchSet: 4 Gerrit-Owner: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Morgan Jang Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Rocky Phagura Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 09 Jul 2020 08:02:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/ocp/deltalake: Send OEM IPMI command for CMOS clear on RTC failure
by Jingle Hsu (Code Review) 09 Jul '20

09 Jul '20

Hello build bot (Jenkins), Patrick Rudolph, Jonathan Zhang, Johnny Lin, Rocky Phagura, Morgan Jang, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/43005 to look at the new patch set (#9). Change subject: mb/ocp/deltalake: Send OEM IPMI command for CMOS clear on RTC failure ...................................................................... mb/ocp/deltalake: Send OEM IPMI command for CMOS clear on RTC failure When RTC failure is detected, send IPMI OEM command to issue CMOS clear. This is to let the payload (LinuxBoot) do some handling. Tested on OCP Delta Lake Signed-off-by: Jingle Hsu <jingle_hsu(a)wiwynn.com> Change-Id: I27428c02e99040754e15e07782ec1ad8524def2f --- M src/mainboard/ocp/deltalake/ipmi.c M src/mainboard/ocp/deltalake/ipmi.h M src/mainboard/ocp/deltalake/romstage.c 3 files changed, 73 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/43005/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/43005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27428c02e99040754e15e07782ec1ad8524def2f Gerrit-Change-Number: 43005 Gerrit-PatchSet: 9 Gerrit-Owner: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Morgan Jang Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Rocky Phagura Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede: Add support to handle pen eject events
by Karthik Ramasubramanian (Code Review) 09 Jul '20

09 Jul '20

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43317 ) Change subject: mb/google/dedede: Add support to handle pen eject events ...................................................................... mb/google/dedede: Add support to handle pen eject events BUG=b:160185066 TEST=Build and boot the waddledoo mainboard. Verify Pen Eject events using evtest. Change-Id: I6dd72ae42a7549ee16368f2ba0869d1be921f63a Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/gpio.c M src/mainboard/google/dedede/variants/waddledoo/overridetree.cb 4 files changed, 32 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/43317/1 diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig index dcea3fa..f467be9 100644 --- a/src/mainboard/google/dedede/Kconfig +++ b/src/mainboard/google/dedede/Kconfig @@ -1,6 +1,7 @@ config BOARD_GOOGLE_BASEBOARD_DEDEDE def_bool n select BOARD_ROMSIZE_KB_16384 if !BOARD_ROMSIZE_KB_32768 + select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_I2C_GENERIC select DRIVERS_I2C_HID select DRIVERS_SPI_ACPI diff --git a/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc b/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc index eda535c..93f34f8 100644 --- a/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc +++ b/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc @@ -2,4 +2,5 @@ romstage-y += memory.c +ramstage-y += gpio.c ramstage-y += variant.c diff --git a/src/mainboard/google/dedede/variants/waddledoo/gpio.c b/src/mainboard/google/dedede/variants/waddledoo/gpio.c new file mode 100644 index 0000000..b414e3d --- /dev/null +++ b/src/mainboard/google/dedede/variants/waddledoo/gpio.c @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> + +/* Pad configuration in ramstage */ +static const struct pad_config override_gpio_table[] = { + /* C12 : AP_PEN_DET_ODL */ + PAD_CFG_GPI_SCI(GPP_C12, NONE, DEEP, EDGE_SINGLE, NONE), +}; + +const struct pad_config *variant_override_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(override_gpio_table); + return override_gpio_table; +} diff --git a/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb b/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb index 2936cdd..1cede5d 100644 --- a/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb +++ b/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb @@ -83,6 +83,20 @@ device i2c 15 on end end end #I2C 0 + device pci 15.1 on + chip drivers/generic/gpio_keys + register "name" = ""PENH"" + register "gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_C12)" + register "key.wake_gpe" = "GPE0_DW1_12" + register "key.wakeup_route" = "WAKEUP_ROUTE_SCI" + register "key.wakeup_event_action" = "EV_ACT_ASSERTED" + register "key.dev_name" = ""EJCT"" + register "key.linux_code" = "SW_PEN_INSERTED" + register "key.linux_input_type" = "EV_SW" + register "key.label" = ""pen_eject"" + device generic 0 on end + end + end #I2C 1 device pci 15.2 on chip drivers/i2c/hid register "generic.hid" = ""SIS6496"" -- To view, visit https://review.coreboot.org/c/coreboot/+/43317 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6dd72ae42a7549ee16368f2ba0869d1be921f63a Gerrit-Change-Number: 43317 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/xeon_sp: Add RTC failure checking
by Jingle Hsu (Code Review) 09 Jul '20

09 Jul '20

Jingle Hsu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43004 ) Change subject: soc/intel/xeon_sp: Add RTC failure checking ...................................................................... Patch Set 3: (5 comments) https://review.coreboot.org/c/coreboot/+/43004/3//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/43004/3//COMMIT_MSG@9 PS3, Line 9: Add a weak function mainboard_rtc_failed() : for mainboard customization. : : Check RTC_PWR_STS bit for RTC battery removal : or CMOS clear jumper triggered event. > Please re-flow for 75 characters per line. Done https://review.coreboot.org/c/coreboot/+/43004/3/src/soc/intel/xeon_sp/incl… File src/soc/intel/xeon_sp/include/soc/pmc.h: https://review.coreboot.org/c/coreboot/+/43004/3/src/soc/intel/xeon_sp/incl… PS3, Line 28: > nit: two spaces here (it's a bit inside a register) Done https://review.coreboot.org/c/coreboot/+/43004/3/src/soc/intel/xeon_sp/pmut… File src/soc/intel/xeon_sp/pmutil.c: https://review.coreboot.org/c/coreboot/+/43004/3/src/soc/intel/xeon_sp/pmut… PS3, Line 14: int > bool Just follow declaration of weak function. https://review.coreboot.org/c/coreboot/+/43004/3/src/soc/intel/xeon_sp/pmut… PS3, Line 16: PCH_DEVFN_PMC<<12 > huh? Why this shift? Done https://review.coreboot.org/c/coreboot/+/43004/3/src/soc/intel/xeon_sp/pmut… PS3, Line 16: RTC_BATTERY_DEAD > Instead of masking here, I'd read the register as-is inside a variable and mask the desired bit else […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/43004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6da84277e71a5c51dfa4d97d5d0c0184478e8f0 Gerrit-Change-Number: 43004 Gerrit-PatchSet: 3 Gerrit-Owner: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Morgan Jang Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Rocky Phagura Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 09 Jul 2020 07:52:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: post_code: add defines for missing postcode values
by Frans Hendriks (Code Review) 09 Jul '20

09 Jul '20

Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42278 ) Change subject: post_code: add defines for missing postcode values ...................................................................... Patch Set 12: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/42278 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I02d09d0b2bad3f9a93fff54d11a5ba5e53fadbcc Gerrit-Change-Number: 42278 Gerrit-PatchSet: 12 Gerrit-Owner: Sindhoor Tilak <sindhoor(a)sin9yt.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Christian Walter <christian.walter(a)9elements.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 09 Jul 2020 07:44:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/xeon_sp: Add RTC failure checking
by Jingle Hsu (Code Review) 09 Jul '20

09 Jul '20

Hello Philipp Deppenwiese, Patrick Georgi, Martin Roth, Jonathan Zhang, Johnny Lin, Christian Walter, Angel Pons, Rocky Phagura, Morgan Jang, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/43004 to look at the new patch set (#4). Change subject: soc/intel/xeon_sp: Add RTC failure checking ...................................................................... soc/intel/xeon_sp: Add RTC failure checking Add a weak function mainboard_rtc_failed() for mainboard customization. Check RTC_PWR_STS bit for RTC battery removal or CMOS clear jumper triggered event. Signed-off-by: Jingle Hsu <jingle_hsu(a)wiwynn.com> Change-Id: Ic6da84277e71a5c51dfa4d97d5d0c0184478e8f0 --- M src/soc/intel/xeon_sp/Makefile.inc M src/soc/intel/xeon_sp/include/soc/pmc.h M src/soc/intel/xeon_sp/include/soc/romstage.h A src/soc/intel/xeon_sp/pmutil.c M src/soc/intel/xeon_sp/romstage.c 5 files changed, 34 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/43004/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/43004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6da84277e71a5c51dfa4d97d5d0c0184478e8f0 Gerrit-Change-Number: 43004 Gerrit-PatchSet: 4 Gerrit-Owner: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Morgan Jang Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Rocky Phagura Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: post_code: add defines for missing postcode values
by Sindhoor Tilak (Code Review) 09 Jul '20

09 Jul '20

Hello build bot (Jenkins), Patrick Georgi, Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/42278 to look at the new patch set (#12). Change subject: post_code: add defines for missing postcode values ...................................................................... post_code: add defines for missing postcode values The change introduces new POST codes missing their respective defines The newly added POST code sets are arranged in logical order of coreboot stages. The change also is an effort to ensure the added defines reflect postcodes at the entry of function. Signed-off-by: Sindhoor Tilak <sindhoor(a)sin9yt.net> Change-Id: I02d09d0b2bad3f9a93fff54d11a5ba5e53fadbcc --- M src/include/console/post_codes.h 1 file changed, 325 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/42278/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/42278 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I02d09d0b2bad3f9a93fff54d11a5ba5e53fadbcc Gerrit-Change-Number: 42278 Gerrit-PatchSet: 12 Gerrit-Owner: Sindhoor Tilak <sindhoor(a)sin9yt.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Christian Walter <christian.walter(a)9elements.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/ocp/deltalake: Send OEM IPMI command for CMOS clear on RTC failure
by Jingle Hsu (Code Review) 08 Jul '20

08 Jul '20

Jingle Hsu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43005 ) Change subject: mb/ocp/deltalake: Send OEM IPMI command for CMOS clear on RTC failure ...................................................................... Patch Set 8: (8 comments) https://review.coreboot.org/c/coreboot/+/43005/7//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/43005/7//COMMIT_MSG@7 PS7, Line 7: mb/ocp/deltalake: Send OEM IPMI command for CMOS clear when RTC failure is detected > Maybe below summary is shorter: […] Done https://review.coreboot.org/c/coreboot/+/43005/7//COMMIT_MSG@9 PS7, Line 9: When RTC failure is detected, : send IPMI OEM command to issue CMOS clear. : This is to let the payload (LinuxBoot) do some handling. > Please re-flow for 75 characters per line. Done https://review.coreboot.org/c/coreboot/+/43005/7/src/mainboard/ocp/deltalak… File src/mainboard/ocp/deltalake/ipmi.h: https://review.coreboot.org/c/coreboot/+/43005/7/src/mainboard/ocp/deltalak… PS7, Line 16: #define VALID_BIT (1 << 7) > Please align the values with spaces to the column of the block above. Done https://review.coreboot.org/c/coreboot/+/43005/7/src/mainboard/ocp/deltalak… PS7, Line 19: #define IS_CMOS_AND_VALID_BIT(x) ((x)&CMOS_BIT && (x)&VALID_BIT) > I’d left align the names. Done https://review.coreboot.org/c/coreboot/+/43005/7/src/mainboard/ocp/deltalak… File src/mainboard/ocp/deltalake/ipmi.c: https://review.coreboot.org/c/coreboot/+/43005/7/src/mainboard/ocp/deltalak… PS7, Line 122: the CMOS clear bit are both set from the response BootMode byte. */ > Please align to the word *IPMI* above. Done https://review.coreboot.org/c/coreboot/+/43005/7/src/mainboard/ocp/deltalak… PS7, Line 136: > Pleas remove the blank line. Done https://review.coreboot.org/c/coreboot/+/43005/7/src/mainboard/ocp/deltalak… PS7, Line 150: printk(BIOS_INFO, "IPMI CMOS clear requested\n"); > Maybe elaborate: … because CMOS data is invalid. Done https://review.coreboot.org/c/coreboot/+/43005/7/src/mainboard/ocp/deltalak… PS7, Line 151: return CB_SUCCESS; > Please add a blank line above. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/43005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27428c02e99040754e15e07782ec1ad8524def2f Gerrit-Change-Number: 43005 Gerrit-PatchSet: 8 Gerrit-Owner: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Morgan Jang Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Rocky Phagura Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 09 Jul 2020 03:49:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/ocp/deltalake: Send OEM IPMI command for CMOS clear on RTC failure
by build bot (Jenkins) (Code Review) 08 Jul '20

08 Jul '20

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43005 ) Change subject: mb/ocp/deltalake: Send OEM IPMI command for CMOS clear on RTC failure ...................................................................... Patch Set 8: (3 comments) https://review.coreboot.org/c/coreboot/+/43005/8/src/mainboard/ocp/deltalak… File src/mainboard/ocp/deltalake/ipmi.h: https://review.coreboot.org/c/coreboot/+/43005/8/src/mainboard/ocp/deltalak… PS8, Line 43: }__packed; space required after that close brace '}' https://review.coreboot.org/c/coreboot/+/43005/8/src/mainboard/ocp/deltalak… File src/mainboard/ocp/deltalake/ipmi.c: https://review.coreboot.org/c/coreboot/+/43005/8/src/mainboard/ocp/deltalak… PS8, Line 115: }__packed; space required after that close brace '}' https://review.coreboot.org/c/coreboot/+/43005/8/src/mainboard/ocp/deltalak… File src/mainboard/ocp/deltalake/romstage.c: https://review.coreboot.org/c/coreboot/+/43005/8/src/mainboard/ocp/deltalak… PS8, Line 103: printk(BIOS_DEBUG,"%s: ipmi status=%x\n", __func__, res); space required after that ',' (ctx:VxV) -- To view, visit https://review.coreboot.org/c/coreboot/+/43005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27428c02e99040754e15e07782ec1ad8524def2f Gerrit-Change-Number: 43005 Gerrit-PatchSet: 8 Gerrit-Owner: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Morgan Jang Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Rocky Phagura Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 09 Jul 2020 03:46:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit July 2020