coreboot-gerrit June 2020

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Change in coreboot[master]: soc/intel/xeon_sp/skx/soc_util.c: Remove unused <cpu/cpu.h>
by HAOUAS Elyes (Code Review) 02 Jun '20

02 Jun '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41514 ) Change subject: soc/intel/xeon_sp/skx/soc_util.c: Remove unused <cpu/cpu.h> ...................................................................... soc/intel/xeon_sp/skx/soc_util.c: Remove unused <cpu/cpu.h> Change-Id: I6dd004b417c27ff0b9f7e55557a9670f927d425c Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/xeon_sp/skx/soc_util.c 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/41514/1 diff --git a/src/soc/intel/xeon_sp/skx/soc_util.c b/src/soc/intel/xeon_sp/skx/soc_util.c index aa965b6..dc97d5e 100644 --- a/src/soc/intel/xeon_sp/skx/soc_util.c +++ b/src/soc/intel/xeon_sp/skx/soc_util.c @@ -3,7 +3,6 @@ #include <assert.h> #include <commonlib/sort.h> #include <console/console.h> -#include <cpu/cpu.h> #include <cpu/x86/msr.h> #include <delay.h> #include <device/pci.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/41514 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6dd004b417c27ff0b9f7e55557a9670f927d425c Gerrit-Change-Number: 41514 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/intel/fsp2_0: Add FSP 2.2 specific support
by build bot (Jenkins) (Code Review) 02 Jun '20

02 Jun '20

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41728 ) Change subject: drivers/intel/fsp2_0: Add FSP 2.2 specific support ...................................................................... Patch Set 4: (1 comment) https://review.coreboot.org/c/coreboot/+/41728/4/src/drivers/intel/fsp2_0/s… File src/drivers/intel/fsp2_0/silicon_init.c: https://review.coreboot.org/c/coreboot/+/41728/4/src/drivers/intel/fsp2_0/s… PS4, Line 81: FSPS_ARCH_UPD *arch_upd; need consistent spacing around '*' (ctx:WxV) -- To view, visit https://review.coreboot.org/c/coreboot/+/41728 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If7177a267f3a9b4cbb60a639f1c737b9a3341913 Gerrit-Change-Number: 41728 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nathaniel L Desimone <nathaniel.l.desimone(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 02 Jun 2020 09:50:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp2_0: Add FSP 2.2 specific support
by Subrata Banik (Code Review) 02 Jun '20

02 Jun '20

Hello build bot (Jenkins), Furquan Shaikh, Wonkyu Kim, Maulik V Vaghela, Duncan Laurie, Sridhar Siricilla, Aamir Bohra, Srinidhi N Kaushik, Andrey Petrov, Aaron Durbin, Patrick Rudolph, Nathaniel L Desimone, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41728 to look at the new patch set (#4). Change subject: drivers/intel/fsp2_0: Add FSP 2.2 specific support ...................................................................... drivers/intel/fsp2_0: Add FSP 2.2 specific support • Based on FSP EAS v2.1 – Backward compatibility is retained. • Added multi-phase silicon initialization to increase the modularity of the FspSiliconInit() API. • Added FspMultiPhaseSiInit() API • FSP_INFO_HEADER changes o Added FspMultiPhaseSiInitEntryOffset • Added FSPS_ARCH_UPD o Added EnableMultiPhaseSiliconInit, bootloaders designed for FSP 2.0/2.1 can disable the FspMultiPhaseSiInit() API and continue to use FspSiliconInit() without change. FSP 2.2 Specification: https://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-… Change-Id: If7177a267f3a9b4cbb60a639f1c737b9a3341913 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/commonlib/include/commonlib/timestamp_serialized.h M src/drivers/intel/fsp2_0/Kconfig M src/drivers/intel/fsp2_0/include/fsp/api.h M src/drivers/intel/fsp2_0/include/fsp/info_header.h M src/drivers/intel/fsp2_0/include/fsp/upd.h M src/drivers/intel/fsp2_0/include/fsp/util.h M src/drivers/intel/fsp2_0/silicon_init.c M src/drivers/intel/fsp2_0/util.c M src/include/console/post_codes.h 9 files changed, 198 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/41728/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/41728 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If7177a267f3a9b4cbb60a639f1c737b9a3341913 Gerrit-Change-Number: 41728 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nathaniel L Desimone <nathaniel.l.desimone(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/*/bootblock/cpu.c: Drop unused includes
by HAOUAS Elyes (Code Review) 02 Jun '20

02 Jun '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40690 ) Change subject: soc/intel/*/bootblock/cpu.c: Drop unused includes ...................................................................... soc/intel/*/bootblock/cpu.c: Drop unused includes Change-Id: Ide01a922d7d8e500f9a0b507544010706661d7de Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/cannonlake/bootblock/cpu.c M src/soc/intel/skylake/bootblock/cpu.c 2 files changed, 0 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/40690/1 diff --git a/src/soc/intel/cannonlake/bootblock/cpu.c b/src/soc/intel/cannonlake/bootblock/cpu.c index bfb23b6..7dd7d60 100644 --- a/src/soc/intel/cannonlake/bootblock/cpu.c +++ b/src/soc/intel/cannonlake/bootblock/cpu.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ -#include <intelblocks/cpulib.h> #include <intelblocks/fast_spi.h> #include <soc/bootblock.h> diff --git a/src/soc/intel/skylake/bootblock/cpu.c b/src/soc/intel/skylake/bootblock/cpu.c index 0ce5425..8e1f67f 100644 --- a/src/soc/intel/skylake/bootblock/cpu.c +++ b/src/soc/intel/skylake/bootblock/cpu.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ -#include <intelblocks/cpulib.h> #include <intelblocks/fast_spi.h> #include <soc/bootblock.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/40690 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ide01a922d7d8e500f9a0b507544010706661d7de Gerrit-Change-Number: 40690 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/intel/fsp2_0: Add FSP 2.2 specific support
by Subrata Banik (Code Review) 02 Jun '20

02 Jun '20

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41728 ) Change subject: drivers/intel/fsp2_0: Add FSP 2.2 specific support ...................................................................... Patch Set 3: (4 comments) https://review.coreboot.org/c/coreboot/+/41728/3/src/drivers/intel/fsp2_0/i… File src/drivers/intel/fsp2_0/include/fsp/util.h: https://review.coreboot.org/c/coreboot/+/41728/3/src/drivers/intel/fsp2_0/i… PS3, Line 31: number_of_phase > nit; no_of_phases? or number_of_phases? Ack https://review.coreboot.org/c/coreboot/+/41728/3/src/drivers/intel/fsp2_0/s… File src/drivers/intel/fsp2_0/silicon_init.c: https://review.coreboot.org/c/coreboot/+/41728/3/src/drivers/intel/fsp2_0/s… PS3, Line 27: >= FSP specification : * 2.2 > nit: FSP specification >= 2. […] Ack https://review.coreboot.org/c/coreboot/+/41728/3/src/drivers/intel/fsp2_0/s… PS3, Line 41: fsp_handle_reset(status); > nit: Handling reset based on FSP status is an error scenario? Ack https://review.coreboot.org/c/coreboot/+/41728/3/src/drivers/intel/fsp2_0/s… PS3, Line 140: post_code(POST_FSP_MULTI_PHASE_SI_INIT_ENTRY); > nit: Should this be out of time measurement block? Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/41728 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If7177a267f3a9b4cbb60a639f1c737b9a3341913 Gerrit-Change-Number: 41728 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nathaniel L Desimone <nathaniel.l.desimone(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 02 Jun 2020 09:45:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/vpd: add VPD region VPD_RW_OR_RO
by Jonathan Zhang (Code Review) 02 Jun '20

02 Jun '20

Jonathan Zhang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41732 ) Change subject: drivers/vpd: add VPD region VPD_RW_OR_RO ...................................................................... drivers/vpd: add VPD region VPD_RW_OR_RO This change is based on the concept that system user's (overwrite) settings are held in VPD_RW region, while system owner's (default) settings are held in VPD_RO region. Add VPD_RW_OR_RO, so that VPD_RW region is searched first to get overwrite setting, otherwise VPD_RO region is searched to get default setting. Signed-off-by: Jonathan Zhang <jonzhang(a)fb.com> Change-Id: Icd7cbd9c3fb2a6b02fc417ad45d7d22ca6795457 --- M src/drivers/vpd/vpd.c M src/drivers/vpd/vpd.h 2 files changed, 30 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/41732/1 diff --git a/src/drivers/vpd/vpd.c b/src/drivers/vpd/vpd.c index f1dcf8c..9264140 100644 --- a/src/drivers/vpd/vpd.c +++ b/src/drivers/vpd/vpd.c @@ -193,17 +193,33 @@ } } - assert(region == VPD_RO_OR_RW); /* - * As the region is set to VPD_RO_OR_RW, use the search result from VPD_RO + * If the region is set to VPD_RO_OR_RW, use the search result from VPD_RO * as the preference, otherwise use the search result from VPD_RW. */ - if (arg_ro.matched) { - *size = arg_ro.value_len; - return arg_ro.value; - } else if (arg_rw.matched) { + if (region == VPD_RO_OR_RW) { + if (arg_ro.matched) { + *size = arg_ro.value_len; + return arg_ro.value; + } else if (arg_rw.matched) { + *size = arg_rw.value_len; + return arg_rw.value; + } else { + return NULL; + } + } + + /* + * As the region is set to VPD_RW_OR_RO, use the search result from VPD_RW + * as the preference, otherwise use the search result from VPD_RO. + */ + assert(region == VPD_RW_OR_RO); + if (arg_rw.matched) { *size = arg_rw.value_len; return arg_rw.value; + } else if (arg_ro.matched) { + *size = arg_ro.value_len; + return arg_ro.value; } else { return NULL; } diff --git a/src/drivers/vpd/vpd.h b/src/drivers/vpd/vpd.h index 5fa3b4e..549b7a4 100644 --- a/src/drivers/vpd/vpd.h +++ b/src/drivers/vpd/vpd.h @@ -13,11 +13,16 @@ /* * VPD_RO_OR_RW indicates VPD_RO search result is preferred over VPD_RW search result. + * + * VPD_RW_OR_RO indicates VPD_RW search result is preferred over VPD_RO search result. + * This is based on the concept that system user's (overwrite) settings are held in + * VPD_RW region, while system owner's (default) settings are held in VPD_RO region. */ enum vpd_region { - VPD_RO_OR_RW = 0, - VPD_RO = 1, - VPD_RW = 2 + VPD_RO = 0, + VPD_RW = 1, + VPD_RO_OR_RW = 2, + VPD_RW_OR_RO = 3 }; /* VPD 2.0 data blob structure */ -- To view, visit https://review.coreboot.org/c/coreboot/+/41732 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd7cbd9c3fb2a6b02fc417ad45d7d22ca6795457 Gerrit-Change-Number: 41732 Gerrit-PatchSet: 1 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: {icelake,jasperlake,skylake,tigerlake}/bootblock.c: Drop unused includes
by HAOUAS Elyes (Code Review) 02 Jun '20

02 Jun '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40689 ) Change subject: {icelake,jasperlake,skylake,tigerlake}/bootblock.c: Drop unused includes ...................................................................... {icelake,jasperlake,skylake,tigerlake}/bootblock.c: Drop unused includes Change-Id: I06c8b2bf65283c3c1fcd25fdaae298b82fc0e09c Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/icelake/bootblock/bootblock.c M src/soc/intel/jasperlake/bootblock/bootblock.c M src/soc/intel/skylake/bootblock/bootblock.c M src/soc/intel/tigerlake/bootblock/bootblock.c 4 files changed, 2 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/40689/1 diff --git a/src/soc/intel/icelake/bootblock/bootblock.c b/src/soc/intel/icelake/bootblock/bootblock.c index 6bf1e13..9aa6fb4 100644 --- a/src/soc/intel/icelake/bootblock/bootblock.c +++ b/src/soc/intel/icelake/bootblock/bootblock.c @@ -2,12 +2,8 @@ /* This file is part of the coreboot project. */ #include <bootblock_common.h> -#include <intelblocks/gspi.h> -#include <intelblocks/systemagent.h> #include <intelblocks/uart.h> #include <soc/bootblock.h> -#include <soc/iomap.h> -#include <soc/pch.h> asmlinkage void bootblock_c_entry(uint64_t base_timestamp) { @@ -21,6 +17,7 @@ bootblock_pch_early_init(); bootblock_cpu_init(); pch_early_iorange_init(); + if (CONFIG(INTEL_LPSS_UART_FOR_CONSOLE)) uart_bootblock_init(); } diff --git a/src/soc/intel/jasperlake/bootblock/bootblock.c b/src/soc/intel/jasperlake/bootblock/bootblock.c index 6bf1e13..f7ec0e8 100644 --- a/src/soc/intel/jasperlake/bootblock/bootblock.c +++ b/src/soc/intel/jasperlake/bootblock/bootblock.c @@ -2,12 +2,8 @@ /* This file is part of the coreboot project. */ #include <bootblock_common.h> -#include <intelblocks/gspi.h> -#include <intelblocks/systemagent.h> #include <intelblocks/uart.h> #include <soc/bootblock.h> -#include <soc/iomap.h> -#include <soc/pch.h> asmlinkage void bootblock_c_entry(uint64_t base_timestamp) { diff --git a/src/soc/intel/skylake/bootblock/bootblock.c b/src/soc/intel/skylake/bootblock/bootblock.c index 15f250d..2844571 100644 --- a/src/soc/intel/skylake/bootblock/bootblock.c +++ b/src/soc/intel/skylake/bootblock/bootblock.c @@ -2,7 +2,6 @@ /* This file is part of the coreboot project. */ #include <bootblock_common.h> -#include <drivers/i2c/designware/dw_i2c.h> #include <intelblocks/gspi.h> #include <intelblocks/uart.h> #include <soc/bootblock.h> diff --git a/src/soc/intel/tigerlake/bootblock/bootblock.c b/src/soc/intel/tigerlake/bootblock/bootblock.c index 6bf1e13..9aa6fb4 100644 --- a/src/soc/intel/tigerlake/bootblock/bootblock.c +++ b/src/soc/intel/tigerlake/bootblock/bootblock.c @@ -2,12 +2,8 @@ /* This file is part of the coreboot project. */ #include <bootblock_common.h> -#include <intelblocks/gspi.h> -#include <intelblocks/systemagent.h> #include <intelblocks/uart.h> #include <soc/bootblock.h> -#include <soc/iomap.h> -#include <soc/pch.h> asmlinkage void bootblock_c_entry(uint64_t base_timestamp) { @@ -21,6 +17,7 @@ bootblock_pch_early_init(); bootblock_cpu_init(); pch_early_iorange_init(); + if (CONFIG(INTEL_LPSS_UART_FOR_CONSOLE)) uart_bootblock_init(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/40689 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I06c8b2bf65283c3c1fcd25fdaae298b82fc0e09c Gerrit-Change-Number: 40689 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: src: Remove unused '#include <cpu/x86/lapic.h>'
by HAOUAS Elyes (Code Review) 02 Jun '20

02 Jun '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41489 ) Change subject: src: Remove unused '#include <cpu/x86/lapic.h>' ...................................................................... src: Remove unused '#include <cpu/x86/lapic.h>' Change-Id: I71cff43d53660dc1e5a760ac3034bcf75f93c6e7 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/amd/smm/smm_init.c M src/cpu/intel/haswell/smmrelocate.c M src/cpu/intel/hyperthreading/intel_sibling.c M src/cpu/x86/mtrr/mtrr.c M src/mainboard/amd/gardenia/mptable.c M src/mainboard/amd/olivehill/mptable.c M src/mainboard/amd/parmer/mptable.c M src/mainboard/amd/thatcher/mptable.c M src/mainboard/asrock/imb-a180/mptable.c M src/mainboard/asus/am1i-a/mptable.c M src/mainboard/asus/f2a85-m/mptable.c M src/mainboard/bap/ode_e20XX/mptable.c M src/mainboard/bap/ode_e21XX/mptable.c M src/mainboard/bap/ode_e21XX/romstage.c M src/mainboard/biostar/a68n_5200/mptable.c M src/mainboard/biostar/am1ml/mptable.c M src/mainboard/gizmosphere/gizmo2/mptable.c M src/mainboard/google/butterfly/early_init.c M src/mainboard/google/kahlee/mptable.c M src/mainboard/google/link/early_init.c M src/mainboard/google/parrot/early_init.c M src/mainboard/google/stout/early_init.c M src/mainboard/hp/abm/mptable.c M src/mainboard/hp/pavilion_m6_1035dx/mptable.c M src/mainboard/intel/emeraldlake2/early_init.c M src/mainboard/kontron/ktqm77/early_init.c M src/mainboard/lenovo/g505s/mptable.c M src/mainboard/lenovo/x1_carbon_gen1/early_init.c M src/mainboard/lenovo/x201/mainboard.c M src/mainboard/lenovo/x220/early_init.c M src/mainboard/lenovo/x230/variants/x230/early_init.c M src/mainboard/msi/ms7721/mptable.c M src/mainboard/packardbell/ms2290/mainboard.c M src/mainboard/samsung/lumpy/early_init.c M src/mainboard/samsung/stumpy/early_init.c M src/northbridge/amd/agesa/family14/northbridge.c M src/soc/amd/common/block/smbus/sm.c M src/soc/intel/braswell/northcluster.c M src/soc/intel/broadwell/smmrelocate.c M src/soc/intel/cannonlake/smmrelocate.c M src/soc/intel/icelake/smmrelocate.c M src/soc/intel/jasperlake/smmrelocate.c M src/soc/intel/skylake/smmrelocate.c M src/soc/intel/tigerlake/smmrelocate.c M src/soc/intel/xeon_sp/uncore.c M src/southbridge/amd/agesa/hudson/sm.c M src/southbridge/amd/pi/hudson/sm.c 47 files changed, 1 insertion(+), 47 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/41489/1 diff --git a/src/cpu/amd/smm/smm_init.c b/src/cpu/amd/smm/smm_init.c index 0de8fba..71cca82 100644 --- a/src/cpu/amd/smm/smm_init.c +++ b/src/cpu/amd/smm/smm_init.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <cpu/x86/lapic.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> #include <cpu/amd/mtrr.h> diff --git a/src/cpu/intel/haswell/smmrelocate.c b/src/cpu/intel/haswell/smmrelocate.c index 1c96188..0f7585a 100644 --- a/src/cpu/intel/haswell/smmrelocate.c +++ b/src/cpu/intel/haswell/smmrelocate.c @@ -5,7 +5,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> -#include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/hyperthreading/intel_sibling.c b/src/cpu/intel/hyperthreading/intel_sibling.c index 9febc83..329b693 100644 --- a/src/cpu/intel/hyperthreading/intel_sibling.c +++ b/src/cpu/intel/hyperthreading/intel_sibling.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <console/console.h> -#include <cpu/x86/lapic.h> #include <cpu/intel/hyperthreading.h> #include <device/device.h> #include <option.h> diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index 6187578..1f37659 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -19,7 +19,6 @@ #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/cache.h> -#include <cpu/x86/lapic.h> #include <memrange.h> #include <cpu/amd/mtrr.h> #include <assert.h> diff --git a/src/mainboard/amd/gardenia/mptable.c b/src/mainboard/amd/gardenia/mptable.c index 3528a13..6460fed 100644 --- a/src/mainboard/amd/gardenia/mptable.c +++ b/src/mainboard/amd/gardenia/mptable.c @@ -4,7 +4,6 @@ #include <arch/ioapic.h> #include <string.h> #include <stdint.h> -#include <cpu/x86/lapic.h> #include <soc/southbridge.h> #include <amdblocks/amd_pci_util.h> diff --git a/src/mainboard/amd/olivehill/mptable.c b/src/mainboard/amd/olivehill/mptable.c index ab321c0..4761728 100644 --- a/src/mainboard/amd/olivehill/mptable.c +++ b/src/mainboard/amd/olivehill/mptable.c @@ -5,7 +5,6 @@ #include <arch/ioapic.h> #include <string.h> #include <stdint.h> -#include <cpu/x86/lapic.h> #include <southbridge/amd/agesa/hudson/hudson.h> u8 picr_data[0x54] = { diff --git a/src/mainboard/amd/parmer/mptable.c b/src/mainboard/amd/parmer/mptable.c index 28866e8..c7aa69e 100644 --- a/src/mainboard/amd/parmer/mptable.c +++ b/src/mainboard/amd/parmer/mptable.c @@ -5,7 +5,6 @@ #include <arch/ioapic.h> #include <string.h> #include <stdint.h> -#include <cpu/x86/lapic.h> #include <southbridge/amd/agesa/hudson/hudson.h> u8 picr_data[0x54] = { diff --git a/src/mainboard/amd/thatcher/mptable.c b/src/mainboard/amd/thatcher/mptable.c index 8b8bc03..bc091e5 100644 --- a/src/mainboard/amd/thatcher/mptable.c +++ b/src/mainboard/amd/thatcher/mptable.c @@ -5,7 +5,6 @@ #include <arch/ioapic.h> #include <string.h> #include <stdint.h> -#include <cpu/x86/lapic.h> #include <southbridge/amd/agesa/hudson/hudson.h> u8 picr_data[] = { diff --git a/src/mainboard/asrock/imb-a180/mptable.c b/src/mainboard/asrock/imb-a180/mptable.c index 2a35eb9..20c4b8d 100644 --- a/src/mainboard/asrock/imb-a180/mptable.c +++ b/src/mainboard/asrock/imb-a180/mptable.c @@ -5,7 +5,6 @@ #include <arch/ioapic.h> #include <string.h> #include <stdint.h> -#include <cpu/x86/lapic.h> #include <southbridge/amd/agesa/hudson/hudson.h> diff --git a/src/mainboard/asus/am1i-a/mptable.c b/src/mainboard/asus/am1i-a/mptable.c index 5caa783..cd72ca3 100644 --- a/src/mainboard/asus/am1i-a/mptable.c +++ b/src/mainboard/asus/am1i-a/mptable.c @@ -3,7 +3,6 @@ #include <arch/smp/mpspec.h> #include <arch/ioapic.h> #include <stdint.h> -#include <cpu/x86/lapic.h> #include <southbridge/amd/common/amd_pci_util.h> #include <drivers/generic/ioapic/chip.h> diff --git a/src/mainboard/asus/f2a85-m/mptable.c b/src/mainboard/asus/f2a85-m/mptable.c index 7d9dcc3..e3c7d80 100644 --- a/src/mainboard/asus/f2a85-m/mptable.c +++ b/src/mainboard/asus/f2a85-m/mptable.c @@ -3,7 +3,6 @@ #include <arch/io.h> #include <arch/ioapic.h> #include <arch/smp/mpspec.h> -#include <cpu/x86/lapic.h> #include <stdint.h> #include <string.h> #include <southbridge/amd/agesa/hudson/hudson.h> diff --git a/src/mainboard/bap/ode_e20XX/mptable.c b/src/mainboard/bap/ode_e20XX/mptable.c index b854b75..c0ad4ed 100644 --- a/src/mainboard/bap/ode_e20XX/mptable.c +++ b/src/mainboard/bap/ode_e20XX/mptable.c @@ -3,7 +3,6 @@ #include <arch/smp/mpspec.h> #include <arch/ioapic.h> #include <stdint.h> -#include <cpu/x86/lapic.h> #include <southbridge/amd/common/amd_pci_util.h> #include <drivers/generic/ioapic/chip.h> diff --git a/src/mainboard/bap/ode_e21XX/mptable.c b/src/mainboard/bap/ode_e21XX/mptable.c index 0d8c942..c5aeeb0 100644 --- a/src/mainboard/bap/ode_e21XX/mptable.c +++ b/src/mainboard/bap/ode_e21XX/mptable.c @@ -5,7 +5,6 @@ #include <arch/ioapic.h> #include <string.h> #include <stdint.h> -#include <cpu/x86/lapic.h> #include <southbridge/amd/pi/hudson/hudson.h> u8 picr_data[0x54] = { diff --git a/src/mainboard/bap/ode_e21XX/romstage.c b/src/mainboard/bap/ode_e21XX/romstage.c index 74b8517..6b116fd 100644 --- a/src/mainboard/bap/ode_e21XX/romstage.c +++ b/src/mainboard/bap/ode_e21XX/romstage.c @@ -5,7 +5,6 @@ #include <device/pci_def.h> #include <arch/io.h> #include <arch/cpu.h> -#include <cpu/x86/lapic.h> #include <console/console.h> #include <northbridge/amd/agesa/state_machine.h> #include <southbridge/amd/pi/hudson/hudson.h> diff --git a/src/mainboard/biostar/a68n_5200/mptable.c b/src/mainboard/biostar/a68n_5200/mptable.c index ab321c0..4921c34 100644 --- a/src/mainboard/biostar/a68n_5200/mptable.c +++ b/src/mainboard/biostar/a68n_5200/mptable.c @@ -5,7 +5,7 @@ #include <arch/ioapic.h> #include <string.h> #include <stdint.h> -#include <cpu/x86/lapic.h> + #include <southbridge/amd/agesa/hudson/hudson.h> u8 picr_data[0x54] = { diff --git a/src/mainboard/biostar/am1ml/mptable.c b/src/mainboard/biostar/am1ml/mptable.c index 7a02800..41e70b9 100644 --- a/src/mainboard/biostar/am1ml/mptable.c +++ b/src/mainboard/biostar/am1ml/mptable.c @@ -3,7 +3,6 @@ #include <arch/smp/mpspec.h> #include <arch/ioapic.h> #include <stdint.h> -#include <cpu/x86/lapic.h> #include <southbridge/amd/common/amd_pci_util.h> #include <drivers/generic/ioapic/chip.h> diff --git a/src/mainboard/gizmosphere/gizmo2/mptable.c b/src/mainboard/gizmosphere/gizmo2/mptable.c index b854b75..c0ad4ed 100644 --- a/src/mainboard/gizmosphere/gizmo2/mptable.c +++ b/src/mainboard/gizmosphere/gizmo2/mptable.c @@ -3,7 +3,6 @@ #include <arch/smp/mpspec.h> #include <arch/ioapic.h> #include <stdint.h> -#include <cpu/x86/lapic.h> #include <southbridge/amd/common/amd_pci_util.h> #include <drivers/generic/ioapic/chip.h> diff --git a/src/mainboard/google/butterfly/early_init.c b/src/mainboard/google/butterfly/early_init.c index 21d59d1..df51f66 100644 --- a/src/mainboard/google/butterfly/early_init.c +++ b/src/mainboard/google/butterfly/early_init.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <stdint.h> -#include <cpu/x86/lapic.h> #include <acpi/acpi.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit.h> diff --git a/src/mainboard/google/kahlee/mptable.c b/src/mainboard/google/kahlee/mptable.c index 3528a13..6460fed 100644 --- a/src/mainboard/google/kahlee/mptable.c +++ b/src/mainboard/google/kahlee/mptable.c @@ -4,7 +4,6 @@ #include <arch/ioapic.h> #include <string.h> #include <stdint.h> -#include <cpu/x86/lapic.h> #include <soc/southbridge.h> #include <amdblocks/amd_pci_util.h> diff --git a/src/mainboard/google/link/early_init.c b/src/mainboard/google/link/early_init.c index 27f086c..8360f2a 100644 --- a/src/mainboard/google/link/early_init.c +++ b/src/mainboard/google/link/early_init.c @@ -3,7 +3,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_ops.h> -#include <cpu/x86/lapic.h> #include <acpi/acpi.h> #include <console/console.h> #include <northbridge/intel/sandybridge/sandybridge.h> diff --git a/src/mainboard/google/parrot/early_init.c b/src/mainboard/google/parrot/early_init.c index cff8438..3c5c363 100644 --- a/src/mainboard/google/parrot/early_init.c +++ b/src/mainboard/google/parrot/early_init.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <stdint.h> -#include <cpu/x86/lapic.h> #include <acpi/acpi.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit.h> diff --git a/src/mainboard/google/stout/early_init.c b/src/mainboard/google/stout/early_init.c index 1b73fc0..e71d0ee 100644 --- a/src/mainboard/google/stout/early_init.c +++ b/src/mainboard/google/stout/early_init.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <stdint.h> -#include <cpu/x86/lapic.h> #include <acpi/acpi.h> #include <console/console.h> #include <northbridge/intel/sandybridge/sandybridge.h> diff --git a/src/mainboard/hp/abm/mptable.c b/src/mainboard/hp/abm/mptable.c index ab321c0..4761728 100644 --- a/src/mainboard/hp/abm/mptable.c +++ b/src/mainboard/hp/abm/mptable.c @@ -5,7 +5,6 @@ #include <arch/ioapic.h> #include <string.h> #include <stdint.h> -#include <cpu/x86/lapic.h> #include <southbridge/amd/agesa/hudson/hudson.h> u8 picr_data[0x54] = { diff --git a/src/mainboard/hp/pavilion_m6_1035dx/mptable.c b/src/mainboard/hp/pavilion_m6_1035dx/mptable.c index 4433c71..c620be2 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/mptable.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/mptable.c @@ -3,7 +3,6 @@ #include <arch/io.h> #include <arch/ioapic.h> #include <arch/smp/mpspec.h> -#include <cpu/x86/lapic.h> #include <stdint.h> #include <string.h> #include <southbridge/amd/agesa/hudson/hudson.h> diff --git a/src/mainboard/intel/emeraldlake2/early_init.c b/src/mainboard/intel/emeraldlake2/early_init.c index 6e1f7e3..119346e 100644 --- a/src/mainboard/intel/emeraldlake2/early_init.c +++ b/src/mainboard/intel/emeraldlake2/early_init.c @@ -3,7 +3,6 @@ #include <bootblock_common.h> #include <stdint.h> #include <arch/io.h> -#include <cpu/x86/lapic.h> #include <superio/smsc/sio1007/sio1007.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit.h> diff --git a/src/mainboard/kontron/ktqm77/early_init.c b/src/mainboard/kontron/ktqm77/early_init.c index 31eb05b..b8f44b5 100644 --- a/src/mainboard/kontron/ktqm77/early_init.c +++ b/src/mainboard/kontron/ktqm77/early_init.c @@ -4,7 +4,6 @@ #include <stdint.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> -#include <cpu/x86/lapic.h> #include <cpu/x86/msr.h> #include <device/pci_def.h> #include <northbridge/intel/sandybridge/raminit_native.h> diff --git a/src/mainboard/lenovo/g505s/mptable.c b/src/mainboard/lenovo/g505s/mptable.c index 19ac198..bc1759a 100644 --- a/src/mainboard/lenovo/g505s/mptable.c +++ b/src/mainboard/lenovo/g505s/mptable.c @@ -3,7 +3,6 @@ #include <arch/io.h> #include <arch/ioapic.h> #include <arch/smp/mpspec.h> -#include <cpu/x86/lapic.h> #include <stdint.h> #include <string.h> #include <southbridge/amd/agesa/hudson/hudson.h> diff --git a/src/mainboard/lenovo/x1_carbon_gen1/early_init.c b/src/mainboard/lenovo/x1_carbon_gen1/early_init.c index a709450..f5299ea 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/early_init.c +++ b/src/mainboard/lenovo/x1_carbon_gen1/early_init.c @@ -2,7 +2,6 @@ #include <stdint.h> #include <string.h> -#include <cpu/x86/lapic.h> #include <console/console.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c index beb9938..1a306b1 100644 --- a/src/mainboard/lenovo/x201/mainboard.c +++ b/src/mainboard/lenovo/x201/mainboard.c @@ -6,7 +6,6 @@ #include <southbridge/intel/bd82x6x/pch.h> #include "dock.h" #include <drivers/intel/gma/int15.h> -#include <cpu/x86/lapic.h> #include <drivers/lenovo/lenovo.h> static void fill_ssdt(const struct device *device) diff --git a/src/mainboard/lenovo/x220/early_init.c b/src/mainboard/lenovo/x220/early_init.c index f87a9d4..5f0ad45 100644 --- a/src/mainboard/lenovo/x220/early_init.c +++ b/src/mainboard/lenovo/x220/early_init.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <stdint.h> -#include <cpu/x86/lapic.h> #include <acpi/acpi.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit.h> diff --git a/src/mainboard/lenovo/x230/variants/x230/early_init.c b/src/mainboard/lenovo/x230/variants/x230/early_init.c index 2089ee6..e6c4ffa 100644 --- a/src/mainboard/lenovo/x230/variants/x230/early_init.c +++ b/src/mainboard/lenovo/x230/variants/x230/early_init.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <cpu/x86/lapic.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> diff --git a/src/mainboard/msi/ms7721/mptable.c b/src/mainboard/msi/ms7721/mptable.c index 7d9dcc3..e3c7d80 100644 --- a/src/mainboard/msi/ms7721/mptable.c +++ b/src/mainboard/msi/ms7721/mptable.c @@ -3,7 +3,6 @@ #include <arch/io.h> #include <arch/ioapic.h> #include <arch/smp/mpspec.h> -#include <cpu/x86/lapic.h> #include <stdint.h> #include <string.h> #include <southbridge/amd/agesa/hudson/hudson.h> diff --git a/src/mainboard/packardbell/ms2290/mainboard.c b/src/mainboard/packardbell/ms2290/mainboard.c index 6df8fad..ce8d504 100644 --- a/src/mainboard/packardbell/ms2290/mainboard.c +++ b/src/mainboard/packardbell/ms2290/mainboard.c @@ -7,7 +7,6 @@ #include <ec/acpi/ec.h> #include <drivers/intel/gma/int15.h> #include <pc80/keyboard.h> -#include <cpu/x86/lapic.h> static void mainboard_enable(struct device *dev) { diff --git a/src/mainboard/samsung/lumpy/early_init.c b/src/mainboard/samsung/lumpy/early_init.c index 23309ba..091cbc5 100644 --- a/src/mainboard/samsung/lumpy/early_init.c +++ b/src/mainboard/samsung/lumpy/early_init.c @@ -4,7 +4,6 @@ #include <string.h> #include <arch/io.h> #include <bootblock_common.h> -#include <cpu/x86/lapic.h> #include <cbfs.h> #include <console/console.h> #include <bootmode.h> diff --git a/src/mainboard/samsung/stumpy/early_init.c b/src/mainboard/samsung/stumpy/early_init.c index 6636a6b..f079482 100644 --- a/src/mainboard/samsung/stumpy/early_init.c +++ b/src/mainboard/samsung/stumpy/early_init.c @@ -2,7 +2,6 @@ #include <bootblock_common.h> #include <stdint.h> -#include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> #include <bootmode.h> diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index 5cb99d6..eb7d14f 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -12,7 +12,6 @@ #include <string.h> #include <lib.h> #include <cpu/cpu.h> -#include <cpu/x86/lapic.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> #include <northbridge/amd/agesa/nb_common.h> diff --git a/src/soc/amd/common/block/smbus/sm.c b/src/soc/amd/common/block/smbus/sm.c index 2f37a91..5a4edd8 100644 --- a/src/soc/amd/common/block/smbus/sm.c +++ b/src/soc/amd/common/block/smbus/sm.c @@ -6,7 +6,6 @@ #include <device/pci_ids.h> #include <device/smbus.h> #include <device/smbus_host.h> -#include <cpu/x86/lapic.h> #include <arch/ioapic.h> #include <soc/southbridge.h> diff --git a/src/soc/intel/braswell/northcluster.c b/src/soc/intel/braswell/northcluster.c index 2070cd7..57f8b4f 100644 --- a/src/soc/intel/braswell/northcluster.c +++ b/src/soc/intel/braswell/northcluster.c @@ -6,7 +6,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <cpu/x86/lapic.h> #include <cpu/x86/smm.h> #include <fsp/util.h> #include <soc/iomap.h> diff --git a/src/soc/intel/broadwell/smmrelocate.c b/src/soc/intel/broadwell/smmrelocate.c index 660a688..03ed244 100644 --- a/src/soc/intel/broadwell/smmrelocate.c +++ b/src/soc/intel/broadwell/smmrelocate.c @@ -5,7 +5,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> -#include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> diff --git a/src/soc/intel/cannonlake/smmrelocate.c b/src/soc/intel/cannonlake/smmrelocate.c index dcf67bc..3aec51b 100644 --- a/src/soc/intel/cannonlake/smmrelocate.c +++ b/src/soc/intel/cannonlake/smmrelocate.c @@ -5,7 +5,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> -#include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> diff --git a/src/soc/intel/icelake/smmrelocate.c b/src/soc/intel/icelake/smmrelocate.c index d9ca915..f1a7033 100644 --- a/src/soc/intel/icelake/smmrelocate.c +++ b/src/soc/intel/icelake/smmrelocate.c @@ -5,7 +5,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> -#include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> diff --git a/src/soc/intel/jasperlake/smmrelocate.c b/src/soc/intel/jasperlake/smmrelocate.c index af16fbd..664ea6c 100644 --- a/src/soc/intel/jasperlake/smmrelocate.c +++ b/src/soc/intel/jasperlake/smmrelocate.c @@ -5,7 +5,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> -#include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> diff --git a/src/soc/intel/skylake/smmrelocate.c b/src/soc/intel/skylake/smmrelocate.c index e45da91..cb83d61 100644 --- a/src/soc/intel/skylake/smmrelocate.c +++ b/src/soc/intel/skylake/smmrelocate.c @@ -5,7 +5,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> -#include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> diff --git a/src/soc/intel/tigerlake/smmrelocate.c b/src/soc/intel/tigerlake/smmrelocate.c index af16fbd..664ea6c 100644 --- a/src/soc/intel/tigerlake/smmrelocate.c +++ b/src/soc/intel/tigerlake/smmrelocate.c @@ -5,7 +5,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> -#include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> diff --git a/src/soc/intel/xeon_sp/uncore.c b/src/soc/intel/xeon_sp/uncore.c index 1d46e40..55b561d 100644 --- a/src/soc/intel/xeon_sp/uncore.c +++ b/src/soc/intel/xeon_sp/uncore.c @@ -2,7 +2,6 @@ #include <cbmem.h> #include <console/console.h> -#include <cpu/x86/lapic.h> #include <device/pci.h> #include <device/pci_ids.h> #include <soc/iomap.h> diff --git a/src/southbridge/amd/agesa/hudson/sm.c b/src/southbridge/amd/agesa/hudson/sm.c index 9f14908..39e6752 100644 --- a/src/southbridge/amd/agesa/hudson/sm.c +++ b/src/southbridge/amd/agesa/hudson/sm.c @@ -4,7 +4,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/smbus.h> -#include <cpu/x86/lapic.h> #include <arch/ioapic.h> #include "hudson.h" diff --git a/src/southbridge/amd/pi/hudson/sm.c b/src/southbridge/amd/pi/hudson/sm.c index ee30b7f..268d7e4 100644 --- a/src/southbridge/amd/pi/hudson/sm.c +++ b/src/southbridge/amd/pi/hudson/sm.c @@ -4,7 +4,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/smbus.h> -#include <cpu/x86/lapic.h> #include <arch/ioapic.h> #include "hudson.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/41489 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I71cff43d53660dc1e5a760ac3034bcf75f93c6e7 Gerrit-Change-Number: 41489 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

5 14

Change in coreboot[master]: src: Remove unused '#include <timer.h>'
by HAOUAS Elyes (Code Review) 02 Jun '20

02 Jun '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41491 ) Change subject: src: Remove unused '#include <timer.h>' ...................................................................... src: Remove unused '#include <timer.h>' Change-Id: I57e064d26b215743a1cb06bb6605fc4fe1160876 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/drivers/analogix/anx7625/anx7625.c M src/drivers/intel/ptt/ptt.c M src/soc/amd/common/block/psp/psp.c M src/soc/amd/common/block/psp/psp_smm.c M src/soc/amd/picasso/finalize.c M src/soc/amd/stoneyridge/finalize.c M src/soc/intel/skylake/cpu.c M src/soc/intel/skylake/finalize.c M src/soc/mediatek/mt8173/i2c.c M src/soc/qualcomm/sc7180/gpio.c 10 files changed, 0 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/41491/1 diff --git a/src/drivers/analogix/anx7625/anx7625.c b/src/drivers/analogix/anx7625/anx7625.c index 57f1c77..ee98fd4 100644 --- a/src/drivers/analogix/anx7625/anx7625.c +++ b/src/drivers/analogix/anx7625/anx7625.c @@ -5,7 +5,6 @@ #include <device/i2c_simple.h> #include <edid.h> #include <gpio.h> -#include <timer.h> #include <string.h> #include "anx7625.h" diff --git a/src/drivers/intel/ptt/ptt.c b/src/drivers/intel/ptt/ptt.c index 91eb42c..67ed0ee 100644 --- a/src/drivers/intel/ptt/ptt.c +++ b/src/drivers/intel/ptt/ptt.c @@ -3,7 +3,6 @@ #include <soc/pci_devs.h> #include <device/pci_ops.h> #include <console/console.h> -#include <timer.h> #include "ptt.h" diff --git a/src/soc/amd/common/block/psp/psp.c b/src/soc/amd/common/block/psp/psp.c index b1b8b0d..0e03174 100644 --- a/src/soc/amd/common/block/psp/psp.c +++ b/src/soc/amd/common/block/psp/psp.c @@ -2,7 +2,6 @@ #include <device/mmio.h> #include <cpu/x86/msr.h> -#include <timer.h> #include <bootstate.h> #include <console/console.h> #include <amdblocks/psp.h> diff --git a/src/soc/amd/common/block/psp/psp_smm.c b/src/soc/amd/common/block/psp/psp_smm.c index 4fd80fc..024e952 100644 --- a/src/soc/amd/common/block/psp/psp_smm.c +++ b/src/soc/amd/common/block/psp/psp_smm.c @@ -5,7 +5,6 @@ #include <cpu/amd/msr.h> #include <cbfs.h> #include <region_file.h> -#include <timer.h> #include <bootstate.h> #include <rules.h> #include <console/console.h> diff --git a/src/soc/amd/picasso/finalize.c b/src/soc/amd/picasso/finalize.c index 0df94468..2df5524 100644 --- a/src/soc/amd/picasso/finalize.c +++ b/src/soc/amd/picasso/finalize.c @@ -5,7 +5,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/msr.h> #include <bootstate.h> -#include <timer.h> #include <console/console.h> #include <amdblocks/acpi.h> diff --git a/src/soc/amd/stoneyridge/finalize.c b/src/soc/amd/stoneyridge/finalize.c index 0df94468..2df5524 100644 --- a/src/soc/amd/stoneyridge/finalize.c +++ b/src/soc/amd/stoneyridge/finalize.c @@ -5,7 +5,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/msr.h> #include <bootstate.h> -#include <timer.h> #include <console/console.h> #include <amdblocks/acpi.h> diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index 1aba7f6..4b319e6 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -26,7 +26,6 @@ #include <soc/pm.h> #include <soc/ramstage.h> #include <soc/systemagent.h> -#include <timer.h> #include "chip.h" diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c index ba154f2..b20f391 100644 --- a/src/soc/intel/skylake/finalize.c +++ b/src/soc/intel/skylake/finalize.c @@ -24,7 +24,6 @@ #include <soc/pm.h> #include <soc/smbus.h> #include <soc/systemagent.h> -#include <timer.h> #include "chip.h" diff --git a/src/soc/mediatek/mt8173/i2c.c b/src/soc/mediatek/mt8173/i2c.c index d2acd2c..0adee22 100644 --- a/src/soc/mediatek/mt8173/i2c.c +++ b/src/soc/mediatek/mt8173/i2c.c @@ -5,7 +5,6 @@ #include <delay.h> #include <device/i2c_simple.h> #include <symbols.h> -#include <timer.h> #include <device/mmio.h> #include <soc/addressmap.h> #include <soc/i2c.h> diff --git a/src/soc/qualcomm/sc7180/gpio.c b/src/soc/qualcomm/sc7180/gpio.c index 9588cc1..51d9135 100644 --- a/src/soc/qualcomm/sc7180/gpio.c +++ b/src/soc/qualcomm/sc7180/gpio.c @@ -3,7 +3,6 @@ #include <assert.h> #include <delay.h> #include <device/mmio.h> -#include <timer.h> #include <timestamp.h> #include <types.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/41491 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I57e064d26b215743a1cb06bb6605fc4fe1160876 Gerrit-Change-Number: 41491 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

4 3

Change in coreboot[master]: mb/asus/p2b: Add p3b-f IRQ routing to DSDT
by Keith Hui (Code Review) 02 Jun '20

02 Jun '20

Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41097 ) Change subject: mb/asus/p2b: Add p3b-f IRQ routing to DSDT ...................................................................... mb/asus/p2b: Add p3b-f IRQ routing to DSDT Change-Id: Ie4d24eee1cffd65707887dd621e3de873d20cf01 Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/mainboard/asus/p2b/dsdt.asl 1 file changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/41097/1 diff --git a/src/mainboard/asus/p2b/dsdt.asl b/src/mainboard/asus/p2b/dsdt.asl index 0c415da..88be9ba 100644 --- a/src/mainboard/asus/p2b/dsdt.asl +++ b/src/mainboard/asus/p2b/dsdt.asl @@ -149,6 +149,17 @@ Package (0x04) { 0x000CFFFF, 2, LNKC, 0 }, Package (0x04) { 0x000CFFFF, 3, LNKD, 0 }, +#if CONFIG(BOARD_ASUS_P3B_F) + Package (0x04) { 0x000DFFFF, 0, LNKD, 0 }, + Package (0x04) { 0x000DFFFF, 1, LNKA, 0 }, + Package (0x04) { 0x000DFFFF, 2, LNKB, 0 }, + Package (0x04) { 0x000DFFFF, 3, LNKC, 0 }, + + Package (0x04) { 0x000EFFFF, 0, LNKC, 0 }, + Package (0x04) { 0x000EFFFF, 1, LNKD, 0 }, + Package (0x04) { 0x000EFFFF, 2, LNKA, 0 }, + Package (0x04) { 0x000EFFFF, 3, LNKB, 0 }, +#endif }) #include <northbridge/intel/i440bx/acpi/sb_pci0_crs.asl> #include <southbridge/intel/i82371eb/acpi/isabridge.asl> -- To view, visit https://review.coreboot.org/c/coreboot/+/41097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie4d24eee1cffd65707887dd621e3de873d20cf01 Gerrit-Change-Number: 41097 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-MessageType: newchange

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