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Change in coreboot[master]: [WIP] southbridge/amd: Select COMMON_FADT
by Kyösti Mälkki (Code Review) 10 Jun '20

10 Jun '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41924 ) Change subject: [WIP] southbridge/amd: Select COMMON_FADT ...................................................................... [WIP] southbridge/amd: Select COMMON_FADT Change-Id: Ib6a0f8a3beb3d02dfd90234b1af6eccd3cde21bb Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/southbridge/amd/agesa/hudson/Kconfig M src/southbridge/amd/agesa/hudson/fadt.c M src/southbridge/amd/cimx/sb800/Kconfig M src/southbridge/amd/cimx/sb800/fadt.c M src/southbridge/amd/pi/hudson/Kconfig M src/southbridge/amd/pi/hudson/fadt.c 6 files changed, 6 insertions(+), 80 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/41924/1 diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig index e61bc85..fadc694 100644 --- a/src/southbridge/amd/agesa/hudson/Kconfig +++ b/src/southbridge/amd/agesa/hudson/Kconfig @@ -14,6 +14,7 @@ select HAVE_USBDEBUG_OPTIONS select HAVE_CF9_RESET select HAVE_CF9_RESET_PREPARE + select COMMON_FADT select SOC_AMD_COMMON select SOC_AMD_COMMON_BLOCK select SOC_AMD_COMMON_BLOCK_ACPIMMIO diff --git a/src/southbridge/amd/agesa/hudson/fadt.c b/src/southbridge/amd/agesa/hudson/fadt.c index a328a88..ea865cb 100644 --- a/src/southbridge/amd/agesa/hudson/fadt.c +++ b/src/southbridge/amd/agesa/hudson/fadt.c @@ -27,32 +27,10 @@ * Reference section 5.2.9 Fixed ACPI Description Table (FADT) * in the ACPI 3.0b specification. */ -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) +void acpi_fill_fadt(acpi_fadt_t *fadt) { - acpi_header_t *header = &(fadt->header); - printk(BIOS_DEBUG, "pm_base: 0x%04x\n", HUDSON_ACPI_IO_BASE); - /* Prepare the header */ - memset((void *)fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = get_acpi_table_revision(FADT); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - if ((uintptr_t)facs > 0xffffffff) - printk(BIOS_DEBUG, "ACPI: FACS lives above 4G\n"); - else - fadt->firmware_ctrl = (uintptr_t)facs; - - if ((uintptr_t)dsdt > 0xffffffff) - printk(BIOS_DEBUG, "ACPI: DSDT lives above 4G\n"); - else - fadt->dsdt = (uintptr_t)dsdt; - fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */ fadt->preferred_pm_profile = FADT_PM_PROFILE; fadt->sci_int = 9; /* HUDSON - IRQ 09 - ACPI SCI */ @@ -117,11 +95,6 @@ fadt->ARM_boot_arch = 0; /* MUST be 0 ACPI 3.0 */ fadt->FADT_MinorVersion = 0; /* MUST be 0 ACPI 3.0 */ - fadt->x_firmware_ctl_l = ((uintptr_t)facs) & 0xffffffff; - fadt->x_firmware_ctl_h = ((uint64_t)(uintptr_t)facs) >> 32; - fadt->x_dsdt_l = ((uintptr_t)dsdt) & 0xffffffff; - fadt->x_dsdt_h = ((uint64_t)(uintptr_t)dsdt) >> 32; - fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; fadt->x_pm1a_evt_blk.bit_width = 32; fadt->x_pm1a_evt_blk.bit_offset = 0; @@ -185,6 +158,4 @@ fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0; fadt->x_gpe1_blk.addrh = 0x0; - - header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t)); } diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig index 8379d23..8d15f7b 100644 --- a/src/southbridge/amd/cimx/sb800/Kconfig +++ b/src/southbridge/amd/cimx/sb800/Kconfig @@ -8,6 +8,7 @@ select AMD_SB_CIMX select HAVE_CF9_RESET select HAVE_CF9_RESET_PREPARE + select COMMON_FADT select SOC_AMD_COMMON select SOC_AMD_COMMON_BLOCK select SOC_AMD_COMMON_BLOCK_ACPIMMIO diff --git a/src/southbridge/amd/cimx/sb800/fadt.c b/src/southbridge/amd/cimx/sb800/fadt.c index abb383d..5911f6f 100644 --- a/src/southbridge/amd/cimx/sb800/fadt.c +++ b/src/southbridge/amd/cimx/sb800/fadt.c @@ -31,33 +31,12 @@ * Reference section 5.2.9 Fixed ACPI Description Table (FADT) * in the ACPI 3.0b specification. */ -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) +void acpi_fill_fadt(acpi_fadt_t *fadt) { u16 val = 0; - acpi_header_t *header = &(fadt->header); printk(BIOS_DEBUG, "ACPI_BLK_BASE: 0x%04x\n", ACPI_BLK_BASE); - /* Prepare the header */ - memset((void *)fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = get_acpi_table_revision(FADT); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - if ((uintptr_t)facs > 0xffffffff) - printk(BIOS_DEBUG, "ACPI: FACS lives above 4G\n"); - else - fadt->firmware_ctrl = (uintptr_t)facs; - - if ((uintptr_t)dsdt > 0xffffffff) - printk(BIOS_DEBUG, "ACPI: DSDT lives above 4G\n"); - else - fadt->dsdt = (uintptr_t)dsdt; - fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */ fadt->preferred_pm_profile = FADT_PM_PROFILE; fadt->sci_int = 9; /* HUDSON 1 - IRQ 09 - ACPI SCI */ @@ -144,11 +123,6 @@ fadt->ARM_boot_arch = 0; /* MUST be 0 ACPI 3.0 */ fadt->FADT_MinorVersion = 0; /* MUST be 0 ACPI 3.0 */ - fadt->x_firmware_ctl_l = ((uintptr_t)facs) & 0xffffffff; - fadt->x_firmware_ctl_h = ((uint64_t)(uintptr_t)facs) >> 32; - fadt->x_dsdt_l = ((uintptr_t)dsdt) & 0xffffffff; - fadt->x_dsdt_h = ((uint64_t)(uintptr_t)dsdt) >> 32; - fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; fadt->x_pm1a_evt_blk.bit_width = 32; fadt->x_pm1a_evt_blk.bit_offset = 0; @@ -209,7 +183,4 @@ fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0; fadt->x_gpe1_blk.addrh = 0x0; - - header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t)); - } diff --git a/src/southbridge/amd/pi/hudson/Kconfig b/src/southbridge/amd/pi/hudson/Kconfig index b569690..92a1bb1 100644 --- a/src/southbridge/amd/pi/hudson/Kconfig +++ b/src/southbridge/amd/pi/hudson/Kconfig @@ -17,6 +17,7 @@ select HAVE_USBDEBUG_OPTIONS select HAVE_CF9_RESET select HAVE_CF9_RESET_PREPARE + select COMMON_FADT select SOC_AMD_COMMON select SOC_AMD_COMMON_BLOCK select SOC_AMD_COMMON_BLOCK_ACPIMMIO diff --git a/src/southbridge/amd/pi/hudson/fadt.c b/src/southbridge/amd/pi/hudson/fadt.c index 686b669..92cda5e 100644 --- a/src/southbridge/amd/pi/hudson/fadt.c +++ b/src/southbridge/amd/pi/hudson/fadt.c @@ -27,25 +27,10 @@ * Reference section 5.2.9 Fixed ACPI Description Table (FADT) * in the ACPI 3.0b specification. */ -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) +void acpi_fill_fadt(acpi_fadt_t *fadt) { - acpi_header_t *header = &(fadt->header); - printk(BIOS_DEBUG, "pm_base: 0x%04x\n", HUDSON_ACPI_IO_BASE); - /* Prepare the header */ - memset((void *)fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = get_acpi_table_revision(FADT); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - fadt->firmware_ctrl = (u32) facs; - fadt->dsdt = (u32) dsdt; - fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */ fadt->preferred_pm_profile = FADT_PM_PROFILE; fadt->sci_int = 9; /* HUDSON - IRQ 09 - ACPI SCI */ @@ -111,8 +96,6 @@ fadt->x_firmware_ctl_l = 0; /* set to 0 if firmware_ctrl is used */ fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (u32) dsdt; - fadt->x_dsdt_h = 0; fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; fadt->x_pm1a_evt_blk.bit_width = 32; @@ -177,6 +160,4 @@ fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0; fadt->x_gpe1_blk.addrh = 0x0; - - header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t)); } -- To view, visit https://review.coreboot.org/c/coreboot/+/41924 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib6a0f8a3beb3d02dfd90234b1af6eccd3cde21bb Gerrit-Change-Number: 41924 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: [WIP] soc/amd/stoneyridge,picasso: Select COMMON_FADT
by Kyösti Mälkki (Code Review) 10 Jun '20

10 Jun '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41921 ) Change subject: [WIP] soc/amd/stoneyridge,picasso: Select COMMON_FADT ...................................................................... [WIP] soc/amd/stoneyridge,picasso: Select COMMON_FADT Change-Id: I0c98bf7f88c33691401ebc6b174d959dd515dd11 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/acpi.c M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/acpi.c 4 files changed, 4 insertions(+), 38 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/41921/1 diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index e3d145d..c4a3320 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -55,6 +55,7 @@ select UDK_2017_BINDING select CACHE_MRC_SETTINGS select HAVE_CF9_RESET + select COMMON_FADT config PRERAM_CBMEM_CONSOLE_SIZE hex diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 817ec51..8ec3bd0 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -85,24 +85,10 @@ * Reference section 5.2.9 Fixed ACPI Description Table (FADT) * in the ACPI 3.0b specification. */ -void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) +void acpi_fill_fadt(acpi_fadt_t *fadt) { - acpi_header_t *header = &(fadt->header); - printk(BIOS_DEBUG, "pm_base: 0x%04x\n", PICASSO_ACPI_IO_BASE); - /* Prepare the header */ - memset((void *)fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = get_acpi_table_revision(FADT); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - fadt->firmware_ctrl = (u32) facs; - fadt->dsdt = (u32) dsdt; fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */ fadt->preferred_pm_profile = FADT_PM_PROFILE; fadt->sci_int = 9; /* IRQ 09 - ACPI SCI */ @@ -169,8 +155,6 @@ fadt->x_firmware_ctl_l = 0; /* set to 0 if firmware_ctrl is used */ fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (u32) dsdt; - fadt->x_dsdt_h = 0; fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; fadt->x_pm1a_evt_blk.bit_width = 32; @@ -235,8 +219,6 @@ fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0; fadt->x_gpe1_blk.addrh = 0x0; - - header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t)); } void generate_cpu_entries(const struct device *device) diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 47642a9..ac337ca 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -46,6 +46,7 @@ select HAVE_SMI_HANDLER select SSE2 select RTC + select COMMON_FADT config AMD_APU_STONEYRIDGE bool diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index a7caa93..f514b1e 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -57,24 +57,10 @@ * Reference section 5.2.9 Fixed ACPI Description Table (FADT) * in the ACPI 3.0b specification. */ -void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) +void acpi_fill_fadt(acpi_fadt_t *fadt) { - acpi_header_t *header = &(fadt->header); - printk(BIOS_DEBUG, "pm_base: 0x%04x\n", STONEYRIDGE_ACPI_IO_BASE); - /* Prepare the header */ - memset((void *)fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = get_acpi_table_revision(FADT); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - fadt->firmware_ctrl = (u32) facs; - fadt->dsdt = (u32) dsdt; fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */ fadt->preferred_pm_profile = FADT_PM_PROFILE; fadt->sci_int = 9; /* IRQ 09 - ACPI SCI */ @@ -141,8 +127,6 @@ fadt->x_firmware_ctl_l = 0; /* set to 0 if firmware_ctrl is used */ fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (u32) dsdt; - fadt->x_dsdt_h = 0; fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; fadt->x_pm1a_evt_blk.bit_width = 32; @@ -207,8 +191,6 @@ fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0; fadt->x_gpe1_blk.addrh = 0x0; - - header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t)); } void generate_cpu_entries(const struct device *device) -- To view, visit https://review.coreboot.org/c/coreboot/+/41921 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c98bf7f88c33691401ebc6b174d959dd515dd11 Gerrit-Change-Number: 41921 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb,sb/amd/cimx/sb800: Remove FADT_PM_PROFILE
by Kyösti Mälkki (Code Review) 10 Jun '20

10 Jun '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42031 ) Change subject: mb,sb/amd/cimx/sb800: Remove FADT_PM_PROFILE ...................................................................... mb,sb/amd/cimx/sb800: Remove FADT_PM_PROFILE The platform_cfg.h under mainboard/ are legacy configuration mechanism used with AGESA family14 board. All boards advertise as PM_DESKTOP for power management profile. Change-Id: Ic28761eb238dbbaf3e8f820a29ec64b89f12bf53 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/amd/persimmon/platform_cfg.h M src/mainboard/elmex/pcm205400/platform_cfg.h M src/mainboard/gizmosphere/gizmo/platform_cfg.h M src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h M src/mainboard/lippert/frontrunner-af/platform_cfg.h M src/mainboard/lippert/toucan-af/platform_cfg.h M src/mainboard/pcengines/apu1/platform_cfg.h M src/southbridge/amd/cimx/sb800/fadt.c 8 files changed, 1 insertion(+), 103 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/42031/1 diff --git a/src/mainboard/amd/persimmon/platform_cfg.h b/src/mainboard/amd/persimmon/platform_cfg.h index e93c306..87a5cc4 100644 --- a/src/mainboard/amd/persimmon/platform_cfg.h +++ b/src/mainboard/amd/persimmon/platform_cfg.h @@ -224,18 +224,4 @@ */ #define AZALIA_OEM_VERB_TABLE (&codec_tablelist[0]) -/* set up an ACPI preferred power management profile */ -/* from acpi.h - * PM_UNSPECIFIED = 0, - * PM_DESKTOP = 1, - * PM_MOBILE = 2, - * PM_WORKSTATION = 3, - * PM_ENTERPRISE_SERVER = 4, - * PM_SOHO_SERVER = 5, - * PM_APPLIANCE_PC = 6, - * PM_PERFORMANCE_SERVER = 7, - * PM_TABLET = 8 - */ -#define FADT_PM_PROFILE 1 - #endif /* _PLATFORM_CFG_H_ */ diff --git a/src/mainboard/elmex/pcm205400/platform_cfg.h b/src/mainboard/elmex/pcm205400/platform_cfg.h index f4a3e59..b621f60b 100644 --- a/src/mainboard/elmex/pcm205400/platform_cfg.h +++ b/src/mainboard/elmex/pcm205400/platform_cfg.h @@ -222,18 +222,4 @@ */ //#define AZALIA_OEM_VERB_TABLE (&codec_tablelist[0]) -/* set up an ACPI preferred power management profile */ -/* from acpi.h - * PM_UNSPECIFIED = 0, - * PM_DESKTOP = 1, - * PM_MOBILE = 2, - * PM_WORKSTATION = 3, - * PM_ENTERPRISE_SERVER = 4, - * PM_SOHO_SERVER = 5, - * PM_APPLIANCE_PC = 6, - * PM_PERFORMANCE_SERVER = 7, - * PM_TABLET = 8 - */ -#define FADT_PM_PROFILE 1 - #endif /* _PLATFORM_CFG_H_ */ diff --git a/src/mainboard/gizmosphere/gizmo/platform_cfg.h b/src/mainboard/gizmosphere/gizmo/platform_cfg.h index f4f713b..2ea529f 100644 --- a/src/mainboard/gizmosphere/gizmo/platform_cfg.h +++ b/src/mainboard/gizmosphere/gizmo/platform_cfg.h @@ -229,18 +229,4 @@ */ #define AZALIA_OEM_VERB_TABLE (&codec_tablelist[0]) -/* set up an ACPI preferred power management profile */ -/* from acpi.h - * PM_UNSPECIFIED = 0, - * PM_DESKTOP = 1, - * PM_MOBILE = 2, - * PM_WORKSTATION = 3, - * PM_ENTERPRISE_SERVER = 4, - * PM_SOHO_SERVER = 5, - * PM_APPLIANCE_PC = 6, - * PM_PERFORMANCE_SERVER = 7, - * PM_TABLET = 8 - */ -#define FADT_PM_PROFILE 1 - #endif diff --git a/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h b/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h index 8bdaf7e..bacb7b1 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h +++ b/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h @@ -226,18 +226,4 @@ */ #define AZALIA_OEM_VERB_TABLE (&codec_tablelist[0]) -/* set up an ACPI preferred power management profile */ -/* from acpi.h - * PM_UNSPECIFIED = 0, - * PM_DESKTOP = 1, - * PM_MOBILE = 2, - * PM_WORKSTATION = 3, - * PM_ENTERPRISE_SERVER = 4, - * PM_SOHO_SERVER = 5, - * PM_APPLIANCE_PC = 6, - * PM_PERFORMANCE_SERVER = 7, - * PM_TABLET = 8 - */ -#define FADT_PM_PROFILE 1 - #endif /* _PLATFORM_CFG_H_ */ diff --git a/src/mainboard/lippert/frontrunner-af/platform_cfg.h b/src/mainboard/lippert/frontrunner-af/platform_cfg.h index ad60ef2..7d4f1f9 100644 --- a/src/mainboard/lippert/frontrunner-af/platform_cfg.h +++ b/src/mainboard/lippert/frontrunner-af/platform_cfg.h @@ -226,18 +226,4 @@ */ #define AZALIA_OEM_VERB_TABLE (&codec_tablelist[0]) -/* set up an ACPI preferred power management profile */ -/* from acpi.h - * PM_UNSPECIFIED = 0, - * PM_DESKTOP = 1, - * PM_MOBILE = 2, - * PM_WORKSTATION = 3, - * PM_ENTERPRISE_SERVER = 4, - * PM_SOHO_SERVER = 5, - * PM_APPLIANCE_PC = 6, - * PM_PERFORMANCE_SERVER = 7, - * PM_TABLET = 8 - */ -#define FADT_PM_PROFILE 1 - #endif diff --git a/src/mainboard/lippert/toucan-af/platform_cfg.h b/src/mainboard/lippert/toucan-af/platform_cfg.h index b57e195..b029efb 100644 --- a/src/mainboard/lippert/toucan-af/platform_cfg.h +++ b/src/mainboard/lippert/toucan-af/platform_cfg.h @@ -226,18 +226,4 @@ */ #define AZALIA_OEM_VERB_TABLE (&codec_tablelist[0]) -/* set up an ACPI preferred power management profile */ -/* from acpi.h - * PM_UNSPECIFIED = 0, - * PM_DESKTOP = 1, - * PM_MOBILE = 2, - * PM_WORKSTATION = 3, - * PM_ENTERPRISE_SERVER = 4, - * PM_SOHO_SERVER = 5, - * PM_APPLIANCE_PC = 6, - * PM_PERFORMANCE_SERVER = 7, - * PM_TABLET = 8 - */ -#define FADT_PM_PROFILE 1 - #endif diff --git a/src/mainboard/pcengines/apu1/platform_cfg.h b/src/mainboard/pcengines/apu1/platform_cfg.h index 63a3d5a..6087b15 100644 --- a/src/mainboard/pcengines/apu1/platform_cfg.h +++ b/src/mainboard/pcengines/apu1/platform_cfg.h @@ -198,20 +198,6 @@ */ #define GEC_CONFIG 0 -/* set up an ACPI preferred power management profile */ -/* from acpi.h - * PM_UNSPECIFIED = 0, - * PM_DESKTOP = 1, - * PM_MOBILE = 2, - * PM_WORKSTATION = 3, - * PM_ENTERPRISE_SERVER = 4, - * PM_SOHO_SERVER = 5, - * PM_APPLIANCE_PC = 6, - * PM_PERFORMANCE_SERVER = 7, - * PM_TABLET = 8 - */ -#define FADT_PM_PROFILE 1 - /** * @def USB_RX_MODE * 0x00 - leave Cg2Pll voltage at default value (1.222V) diff --git a/src/southbridge/amd/cimx/sb800/fadt.c b/src/southbridge/amd/cimx/sb800/fadt.c index d2339c6..153becc 100644 --- a/src/southbridge/amd/cimx/sb800/fadt.c +++ b/src/southbridge/amd/cimx/sb800/fadt.c @@ -23,10 +23,6 @@ #endif #endif -#ifndef FADT_PM_PROFILE - #define FADT_PM_PROFILE PM_UNSPECIFIED -#endif - /* * Reference section 5.2.9 Fixed ACPI Description Table (FADT) * in the ACPI 3.0b specification. @@ -59,7 +55,7 @@ fadt->dsdt = (uintptr_t)dsdt; fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */ - fadt->preferred_pm_profile = FADT_PM_PROFILE; + fadt->preferred_pm_profile = PM_DESKTOP; fadt->sci_int = 9; /* HUDSON 1 - IRQ 09 - ACPI SCI */ val = PM1_EVT_BLK_ADDRESS; -- To view, visit https://review.coreboot.org/c/coreboot/+/42031 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic28761eb238dbbaf3e8f820a29ec64b89f12bf53 Gerrit-Change-Number: 42031 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-MessageType: newchange

6 8

Change in coreboot[master]: sb,soc/amd: Remove FADT_PM_PROFILE
by Kyösti Mälkki (Code Review) 10 Jun '20

10 Jun '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42030 ) Change subject: sb,soc/amd: Remove FADT_PM_PROFILE ...................................................................... sb,soc/amd: Remove FADT_PM_PROFILE This was copy-paste from fam14 configuration mechanism using platform_cfg.h files. Change-Id: I7fdd89a8b1fe9c7e558841e24fb832d0cffd3454 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/soc/amd/picasso/acpi.c M src/soc/amd/picasso/include/soc/acpi.h M src/soc/amd/stoneyridge/acpi.c M src/soc/amd/stoneyridge/include/soc/acpi.h M src/southbridge/amd/agesa/hudson/fadt.c M src/southbridge/amd/pi/hudson/fadt.c 6 files changed, 4 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/42030/1 diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 817ec51..4377f7d 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -104,7 +104,7 @@ fadt->firmware_ctrl = (u32) facs; fadt->dsdt = (u32) dsdt; fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */ - fadt->preferred_pm_profile = FADT_PM_PROFILE; + fadt->preferred_pm_profile = PM_UNSPECIFIED; fadt->sci_int = 9; /* IRQ 09 - ACPI SCI */ if (permanent_smi_handler()) { diff --git a/src/soc/amd/picasso/include/soc/acpi.h b/src/soc/amd/picasso/include/soc/acpi.h index 6250f86..774f795 100644 --- a/src/soc/amd/picasso/include/soc/acpi.h +++ b/src/soc/amd/picasso/include/soc/acpi.h @@ -5,10 +5,6 @@ #include <acpi/acpi.h> -#ifndef FADT_PM_PROFILE - #define FADT_PM_PROFILE PM_UNSPECIFIED -#endif - unsigned long southbridge_write_acpi_tables(const struct device *device, unsigned long current, struct acpi_rsdp *rsdp); diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index a7caa93..083b4d8 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -76,7 +76,7 @@ fadt->firmware_ctrl = (u32) facs; fadt->dsdt = (u32) dsdt; fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */ - fadt->preferred_pm_profile = FADT_PM_PROFILE; + fadt->preferred_pm_profile = PM_UNSPECIFIED; fadt->sci_int = 9; /* IRQ 09 - ACPI SCI */ if (permanent_smi_handler()) { diff --git a/src/soc/amd/stoneyridge/include/soc/acpi.h b/src/soc/amd/stoneyridge/include/soc/acpi.h index 4375192..c44e934 100644 --- a/src/soc/amd/stoneyridge/include/soc/acpi.h +++ b/src/soc/amd/stoneyridge/include/soc/acpi.h @@ -11,10 +11,6 @@ #define FADT_BOOT_ARCH (ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042) #endif -#ifndef FADT_PM_PROFILE - #define FADT_PM_PROFILE PM_UNSPECIFIED -#endif - unsigned long southbridge_write_acpi_tables(const struct device *device, unsigned long current, struct acpi_rsdp *rsdp); diff --git a/src/southbridge/amd/agesa/hudson/fadt.c b/src/southbridge/amd/agesa/hudson/fadt.c index a328a88..06f3b9a 100644 --- a/src/southbridge/amd/agesa/hudson/fadt.c +++ b/src/southbridge/amd/agesa/hudson/fadt.c @@ -19,10 +19,6 @@ #define FADT_BOOT_ARCH (ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042) #endif -#ifndef FADT_PM_PROFILE - #define FADT_PM_PROFILE PM_UNSPECIFIED -#endif - /* * Reference section 5.2.9 Fixed ACPI Description Table (FADT) * in the ACPI 3.0b specification. @@ -54,7 +50,7 @@ fadt->dsdt = (uintptr_t)dsdt; fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */ - fadt->preferred_pm_profile = FADT_PM_PROFILE; + fadt->preferred_pm_profile = PM_UNSPECIFIED; fadt->sci_int = 9; /* HUDSON - IRQ 09 - ACPI SCI */ if (permanent_smi_handler()) { diff --git a/src/southbridge/amd/pi/hudson/fadt.c b/src/southbridge/amd/pi/hudson/fadt.c index 686b669..c3be679 100644 --- a/src/southbridge/amd/pi/hudson/fadt.c +++ b/src/southbridge/amd/pi/hudson/fadt.c @@ -19,10 +19,6 @@ #define FADT_BOOT_ARCH (ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042) #endif -#ifndef FADT_PM_PROFILE - #define FADT_PM_PROFILE PM_UNSPECIFIED -#endif - /* * Reference section 5.2.9 Fixed ACPI Description Table (FADT) * in the ACPI 3.0b specification. @@ -46,7 +42,7 @@ fadt->firmware_ctrl = (u32) facs; fadt->dsdt = (u32) dsdt; fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */ - fadt->preferred_pm_profile = FADT_PM_PROFILE; + fadt->preferred_pm_profile = PM_UNSPECIFIED; fadt->sci_int = 9; /* HUDSON - IRQ 09 - ACPI SCI */ if (permanent_smi_handler()) { -- To view, visit https://review.coreboot.org/c/coreboot/+/42030 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7fdd89a8b1fe9c7e558841e24fb832d0cffd3454 Gerrit-Change-Number: 42030 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

4 3

Change in coreboot[master]: sb/intel, ACPI: Do not override FADT preferred_pm_profile
by Kyösti Mälkki (Code Review) 10 Jun '20

10 Jun '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42186 ) Change subject: sb/intel, ACPI: Do not override FADT preferred_pm_profile ...................................................................... sb/intel, ACPI: Do not override FADT preferred_pm_profile Setting preferred_pm_profile under sb/ overrides the default determined from SYSTEM_TYPE_xx (or possibly SMBIOS_ENCLOSURE_TYPE with followup work). This is not desireable. Boards need to either select a pre-defined SYSTEM_TYPE_xx or provide board-specific mainboard_fill_fadt() should they need to change this. As they already select SYSTEM_TYPE_LAPTOP, following boards will maintain PM_MOBILE: lenovo/t400 lenovo/x200 roda/rk9 Following will change to PM_DESKTOP: aopen/dxplplusu asus/p2b emulation/qemu-i440fx emulation/qemu-q35 Change-Id: I2986eb0a8abc94507e9797cc8b64611ae4bd888a Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/southbridge/intel/i82371eb/fadt.c M src/southbridge/intel/i82801dx/fadt.c M src/southbridge/intel/i82801ix/fadt.c 3 files changed, 0 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/42186/1 diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c index 711b37e..84745a4 100644 --- a/src/southbridge/intel/i82371eb/fadt.c +++ b/src/southbridge/intel/i82371eb/fadt.c @@ -18,7 +18,6 @@ */ void acpi_fill_fadt(acpi_fadt_t *fadt) { - fadt->preferred_pm_profile = 0; /* unspecified */ fadt->sci_int = 9; if (permanent_smi_handler()) { diff --git a/src/southbridge/intel/i82801dx/fadt.c b/src/southbridge/intel/i82801dx/fadt.c index b497419..2da2175 100644 --- a/src/southbridge/intel/i82801dx/fadt.c +++ b/src/southbridge/intel/i82801dx/fadt.c @@ -21,7 +21,6 @@ { u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe; - fadt->preferred_pm_profile = PM_UNSPECIFIED; fadt->sci_int = 0x9; diff --git a/src/southbridge/intel/i82801ix/fadt.c b/src/southbridge/intel/i82801ix/fadt.c index 75d056f..ff30611 100644 --- a/src/southbridge/intel/i82801ix/fadt.c +++ b/src/southbridge/intel/i82801ix/fadt.c @@ -10,7 +10,6 @@ { u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe; - fadt->preferred_pm_profile = PM_MOBILE; fadt->sci_int = 0x9; if (permanent_smi_handler()) { -- To view, visit https://review.coreboot.org/c/coreboot/+/42186 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2986eb0a8abc94507e9797cc8b64611ae4bd888a Gerrit-Change-Number: 42186 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

3 2

Change in coreboot[master]: [WIP] Fix remaining acpi_create_fadt()
by Kyösti Mälkki (Code Review) 10 Jun '20

10 Jun '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41922 ) Change subject: [WIP] Fix remaining acpi_create_fadt() ...................................................................... [WIP] Fix remaining acpi_create_fadt() Change-Id: Iffdce450b1d4c9984ec5efe11eff62bf9184e314 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/acpi/acpi.c M src/include/acpi/acpi.h M src/mainboard/aopen/dxplplusu/fadt.c M src/mainboard/emulation/qemu-q35/acpi_tables.c M src/mainboard/lenovo/t400/fadt.c M src/mainboard/lenovo/x200/fadt.c M src/mainboard/roda/rk9/fadt.c M src/southbridge/amd/agesa/hudson/fadt.c M src/southbridge/amd/cimx/sb800/fadt.c M src/southbridge/amd/pi/hudson/fadt.c M src/southbridge/intel/i82371eb/fadt.c 11 files changed, 22 insertions(+), 23 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/41922/1 diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index 2f4a2bb..c9bba36 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -1266,6 +1266,16 @@ header->checksum = acpi_checksum((void *) fadt, header->length); } +#else +void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) +{ + acpi_header_t *header = &(fadt->header); + + acpi_mb_create_fadt(fadt, facs, dsdt); + + header->checksum = + acpi_checksum((void *) fadt, header->length); +} #endif unsigned long __weak fw_cfg_acpi_tables(unsigned long start) diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h index e8c699c5..202a55e 100644 --- a/src/include/acpi/acpi.h +++ b/src/include/acpi/acpi.h @@ -873,6 +873,9 @@ void soc_fill_fadt(acpi_fadt_t *fadt); void motherboard_fill_fadt(acpi_fadt_t *fadt); +/* FIXME: transitional helper only */ +void acpi_mb_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt); + void update_ssdt(void *ssdt); void update_ssdtx(void *ssdtx, int i); diff --git a/src/mainboard/aopen/dxplplusu/fadt.c b/src/mainboard/aopen/dxplplusu/fadt.c index ad522c4..994d039 100644 --- a/src/mainboard/aopen/dxplplusu/fadt.c +++ b/src/mainboard/aopen/dxplplusu/fadt.c @@ -17,7 +17,7 @@ #define S4_BIOS 0x77 #define GNVS_UPDATE 0xea -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) +void acpi_mb_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) { acpi_header_t *header = &(fadt->header); u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe; @@ -145,6 +145,4 @@ fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrh = 0x0; - - header->checksum = acpi_checksum((void *) fadt, header->length); } diff --git a/src/mainboard/emulation/qemu-q35/acpi_tables.c b/src/mainboard/emulation/qemu-q35/acpi_tables.c index 9bf58a6..b606b48 100644 --- a/src/mainboard/emulation/qemu-q35/acpi_tables.c +++ b/src/mainboard/emulation/qemu-q35/acpi_tables.c @@ -24,7 +24,7 @@ } -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) +void acpi_mb_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) { acpi_header_t *header = &(fadt->header); u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe; @@ -152,8 +152,6 @@ fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrh = 0x0; - - header->checksum = acpi_checksum((void *) fadt, header->length); } unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/lenovo/t400/fadt.c b/src/mainboard/lenovo/t400/fadt.c index 257fb41..7376881 100644 --- a/src/mainboard/lenovo/t400/fadt.c +++ b/src/mainboard/lenovo/t400/fadt.c @@ -6,7 +6,7 @@ #include <cpu/x86/smm.h> #include <version.h> -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) +void acpi_mb_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) { acpi_header_t *header = &(fadt->header); u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe; @@ -136,6 +136,4 @@ fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrh = 0x0; - - header->checksum = acpi_checksum((void *) fadt, header->length); } diff --git a/src/mainboard/lenovo/x200/fadt.c b/src/mainboard/lenovo/x200/fadt.c index 257fb41..7376881 100644 --- a/src/mainboard/lenovo/x200/fadt.c +++ b/src/mainboard/lenovo/x200/fadt.c @@ -6,7 +6,7 @@ #include <cpu/x86/smm.h> #include <version.h> -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) +void acpi_mb_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) { acpi_header_t *header = &(fadt->header); u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe; @@ -136,6 +136,4 @@ fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrh = 0x0; - - header->checksum = acpi_checksum((void *) fadt, header->length); } diff --git a/src/mainboard/roda/rk9/fadt.c b/src/mainboard/roda/rk9/fadt.c index 5127545..35ce073 100644 --- a/src/mainboard/roda/rk9/fadt.c +++ b/src/mainboard/roda/rk9/fadt.c @@ -6,7 +6,7 @@ #include <cpu/x86/smm.h> #include <version.h> -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) +void acpi_mb_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) { acpi_header_t *header = &(fadt->header); u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe; @@ -136,6 +136,4 @@ fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrh = 0x0; - - header->checksum = acpi_checksum((void *) fadt, header->length); } diff --git a/src/southbridge/amd/agesa/hudson/fadt.c b/src/southbridge/amd/agesa/hudson/fadt.c index a328a88..b98087a 100644 --- a/src/southbridge/amd/agesa/hudson/fadt.c +++ b/src/southbridge/amd/agesa/hudson/fadt.c @@ -27,7 +27,7 @@ * Reference section 5.2.9 Fixed ACPI Description Table (FADT) * in the ACPI 3.0b specification. */ -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) +void acpi_mb_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) { acpi_header_t *header = &(fadt->header); @@ -186,5 +186,4 @@ fadt->x_gpe1_blk.addrl = 0; fadt->x_gpe1_blk.addrh = 0x0; - header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t)); } diff --git a/src/southbridge/amd/cimx/sb800/fadt.c b/src/southbridge/amd/cimx/sb800/fadt.c index abb383d..23df308 100644 --- a/src/southbridge/amd/cimx/sb800/fadt.c +++ b/src/southbridge/amd/cimx/sb800/fadt.c @@ -31,7 +31,7 @@ * Reference section 5.2.9 Fixed ACPI Description Table (FADT) * in the ACPI 3.0b specification. */ -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) +void acpi_mb_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) { u16 val = 0; acpi_header_t *header = &(fadt->header); @@ -210,6 +210,5 @@ fadt->x_gpe1_blk.addrl = 0; fadt->x_gpe1_blk.addrh = 0x0; - header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t)); } diff --git a/src/southbridge/amd/pi/hudson/fadt.c b/src/southbridge/amd/pi/hudson/fadt.c index 686b669..653c2bd 100644 --- a/src/southbridge/amd/pi/hudson/fadt.c +++ b/src/southbridge/amd/pi/hudson/fadt.c @@ -27,7 +27,7 @@ * Reference section 5.2.9 Fixed ACPI Description Table (FADT) * in the ACPI 3.0b specification. */ -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) +void acpi_mb_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) { acpi_header_t *header = &(fadt->header); @@ -178,5 +178,4 @@ fadt->x_gpe1_blk.addrl = 0; fadt->x_gpe1_blk.addrh = 0x0; - header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t)); } diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c index 66781be..1c9fdb7 100644 --- a/src/southbridge/intel/i82371eb/fadt.c +++ b/src/southbridge/intel/i82371eb/fadt.c @@ -16,7 +16,7 @@ * Create the Fixed ACPI Description Tables (FADT) for any board with this SB. * Reference: ACPIspec40a, 5.2.9, page 118 */ -void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) +void acpi_mb_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) { acpi_header_t *header = &(fadt->header); @@ -198,5 +198,4 @@ fadt->x_gpe1_blk.addrl = fadt->gpe1_blk; fadt->x_gpe1_blk.addrh = 0x0; - header->checksum = acpi_checksum((void *) fadt, sizeof(acpi_fadt_t)); } -- To view, visit https://review.coreboot.org/c/coreboot/+/41922 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iffdce450b1d4c9984ec5efe11eff62bf9184e314 Gerrit-Change-Number: 41922 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

5 8

Change in coreboot[master]: [WIP] sb/intel/i82371eb: Select COMMON_FADT
by Kyösti Mälkki (Code Review) 10 Jun '20

10 Jun '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41925 ) Change subject: [WIP] sb/intel/i82371eb: Select COMMON_FADT ...................................................................... [WIP] sb/intel/i82371eb: Select COMMON_FADT Change-Id: I0b1f3e16b2a801e5fcf5f96d59922f6231d73636 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/southbridge/intel/i82371eb/Kconfig M src/southbridge/intel/i82371eb/fadt.c 2 files changed, 2 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/41925/1 diff --git a/src/southbridge/intel/i82371eb/Kconfig b/src/southbridge/intel/i82371eb/Kconfig index d0eec0e..ac0f94c 100644 --- a/src/southbridge/intel/i82371eb/Kconfig +++ b/src/southbridge/intel/i82371eb/Kconfig @@ -1,5 +1,6 @@ config SOUTHBRIDGE_INTEL_I82371EB select ACPI_INTEL_HARDWARE_SLEEP_VALUES + select COMMON_FADT select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_RESET diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c index 66781be..711b37e 100644 --- a/src/southbridge/intel/i82371eb/fadt.c +++ b/src/southbridge/intel/i82371eb/fadt.c @@ -16,23 +16,8 @@ * Create the Fixed ACPI Description Tables (FADT) for any board with this SB. * Reference: ACPIspec40a, 5.2.9, page 118 */ -void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) +void acpi_fill_fadt(acpi_fadt_t *fadt) { - acpi_header_t *header = &(fadt->header); - - /* Power management controller */ - - memset((void *) fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = ACPI_FADT_REV_ACPI_1_0; - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - fadt->firmware_ctrl = (uintptr_t)facs; - fadt->dsdt = (uintptr_t)dsdt; fadt->preferred_pm_profile = 0; /* unspecified */ fadt->sci_int = 9; @@ -137,11 +122,6 @@ fadt->reset_reg.addrh = 0x0; fadt->reset_value = 0; - fadt->x_firmware_ctl_l = (uintptr_t)facs; - fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (uintptr_t)dsdt; - fadt->x_dsdt_h = 0; - fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8; fadt->x_pm1a_evt_blk.bit_offset = 0; @@ -198,5 +178,4 @@ fadt->x_gpe1_blk.addrl = fadt->gpe1_blk; fadt->x_gpe1_blk.addrh = 0x0; - header->checksum = acpi_checksum((void *) fadt, sizeof(acpi_fadt_t)); } -- To view, visit https://review.coreboot.org/c/coreboot/+/41925 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b1f3e16b2a801e5fcf5f96d59922f6231d73636 Gerrit-Change-Number: 41925 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

3 3

Change in coreboot[master]: [WIP] sb/intel/i82801dx: Select COMMON_FADT
by Kyösti Mälkki (Code Review) 10 Jun '20

10 Jun '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41923 ) Change subject: [WIP] sb/intel/i82801dx: Select COMMON_FADT ...................................................................... [WIP] sb/intel/i82801dx: Select COMMON_FADT Change-Id: Ie2fdc715e4d1af347d25b51e83189f28cd9af014 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/southbridge/intel/i82801dx/Kconfig M src/southbridge/intel/i82801dx/Makefile.inc R src/southbridge/intel/i82801dx/fadt.c 3 files changed, 3 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/41923/1 diff --git a/src/southbridge/intel/i82801dx/Kconfig b/src/southbridge/intel/i82801dx/Kconfig index 5bea98c..a0a2ace 100644 --- a/src/southbridge/intel/i82801dx/Kconfig +++ b/src/southbridge/intel/i82801dx/Kconfig @@ -3,6 +3,7 @@ config SOUTHBRIDGE_INTEL_I82801DX bool select ACPI_INTEL_HARDWARE_SLEEP_VALUES + select COMMON_FADT select IOAPIC select HAVE_SMI_HANDLER select SOUTHBRIDGE_INTEL_COMMON_SMBUS diff --git a/src/southbridge/intel/i82801dx/Makefile.inc b/src/southbridge/intel/i82801dx/Makefile.inc index d7b2371..030f7b4 100644 --- a/src/southbridge/intel/i82801dx/Makefile.inc +++ b/src/southbridge/intel/i82801dx/Makefile.inc @@ -4,6 +4,7 @@ ramstage-y += i82801dx.c ramstage-y += ac97.c +ramstage-y += fadt.c ramstage-y += ide.c ramstage-y += lpc.c #ramstage-y += pci.c diff --git a/src/mainboard/aopen/dxplplusu/fadt.c b/src/southbridge/intel/i82801dx/fadt.c similarity index 82% rename from src/mainboard/aopen/dxplplusu/fadt.c rename to src/southbridge/intel/i82801dx/fadt.c index ad522c4..4543e92 100644 --- a/src/mainboard/aopen/dxplplusu/fadt.c +++ b/src/southbridge/intel/i82801dx/fadt.c @@ -17,22 +17,10 @@ #define S4_BIOS 0x77 #define GNVS_UPDATE 0xea -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) +void acpi_fill_fadt(acpi_fadt_t *fadt) { - acpi_header_t *header = &(fadt->header); u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe; - memset((void *) fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = get_acpi_table_revision(FADT); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - fadt->firmware_ctrl = (unsigned long) facs; - fadt->dsdt = (unsigned long) dsdt; fadt->reserved = 0; fadt->preferred_pm_profile = 0; /* PM_MOBILE; */ @@ -85,10 +73,6 @@ fadt->reset_reg.addrh = 0x0; fadt->reset_value = 0; - fadt->x_firmware_ctl_l = (unsigned long)facs; - fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (unsigned long)dsdt; - fadt->x_dsdt_h = 0; fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = 32; @@ -145,6 +129,4 @@ fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrh = 0x0; - - header->checksum = acpi_checksum((void *) fadt, header->length); } -- To view, visit https://review.coreboot.org/c/coreboot/+/41923 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie2fdc715e4d1af347d25b51e83189f28cd9af014 Gerrit-Change-Number: 41923 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

4 6

Change in coreboot[master]: security/vboot: Add option to run verstage before bootblock
by Julius Werner (Code Review) 10 Jun '20

10 Jun '20

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41814 ) Change subject: security/vboot: Add option to run verstage before bootblock ...................................................................... Patch Set 7: (5 comments) https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/Kconfig File src/security/vboot/Kconfig: https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/Kconfig… PS7, Line 22: config HAVE_PRE_BOOTBLOCK_VBOOT_SUPPORT You shouldn't need this. The VBOOT_STARTS_IN... options are always selected directly from SoC or mainboard code. The way you can do that (without turning things on inadvertently when VBOOT itself is disabled) is by overriding the config VBOOT option to add another select statement in your SoC Kconfig like this: config VBOOT selects VBOOT_STARTS_BEFORE_BOOTBLOCK (See how the same thing is done in src/soc/intel/cannonlake/Kconfig, for example.) https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/Makefil… File src/security/vboot/Makefile.inc: https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/Makefil… PS7, Line 100: verstage-$(CONFIG_VBOOT_SEPARATE_VERSTAGE) += verstage.c nit: maybe move this down to the other !STARTS_BEFORE_BOOTBLOCK block below to keep the stuff belonging to that together? https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/Makefil… PS7, Line 147: ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),) You've moved this out of an if (SEPARATE_VERSTAGE) block, it needs to stay in there, or it'll try adding verstage.elf in !SEPARATE_VERSTAGE builds. https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/common.c File src/security/vboot/common.c: https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/common.… PS7, Line 23: (CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) && ENV_SEPARATE_VERSTAGE))) I think a lot of these statements would become much simpler if you use !STARTS_IN_ROMSTAGE rather than STARTS_IN_BOOTBLOCK || STARTS_BEFORE_BOOTBLOCK, because those often go together. For example this could be if(wb == NULL && !CONFIG(VBOOT_STARTS_IN_ROMSTAGE) && preram_symbols_available()) https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/vboot_l… File src/security/vboot/vboot_loader.c: https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/vboot_l… PS7, Line 17: (CONFIG(VBOOT_STARTS_IN_BOOTBLOCK) || CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK))), Can be simplified to (!CONFIG(VBOOT_SEPARATE_VERSTAGE) || CONFIG(VBOOT_STARTS_IN_BOOTBLOCK) || CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) -- To view, visit https://review.coreboot.org/c/coreboot/+/41814 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4849777cb7ba9f90fe8428b82c21884d1e662b96 Gerrit-Change-Number: 41814 Gerrit-PatchSet: 7 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 10 Jun 2020 00:51:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: console: Update for vboot before bootblock
by Nico Huber (Code Review) 10 Jun '20

10 Jun '20

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41815 ) Change subject: console: Update for vboot before bootblock ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/c/coreboot/+/41815/6/src/console/init.c File src/console/init.c: https://review.coreboot.org/c/coreboot/+/41815/6/src/console/init.c@70 PS6, Line 70: CONFIG(EARLY_PCI_BRIDGE) > I think you missed one negation there? It was stated elsewhere PCI config does not work inside psp-v […] No negation missed. I just concluded from the cluttered condition that somebody wants to select both EARLY_PCI_BRIDGE and VBOOT_STARTS_BEFORE_BOOTBLOCK. Otherwise, this condition wouldn't need to be touched. If they are incompatible, what we should do instead is make EARLY_PCI_BRIDGE depend on !VBOOT_STARTS_BEFORE_BOOTBLOCK. Just skipping the bridge init doesn't seem reasonable, what would the verstage be supposed to do with an initialized console behind an uninitialized bridge? Run into timeouts the whole day? -- To view, visit https://review.coreboot.org/c/coreboot/+/41815 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc9fb0810e0816fe0a68e52287eda6145043a619 Gerrit-Change-Number: 41815 Gerrit-PatchSet: 6 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 09 Jun 2020 22:55:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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