coreboot-gerrit May 2020

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Change in coreboot[master]: soc/intel/jasperlake: Allow SD card power enable polarity configuration
by Karthik Ramasubramanian (Code Review) 04 May '20

04 May '20

Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41027 ) Change subject: soc/intel/jasperlake: Allow SD card power enable polarity configuration ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/41027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id777a262651689952a217875e6606f67855fc2f4 Gerrit-Change-Number: 41027 Gerrit-PatchSet: 8 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 04 May 2020 15:34:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/jasperlake: Allow SD card power enable polarity configuration
by Aamir Bohra (Code Review) 04 May '20

04 May '20

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41027 ) Change subject: soc/intel/jasperlake: Allow SD card power enable polarity configuration ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/41027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id777a262651689952a217875e6606f67855fc2f4 Gerrit-Change-Number: 41027 Gerrit-PatchSet: 8 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 04 May 2020 15:29:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/jasperlake: Allow SD card power enable polarity configuration
by Ronak Kanabar (Code Review) 04 May '20

04 May '20

Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41027 ) Change subject: soc/intel/jasperlake: Allow SD card power enable polarity configuration ...................................................................... Patch Set 8: (3 comments) https://review.coreboot.org/c/coreboot/+/41027/5//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/41027/5//COMMIT_MSG@9 PS5, Line 9: SdCardPowerEnable ActiveHigh > not done.. Done https://review.coreboot.org/c/coreboot/+/41027/5//COMMIT_MSG@15 PS5, Line 15: Upd > UPD Done https://review.coreboot.org/c/coreboot/+/41027/5//COMMIT_MSG@15 PS5, Line 15: fsp > FSP Done -- To view, visit https://review.coreboot.org/c/coreboot/+/41027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id777a262651689952a217875e6606f67855fc2f4 Gerrit-Change-Number: 41027 Gerrit-PatchSet: 8 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 04 May 2020 15:24:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Comment-In-Reply-To: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/jasperlake: Allow SD card power enable polarity configuration
by Ronak Kanabar (Code Review) 04 May '20

04 May '20

Hello build bot (Jenkins), Patrick Georgi, Maulik V Vaghela, Subrata Banik, Aamir Bohra, Patrick Rudolph, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41027 to look at the new patch set (#8). Change subject: soc/intel/jasperlake: Allow SD card power enable polarity configuration ...................................................................... soc/intel/jasperlake: Allow SD card power enable polarity configuration SdCardPowerEnableActiveHigh is a UPD which controls polarity of SD card power enable pin. Setting it 1 will set polarity of this pin as Active high. This patch will allow to control it from devicetree so that it can be set as per each board's requirement. BUG=b:155595624 BRANCH=None TEST=Build, boot JSLRVP, Verified UPD value from FSP log Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> Change-Id: Id777a262651689952a217875e6606f67855fc2f4 --- M src/soc/intel/jasperlake/fsp_params.c 1 file changed, 4 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/41027/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/41027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id777a262651689952a217875e6606f67855fc2f4 Gerrit-Change-Number: 41027 Gerrit-PatchSet: 8 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/jasperlake: Allow SD card power enable polarity configuration
by Aamir Bohra (Code Review) 04 May '20

04 May '20

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41027 ) Change subject: soc/intel/jasperlake: Allow SD card power enable polarity configuration ...................................................................... Patch Set 7: (3 comments) https://review.coreboot.org/c/coreboot/+/41027/5//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/41027/5//COMMIT_MSG@9 PS5, Line 9: SdCardPowerEnable ActiveHigh > Done not done.. https://review.coreboot.org/c/coreboot/+/41027/5//COMMIT_MSG@15 PS5, Line 15: fsp FSP https://review.coreboot.org/c/coreboot/+/41027/5//COMMIT_MSG@15 PS5, Line 15: Upd UPD -- To view, visit https://review.coreboot.org/c/coreboot/+/41027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id777a262651689952a217875e6606f67855fc2f4 Gerrit-Change-Number: 41027 Gerrit-PatchSet: 7 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 04 May 2020 15:14:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Ronak Kanabar <ronak.kanabar(a)intel.com> Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/puff: add a region to cache SPD data
by EricR Lai (Code Review) 04 May '20

04 May '20

EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40415 ) Change subject: mb/google/puff: add a region to cache SPD data ...................................................................... Patch Set 5: (1 comment) https://review.coreboot.org/c/coreboot/+/40415/5/src/mainboard/google/hatch… File src/mainboard/google/hatch/romstage_spd_smbus.c: https://review.coreboot.org/c/coreboot/+/40415/5/src/mainboard/google/hatch… PS5, Line 47: if (need_update_cache) If dimm_changed, we need update cache anyway, right? Any condition will be dimm_changed but doesn't need update cache? -- To view, visit https://review.coreboot.org/c/coreboot/+/40415 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8d07fddf113a767d62394cb31e33b56f22f74351 Gerrit-Change-Number: 40415 Gerrit-PatchSet: 5 Gerrit-Owner: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 04 May 2020 15:13:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/jasperlake: Allow SD card power enable polarity configuration
by Aamir Bohra (Code Review) 04 May '20

04 May '20

Aamir Bohra has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/41027 ) Change subject: soc/intel/jasperlake: Allow SD card power enable polarity configuration ...................................................................... Removed Code-Review+2 by Aamir Bohra <aamir.bohra(a)intel.com> -- To view, visit https://review.coreboot.org/c/coreboot/+/41027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id777a262651689952a217875e6606f67855fc2f4 Gerrit-Change-Number: 41027 Gerrit-PatchSet: 7 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: deleteVote

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Change in coreboot[master]: soc/intel/jasperlake: Allow SD card power enable polarity configuration
by Aamir Bohra (Code Review) 04 May '20

04 May '20

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41027 ) Change subject: soc/intel/jasperlake: Allow SD card power enable polarity configuration ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/41027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id777a262651689952a217875e6606f67855fc2f4 Gerrit-Change-Number: 41027 Gerrit-PatchSet: 7 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 04 May 2020 15:12:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/jasperlake: Correct the EMMC PCR Port ID
by Aamir Bohra (Code Review) 04 May '20

04 May '20

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41028 ) Change subject: soc/intel/jasperlake: Correct the EMMC PCR Port ID ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/c/coreboot/+/41028/2/src/soc/intel/jasperlake/i… File src/soc/intel/jasperlake/include/soc/pcr_ids.h: https://review.coreboot.org/c/coreboot/+/41028/2/src/soc/intel/jasperlake/i… PS2, Line 7: id nit: IDs -- To view, visit https://review.coreboot.org/c/coreboot/+/41028 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17d4e7b7e0fe5e0b18867b6481b5bc9227ae19e3 Gerrit-Change-Number: 41028 Gerrit-PatchSet: 2 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 04 May 2020 15:05:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/jasperlake: Correct the EMMC PCR Port ID
by Aamir Bohra (Code Review) 04 May '20

04 May '20

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41028 ) Change subject: soc/intel/jasperlake: Correct the EMMC PCR Port ID ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/c/coreboot/+/41028/2//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/41028/2//COMMIT_MSG@14 PS2, Line 14: S new line. -- To view, visit https://review.coreboot.org/c/coreboot/+/41028 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17d4e7b7e0fe5e0b18867b6481b5bc9227ae19e3 Gerrit-Change-Number: 41028 Gerrit-PatchSet: 2 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 04 May 2020 14:59:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit May 2020