coreboot-gerrit May 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/skl: always enable SataPwrOptEnable
by Michael Niewöhner (Code Review) 04 May '20

04 May '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40877 ) Change subject: soc/intel/skl: always enable SataPwrOptEnable ...................................................................... Patch Set 7: (2 comments) https://review.coreboot.org/c/coreboot/+/40877/6//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/40877/6//COMMIT_MSG@29 PS6, Line 29: downsidses > downsides Done https://review.coreboot.org/c/coreboot/+/40877/6//COMMIT_MSG@29 PS6, Line 29: skl > Can we spell these in uppercase, please? SKL, KBL, CNL, CML, CFL... Done -- To view, visit https://review.coreboot.org/c/coreboot/+/40877 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8531ba9743453a3118b389565517eb769b5e7929 Gerrit-Change-Number: 40877 Gerrit-PatchSet: 7 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Angel Pena Galvão <mragalvao(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 04 May 2020 16:20:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/skl: always enable SataPwrOptEnable
by Michael Niewöhner (Code Review) 04 May '20

04 May '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40877 ) Change subject: soc/intel/skl: always enable SataPwrOptEnable ...................................................................... Uploaded patch set 7: Commit message was updated. -- To view, visit https://review.coreboot.org/c/coreboot/+/40877 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8531ba9743453a3118b389565517eb769b5e7929 Gerrit-Change-Number: 40877 Gerrit-PatchSet: 7 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Angel Pena Galvão <mragalvao(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 04 May 2020 16:19:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/skl: always enable SataPwrOptEnable
by Michael Niewöhner (Code Review) 04 May '20

04 May '20

Hello build bot (Jenkins), Patrick Georgi, Angel Pena Galvão, Matt DeVillier, Jeremy Soller, Paul Menzel, Subrata Banik, Youness Alaoui, Aamir Bohra, Patrick Rudolph, Piotr Król, Nico Huber, Michał Żygowski, Swift Geek (Sebastian Grzywna), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/40877 to look at the new patch set (#7). Change subject: soc/intel/skl: always enable SataPwrOptEnable ...................................................................... soc/intel/skl: always enable SataPwrOptEnable For unknown reasons FSP skips a whole bunch of SIR (SATA Initialization Registers) when SataPwrOptEnable=0, which currently is the default in coreboot and FSP. Even if FSP's default was 1, coreboot would reset it. This can lead to all sorts of problems and errors, for example: - links get lost - only 1.5 or 3 Gbps instead of 6 Gbps - "unaligned write" errors in Linux - ... At least on two boards (supermicro/x11-lga1151-series/x11ssm-f and purism/librem13v2) SATA is not working correctly and showing such symptoms. To let FSP correctly initialize the SATA controller, enable the option SataPwrOptEnable statically. There is no valid reason to disable it, which might break SATA, anyway. Currently, there are no reported issues on CML and CNL, so a change there could not be tested reliably. SKL/KBL was tested successfully without any noticable downsides. Thus, only SKL gets changed for now. Change-Id: I8531ba9743453a3118b389565517eb769b5e7929 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/mainboard/51nb/x210/devicetree.cb M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/protectli/vault_kbl/devicetree.cb M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/chip.h 5 files changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/40877/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/40877 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8531ba9743453a3118b389565517eb769b5e7929 Gerrit-Change-Number: 40877 Gerrit-PatchSet: 7 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Angel Pena Galvão <mragalvao(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/skl: always enable SataPwrOptEnable
by Paul Menzel (Code Review) 04 May '20

04 May '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40877 ) Change subject: soc/intel/skl: always enable SataPwrOptEnable ...................................................................... Patch Set 6: After this is submitted, it should be also mentioned in the release notes. -- To view, visit https://review.coreboot.org/c/coreboot/+/40877 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8531ba9743453a3118b389565517eb769b5e7929 Gerrit-Change-Number: 40877 Gerrit-PatchSet: 6 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Angel Pena Galvão <mragalvao(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 04 May 2020 16:06:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/skl: always enable SataPwrOptEnable
by Angel Pons (Code Review) 04 May '20

04 May '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40877 ) Change subject: soc/intel/skl: always enable SataPwrOptEnable ...................................................................... Patch Set 6: (2 comments) https://review.coreboot.org/c/coreboot/+/40877/6//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/40877/6//COMMIT_MSG@29 PS6, Line 29: skl Can we spell these in uppercase, please? SKL, KBL, CNL, CML, CFL... https://review.coreboot.org/c/coreboot/+/40877/6//COMMIT_MSG@29 PS6, Line 29: downsidses downsides -- To view, visit https://review.coreboot.org/c/coreboot/+/40877 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8531ba9743453a3118b389565517eb769b5e7929 Gerrit-Change-Number: 40877 Gerrit-PatchSet: 6 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Angel Pena Galvão <mragalvao(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 04 May 2020 16:03:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/jasperlake: Allow SataEnable to be filled from devicetree
by Ronak Kanabar (Code Review) 04 May '20

04 May '20

Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41029 ) Change subject: soc/intel/jasperlake: Allow SataEnable to be filled from devicetree ...................................................................... Patch Set 4: (4 comments) https://review.coreboot.org/c/coreboot/+/41029/2//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/41029/2//COMMIT_MSG@9 PS2, Line 9: sata > SATA Done https://review.coreboot.org/c/coreboot/+/41029/2//COMMIT_MSG@9 PS2, Line 9: sata > SATA controller Done https://review.coreboot.org/c/coreboot/+/41029/2//COMMIT_MSG@11 PS2, Line 11: t > t. Done https://review.coreboot.org/c/coreboot/+/41029/2//COMMIT_MSG@16 PS2, Line 16: Ch > New line. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/41029 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f7e7508b8cd483508293ee3e7b760574d8f025f Gerrit-Change-Number: 41029 Gerrit-PatchSet: 4 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 04 May 2020 15:55:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/jasperlake: Correct the EMMC PCR Port ID
by Ronak Kanabar (Code Review) 04 May '20

04 May '20

Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41028 ) Change subject: soc/intel/jasperlake: Correct the EMMC PCR Port ID ...................................................................... Patch Set 4: (2 comments) https://review.coreboot.org/c/coreboot/+/41028/2//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/41028/2//COMMIT_MSG@14 PS2, Line 14: S > new line. Done https://review.coreboot.org/c/coreboot/+/41028/2/src/soc/intel/jasperlake/i… File src/soc/intel/jasperlake/include/soc/pcr_ids.h: https://review.coreboot.org/c/coreboot/+/41028/2/src/soc/intel/jasperlake/i… PS2, Line 7: id > nit: IDs Done -- To view, visit https://review.coreboot.org/c/coreboot/+/41028 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17d4e7b7e0fe5e0b18867b6481b5bc9227ae19e3 Gerrit-Change-Number: 41028 Gerrit-PatchSet: 4 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 04 May 2020 15:55:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/jasperlake: Allow SataEnable to be filled from devicetree
by Ronak Kanabar (Code Review) 04 May '20

04 May '20

Hello build bot (Jenkins), Patrick Georgi, Maulik V Vaghela, Subrata Banik, Aamir Bohra, Patrick Rudolph, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41029 to look at the new patch set (#4). Change subject: soc/intel/jasperlake: Allow SataEnable to be filled from devicetree ...................................................................... soc/intel/jasperlake: Allow SataEnable to be filled from devicetree SataEnable is UPD used to enable SATA. Setting it 1 will enable SATA controller This patch will allow to control it from devicetree so that it can be set as per each board's requirement. BUG=b:155595624 BRANCH=None TEST=Build, boot JSLRVP, Verified UPD value from FSP log Change-Id: I4f7e7508b8cd483508293ee3e7b760574d8f025f Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/soc/intel/jasperlake/fsp_params.c 1 file changed, 7 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/41029/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/41029 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f7e7508b8cd483508293ee3e7b760574d8f025f Gerrit-Change-Number: 41029 Gerrit-PatchSet: 4 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/jasperlake: Correct the EMMC PCR Port ID
by Ronak Kanabar (Code Review) 04 May '20

04 May '20

Hello build bot (Jenkins), Patrick Georgi, Maulik V Vaghela, Subrata Banik, Aamir Bohra, Patrick Rudolph, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41028 to look at the new patch set (#4). Change subject: soc/intel/jasperlake: Correct the EMMC PCR Port ID ...................................................................... soc/intel/jasperlake: Correct the EMMC PCR Port ID Updating EMMC PCR PID from 0x52 to 0x51 for Jasperlake BUG=b:155595624 BRANCH=None TEST=Build, boot JSLRVP from emmc Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> Change-Id: I17d4e7b7e0fe5e0b18867b6481b5bc9227ae19e3 --- M src/soc/intel/jasperlake/include/soc/pcr_ids.h 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/41028/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/41028 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17d4e7b7e0fe5e0b18867b6481b5bc9227ae19e3 Gerrit-Change-Number: 41028 Gerrit-PatchSet: 4 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/jasperlake: Correct the EMMC PCR Port ID
by Ronak Kanabar (Code Review) 04 May '20

04 May '20

Hello build bot (Jenkins), Patrick Georgi, Maulik V Vaghela, Subrata Banik, Aamir Bohra, Patrick Rudolph, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41028 to look at the new patch set (#3). Change subject: soc/intel/jasperlake: Correct the EMMC PCR Port ID ...................................................................... soc/intel/jasperlake: Correct the EMMC PCR Port ID Updating EMMC PCR PID from 0x52 to 0x51 for Jasperlake BUG=b:155595624 BRANCH=None TEST=Build, boot JSLRVP from emmc Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> Change-Id: I17d4e7b7e0fe5e0b18867b6481b5bc9227ae19e3 --- M src/soc/intel/jasperlake/include/soc/pcr_ids.h 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/41028/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/41028 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17d4e7b7e0fe5e0b18867b6481b5bc9227ae19e3 Gerrit-Change-Number: 41028 Gerrit-PatchSet: 3 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit May 2020