coreboot-gerrit May 2020

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Change in coreboot[master]: mainboard/clevo/n141cu: Add new mainboard
by Felix Singer (Code Review) 06 May '20

06 May '20

Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40581 ) Change subject: mainboard/clevo/n141cu: Add new mainboard ...................................................................... Patch Set 27: (1 comment) https://review.coreboot.org/c/coreboot/+/40581/27//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/40581/27//COMMIT_MSG@26 PS27, Line 26: - All of the hardware above > Sorry, I thought, Clevo does not sell directly, and this is a, for example, TUXEDO device. It is a TUXEDO notebook indeed :) I will add that for reference later. -- To view, visit https://review.coreboot.org/c/coreboot/+/40581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f83fab64e4cc9036698ca0fdd5edbb677d77eb9 Gerrit-Change-Number: 40581 Gerrit-PatchSet: 27 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 May 2020 11:29:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: mainboard/clevo/n141cu: Add new mainboard
by Paul Menzel (Code Review) 06 May '20

06 May '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40581 ) Change subject: mainboard/clevo/n141cu: Add new mainboard ...................................................................... Patch Set 27: (1 comment) https://review.coreboot.org/c/coreboot/+/40581/27//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/40581/27//COMMIT_MSG@26 PS27, Line 26: - All of the hardware above > What do you mean? I assume you're missing "Clevo N141CU" here. Sorry, I thought, Clevo does not sell directly, and this is a, for example, TUXEDO device. -- To view, visit https://review.coreboot.org/c/coreboot/+/40581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f83fab64e4cc9036698ca0fdd5edbb677d77eb9 Gerrit-Change-Number: 40581 Gerrit-PatchSet: 27 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 May 2020 11:04:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: mainboard/clevo/n141cu: Add new mainboard
by Felix Singer (Code Review) 06 May '20

06 May '20

Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40581 ) Change subject: mainboard/clevo/n141cu: Add new mainboard ...................................................................... Patch Set 27: (1 comment) https://review.coreboot.org/c/coreboot/+/40581/27//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/40581/27//COMMIT_MSG@26 PS27, Line 26: - All of the hardware above > What model/brand? What do you mean? I assume you're missing "Clevo N141CU" here. -- To view, visit https://review.coreboot.org/c/coreboot/+/40581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f83fab64e4cc9036698ca0fdd5edbb677d77eb9 Gerrit-Change-Number: 40581 Gerrit-PatchSet: 27 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 May 2020 10:57:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: mainboard/clevo/n141cu: Add new mainboard
by Paul Menzel (Code Review) 06 May '20

06 May '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40581 ) Change subject: mainboard/clevo/n141cu: Add new mainboard ...................................................................... Patch Set 27: (5 comments) Nice. https://review.coreboot.org/c/coreboot/+/40581/27//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/40581/27//COMMIT_MSG@7 PS27, Line 7: mainboard/clevo/n141cu: Add new mainboard Add new Comet Lake mainboard https://review.coreboot.org/c/coreboot/+/40581/27//COMMIT_MSG@7 PS27, Line 7: mainboard mb https://review.coreboot.org/c/coreboot/+/40581/27//COMMIT_MSG@24 PS27, Line 24: Mention that you base this on a System76 board? https://review.coreboot.org/c/coreboot/+/40581/27//COMMIT_MSG@26 PS27, Line 26: - All of the hardware above What model/brand? https://review.coreboot.org/c/coreboot/+/40581/27/src/mainboard/clevo/cml-u… File src/mainboard/clevo/cml-u/acpi/ac.asl: https://review.coreboot.org/c/coreboot/+/40581/27/src/mainboard/clevo/cml-u… PS27, Line 15: * GNU General Public License for more details. Use SPDX headers? -- To view, visit https://review.coreboot.org/c/coreboot/+/40581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f83fab64e4cc9036698ca0fdd5edbb677d77eb9 Gerrit-Change-Number: 40581 Gerrit-PatchSet: 27 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 May 2020 10:04:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Print the value of HPR_CAUSE0 register
by Derek Huang (Code Review) 06 May '20

06 May '20

Derek Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40648 ) Change subject: soc/intel/tigerlake: Print the value of HPR_CAUSE0 register ...................................................................... soc/intel/tigerlake: Print the value of HPR_CAUSE0 register In addition to GBLRST_CAUSE0 and GBLRST_CAUSE1, print the value of HPR_CAUSE0 to understand the causes of host reset Change-Id: Idc57c3cd6a8d156c5544640898e8e7147d34c535 Signed-off-by: derek.huang <derek.huang(a)intel.corp-partner.google.com> --- M src/soc/intel/tigerlake/include/soc/pm.h M src/soc/intel/tigerlake/include/soc/pmc.h M src/soc/intel/tigerlake/pmutil.c 3 files changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/40648/1 diff --git a/src/soc/intel/tigerlake/include/soc/pm.h b/src/soc/intel/tigerlake/include/soc/pm.h index 3004b4a..2a93149 100644 --- a/src/soc/intel/tigerlake/include/soc/pm.h +++ b/src/soc/intel/tigerlake/include/soc/pm.h @@ -150,6 +150,7 @@ uint32_t gen_pmcon_a; uint32_t gen_pmcon_b; uint32_t gblrst_cause[2]; + uint32_t hpr_cause0; uint32_t prev_sleep_state; } __packed; diff --git a/src/soc/intel/tigerlake/include/soc/pmc.h b/src/soc/intel/tigerlake/include/soc/pmc.h index 88c6f61..4faba8f 100644 --- a/src/soc/intel/tigerlake/include/soc/pmc.h +++ b/src/soc/intel/tigerlake/include/soc/pmc.h @@ -119,6 +119,7 @@ #define GBLRST_CAUSE0 0x1924 #define GBLRST_CAUSE0_THERMTRIP (1 << 5) #define GBLRST_CAUSE1 0x1928 +#define HPR_CAUSE0 0x192C #define CPPMVRIC 0x1B1C #define XTALSDQDIS (1 << 22) diff --git a/src/soc/intel/tigerlake/pmutil.c b/src/soc/intel/tigerlake/pmutil.c index 4482b1e..554932b 100644 --- a/src/soc/intel/tigerlake/pmutil.c +++ b/src/soc/intel/tigerlake/pmutil.c @@ -260,12 +260,15 @@ ps->gen_pmcon_b = read32(pmc + GEN_PMCON_B); ps->gblrst_cause[0] = read32(pmc + GBLRST_CAUSE0); ps->gblrst_cause[1] = read32(pmc + GBLRST_CAUSE1); + ps->hpr_cause0 = read32(pmc + HPR_CAUSE0); printk(BIOS_DEBUG, "GEN_PMCON: %08x %08x\n", ps->gen_pmcon_a, ps->gen_pmcon_b); printk(BIOS_DEBUG, "GBLRST_CAUSE: %08x %08x\n", ps->gblrst_cause[0], ps->gblrst_cause[1]); + + printk(BIOS_DEBUG, "HPR_CAUSE0: %08x\n", ps->hpr_cause0); } /* STM Support */ -- To view, visit https://review.coreboot.org/c/coreboot/+/40648 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc57c3cd6a8d156c5544640898e8e7147d34c535 Gerrit-Change-Number: 40648 Gerrit-PatchSet: 1 Gerrit-Owner: Derek Huang <derek.huang(a)intel.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/volteer: Enable EARLY_EC_SYNC
by Paul Menzel (Code Review) 06 May '20

06 May '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41078 ) Change subject: mb/google/volteer: Enable EARLY_EC_SYNC ...................................................................... Patch Set 1: (3 comments) https://review.coreboot.org/c/coreboot/+/41078/1//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/41078/1//COMMIT_MSG@9 PS1, Line 9: This enables EC software sync in romstage. … to update the EC early on to fix …? https://review.coreboot.org/c/coreboot/+/41078/1//COMMIT_MSG@11 PS1, Line 11: BUG=b:148259137 Please summarize the bug report. https://review.coreboot.org/c/coreboot/+/41078/1//COMMIT_MSG@12 PS1, Line 12: TEST=verified EC is updated in romstage using serial BIOS What is “serial BIOS”? > looking at coreboot’s messages on the serial console? -- To view, visit https://review.coreboot.org/c/coreboot/+/41078 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibb97c1d57220f7fd74131a5aee450b1ab4b1c982 Gerrit-Change-Number: 41078 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 06 May 2020 09:45:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/purism/librem_skl: select DRIVERS_GENERIC_CBFS_SERIAL
by Matt DeVillier (Code Review) 06 May '20

06 May '20

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41040 ) Change subject: mb/purism/librem_skl: select DRIVERS_GENERIC_CBFS_SERIAL ...................................................................... mb/purism/librem_skl: select DRIVERS_GENERIC_CBFS_SERIAL This driver was previously added for another out-of-tree Librem device, but forgot to switch over the librem_skl boards to use it. Remove duplicate functionality from mainboard.c and delete the empty file. Test: build/boot Librem 13v2 and verify serial number read from CBFS via dmidecode. Signed-off-by: Matt DeVillier <matt.devillier(a)puri.sm> Change-Id: Ide952197335c6bfbad846c6d6f62be5c4c57e2cb --- M src/mainboard/purism/librem_skl/Kconfig D src/mainboard/purism/librem_skl/mainboard.c 2 files changed, 1 insertion(+), 38 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/41040/1 diff --git a/src/mainboard/purism/librem_skl/Kconfig b/src/mainboard/purism/librem_skl/Kconfig index c1a9aec..9760a2f 100644 --- a/src/mainboard/purism/librem_skl/Kconfig +++ b/src/mainboard/purism/librem_skl/Kconfig @@ -1,6 +1,7 @@ config BOARD_PURISM_BASEBOARD_LIBREM_SKL def_bool n select BOARD_ROMSIZE_KB_16384 + select DRIVERS_GENERIC_CBFS_SERIAL select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select INTEL_GMA_HAVE_VBT diff --git a/src/mainboard/purism/librem_skl/mainboard.c b/src/mainboard/purism/librem_skl/mainboard.c deleted file mode 100644 index eb28262..0000000 --- a/src/mainboard/purism/librem_skl/mainboard.c +++ /dev/null @@ -1,38 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* This file is part of the coreboot project. */ - -#include <smbios.h> -#include <string.h> -#include <cbfs.h> - -#define MAX_SERIAL_LENGTH 0x100 - -const char *smbios_mainboard_serial_number(void) -{ - static char serial_number[MAX_SERIAL_LENGTH + 1] = {0}; - struct cbfsf file; - - if (serial_number[0] != 0) - return serial_number; - - if (cbfs_boot_locate(&file, "serial_number", NULL) == 0) { - struct region_device cbfs_region; - size_t serial_len; - - cbfs_file_data(&cbfs_region, &file); - - serial_len = region_device_sz(&cbfs_region); - if (serial_len <= MAX_SERIAL_LENGTH) { - if (rdev_readat(&cbfs_region, serial_number, 0, - serial_len) == serial_len) { - serial_number[serial_len] = 0; - return serial_number; - } - } - } - - strncpy(serial_number, CONFIG_MAINBOARD_SERIAL_NUMBER, - MAX_SERIAL_LENGTH); - - return serial_number; -} -- To view, visit https://review.coreboot.org/c/coreboot/+/41040 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ide952197335c6bfbad846c6d6f62be5c4c57e2cb Gerrit-Change-Number: 41040 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/puff: add a region to cache SPD data
by Jamie Chen (Code Review) 06 May '20

06 May '20

Jamie Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40415 ) Change subject: mb/google/puff: add a region to cache SPD data ...................................................................... Patch Set 7: (1 comment) https://review.coreboot.org/c/coreboot/+/40415/2/src/mainboard/google/hatch… File src/mainboard/google/hatch/Kconfig: https://review.coreboot.org/c/coreboot/+/40415/2/src/mainboard/google/hatch… PS2, Line 83: OARD_GOOGLE_PUFF > Could this be: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/40415 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8d07fddf113a767d62394cb31e33b56f22f74351 Gerrit-Change-Number: 40415 Gerrit-PatchSet: 7 Gerrit-Owner: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 06 May 2020 08:53:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/puff: add a region to cache SPD data
by Jamie Chen (Code Review) 06 May '20

06 May '20

Jamie Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40415 ) Change subject: mb/google/puff: add a region to cache SPD data ...................................................................... Patch Set 7: (3 comments) https://review.coreboot.org/c/coreboot/+/40415/2//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/40415/2//COMMIT_MSG@10 PS2, Line 10: the boot time > What is cached? SPD data of SO-DIMM. https://review.coreboot.org/c/coreboot/+/40415/2//COMMIT_MSG@10 PS2, Line 10: can use > can be used Done https://review.coreboot.org/c/coreboot/+/40415/2//COMMIT_MSG@11 PS2, Line 11: is be changed > is changed Done -- To view, visit https://review.coreboot.org/c/coreboot/+/40415 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8d07fddf113a767d62394cb31e33b56f22f74351 Gerrit-Change-Number: 40415 Gerrit-PatchSet: 7 Gerrit-Owner: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 06 May 2020 08:52:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: elog: Add new elog types for CSME-initiated host reset
by Patrick Georgi (Code Review) 06 May '20

06 May '20

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40687 ) Change subject: elog: Add new elog types for CSME-initiated host reset ...................................................................... elog: Add new elog types for CSME-initiated host reset Change-Id: Iddae1c7cbc71ce10b126a1e05abf9269e8187a38 Signed-off-by: derek.huang <derek.huang(a)intel.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40687 Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/include/elog.h 1 file changed, 6 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved diff --git a/src/include/elog.h b/src/include/elog.h index 68a4842..7df1bfb 100644 --- a/src/include/elog.h +++ b/src/include/elog.h @@ -195,6 +195,12 @@ /* Cr50 reset to enable TPM */ #define ELOG_TYPE_CR50_NEED_RESET 0xb2 +/* CSME-Initiated Host Reset */ +#define ELOG_TYPE_MI_HRPD 0xb3 +#define ELOG_TYPE_MI_HRPC 0xb4 +#define ELOG_TYPE_MI_HR 0xb5 + + struct elog_event_extended_event { u8 event_type; u32 event_complement; -- To view, visit https://review.coreboot.org/c/coreboot/+/40687 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iddae1c7cbc71ce10b126a1e05abf9269e8187a38 Gerrit-Change-Number: 40687 Gerrit-PatchSet: 4 Gerrit-Owner: Derek Huang <derek.huang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

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coreboot-gerrit May 2020