Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30360 )
Change subject: mb/libretrend/lt1000: Add Libretrend LT1000 board support
......................................................................
Patch Set 15:
(1 comment)
https://review.coreboot.org/c/coreboot/+/30360/15/src/mainboard/libretrend/…
File src/mainboard/libretrend/lt1000/bootblock.c:
https://review.coreboot.org/c/coreboot/+/30360/15/src/mainboard/libretrend/…
PS15, Line 14: #define SERIAL1_DEV PNP_DEV(0x2e, IT8786E_SP1)
> All serial ports except port 2 have the same initial io base = 0x3f8. […]
It’d be great if you added that as comment.
--
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Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39351 )
Change subject: soc/intel/braswell/chip.h: Add smbios.h for Type9 Entries
......................................................................
soc/intel/braswell/chip.h: Add smbios.h for Type9 Entries
In order to add the smbios_slot_desc for the SMBIOS Type9 entries into
the devicetree, and not use numbers but strings like
"SlotTypePciExpressGen3X4", smbios.h needs to be included in the
static.c.
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Change-Id: Id15fe4101d14479b02e536fdf63748a241c02bd3
---
M src/soc/intel/braswell/chip.h
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/39351/1
diff --git a/src/soc/intel/braswell/chip.h b/src/soc/intel/braswell/chip.h
index 9f790dc..ae9787b 100644
--- a/src/soc/intel/braswell/chip.h
+++ b/src/soc/intel/braswell/chip.h
@@ -27,6 +27,7 @@
#include <fsp/util.h>
#include <intelblocks/lpc_lib.h>
#include <soc/pci_devs.h>
+#include <smbios.h>
#define SVID_CONFIG1 1
#define SVID_CONFIG3 3
--
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Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30360 )
Change subject: mb/libretrend/lt1000: Add Libretrend LT1000 board support
......................................................................
Patch Set 15:
(2 comments)
https://review.coreboot.org/c/coreboot/+/30360/13/Documentation/mainboard/l…
File Documentation/mainboard/libretrend/lt1000.jpg:
PS13:
> Sorry, I think I prefer the previous one. […]
it's here: http://www.minicase.net/product_LR-i7S65T1.htmlhttps://review.coreboot.org/c/coreboot/+/30360/15/src/mainboard/libretrend/…
File src/mainboard/libretrend/lt1000/bootblock.c:
https://review.coreboot.org/c/coreboot/+/30360/15/src/mainboard/libretrend/…
PS15, Line 14: #define SERIAL1_DEV PNP_DEV(0x2e, IT8786E_SP1)
> Where is SERIAL2_DEV ?
All serial ports except port 2 have the same initial io base = 0x3f8. If all enabled in one sway, it horribly slows down the boot process. port is is safe, because initial value is 0x2f8.
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Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39378 )
Change subject: drivers/ipmi: Fix buffer double-free
......................................................................
drivers/ipmi: Fix buffer double-free
If reading the data for the asset_tag fails, that buffer should be
freed, not the one for serial_number.
Change-Id: I2ecaf7fd0f23f2fb5a6aa0961c7e17fff04847f4
Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca>
Found-by: Coverity CID 1419481, 1419485
---
M src/drivers/ipmi/ipmi_fru.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/39378/1
diff --git a/src/drivers/ipmi/ipmi_fru.c b/src/drivers/ipmi/ipmi_fru.c
index 8be53f8..43ee6b3 100644
--- a/src/drivers/ipmi/ipmi_fru.c
+++ b/src/drivers/ipmi/ipmi_fru.c
@@ -319,7 +319,7 @@
goto out;
}
if (!data2str((const uint8_t *)data_ptr, info->asset_tag, length))
- free(info->serial_number);
+ free(info->asset_tag);
}
out:
--
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Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/18498 )
Change subject: libpayload: Improve rtc functions
......................................................................
Patch Set 6:
> One nit, there was a comment
>
> "If one branch has braces all should have them."
CB:39396
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Patrick Georgi has uploaded a new patch set (#6) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/23586 )
Change subject: payloads/cbui: Add new payload CBUI
......................................................................
payloads/cbui: Add new payload CBUI
Depends on libpayload and nuklear.
Features:
* Graphical menus with scrolling.
* Text rendering engine (atm only bitmap font)
* Support for keyboard and mouse
* Support for USB and PS/2 devices
* Ported coreinfo and nvramcui
* Allows to modify NVRAM and RTC
* Works as ELF payload
* Works as Seabios secondary payload
* Basic support for multiple languages
* Hacky support for BIOS calls (depends on NASM)
* Runs in qemu and on real hardware
* Use linker script to allocate low memory
Shortcommings:
* Doesn't work in VGA text mode
* Untested on UEFI
* int32 relocates itself to low memory
Licenses:
* GPLv2 (CBUI + libpayload)
* BSD (libpayload)
* MIT (nuklear)
TODO:
* Test on as much platforms as possible
* Link int32 into low memory
Change-Id: Ib9a1a07c1065880aa675380625021750d5cab7d1
Signed-off-by: Patrick Rudolph <siro(a)das-labor.org>
---
M payloads/Kconfig
M payloads/Makefile.inc
A payloads/cbui/Kconfig
A payloads/cbui/Makefile
A payloads/cbui/NuklearUI/NuklearCombo.c
A payloads/cbui/NuklearUI/NuklearCombo.h
A payloads/cbui/NuklearUI/NuklearDatePicker.c
A payloads/cbui/NuklearUI/NuklearDatePicker.h
A payloads/cbui/NuklearUI/NuklearGroup.c
A payloads/cbui/NuklearUI/NuklearGroup.h
A payloads/cbui/NuklearUI/NuklearIntegerRange.c
A payloads/cbui/NuklearUI/NuklearIntegerRange.h
A payloads/cbui/NuklearUI/NuklearLabel.c
A payloads/cbui/NuklearUI/NuklearLabel.h
A payloads/cbui/NuklearUI/NuklearObject.c
A payloads/cbui/NuklearUI/NuklearObject.h
A payloads/cbui/NuklearUI/NuklearRoot.c
A payloads/cbui/NuklearUI/NuklearStyle.c
A payloads/cbui/NuklearUI/NuklearStyle.h
A payloads/cbui/NuklearUI/NuklearTabView.c
A payloads/cbui/NuklearUI/NuklearTextView.c
A payloads/cbui/NuklearUI/NuklearTextView.h
A payloads/cbui/NuklearUI/NuklearTextfield.c
A payloads/cbui/NuklearUI/NuklearTextfield.h
A payloads/cbui/NuklearUI/NuklearTimePicker.c
A payloads/cbui/NuklearUI/NuklearTimePicker.h
A payloads/cbui/NuklearUI/NuklearUI.h
A payloads/cbui/NuklearUI/NuklearVector.c
A payloads/cbui/NuklearUI/NuklearVector.h
A payloads/cbui/arch/x86/cpuid.c
A payloads/cbui/arch/x86/cpuid.h
A payloads/cbui/arch/x86/int32.h
A payloads/cbui/arch/x86/int32.ld
A payloads/cbui/arch/x86/int32.nasm
A payloads/cbui/arch/x86/memcpy.c
A payloads/cbui/arch/x86/memcpy.h
A payloads/cbui/arch/x86/vga.c
A payloads/cbui/arch/x86/vga.h
A payloads/cbui/cbui.c
A payloads/cbui/cbui.h
A payloads/cbui/gfx/coreboot.c
A payloads/cbui/gfx/coreboot.h
A payloads/cbui/gfx/gfx.c
A payloads/cbui/gfx/gfx.h
A payloads/cbui/gfx/splash.c
A payloads/cbui/gfx/splash.h
A payloads/cbui/gfx/vbe.c
A payloads/cbui/gfx/vbe.h
A payloads/cbui/lang/de.c
A payloads/cbui/lang/en.c
A payloads/cbui/lang/lang.c
A payloads/cbui/lang/lang.h
A payloads/cbui/logo/cbui.png
A payloads/cbui/lp.config
A payloads/cbui/modules/bootlog_module.c
A payloads/cbui/modules/cbfs_module.c
A payloads/cbui/modules/cmos_module.c
A payloads/cbui/modules/coreboot_module.c
A payloads/cbui/modules/cpuinfo_module.c
A payloads/cbui/modules/license_module.c
A payloads/cbui/modules/modules.c
A payloads/cbui/modules/nvram_module.c
A payloads/cbui/modules/pci_module.c
A payloads/cbui/modules/reboot_module.c
A payloads/cbui/modules/rtc_module.c
A payloads/cbui/modules/timestamps_module.c
A payloads/cbui/modules/usb_module.c
A payloads/libpayload/configs/defconfig-cbui
68 files changed, 8,715 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/23586/6
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