coreboot-gerrit March 2020

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Change in coreboot[master]: mb/google/volteer: add CNVi ASL entry for dynamic SSDT generation
by Srinidhi N Kaushik (Code Review) 07 Mar '20

07 Mar '20

Srinidhi N Kaushik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39333 ) Change subject: mb/google/volteer: add CNVi ASL entry for dynamic SSDT generation ...................................................................... mb/google/volteer: add CNVi ASL entry for dynamic SSDT generation This change uses drivers/intel/wifi chip for CNVi device and adds dynamic SSDT entires for CNVi also export wake gpio for CNVi BUG=none BRANCH=none TEST=Build and boot volteer Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Change-Id: Ia8baf1c7b770db23f31383bda46ae8d090468560 --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 5 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/39333/1 diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index b9ed424..6ef54d4 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -226,7 +226,11 @@ device pci 14.0 on end # USB3.1 xHCI 0xA0ED device pci 14.1 off end # USB3.1 xDCI 0xA0EE device pci 14.2 on end # Shared RAM 0xA0EF - device pci 14.3 on end # CNVi: WiFi 0xA0F0 - A0F3 + device pci 14.3 on + chip drivers/intel/wifi + register "wake" = "GPE0_PME_B0" + end + end # CNVi: WiFi 0xA0F0 - A0F3 device pci 15.0 on chip drivers/i2c/generic -- To view, visit https://review.coreboot.org/c/coreboot/+/39333 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia8baf1c7b770db23f31383bda46ae8d090468560 Gerrit-Change-Number: 39333 Gerrit-PatchSet: 1 Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-MessageType: newchange

7 14

Change in coreboot[master]: soc/intel/tigerlake: Avoid NULL pointer dereference
by John Zhao (Code Review) 07 Mar '20

07 Mar '20

John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39261 ) Change subject: soc/intel/tigerlake: Avoid NULL pointer dereference ...................................................................... soc/intel/tigerlake: Avoid NULL pointer dereference Coverity detects pointer dev as FORWARD_NULL. Add sanity check for dev to prevent NULL pointer dereference. BUG=CID 1420208 TEST=Built image successfully. Change-Id: I2a62da44c7044f9dc281eae0949f7f7b612ab238 Signed-off-by: John Zhao <john.zhao(a)intel.com> --- M src/soc/intel/tigerlake/romstage/fsp_params_jsl.c 1 file changed, 4 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/39261/1 diff --git a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c index 56124f4..09b06f1 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c @@ -95,7 +95,10 @@ m_cfg->DdiPortCDdc = config->DdiPortCDdc; /* Audio */ - m_cfg->PchHdaEnable = pcidev_path_on_root(PCH_DEVFN_HDA) ? dev->enabled : 0; + if (dev) { + m_cfg->PchHdaEnable = pcidev_path_on_root(PCH_DEVFN_HDA) ? dev->enable + : 0; + } m_cfg->PchHdaDspEnable = config->PchHdaDspEnable; m_cfg->PchHdaAudioLinkHdaEnable = config->PchHdaAudioLinkHdaEnable; -- To view, visit https://review.coreboot.org/c/coreboot/+/39261 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2a62da44c7044f9dc281eae0949f7f7b612ab238 Gerrit-Change-Number: 39261 Gerrit-PatchSet: 1 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-MessageType: newchange

4 11

Change in coreboot[master]: lib/spd_bin: Tweak the log
by EricR Lai (Code Review) 07 Mar '20

07 Mar '20

EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39353 ) Change subject: lib/spd_bin: Tweak the log ...................................................................... lib/spd_bin: Tweak the log Correct the missing log. Should be the part number not just part. Signed-off-by: Eric Lai <ericr_lai(a)compal.corp-partner.google.com> Change-Id: I17ac9c6f9545d84645665d3abe1d1613baef4e14 --- M src/lib/spd_bin.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/39353/1 diff --git a/src/lib/spd_bin.c b/src/lib/spd_bin.c index e4a282f..58c23f6 100644 --- a/src/lib/spd_bin.c +++ b/src/lib/spd_bin.c @@ -177,7 +177,7 @@ /* Module Part Number */ spd_get_name(spd, spd_name, type); - printk(BIOS_INFO, "SPD: module part is %s\n", spd_name); + printk(BIOS_INFO, "SPD: module part number is %s\n", spd_name); printk(BIOS_INFO, "SPD: banks %d, ranks %d, rows %d, columns %d, density %d Mb\n", -- To view, visit https://review.coreboot.org/c/coreboot/+/39353 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17ac9c6f9545d84645665d3abe1d1613baef4e14 Gerrit-Change-Number: 39353 Gerrit-PatchSet: 1 Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

5 9

Change in coreboot[master]: lib/spd_bin: Extend LPDDR4 spd information
by EricR Lai (Code Review) 07 Mar '20

07 Mar '20

EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39352 ) Change subject: lib/spd_bin: Extend LPDDR4 spd information ...................................................................... lib/spd_bin: Extend LPDDR4 spd information Follow JEDEC 21-C to extend LPDDR4 spd information. Signed-off-by: Eric Lai <ericr_lai(a)compal.corp-partner.google.com> Change-Id: I68c9782c543afab4423296fa7ac1c078db5649c3 --- M src/include/spd_bin.h M src/lib/spd_bin.c 2 files changed, 9 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/39352/1 diff --git a/src/include/spd_bin.h b/src/include/spd_bin.h index f144b14..179d575 100644 --- a/src/include/spd_bin.h +++ b/src/include/spd_bin.h @@ -28,6 +28,7 @@ #define SPD_DRAM_LPDDR3_INTEL 0xF1 #define SPD_DRAM_LPDDR3_JEDEC 0x0F #define SPD_DRAM_DDR4 0x0C +#define SPD_DRAM_LPDDR4_JEDEC 0x10 #define SPD_DENSITY_BANKS 4 #define SPD_ADDRESSING 5 #define DDR3_ORGANIZATION 7 @@ -40,8 +41,6 @@ #define LPDDR3_SPD_PART_LEN 18 #define DDR4_SPD_PART_OFF 329 #define DDR4_SPD_PART_LEN 20 -#define LPDDR4_SPD_PART_OFF 329 -#define LPDDR4_SPD_PART_LEN 20 struct spd_block { u8 addr_map[CONFIG_DIMM_MAX]; /* 7 bit I2C addresses */ diff --git a/src/lib/spd_bin.c b/src/lib/spd_bin.c index 9e625b5..802c401 100644 --- a/src/lib/spd_bin.c +++ b/src/lib/spd_bin.c @@ -45,6 +45,8 @@ return "LPDDR3"; case SPD_DRAM_DDR4: return "DDR4"; + case SPD_DRAM_LPDDR4_JEDEC; + return "LPDDR4"; } return "UNKNOWN"; } @@ -62,7 +64,9 @@ if (index >= ARRAY_SIZE(ddr3_banks)) return -1; return ddr3_banks[index]; + /* DDR4 and LPDDR4 has the same bank definition */ case SPD_DRAM_DDR4: + case SPD_DRAM_LPDDR4_JEDEC; if (index >= ARRAY_SIZE(ddr4_banks)) return -1; return ddr4_banks[index]; @@ -73,7 +77,8 @@ static int spd_get_capmb(const uint8_t spd[]) { - static const int spd_capmb[10] = { 1, 2, 4, 8, 16, 32, 64, 128, 48, 96 }; + static const int spd_capmb[13] = { 1, 2, 4, 8, 16, 32, 64, 128, 48, + 96, 12, 24, 72 }; int index = spd[SPD_DENSITY_BANKS] & 0xf; if (index >= ARRAY_SIZE(spd_capmb)) return -1; @@ -145,6 +150,7 @@ spd_name[LPDDR3_SPD_PART_LEN] = 0; break; case SPD_DRAM_DDR4: + case SPD_DRAM_LPDDR4_JEDEC; memcpy(spd_name, &spd[DDR4_SPD_PART_OFF], DDR4_SPD_PART_LEN); spd_name[DDR4_SPD_PART_LEN] = 0; break; @@ -171,7 +177,7 @@ /* Module Part Number */ spd_get_name(spd, spd_name, type); - printk(BIOS_INFO, "SPD: module part is %s\n", spd_name); + printk(BIOS_INFO, "SPD: module part number is %s\n", spd_name); printk(BIOS_INFO, "SPD: banks %d, ranks %d, rows %d, columns %d, density %d Mb\n", -- To view, visit https://review.coreboot.org/c/coreboot/+/39352 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I68c9782c543afab4423296fa7ac1c078db5649c3 Gerrit-Change-Number: 39352 Gerrit-PatchSet: 1 Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

5 18

Change in coreboot[master]: mb/intel/tglrvp: addtional pin mux for Camera
by Wonkyu Kim (Code Review) 07 Mar '20

07 Mar '20

Wonkyu Kim has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39201 ) Change subject: mb/intel/tglrvp: addtional pin mux for Camera ...................................................................... mb/intel/tglrvp: addtional pin mux for Camera Add addtional pin mux for I2C3, I2C5 for Camera. These pin mux were done in FSPs, this pin mux is for bypassing pin mux in FSPs. BUG=none BRANCH=none TEST=Build with pin mux bypass FSP and boot tigerlake rvp board and check camera Simple test method to check camera: capture image by below commands from OS console >media-ctl -V "\"Intel IPU6 CSI-2 5\":0 [fmt:SGRBG10/3280x2464]" >media-ctl -V "\"Intel IPU6 CSI-2 5\":1 [fmt:SGRBG10/3280x2464]" >media-ctl -l "\"ov8856 18-0010\":0 -> \"Intel IPU6 CSI-2 5\":0[1]" >media-ctl -V "\"Intel IPU6 CSI2 BE\":0 [fmt:SGRBG10/3280x2464]" >media-ctl -V "\"Intel IPU6 CSI2 BE\":1 [crop:(0,0)/3280x2464]" >media-ctl -V "\"Intel IPU6 CSI2 BE\":1 [fmt:SGRBG10/3280x2464]" >media-ctl -l "\"Intel IPU6 CSI-2 5\":1 -> \"Intel IPU6 CSI2 BE\":0[1]" >media-ctl -l "\"Intel IPU6 CSI2 BE\":1 -> \"Intel IPU6 CSI2 BE capture\":0[1]" >yavta -u -c5 -n5 -I -s 3280x2464 --file=/tmp/frame-#.bin -f SGRBG10 $(media-ctl -e "Intel IPU6 CSI2 BE capture") Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com> Change-Id: I9ad0e5ed452d2b2e8c674abe2a647a0a9c59188e --- M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/39201/1 diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c index 8638b80..9dab272 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c @@ -24,6 +24,10 @@ PAD_CFG_GPO(GPP_H0, 1, PLTRST), /* Camera */ + PAD_CFG_NF(GPP_H6, NONE, PLTRST, NF1), /* I2C3_SDA */ + PAD_CFG_NF(GPP_H7, NONE, PLTRST, NF1), /* I2C3_SCL */ + PAD_CFG_NF(GPP_B9, NONE, PLTRST, NF1), /* I2C5_SDA */ + PAD_CFG_NF(GPP_B10, NONE, PLTRST, NF1), /* I2C5_SCL */ PAD_CFG_GPO(GPP_B23, 0, PLTRST), PAD_CFG_GPO(GPP_C15, 0, PLTRST), PAD_CFG_GPO(GPP_R6, 0, PLTRST), -- To view, visit https://review.coreboot.org/c/coreboot/+/39201 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ad0e5ed452d2b2e8c674abe2a647a0a9c59188e Gerrit-Change-Number: 39201 Gerrit-PatchSet: 1 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-MessageType: newchange

5 12

Change in coreboot[master]: cpu/x86/smm: Add smm_size to relocatable smmstub
by Arthur Heymans (Code Review) 07 Mar '20

07 Mar '20

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37288 ) Change subject: cpu/x86/smm: Add smm_size to relocatable smmstub ...................................................................... cpu/x86/smm: Add smm_size to relocatable smmstub To mitigate against sinkhole in software which is required on pre-sandybridge hardware, the smm entry point needs to check if the LAPIC base is between smbase and smbase + smmsize. The size needs to be available early so add them to the relocatable module parameters. When the smmstub is used to relocate SMM the default SMM size 0x10000 is provided. On the permanent handler the size provided by get_smm_info() is used. Change-Id: I0df6e51bcba284350f1c849ef3d012860757544b Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/x86/smm/smm_module_loader.c M src/cpu/x86/smm/smm_stub.S M src/include/cpu/x86/smm.h 3 files changed, 10 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/37288/1 diff --git a/src/cpu/x86/smm/smm_module_loader.c b/src/cpu/x86/smm/smm_module_loader.c index c6c6b38..4431a44 100644 --- a/src/cpu/x86/smm/smm_module_loader.c +++ b/src/cpu/x86/smm/smm_module_loader.c @@ -173,8 +173,9 @@ * concurrent areas requested. The save state always lives at the top of SMRAM * space, and the entry point is at offset 0x8000. */ -static int smm_module_setup_stub(void *smbase, struct smm_loader_params *params, - void *fxsave_area) +static int smm_module_setup_stub(void *smbase, size_t smm_size, + struct smm_loader_params *params, + void *fxsave_area) { size_t total_save_state_size; size_t smm_stub_size; @@ -266,6 +267,7 @@ stub_params->fxsave_area = (uintptr_t)fxsave_area; stub_params->fxsave_area_size = FXSAVE_SIZE; stub_params->runtime.smbase = (uintptr_t)smbase; + stub_params->runtime.smm_size = smm_size; stub_params->runtime.save_state_size = params->per_cpu_save_state_size; /* Initialize the APIC id to CPU number table to be 1:1 */ @@ -305,7 +307,8 @@ if (params->num_concurrent_stacks == 0) params->num_concurrent_stacks = CONFIG_MAX_CPUS; - return smm_module_setup_stub(smram, params, fxsave_area_relocation); + return smm_module_setup_stub(smram, SMM_DEFAULT_SIZE, + params, fxsave_area_relocation); } /* The SMM module is placed within the provided region in the following @@ -391,5 +394,5 @@ params->handler = rmodule_entry(&smm_mod); params->handler_arg = rmodule_parameters(&smm_mod); - return smm_module_setup_stub(smram, params, fxsave_area); + return smm_module_setup_stub(smram, size, params, fxsave_area); } diff --git a/src/cpu/x86/smm/smm_stub.S b/src/cpu/x86/smm/smm_stub.S index f0e55f9..304ea4b 100644 --- a/src/cpu/x86/smm/smm_stub.S +++ b/src/cpu/x86/smm/smm_stub.S @@ -42,6 +42,8 @@ smm_runtime: smbase: .long 0 +smm_size: +.long 0 save_state_size: .long 0 /* apic_to_cpu_num is a table mapping the default APIC id to CPU num. If the diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index cf107b1..2e3c639 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -63,6 +63,7 @@ struct smm_runtime { u32 smbase; + u32 smm_size; u32 save_state_size; /* The apic_id_to_cpu provides a mapping from APIC id to CPU number. * The CPU number is indicated by the index into the array by matching -- To view, visit https://review.coreboot.org/c/coreboot/+/37288 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0df6e51bcba284350f1c849ef3d012860757544b Gerrit-Change-Number: 37288 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

4 6

Change in coreboot[master]: mb/google/volteer: add samsung-K4UBE3D4AA-MGCR SPD
by Nick Vaccaro (Code Review) 07 Mar '20

07 Mar '20

Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39336 ) Change subject: mb/google/volteer: add samsung-K4UBE3D4AA-MGCR SPD ...................................................................... mb/google/volteer: add samsung-K4UBE3D4AA-MGCR SPD Add samsung K4UBE3D4AA-MGCR SPD as memory sku id 1. BUG=b:148182234 BRANCH=none TEST=none Change-Id: Ie00c45de4d31856109cda13051a75cfa2c2548f7 Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> --- A src/mainboard/google/volteer/spd/samsung-K4UBE3D4AA-MGCR.spd.hex M src/mainboard/google/volteer/variants/volteer/Makefile.inc 2 files changed, 33 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39336/1 diff --git a/src/mainboard/google/volteer/spd/samsung-K4UBE3D4AA-MGCR.spd.hex b/src/mainboard/google/volteer/spd/samsung-K4UBE3D4AA-MGCR.spd.hex new file mode 100644 index 0000000..945b2e8 --- /dev/null +++ b/src/mainboard/google/volteer/spd/samsung-K4UBE3D4AA-MGCR.spd.hex @@ -0,0 +1,32 @@ +23 11 11 0E 15 21 B5 08 00 40 00 00 0A 21 00 00 +48 00 04 0F 92 54 05 00 87 00 90 A8 90 C0 08 60 +04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 E0 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 20 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/volteer/variants/volteer/Makefile.inc b/src/mainboard/google/volteer/variants/volteer/Makefile.inc index 37893c2..a6659db 100644 --- a/src/mainboard/google/volteer/variants/volteer/Makefile.inc +++ b/src/mainboard/google/volteer/variants/volteer/Makefile.inc @@ -8,3 +8,4 @@ ## Memory Options SPD_SOURCES = samsung-K4U6E3S4AA-MGCL # 0b0000 +SPD_SOURCES += samsung-K4UBE3D4AA-MGCR # 0b0001 -- To view, visit https://review.coreboot.org/c/coreboot/+/39336 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie00c45de4d31856109cda13051a75cfa2c2548f7 Gerrit-Change-Number: 39336 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: src/nb: Use 'print("%s...", __func__)'
by HAOUAS Elyes (Code Review) 07 Mar '20

07 Mar '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39328 ) Change subject: src/nb: Use 'print("%s...", __func__)' ...................................................................... src/nb: Use 'print("%s...", __func__)' Change-Id: I7dd6dd8e8debe1b6419625fca38670be375ef581 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/northbridge/intel/haswell/raminit.c M src/northbridge/intel/i945/gma.c M src/northbridge/intel/i945/raminit.c M src/northbridge/intel/i945/rcven.c M src/northbridge/intel/sandybridge/raminit_mrc.c 5 files changed, 15 insertions(+), 17 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/39328/1 diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c index 8267833..9615cb0 100644 --- a/src/northbridge/intel/haswell/raminit.c +++ b/src/northbridge/intel/haswell/raminit.c @@ -133,8 +133,7 @@ /* If MRC data is not found we cannot continue S3 resume. */ if (pei_data->boot_mode == 2 && !pei_data->mrc_input) { post_code(POST_RESUME_FAILURE); - printk(BIOS_DEBUG, "Giving up in sdram_initialize: " - "No MRC data\n"); + printk(BIOS_DEBUG, "Giving up in %s: No MRC data\n", __func__); system_reset(); } diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index 98e30e7..05855f3 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -88,9 +88,9 @@ /* verify */ if (read32(mmiobase + PGETBL_CTL) & PGETBL_ENABLED) { - printk(BIOS_DEBUG, "gtt_setup is enabled.\n"); + printk(BIOS_DEBUG, "%s is enabled.\n", __func__); } else { - printk(BIOS_DEBUG, "gtt_setup failed!!!\n"); + printk(BIOS_DEBUG, "%s failed!!!\n", __func__); return 1; } write32(mmiobase + GFX_FLSH_CNTL, 0); diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index f0ea142..cb3b943 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -111,7 +111,7 @@ case 2: return 533; case 3: return 667; default: - printk(BIOS_DEBUG, "memclk: unknown register value %x\n", + printk(BIOS_DEBUG, "%s: unknown register value %x\n", __func__, ((MCHBAR32(CLKCFG) >> 4) & 7) - offset); } return -1; @@ -125,7 +125,7 @@ case 1: return 533; case 3: return 667; default: - printk(BIOS_DEBUG, "fsbclk: unknown register value %x\n", + printk(BIOS_DEBUG, "%s: unknown register value %x\n", __func__, MCHBAR32(CLKCFG) & 7); } return 0xffff; @@ -135,7 +135,7 @@ case 1: return 533; case 2: return 800; default: - printk(BIOS_DEBUG, "fsbclk: unknown register value %x\n", + printk(BIOS_DEBUG, "%s: unknown register value %x\n", __func__, MCHBAR32(CLKCFG) & 7); } return 0xffff; diff --git a/src/northbridge/intel/i945/rcven.c b/src/northbridge/intel/i945/rcven.c index 5a90807..2768a61 100644 --- a/src/northbridge/intel/i945/rcven.c +++ b/src/northbridge/intel/i945/rcven.c @@ -64,7 +64,7 @@ { u32 reg32; - printk(BIOS_SPEW, " set_receive_enable() medium=0x%x, coarse=0x%x\n", medium, coarse); + printk(BIOS_SPEW, " %s() medium=0x%x, coarse=0x%x\n", __func__, medium, coarse); reg32 = MCHBAR32(C0DRT1 + channel_offset); reg32 &= 0xf0ffffff; @@ -73,7 +73,7 @@ /* This should never happen: */ if (coarse > 0x0f) - printk(BIOS_DEBUG, "set_receive_enable: coarse overflow: 0x%02x.\n", coarse); + printk(BIOS_DEBUG, "%s: coarse overflow: 0x%02x.\n", __func__, coarse); /* medium control * @@ -99,7 +99,7 @@ static int normalize(int channel_offset, u8 *mediumcoarse, u8 *fine) { - printk(BIOS_SPEW, " normalize()\n"); + printk(BIOS_SPEW, " %s()\n", __func__); if (*fine < 0x80) return 0; @@ -126,7 +126,7 @@ /* find start of the data phase */ u32 reg32; - printk(BIOS_SPEW, " find_preamble()\n"); + printk(BIOS_SPEW, " %s()\n", __func__); do { if (*mediumcoarse < 4) { @@ -156,7 +156,7 @@ static int add_quarter_clock(int channel_offset, u8 *mediumcoarse, u8 *fine) { - printk(BIOS_SPEW, " add_quarter_clock() mediumcoarse=%02x fine=%02x\n", + printk(BIOS_SPEW, " %s() mediumcoarse=%02x fine=%02x\n", __func__, *mediumcoarse, *fine); if (*fine >= 0x80) { *fine -= 0x80; @@ -183,7 +183,7 @@ { u32 rcvenmt; - printk(BIOS_SPEW, " find_strobes_low()\n"); + printk(BIOS_SPEW, " %s()\n", __func__); for (;;) { MCHBAR8(C0WL0REOST + channel_offset) = *fine; @@ -219,7 +219,7 @@ int counter; u32 rcvenmt; - printk(BIOS_SPEW, " find_strobes_edge()\n"); + printk(BIOS_SPEW, " %s()\n", __func__); counter = 8; set_receive_enable(channel_offset, *mediumcoarse & 3, @@ -283,8 +283,7 @@ u8 mediumcoarse; u8 fine; - printk(BIOS_SPEW, "receive_enable_autoconfig() for channel %d\n", - channel_offset ? 1 : 0); + printk(BIOS_SPEW, "%s() for channel %d\n", __func__, channel_offset ? 1 : 0); /* Set initial values */ mediumcoarse = (sysinfo->cas << 2) | 3; diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index 8daa9aa..db5bffc 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -212,7 +212,7 @@ /* If MRC data is not found we cannot continue S3 resume. */ if (pei_data->boot_mode == 2 && !pei_data->mrc_input) { - printk(BIOS_DEBUG, "Giving up in sdram_initialize: No MRC data\n"); + printk(BIOS_DEBUG, "Giving up in %s: No MRC data\n", __func__); system_reset(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/39328 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7dd6dd8e8debe1b6419625fca38670be375ef581 Gerrit-Change-Number: 39328 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

3 2

Change in coreboot[master]: mb: Use 'print("%s...", __func__)'
by HAOUAS Elyes (Code Review) 07 Mar '20

07 Mar '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39231 ) Change subject: mb: Use 'print("%s...", __func__)' ...................................................................... mb: Use 'print("%s...", __func__)' Change-Id: I4fa89dc1ad4196a61bb0cdfaa0d59dfe4c6fff12 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/amd/bettong/irq_tables.c M src/mainboard/amd/db-ft3b-lc/irq_tables.c M src/mainboard/amd/gardenia/irq_tables.c M src/mainboard/amd/inagua/irq_tables.c M src/mainboard/amd/lamar/irq_tables.c M src/mainboard/amd/olivehill/irq_tables.c M src/mainboard/amd/olivehillplus/irq_tables.c M src/mainboard/amd/parmer/irq_tables.c M src/mainboard/amd/persimmon/irq_tables.c M src/mainboard/amd/south_station/irq_tables.c M src/mainboard/amd/thatcher/irq_tables.c M src/mainboard/amd/union_station/irq_tables.c M src/mainboard/asrock/e350m1/irq_tables.c M src/mainboard/asrock/imb-a180/irq_tables.c M src/mainboard/asus/f2a85-m/irq_tables.c M src/mainboard/bap/ode_e20XX/irq_tables.c M src/mainboard/bap/ode_e21XX/irq_tables.c M src/mainboard/biostar/a68n_5200/irq_tables.c M src/mainboard/elmex/pcm205400/irq_tables.c M src/mainboard/gizmosphere/gizmo/irq_tables.c M src/mainboard/gizmosphere/gizmo2/irq_tables.c M src/mainboard/hp/abm/irq_tables.c M src/mainboard/hp/pavilion_m6_1035dx/irq_tables.c M src/mainboard/jetway/nf81-t56n-lf/irq_tables.c M src/mainboard/lenovo/g505s/irq_tables.c M src/mainboard/lippert/frontrunner-af/irq_tables.c M src/mainboard/lippert/toucan-af/irq_tables.c M src/mainboard/msi/ms7721/irq_tables.c M src/mainboard/pcengines/apu1/irq_tables.c M src/mainboard/pcengines/apu2/irq_tables.c 30 files changed, 30 insertions(+), 30 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/39231/1 diff --git a/src/mainboard/amd/bettong/irq_tables.c b/src/mainboard/amd/bettong/irq_tables.c index 4503099..7334bb2 100644 --- a/src/mainboard/amd/bettong/irq_tables.c +++ b/src/mainboard/amd/bettong/irq_tables.c @@ -94,7 +94,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/amd/db-ft3b-lc/irq_tables.c b/src/mainboard/amd/db-ft3b-lc/irq_tables.c index 530c132..465b364 100644 --- a/src/mainboard/amd/db-ft3b-lc/irq_tables.c +++ b/src/mainboard/amd/db-ft3b-lc/irq_tables.c @@ -94,7 +94,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/amd/gardenia/irq_tables.c b/src/mainboard/amd/gardenia/irq_tables.c index 2aefaea..76e796a 100644 --- a/src/mainboard/amd/gardenia/irq_tables.c +++ b/src/mainboard/amd/gardenia/irq_tables.c @@ -94,7 +94,7 @@ if (sum != pirq->checksum) pirq->checksum = sum; - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/amd/inagua/irq_tables.c b/src/mainboard/amd/inagua/irq_tables.c index 1d1e81f..3ce0ffc 100644 --- a/src/mainboard/amd/inagua/irq_tables.c +++ b/src/mainboard/amd/inagua/irq_tables.c @@ -96,7 +96,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; diff --git a/src/mainboard/amd/lamar/irq_tables.c b/src/mainboard/amd/lamar/irq_tables.c index 9cc27f7..fc3fbec 100644 --- a/src/mainboard/amd/lamar/irq_tables.c +++ b/src/mainboard/amd/lamar/irq_tables.c @@ -94,7 +94,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/amd/olivehill/irq_tables.c b/src/mainboard/amd/olivehill/irq_tables.c index 181908a..d8bf5e9 100644 --- a/src/mainboard/amd/olivehill/irq_tables.c +++ b/src/mainboard/amd/olivehill/irq_tables.c @@ -95,7 +95,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/amd/olivehillplus/irq_tables.c b/src/mainboard/amd/olivehillplus/irq_tables.c index 530c132..465b364 100644 --- a/src/mainboard/amd/olivehillplus/irq_tables.c +++ b/src/mainboard/amd/olivehillplus/irq_tables.c @@ -94,7 +94,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/amd/parmer/irq_tables.c b/src/mainboard/amd/parmer/irq_tables.c index 181908a..d8bf5e9 100644 --- a/src/mainboard/amd/parmer/irq_tables.c +++ b/src/mainboard/amd/parmer/irq_tables.c @@ -95,7 +95,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/amd/persimmon/irq_tables.c b/src/mainboard/amd/persimmon/irq_tables.c index 1d1e81f..3ce0ffc 100644 --- a/src/mainboard/amd/persimmon/irq_tables.c +++ b/src/mainboard/amd/persimmon/irq_tables.c @@ -96,7 +96,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; diff --git a/src/mainboard/amd/south_station/irq_tables.c b/src/mainboard/amd/south_station/irq_tables.c index 1d1e81f..3ce0ffc 100644 --- a/src/mainboard/amd/south_station/irq_tables.c +++ b/src/mainboard/amd/south_station/irq_tables.c @@ -96,7 +96,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; diff --git a/src/mainboard/amd/thatcher/irq_tables.c b/src/mainboard/amd/thatcher/irq_tables.c index 181908a..d8bf5e9 100644 --- a/src/mainboard/amd/thatcher/irq_tables.c +++ b/src/mainboard/amd/thatcher/irq_tables.c @@ -95,7 +95,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/amd/union_station/irq_tables.c b/src/mainboard/amd/union_station/irq_tables.c index 1d1e81f..3ce0ffc 100644 --- a/src/mainboard/amd/union_station/irq_tables.c +++ b/src/mainboard/amd/union_station/irq_tables.c @@ -96,7 +96,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; diff --git a/src/mainboard/asrock/e350m1/irq_tables.c b/src/mainboard/asrock/e350m1/irq_tables.c index 1d1e81f..3ce0ffc 100644 --- a/src/mainboard/asrock/e350m1/irq_tables.c +++ b/src/mainboard/asrock/e350m1/irq_tables.c @@ -96,7 +96,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; diff --git a/src/mainboard/asrock/imb-a180/irq_tables.c b/src/mainboard/asrock/imb-a180/irq_tables.c index 181908a..d8bf5e9 100644 --- a/src/mainboard/asrock/imb-a180/irq_tables.c +++ b/src/mainboard/asrock/imb-a180/irq_tables.c @@ -95,7 +95,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/asus/f2a85-m/irq_tables.c b/src/mainboard/asus/f2a85-m/irq_tables.c index 88d2160..e0d5ad4 100644 --- a/src/mainboard/asus/f2a85-m/irq_tables.c +++ b/src/mainboard/asus/f2a85-m/irq_tables.c @@ -95,7 +95,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/bap/ode_e20XX/irq_tables.c b/src/mainboard/bap/ode_e20XX/irq_tables.c index 181908a..d8bf5e9 100644 --- a/src/mainboard/bap/ode_e20XX/irq_tables.c +++ b/src/mainboard/bap/ode_e20XX/irq_tables.c @@ -95,7 +95,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/bap/ode_e21XX/irq_tables.c b/src/mainboard/bap/ode_e21XX/irq_tables.c index 413ccf8..5eb5a49 100644 --- a/src/mainboard/bap/ode_e21XX/irq_tables.c +++ b/src/mainboard/bap/ode_e21XX/irq_tables.c @@ -95,7 +95,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/biostar/a68n_5200/irq_tables.c b/src/mainboard/biostar/a68n_5200/irq_tables.c index ab26cba..e19e698 100644 --- a/src/mainboard/biostar/a68n_5200/irq_tables.c +++ b/src/mainboard/biostar/a68n_5200/irq_tables.c @@ -95,7 +95,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/elmex/pcm205400/irq_tables.c b/src/mainboard/elmex/pcm205400/irq_tables.c index d114996..d83286e 100644 --- a/src/mainboard/elmex/pcm205400/irq_tables.c +++ b/src/mainboard/elmex/pcm205400/irq_tables.c @@ -103,7 +103,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; diff --git a/src/mainboard/gizmosphere/gizmo/irq_tables.c b/src/mainboard/gizmosphere/gizmo/irq_tables.c index 9d74dc8..01a3411 100644 --- a/src/mainboard/gizmosphere/gizmo/irq_tables.c +++ b/src/mainboard/gizmosphere/gizmo/irq_tables.c @@ -97,7 +97,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; diff --git a/src/mainboard/gizmosphere/gizmo2/irq_tables.c b/src/mainboard/gizmosphere/gizmo2/irq_tables.c index 181908a..d8bf5e9 100644 --- a/src/mainboard/gizmosphere/gizmo2/irq_tables.c +++ b/src/mainboard/gizmosphere/gizmo2/irq_tables.c @@ -95,7 +95,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/hp/abm/irq_tables.c b/src/mainboard/hp/abm/irq_tables.c index 181908a..d8bf5e9 100644 --- a/src/mainboard/hp/abm/irq_tables.c +++ b/src/mainboard/hp/abm/irq_tables.c @@ -95,7 +95,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/hp/pavilion_m6_1035dx/irq_tables.c b/src/mainboard/hp/pavilion_m6_1035dx/irq_tables.c index 761bc04..fb04069 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/irq_tables.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/irq_tables.c @@ -95,7 +95,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/jetway/nf81-t56n-lf/irq_tables.c b/src/mainboard/jetway/nf81-t56n-lf/irq_tables.c index d33b5b8..bec87cb 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/irq_tables.c +++ b/src/mainboard/jetway/nf81-t56n-lf/irq_tables.c @@ -96,7 +96,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/lenovo/g505s/irq_tables.c b/src/mainboard/lenovo/g505s/irq_tables.c index 761bc04..fb04069 100644 --- a/src/mainboard/lenovo/g505s/irq_tables.c +++ b/src/mainboard/lenovo/g505s/irq_tables.c @@ -95,7 +95,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/lippert/frontrunner-af/irq_tables.c b/src/mainboard/lippert/frontrunner-af/irq_tables.c index 1d1e81f..3ce0ffc 100644 --- a/src/mainboard/lippert/frontrunner-af/irq_tables.c +++ b/src/mainboard/lippert/frontrunner-af/irq_tables.c @@ -96,7 +96,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; diff --git a/src/mainboard/lippert/toucan-af/irq_tables.c b/src/mainboard/lippert/toucan-af/irq_tables.c index 1d1e81f..3ce0ffc 100644 --- a/src/mainboard/lippert/toucan-af/irq_tables.c +++ b/src/mainboard/lippert/toucan-af/irq_tables.c @@ -96,7 +96,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; diff --git a/src/mainboard/msi/ms7721/irq_tables.c b/src/mainboard/msi/ms7721/irq_tables.c index 88d2160..e0d5ad4 100644 --- a/src/mainboard/msi/ms7721/irq_tables.c +++ b/src/mainboard/msi/ms7721/irq_tables.c @@ -95,7 +95,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } diff --git a/src/mainboard/pcengines/apu1/irq_tables.c b/src/mainboard/pcengines/apu1/irq_tables.c index 1d1e81f..3ce0ffc 100644 --- a/src/mainboard/pcengines/apu1/irq_tables.c +++ b/src/mainboard/pcengines/apu1/irq_tables.c @@ -96,7 +96,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; diff --git a/src/mainboard/pcengines/apu2/irq_tables.c b/src/mainboard/pcengines/apu2/irq_tables.c index 3d6346e..5f2045d 100644 --- a/src/mainboard/pcengines/apu2/irq_tables.c +++ b/src/mainboard/pcengines/apu2/irq_tables.c @@ -96,7 +96,7 @@ pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "%s done.\n", __func__); return (unsigned long)pirq_info; } -- To view, visit https://review.coreboot.org/c/coreboot/+/39231 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4fa89dc1ad4196a61bb0cdfaa0d59dfe4c6fff12 Gerrit-Change-Number: 39231 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/usb: Use 'print("%s...", __func__)'
by HAOUAS Elyes (Code Review) 07 Mar '20

07 Mar '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39230 ) Change subject: drivers/usb: Use 'print("%s...", __func__)' ...................................................................... drivers/usb: Use 'print("%s...", __func__)' Change-Id: Id90496ba54d861157343302c2600adf3b4ccd811 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/drivers/usb/ehci_debug.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/39230/1 diff --git a/src/drivers/usb/ehci_debug.c b/src/drivers/usb/ehci_debug.c index 97b39f4..364f8c7 100644 --- a/src/drivers/usb/ehci_debug.c +++ b/src/drivers/usb/ehci_debug.c @@ -91,7 +91,7 @@ } while (++loop < DBGP_MICROFRAME_TIMEOUT_LOOPS); if (! (ctrl & DBGP_DONE)) { - dprintk(BIOS_ERR, "dbgp_wait_until_complete: retry timeout.\n"); + dprintk(BIOS_ERR, "%s: retry timeout.\n", __func__); return -DBGP_ERR_SIGNAL; } -- To view, visit https://review.coreboot.org/c/coreboot/+/39230 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id90496ba54d861157343302c2600adf3b4ccd811 Gerrit-Change-Number: 39230 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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coreboot-gerrit March 2020