Change in coreboot[master]: util/kconfig: Remove miniconfig script
by Patrick Georgi (Code Review) 01 May '20
by Patrick Georgi (Code Review) 01 May '20
01 May '20
Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37150 )
Change subject: util/kconfig: Remove miniconfig script
......................................................................
util/kconfig: Remove miniconfig script
It replicates the functionality of savedefconfig because back when the
script was added, savedefconfig didn't work for us. It now does, is
the official way of doing things, is recommended in our documentation
and is also a fair bit faster.
Change-Id: Ia8e0377537ff7cd638c564037ea6a77b01a87243
Signed-off-by: Patrick Georgi <pgeorgi(a)google.com>
---
D util/kconfig/miniconfig
1 file changed, 0 insertions(+), 87 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/37150/1
diff --git a/util/kconfig/miniconfig b/util/kconfig/miniconfig
deleted file mode 100755
index 29a4035..0000000
--- a/util/kconfig/miniconfig
+++ /dev/null
@@ -1,87 +0,0 @@
-#!/usr/bin/env bash
-#
-# miniconfig - utility to minimize your coreboot config files
-#
-# Copyright 2015 Google Inc.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; version 2 of the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-
-CONFIG=$1
-NEWCONFIG=$2
-
-CONF=build/util/kconfig/conf
-KCONFIG=src/Kconfig
-DOTCONFIG=.config
-PREVCONFIG=.config.prev
-TMPCONFIG=.config.mini
-
-recreate_config()
-{
- $CONF --olddefconfig $KCONFIG &> /dev/null
-}
-
-if [ "$CONFIG" == "" ]; then
- printf "usage: util/miniconfig/miniconfig [path to config file] <path to new config file>\n"
- exit 0
-fi
-
-if [ ! -r "$CONFIG" ]; then
- printf "Can't read $CONFIG.\n"
- exit 1
-fi
-
-if [ "$CONFIG" == .config ]; then
- printf "Can't use .config, it's overwritten. Make a backup.\n"
- exit 1
-fi
-
-if [ ! -x "$CONF" ]; then
- printf "conf utility at $CONF not available.\n"
- exit 1
-fi
-
-# Start out by creating a default config file for a mainboard
-VENDOR=$( grep ^CONFIG_VENDOR "$CONFIG" )
-BOARD=$( grep ^CONFIG_BOARD "$CONFIG" | grep -v ROMSIZE | grep -v SPECIFIC_OPTIONS )
-
-printf "$VENDOR\n$BOARD\n" > "$TMPCONFIG"
-cp "$TMPCONFIG" "$DOTCONFIG"
-recreate_config
-
-LINES=$( cat "$CONFIG" | wc -l )
-CUR=1
-
-# Now go through each line of the existing, large config file, add it to our
-# new minimal config file, and see if it makes a difference when running "make
-# olddefconfig". If it does, keep the line, otherwise discard it.
-
-cat "$CONFIG" | while read L; do
- printf "\rProcessing $CONFIG - $CUR / $LINES (%d%%)" $(( $CUR * 100 / $LINES))
- mv "$DOTCONFIG" "$PREVCONFIG"
- cp "$TMPCONFIG" "$DOTCONFIG"
- echo "$L" >> "$DOTCONFIG"
- recreate_config
-
- if ! diff -q "$DOTCONFIG" "$PREVCONFIG" > /dev/null; then
- echo "$L" >> "$TMPCONFIG"
- fi
- CUR=$(( $CUR + 1 ))
-done
-
-echo
-
-if [ "$NEWCONFIG" != "" ]; then
- printf "Writing new, minimized config to $NEWCONFIG\n"
- mv "$TMPCONFIG" "$NEWCONFIG"
-else
- printf "Overwriting $CONFIG with new, minimized config.\n"
- mv "$TMPCONFIG" "$CONFIG"
-fi
--
To view, visit https://review.coreboot.org/c/coreboot/+/37150
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ia8e0377537ff7cd638c564037ea6a77b01a87243
Gerrit-Change-Number: 37150
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-MessageType: newchange
4
6
Change in coreboot[master]: soc/amd/picasso: Add UPD settings to chip.h
by Marshall Dawson (Code Review) 01 May '20
by Marshall Dawson (Code Review) 01 May '20
01 May '20
Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38699 )
Change subject: soc/amd/picasso: Add UPD settings to chip.h
......................................................................
soc/amd/picasso: Add UPD settings to chip.h
Add values that align with UPD settings.
Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Change-Id: I6bce44a43e57ba00d2b29cfa6249cef51e9ceabb
---
M src/soc/amd/picasso/chip.h
1 file changed, 41 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/38699/1
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index 4e9e18b..0681277 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -44,10 +44,51 @@
I2S_PINS_I2S_TDM = 4,
I2S_PINS_UNCONF = 7, /* All pads will be input mode */
} acp_pin_cfg;
+
+ /* Options for these are in src/arch/x86/include/arch/acpi.h */
+ uint8_t fadt_pm_profile;
+ uint16_t fadt_boot_arch;
+ uint32_t fadt_flags;
+
+ /* System config index */
+ uint8_t system_config;
+
+ /* STAPM Configuration */
+ uint32_t fast_ppt_limit;
+ uint32_t slow_ppt_limit;
+ uint32_t slow_ppt_time_constant;
+ uint32_t stapm_time_constant;
+ uint32_t sustained_power_limit;
+
+ /* PROCHOT_L de-assertion Ramp Time */
+ uint32_t prochot_l_deassertion_ramp_time;
+
+ /* Lower die temperature limit */
+ uint32_t thermctl_limit;
+
+ /* FP5 Processor Voltage Supply PSI Currents. 0 indicates use SOC default */
+ uint32_t psi0_current_limit;
+ uint32_t psi0_soc_current_limit;
+ uint32_t vddcr_soc_voltage_margin;
+ uint32_t vddcr_vdd_voltage_margin;
+
+ /* VRM Limits. 0 indicates use SOC default */
+ uint32_t vrm_maximum_current_limit;
+ uint32_t vrm_soc_maximum_current_limit;
+ uint32_t vrm_current_limit;
+ uint32_t vrm_soc_current_limit;
+
+ /* Misc SMU settings */
+ uint8_t sb_tsi_alert_comparator_mode_en;
+ uint8_t core_dldo_bypass;
+ uint8_t min_soc_vid_offset;
+ uint8_t aclk_dpm0_freq_400MHz;
};
typedef struct soc_amd_picasso_config config_t;
+const config_t *get_soc_config(void);
+
extern struct device_operations pci_domain_ops;
#endif /* __PICASSO_CHIP_H__ */
--
To view, visit https://review.coreboot.org/c/coreboot/+/38699
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I6bce44a43e57ba00d2b29cfa6249cef51e9ceabb
Gerrit-Change-Number: 38699
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-MessageType: newchange
6
10
Change in coreboot[master]: [WIP] drivers/usb/xhci-dbc: Add USB3 Dbc
by Felix Singer (Code Review) 01 May '20
by Felix Singer (Code Review) 01 May '20
01 May '20
Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36012 )
Change subject: [WIP] drivers/usb/xhci-dbc: Add USB3 Dbc
......................................................................
[WIP] drivers/usb/xhci-dbc: Add USB3 Dbc
Change-Id: I67ab1792184cba46ef09ee944866c1ca5b810d7c
Signed-off-by: Felix Singer <felix.singer(a)9elements.com>
---
A src/drivers/usb/xhci-dbc.c
1 file changed, 1,005 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/36012/1
diff --git a/src/drivers/usb/xhci-dbc.c b/src/drivers/usb/xhci-dbc.c
new file mode 100644
index 0000000..89aae0f
--- /dev/null
+++ b/src/drivers/usb/xhci-dbc.c
@@ -0,0 +1,1005 @@
+// SPDX-License-Identifier: GPL-2.0
+/**
+ * Initially copied from Linux source drivers/usb/early/xhci-dbc.c
+ *
+ * xhci-dbc.c - xHCI debug capability early driver
+ *
+ * Copyright (C) 2016 Intel Corporation
+ *
+ * Author: Lu Baolu <baolu.lu(a)linux.intel.com>
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ":%s: " fmt, __func__
+
+#include <linux/console.h>
+#include <linux/pci_regs.h>
+#include <linux/pci_ids.h>
+#include <linux/memblock.h>
+#include <linux/io.h>
+#include <asm/pci-direct.h>
+#include <asm/fixmap.h>
+#include <linux/bcd.h>
+#include <linux/export.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/kthread.h>
+
+#include "../host/xhci.h"
+#include "xhci-dbc.h"
+
+static struct xdbc_state xdbc;
+static bool early_console_keep;
+
+#ifdef XDBC_TRACE
+#define xdbc_trace trace_printk
+#else
+static inline void xdbc_trace(const char *fmt, ...) { }
+#endif /* XDBC_TRACE */
+
+static void __iomem * __init xdbc_map_pci_mmio(u32 bus, u32 dev, u32 func)
+{
+ u64 val64, sz64, mask64;
+ void __iomem *base;
+ u32 val, sz;
+ u8 byte;
+
+ val = read_pci_config(bus, dev, func, PCI_BASE_ADDRESS_0);
+ write_pci_config(bus, dev, func, PCI_BASE_ADDRESS_0, ~0);
+ sz = read_pci_config(bus, dev, func, PCI_BASE_ADDRESS_0);
+ write_pci_config(bus, dev, func, PCI_BASE_ADDRESS_0, val);
+
+ if (val == 0xffffffff || sz == 0xffffffff) {
+ pr_notice("invalid mmio bar\n");
+ return NULL;
+ }
+
+ val64 = val & PCI_BASE_ADDRESS_MEM_MASK;
+ sz64 = sz & PCI_BASE_ADDRESS_MEM_MASK;
+ mask64 = PCI_BASE_ADDRESS_MEM_MASK;
+
+ if ((val & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64) {
+ val = read_pci_config(bus, dev, func, PCI_BASE_ADDRESS_0 + 4);
+ write_pci_config(bus, dev, func, PCI_BASE_ADDRESS_0 + 4, ~0);
+ sz = read_pci_config(bus, dev, func, PCI_BASE_ADDRESS_0 + 4);
+ write_pci_config(bus, dev, func, PCI_BASE_ADDRESS_0 + 4, val);
+
+ val64 |= (u64)val << 32;
+ sz64 |= (u64)sz << 32;
+ mask64 |= ~0ULL << 32;
+ }
+
+ sz64 &= mask64;
+
+ if (!sz64) {
+ pr_notice("invalid mmio address\n");
+ return NULL;
+ }
+
+ sz64 = 1ULL << __ffs64(sz64);
+
+ /* Check if the mem space is enabled: */
+ byte = read_pci_config_byte(bus, dev, func, PCI_COMMAND);
+ if (!(byte & PCI_COMMAND_MEMORY)) {
+ byte |= PCI_COMMAND_MEMORY;
+ write_pci_config_byte(bus, dev, func, PCI_COMMAND, byte);
+ }
+
+ xdbc.xhci_start = val64;
+ xdbc.xhci_length = sz64;
+ base = early_ioremap(val64, sz64);
+
+ return base;
+}
+
+static void * __init xdbc_get_page(dma_addr_t *dma_addr)
+{
+ void *virt;
+
+ virt = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
+ if (!virt)
+ return NULL;
+
+ if (dma_addr)
+ *dma_addr = (dma_addr_t)__pa(virt);
+
+ return virt;
+}
+
+static u32 __init xdbc_find_dbgp(int xdbc_num, u32 *b, u32 *d, u32 *f)
+{
+ u32 bus, dev, func, class;
+
+ for (bus = 0; bus < XDBC_PCI_MAX_BUSES; bus++) {
+ for (dev = 0; dev < XDBC_PCI_MAX_DEVICES; dev++) {
+ for (func = 0; func < XDBC_PCI_MAX_FUNCTION; func++) {
+
+ class = read_pci_config(bus, dev, func, PCI_CLASS_REVISION);
+ if ((class >> 8) != PCI_CLASS_SERIAL_USB_XHCI)
+ continue;
+
+ if (xdbc_num-- != 0)
+ continue;
+
+ *b = bus;
+ *d = dev;
+ *f = func;
+
+ return 0;
+ }
+ }
+ }
+
+ return -1;
+}
+
+static int handshake(void __iomem *ptr, u32 mask, u32 done, int wait, int delay)
+{
+ u32 result;
+
+ do {
+ result = readl(ptr);
+ result &= mask;
+ if (result == done)
+ return 0;
+ udelay(delay);
+ wait -= delay;
+ } while (wait > 0);
+
+ return -ETIMEDOUT;
+}
+
+static void __init xdbc_bios_handoff(void)
+{
+ int offset, timeout;
+ u32 val;
+
+ offset = xhci_find_next_ext_cap(xdbc.xhci_base, 0, XHCI_EXT_CAPS_LEGACY);
+ val = readl(xdbc.xhci_base + offset);
+
+ if (val & XHCI_HC_BIOS_OWNED) {
+ writel(val | XHCI_HC_OS_OWNED, xdbc.xhci_base + offset);
+ timeout = handshake(xdbc.xhci_base + offset, XHCI_HC_BIOS_OWNED, 0, 5000, 10);
+
+ if (timeout) {
+ pr_notice("failed to hand over xHCI control from BIOS\n");
+ writel(val & ~XHCI_HC_BIOS_OWNED, xdbc.xhci_base + offset);
+ }
+ }
+
+ /* Disable BIOS SMIs and clear all SMI events: */
+ val = readl(xdbc.xhci_base + offset + XHCI_LEGACY_CONTROL_OFFSET);
+ val &= XHCI_LEGACY_DISABLE_SMI;
+ val |= XHCI_LEGACY_SMI_EVENTS;
+ writel(val, xdbc.xhci_base + offset + XHCI_LEGACY_CONTROL_OFFSET);
+}
+
+static int __init
+xdbc_alloc_ring(struct xdbc_segment *seg, struct xdbc_ring *ring)
+{
+ seg->trbs = xdbc_get_page(&seg->dma);
+ if (!seg->trbs)
+ return -ENOMEM;
+
+ ring->segment = seg;
+
+ return 0;
+}
+
+static void __init xdbc_free_ring(struct xdbc_ring *ring)
+{
+ struct xdbc_segment *seg = ring->segment;
+
+ if (!seg)
+ return;
+
+ memblock_free(seg->dma, PAGE_SIZE);
+ ring->segment = NULL;
+}
+
+static void xdbc_reset_ring(struct xdbc_ring *ring)
+{
+ struct xdbc_segment *seg = ring->segment;
+ struct xdbc_trb *link_trb;
+
+ memset(seg->trbs, 0, PAGE_SIZE);
+
+ ring->enqueue = seg->trbs;
+ ring->dequeue = seg->trbs;
+ ring->cycle_state = 1;
+
+ if (ring != &xdbc.evt_ring) {
+ link_trb = &seg->trbs[XDBC_TRBS_PER_SEGMENT - 1];
+ link_trb->field[0] = cpu_to_le32(lower_32_bits(seg->dma));
+ link_trb->field[1] = cpu_to_le32(upper_32_bits(seg->dma));
+ link_trb->field[3] = cpu_to_le32(TRB_TYPE(TRB_LINK)) | cpu_to_le32(LINK_TOGGLE);
+ }
+}
+
+static inline void xdbc_put_utf16(u16 *s, const char *c, size_t size)
+{
+ int i;
+
+ for (i = 0; i < size; i++)
+ s[i] = cpu_to_le16(c[i]);
+}
+
+static void xdbc_mem_init(void)
+{
+ struct xdbc_ep_context *ep_in, *ep_out;
+ struct usb_string_descriptor *s_desc;
+ struct xdbc_erst_entry *entry;
+ struct xdbc_strings *strings;
+ struct xdbc_context *ctx;
+ unsigned int max_burst;
+ u32 string_length;
+ int index = 0;
+ u32 dev_info;
+
+ xdbc_reset_ring(&xdbc.evt_ring);
+ xdbc_reset_ring(&xdbc.in_ring);
+ xdbc_reset_ring(&xdbc.out_ring);
+ memset(xdbc.table_base, 0, PAGE_SIZE);
+ memset(xdbc.out_buf, 0, PAGE_SIZE);
+
+ /* Initialize event ring segment table: */
+ xdbc.erst_size = 16;
+ xdbc.erst_base = xdbc.table_base + index * XDBC_TABLE_ENTRY_SIZE;
+ xdbc.erst_dma = xdbc.table_dma + index * XDBC_TABLE_ENTRY_SIZE;
+
+ index += XDBC_ERST_ENTRY_NUM;
+ entry = (struct xdbc_erst_entry *)xdbc.erst_base;
+
+ entry->seg_addr = cpu_to_le64(xdbc.evt_seg.dma);
+ entry->seg_size = cpu_to_le32(XDBC_TRBS_PER_SEGMENT);
+ entry->__reserved_0 = 0;
+
+ /* Initialize ERST registers: */
+ writel(1, &xdbc.xdbc_reg->ersts);
+ xdbc_write64(xdbc.erst_dma, &xdbc.xdbc_reg->erstba);
+ xdbc_write64(xdbc.evt_seg.dma, &xdbc.xdbc_reg->erdp);
+
+ /* Debug capability contexts: */
+ xdbc.dbcc_size = 64 * 3;
+ xdbc.dbcc_base = xdbc.table_base + index * XDBC_TABLE_ENTRY_SIZE;
+ xdbc.dbcc_dma = xdbc.table_dma + index * XDBC_TABLE_ENTRY_SIZE;
+
+ index += XDBC_DBCC_ENTRY_NUM;
+
+ /* Popluate the strings: */
+ xdbc.string_size = sizeof(struct xdbc_strings);
+ xdbc.string_base = xdbc.table_base + index * XDBC_TABLE_ENTRY_SIZE;
+ xdbc.string_dma = xdbc.table_dma + index * XDBC_TABLE_ENTRY_SIZE;
+ strings = (struct xdbc_strings *)xdbc.string_base;
+
+ index += XDBC_STRING_ENTRY_NUM;
+
+ /* Serial string: */
+ s_desc = (struct usb_string_descriptor *)strings->serial;
+ s_desc->bLength = (strlen(XDBC_STRING_SERIAL) + 1) * 2;
+ s_desc->bDescriptorType = USB_DT_STRING;
+
+ xdbc_put_utf16(s_desc->wData, XDBC_STRING_SERIAL, strlen(XDBC_STRING_SERIAL));
+ string_length = s_desc->bLength;
+ string_length <<= 8;
+
+ /* Product string: */
+ s_desc = (struct usb_string_descriptor *)strings->product;
+ s_desc->bLength = (strlen(XDBC_STRING_PRODUCT) + 1) * 2;
+ s_desc->bDescriptorType = USB_DT_STRING;
+
+ xdbc_put_utf16(s_desc->wData, XDBC_STRING_PRODUCT, strlen(XDBC_STRING_PRODUCT));
+ string_length += s_desc->bLength;
+ string_length <<= 8;
+
+ /* Manufacture string: */
+ s_desc = (struct usb_string_descriptor *)strings->manufacturer;
+ s_desc->bLength = (strlen(XDBC_STRING_MANUFACTURER) + 1) * 2;
+ s_desc->bDescriptorType = USB_DT_STRING;
+
+ xdbc_put_utf16(s_desc->wData, XDBC_STRING_MANUFACTURER, strlen(XDBC_STRING_MANUFACTURER));
+ string_length += s_desc->bLength;
+ string_length <<= 8;
+
+ /* String0: */
+ strings->string0[0] = 4;
+ strings->string0[1] = USB_DT_STRING;
+ strings->string0[2] = 0x09;
+ strings->string0[3] = 0x04;
+
+ string_length += 4;
+
+ /* Populate info Context: */
+ ctx = (struct xdbc_context *)xdbc.dbcc_base;
+
+ ctx->info.string0 = cpu_to_le64(xdbc.string_dma);
+ ctx->info.manufacturer = cpu_to_le64(xdbc.string_dma + XDBC_MAX_STRING_LENGTH);
+ ctx->info.product = cpu_to_le64(xdbc.string_dma + XDBC_MAX_STRING_LENGTH * 2);
+ ctx->info.serial = cpu_to_le64(xdbc.string_dma + XDBC_MAX_STRING_LENGTH * 3);
+ ctx->info.length = cpu_to_le32(string_length);
+
+ /* Populate bulk out endpoint context: */
+ max_burst = DEBUG_MAX_BURST(readl(&xdbc.xdbc_reg->control));
+ ep_out = (struct xdbc_ep_context *)&ctx->out;
+
+ ep_out->ep_info1 = 0;
+ ep_out->ep_info2 = cpu_to_le32(EP_TYPE(BULK_OUT_EP) | MAX_PACKET(1024) | MAX_BURST(max_burst));
+ ep_out->deq = cpu_to_le64(xdbc.out_seg.dma | xdbc.out_ring.cycle_state);
+
+ /* Populate bulk in endpoint context: */
+ ep_in = (struct xdbc_ep_context *)&ctx->in;
+
+ ep_in->ep_info1 = 0;
+ ep_in->ep_info2 = cpu_to_le32(EP_TYPE(BULK_IN_EP) | MAX_PACKET(1024) | MAX_BURST(max_burst));
+ ep_in->deq = cpu_to_le64(xdbc.in_seg.dma | xdbc.in_ring.cycle_state);
+
+ /* Set DbC context and info registers: */
+ xdbc_write64(xdbc.dbcc_dma, &xdbc.xdbc_reg->dccp);
+
+ dev_info = cpu_to_le32((XDBC_VENDOR_ID << 16) | XDBC_PROTOCOL);
+ writel(dev_info, &xdbc.xdbc_reg->devinfo1);
+
+ dev_info = cpu_to_le32((XDBC_DEVICE_REV << 16) | XDBC_PRODUCT_ID);
+ writel(dev_info, &xdbc.xdbc_reg->devinfo2);
+
+ xdbc.in_buf = xdbc.out_buf + XDBC_MAX_PACKET;
+ xdbc.in_dma = xdbc.out_dma + XDBC_MAX_PACKET;
+}
+
+static void xdbc_do_reset_debug_port(u32 id, u32 count)
+{
+ void __iomem *ops_reg;
+ void __iomem *portsc;
+ u32 val, cap_length;
+ int i;
+
+ cap_length = readl(xdbc.xhci_base) & 0xff;
+ ops_reg = xdbc.xhci_base + cap_length;
+
+ id--;
+ for (i = id; i < (id + count); i++) {
+ portsc = ops_reg + 0x400 + i * 0x10;
+ val = readl(portsc);
+ if (!(val & PORT_CONNECT))
+ writel(val | PORT_RESET, portsc);
+ }
+}
+
+static void xdbc_reset_debug_port(void)
+{
+ u32 val, port_offset, port_count;
+ int offset = 0;
+
+ do {
+ offset = xhci_find_next_ext_cap(xdbc.xhci_base, offset, XHCI_EXT_CAPS_PROTOCOL);
+ if (!offset)
+ break;
+
+ val = readl(xdbc.xhci_base + offset);
+ if (XHCI_EXT_PORT_MAJOR(val) != 0x3)
+ continue;
+
+ val = readl(xdbc.xhci_base + offset + 8);
+ port_offset = XHCI_EXT_PORT_OFF(val);
+ port_count = XHCI_EXT_PORT_COUNT(val);
+
+ xdbc_do_reset_debug_port(port_offset, port_count);
+ } while (1);
+}
+
+static void
+xdbc_queue_trb(struct xdbc_ring *ring, u32 field1, u32 field2, u32 field3, u32 field4)
+{
+ struct xdbc_trb *trb, *link_trb;
+
+ trb = ring->enqueue;
+ trb->field[0] = cpu_to_le32(field1);
+ trb->field[1] = cpu_to_le32(field2);
+ trb->field[2] = cpu_to_le32(field3);
+ trb->field[3] = cpu_to_le32(field4);
+
+ ++(ring->enqueue);
+ if (ring->enqueue >= &ring->segment->trbs[TRBS_PER_SEGMENT - 1]) {
+ link_trb = ring->enqueue;
+ if (ring->cycle_state)
+ link_trb->field[3] |= cpu_to_le32(TRB_CYCLE);
+ else
+ link_trb->field[3] &= cpu_to_le32(~TRB_CYCLE);
+
+ ring->enqueue = ring->segment->trbs;
+ ring->cycle_state ^= 1;
+ }
+}
+
+static void xdbc_ring_doorbell(int target)
+{
+ writel(DOOR_BELL_TARGET(target), &xdbc.xdbc_reg->doorbell);
+}
+
+static int xdbc_start(void)
+{
+ u32 ctrl, status;
+ int ret;
+
+ ctrl = readl(&xdbc.xdbc_reg->control);
+ writel(ctrl | CTRL_DBC_ENABLE | CTRL_PORT_ENABLE, &xdbc.xdbc_reg->control);
+ ret = handshake(&xdbc.xdbc_reg->control, CTRL_DBC_ENABLE, CTRL_DBC_ENABLE, 100000, 100);
+ if (ret) {
+ xdbc_trace("failed to initialize hardware\n");
+ return ret;
+ }
+
+ /* Reset port to avoid bus hang: */
+ if (xdbc.vendor == PCI_VENDOR_ID_INTEL)
+ xdbc_reset_debug_port();
+
+ /* Wait for port connection: */
+ ret = handshake(&xdbc.xdbc_reg->portsc, PORTSC_CONN_STATUS, PORTSC_CONN_STATUS, 5000000, 100);
+ if (ret) {
+ xdbc_trace("waiting for connection timed out\n");
+ return ret;
+ }
+
+ /* Wait for debug device to be configured: */
+ ret = handshake(&xdbc.xdbc_reg->control, CTRL_DBC_RUN, CTRL_DBC_RUN, 5000000, 100);
+ if (ret) {
+ xdbc_trace("waiting for device configuration timed out\n");
+ return ret;
+ }
+
+ /* Check port number: */
+ status = readl(&xdbc.xdbc_reg->status);
+ if (!DCST_DEBUG_PORT(status)) {
+ xdbc_trace("invalid root hub port number\n");
+ return -ENODEV;
+ }
+
+ xdbc.port_number = DCST_DEBUG_PORT(status);
+
+ xdbc_trace("DbC is running now, control 0x%08x port ID %d\n",
+ readl(&xdbc.xdbc_reg->control), xdbc.port_number);
+
+ return 0;
+}
+
+static int xdbc_bulk_transfer(void *data, int size, bool read)
+{
+ struct xdbc_ring *ring;
+ struct xdbc_trb *trb;
+ u32 length, control;
+ u32 cycle;
+ u64 addr;
+
+ if (size > XDBC_MAX_PACKET) {
+ xdbc_trace("bad parameter, size %d\n", size);
+ return -EINVAL;
+ }
+
+ if (!(xdbc.flags & XDBC_FLAGS_INITIALIZED) ||
+ !(xdbc.flags & XDBC_FLAGS_CONFIGURED) ||
+ (!read && (xdbc.flags & XDBC_FLAGS_OUT_STALL)) ||
+ (read && (xdbc.flags & XDBC_FLAGS_IN_STALL))) {
+
+ xdbc_trace("connection not ready, flags %08x\n", xdbc.flags);
+ return -EIO;
+ }
+
+ ring = (read ? &xdbc.in_ring : &xdbc.out_ring);
+ trb = ring->enqueue;
+ cycle = ring->cycle_state;
+ length = TRB_LEN(size);
+ control = TRB_TYPE(TRB_NORMAL) | TRB_IOC;
+
+ if (cycle)
+ control &= cpu_to_le32(~TRB_CYCLE);
+ else
+ control |= cpu_to_le32(TRB_CYCLE);
+
+ if (read) {
+ memset(xdbc.in_buf, 0, XDBC_MAX_PACKET);
+ addr = xdbc.in_dma;
+ xdbc.flags |= XDBC_FLAGS_IN_PROCESS;
+ } else {
+ memset(xdbc.out_buf, 0, XDBC_MAX_PACKET);
+ memcpy(xdbc.out_buf, data, size);
+ addr = xdbc.out_dma;
+ xdbc.flags |= XDBC_FLAGS_OUT_PROCESS;
+ }
+
+ xdbc_queue_trb(ring, lower_32_bits(addr), upper_32_bits(addr), length, control);
+
+ /*
+ * Add a barrier between writes of trb fields and flipping
+ * the cycle bit:
+ */
+ wmb();
+ if (cycle)
+ trb->field[3] |= cpu_to_le32(cycle);
+ else
+ trb->field[3] &= cpu_to_le32(~TRB_CYCLE);
+
+ xdbc_ring_doorbell(read ? IN_EP_DOORBELL : OUT_EP_DOORBELL);
+
+ return size;
+}
+
+static int xdbc_handle_external_reset(void)
+{
+ int ret = 0;
+
+ xdbc.flags = 0;
+ writel(0, &xdbc.xdbc_reg->control);
+ ret = handshake(&xdbc.xdbc_reg->control, CTRL_DBC_ENABLE, 0, 100000, 10);
+ if (ret)
+ goto reset_out;
+
+ xdbc_mem_init();
+
+ ret = xdbc_start();
+ if (ret < 0)
+ goto reset_out;
+
+ xdbc_trace("dbc recovered\n");
+
+ xdbc.flags |= XDBC_FLAGS_INITIALIZED | XDBC_FLAGS_CONFIGURED;
+
+ xdbc_bulk_transfer(NULL, XDBC_MAX_PACKET, true);
+
+ return 0;
+
+reset_out:
+ xdbc_trace("failed to recover from external reset\n");
+ return ret;
+}
+
+static int __init xdbc_early_setup(void)
+{
+ int ret;
+
+ writel(0, &xdbc.xdbc_reg->control);
+ ret = handshake(&xdbc.xdbc_reg->control, CTRL_DBC_ENABLE, 0, 100000, 100);
+ if (ret)
+ return ret;
+
+ /* Allocate the table page: */
+ xdbc.table_base = xdbc_get_page(&xdbc.table_dma);
+ if (!xdbc.table_base)
+ return -ENOMEM;
+
+ /* Get and store the transfer buffer: */
+ xdbc.out_buf = xdbc_get_page(&xdbc.out_dma);
+ if (!xdbc.out_buf)
+ return -ENOMEM;
+
+ /* Allocate the event ring: */
+ ret = xdbc_alloc_ring(&xdbc.evt_seg, &xdbc.evt_ring);
+ if (ret < 0)
+ return ret;
+
+ /* Allocate IN/OUT endpoint transfer rings: */
+ ret = xdbc_alloc_ring(&xdbc.in_seg, &xdbc.in_ring);
+ if (ret < 0)
+ return ret;
+
+ ret = xdbc_alloc_ring(&xdbc.out_seg, &xdbc.out_ring);
+ if (ret < 0)
+ return ret;
+
+ xdbc_mem_init();
+
+ ret = xdbc_start();
+ if (ret < 0) {
+ writel(0, &xdbc.xdbc_reg->control);
+ return ret;
+ }
+
+ xdbc.flags |= XDBC_FLAGS_INITIALIZED | XDBC_FLAGS_CONFIGURED;
+
+ xdbc_bulk_transfer(NULL, XDBC_MAX_PACKET, true);
+
+ return 0;
+}
+
+int __init early_xdbc_parse_parameter(char *s)
+{
+ unsigned long dbgp_num = 0;
+ u32 bus, dev, func, offset;
+ int ret;
+
+ if (!early_pci_allowed())
+ return -EPERM;
+
+ if (strstr(s, "keep"))
+ early_console_keep = true;
+
+ if (xdbc.xdbc_reg)
+ return 0;
+
+ if (*s && kstrtoul(s, 0, &dbgp_num))
+ dbgp_num = 0;
+
+ pr_notice("dbgp_num: %lu\n", dbgp_num);
+
+ /* Locate the host controller: */
+ ret = xdbc_find_dbgp(dbgp_num, &bus, &dev, &func);
+ if (ret) {
+ pr_notice("failed to locate xhci host\n");
+ return -ENODEV;
+ }
+
+ xdbc.vendor = read_pci_config_16(bus, dev, func, PCI_VENDOR_ID);
+ xdbc.device = read_pci_config_16(bus, dev, func, PCI_DEVICE_ID);
+ xdbc.bus = bus;
+ xdbc.dev = dev;
+ xdbc.func = func;
+
+ /* Map the IO memory: */
+ xdbc.xhci_base = xdbc_map_pci_mmio(bus, dev, func);
+ if (!xdbc.xhci_base)
+ return -EINVAL;
+
+ /* Locate DbC registers: */
+ offset = xhci_find_next_ext_cap(xdbc.xhci_base, 0, XHCI_EXT_CAPS_DEBUG);
+ if (!offset) {
+ pr_notice("xhci host doesn't support debug capability\n");
+ early_iounmap(xdbc.xhci_base, xdbc.xhci_length);
+ xdbc.xhci_base = NULL;
+ xdbc.xhci_length = 0;
+
+ return -ENODEV;
+ }
+ xdbc.xdbc_reg = (struct xdbc_regs __iomem *)(xdbc.xhci_base + offset);
+
+ return 0;
+}
+
+int __init early_xdbc_setup_hardware(void)
+{
+ int ret;
+
+ if (!xdbc.xdbc_reg)
+ return -ENODEV;
+
+ xdbc_bios_handoff();
+
+ raw_spin_lock_init(&xdbc.lock);
+
+ ret = xdbc_early_setup();
+ if (ret) {
+ pr_notice("failed to setup the connection to host\n");
+
+ xdbc_free_ring(&xdbc.evt_ring);
+ xdbc_free_ring(&xdbc.out_ring);
+ xdbc_free_ring(&xdbc.in_ring);
+
+ if (xdbc.table_dma)
+ memblock_free(xdbc.table_dma, PAGE_SIZE);
+
+ if (xdbc.out_dma)
+ memblock_free(xdbc.out_dma, PAGE_SIZE);
+
+ xdbc.table_base = NULL;
+ xdbc.out_buf = NULL;
+ }
+
+ return ret;
+}
+
+static void xdbc_handle_port_status(struct xdbc_trb *evt_trb)
+{
+ u32 port_reg;
+
+ port_reg = readl(&xdbc.xdbc_reg->portsc);
+ if (port_reg & PORTSC_CONN_CHANGE) {
+ xdbc_trace("connect status change event\n");
+
+ /* Check whether cable unplugged: */
+ if (!(port_reg & PORTSC_CONN_STATUS)) {
+ xdbc.flags = 0;
+ xdbc_trace("cable unplugged\n");
+ }
+ }
+
+ if (port_reg & PORTSC_RESET_CHANGE)
+ xdbc_trace("port reset change event\n");
+
+ if (port_reg & PORTSC_LINK_CHANGE)
+ xdbc_trace("port link status change event\n");
+
+ if (port_reg & PORTSC_CONFIG_CHANGE)
+ xdbc_trace("config error change\n");
+
+ /* Write back the value to clear RW1C bits: */
+ writel(port_reg, &xdbc.xdbc_reg->portsc);
+}
+
+static void xdbc_handle_tx_event(struct xdbc_trb *evt_trb)
+{
+ u32 comp_code;
+ int ep_id;
+
+ comp_code = GET_COMP_CODE(le32_to_cpu(evt_trb->field[2]));
+ ep_id = TRB_TO_EP_ID(le32_to_cpu(evt_trb->field[3]));
+
+ switch (comp_code) {
+ case COMP_SUCCESS:
+ case COMP_SHORT_PACKET:
+ break;
+ case COMP_TRB_ERROR:
+ case COMP_BABBLE_DETECTED_ERROR:
+ case COMP_USB_TRANSACTION_ERROR:
+ case COMP_STALL_ERROR:
+ default:
+ if (ep_id == XDBC_EPID_OUT)
+ xdbc.flags |= XDBC_FLAGS_OUT_STALL;
+ if (ep_id == XDBC_EPID_IN)
+ xdbc.flags |= XDBC_FLAGS_IN_STALL;
+
+ xdbc_trace("endpoint %d stalled\n", ep_id);
+ break;
+ }
+
+ if (ep_id == XDBC_EPID_IN) {
+ xdbc.flags &= ~XDBC_FLAGS_IN_PROCESS;
+ xdbc_bulk_transfer(NULL, XDBC_MAX_PACKET, true);
+ } else if (ep_id == XDBC_EPID_OUT) {
+ xdbc.flags &= ~XDBC_FLAGS_OUT_PROCESS;
+ } else {
+ xdbc_trace("invalid endpoint id %d\n", ep_id);
+ }
+}
+
+static void xdbc_handle_events(void)
+{
+ struct xdbc_trb *evt_trb;
+ bool update_erdp = false;
+ u32 reg;
+ u8 cmd;
+
+ cmd = read_pci_config_byte(xdbc.bus, xdbc.dev, xdbc.func, PCI_COMMAND);
+ if (!(cmd & PCI_COMMAND_MASTER)) {
+ cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ write_pci_config_byte(xdbc.bus, xdbc.dev, xdbc.func, PCI_COMMAND, cmd);
+ }
+
+ if (!(xdbc.flags & XDBC_FLAGS_INITIALIZED))
+ return;
+
+ /* Handle external reset events: */
+ reg = readl(&xdbc.xdbc_reg->control);
+ if (!(reg & CTRL_DBC_ENABLE)) {
+ if (xdbc_handle_external_reset()) {
+ xdbc_trace("failed to recover connection\n");
+ return;
+ }
+ }
+
+ /* Handle configure-exit event: */
+ reg = readl(&xdbc.xdbc_reg->control);
+ if (reg & CTRL_DBC_RUN_CHANGE) {
+ writel(reg, &xdbc.xdbc_reg->control);
+ if (reg & CTRL_DBC_RUN)
+ xdbc.flags |= XDBC_FLAGS_CONFIGURED;
+ else
+ xdbc.flags &= ~XDBC_FLAGS_CONFIGURED;
+ }
+
+ /* Handle endpoint stall event: */
+ reg = readl(&xdbc.xdbc_reg->control);
+ if (reg & CTRL_HALT_IN_TR) {
+ xdbc.flags |= XDBC_FLAGS_IN_STALL;
+ } else {
+ xdbc.flags &= ~XDBC_FLAGS_IN_STALL;
+ if (!(xdbc.flags & XDBC_FLAGS_IN_PROCESS))
+ xdbc_bulk_transfer(NULL, XDBC_MAX_PACKET, true);
+ }
+
+ if (reg & CTRL_HALT_OUT_TR)
+ xdbc.flags |= XDBC_FLAGS_OUT_STALL;
+ else
+ xdbc.flags &= ~XDBC_FLAGS_OUT_STALL;
+
+ /* Handle the events in the event ring: */
+ evt_trb = xdbc.evt_ring.dequeue;
+ while ((le32_to_cpu(evt_trb->field[3]) & TRB_CYCLE) == xdbc.evt_ring.cycle_state) {
+ /*
+ * Add a barrier between reading the cycle flag and any
+ * reads of the event's flags/data below:
+ */
+ rmb();
+
+ switch ((le32_to_cpu(evt_trb->field[3]) & TRB_TYPE_BITMASK)) {
+ case TRB_TYPE(TRB_PORT_STATUS):
+ xdbc_handle_port_status(evt_trb);
+ break;
+ case TRB_TYPE(TRB_TRANSFER):
+ xdbc_handle_tx_event(evt_trb);
+ break;
+ default:
+ break;
+ }
+
+ ++(xdbc.evt_ring.dequeue);
+ if (xdbc.evt_ring.dequeue == &xdbc.evt_seg.trbs[TRBS_PER_SEGMENT]) {
+ xdbc.evt_ring.dequeue = xdbc.evt_seg.trbs;
+ xdbc.evt_ring.cycle_state ^= 1;
+ }
+
+ evt_trb = xdbc.evt_ring.dequeue;
+ update_erdp = true;
+ }
+
+ /* Update event ring dequeue pointer: */
+ if (update_erdp)
+ xdbc_write64(__pa(xdbc.evt_ring.dequeue), &xdbc.xdbc_reg->erdp);
+}
+
+static int xdbc_bulk_write(const char *bytes, int size)
+{
+ int ret, timeout = 0;
+ unsigned long flags;
+
+retry:
+ if (in_nmi()) {
+ if (!raw_spin_trylock_irqsave(&xdbc.lock, flags))
+ return -EAGAIN;
+ } else {
+ raw_spin_lock_irqsave(&xdbc.lock, flags);
+ }
+
+ xdbc_handle_events();
+
+ /* Check completion of the previous request: */
+ if ((xdbc.flags & XDBC_FLAGS_OUT_PROCESS) && (timeout < 2000000)) {
+ raw_spin_unlock_irqrestore(&xdbc.lock, flags);
+ udelay(100);
+ timeout += 100;
+ goto retry;
+ }
+
+ if (xdbc.flags & XDBC_FLAGS_OUT_PROCESS) {
+ raw_spin_unlock_irqrestore(&xdbc.lock, flags);
+ xdbc_trace("previous transfer not completed yet\n");
+
+ return -ETIMEDOUT;
+ }
+
+ ret = xdbc_bulk_transfer((void *)bytes, size, false);
+ raw_spin_unlock_irqrestore(&xdbc.lock, flags);
+
+ return ret;
+}
+
+static void early_xdbc_write(struct console *con, const char *str, u32 n)
+{
+ static char buf[XDBC_MAX_PACKET];
+ int chunk, ret;
+ int use_cr = 0;
+
+ if (!xdbc.xdbc_reg)
+ return;
+ memset(buf, 0, XDBC_MAX_PACKET);
+ while (n > 0) {
+ for (chunk = 0; chunk < XDBC_MAX_PACKET && n > 0; str++, chunk++, n--) {
+
+ if (!use_cr && *str == '\n') {
+ use_cr = 1;
+ buf[chunk] = '\r';
+ str--;
+ n++;
+ continue;
+ }
+
+ if (use_cr)
+ use_cr = 0;
+ buf[chunk] = *str;
+ }
+
+ if (chunk > 0) {
+ ret = xdbc_bulk_write(buf, chunk);
+ if (ret < 0)
+ xdbc_trace("missed message {%s}\n", buf);
+ }
+ }
+}
+
+static struct console early_xdbc_console = {
+ .name = "earlyxdbc",
+ .write = early_xdbc_write,
+ .flags = CON_PRINTBUFFER,
+ .index = -1,
+};
+
+void __init early_xdbc_register_console(void)
+{
+ if (early_console)
+ return;
+
+ early_console = &early_xdbc_console;
+ if (early_console_keep)
+ early_console->flags &= ~CON_BOOT;
+ else
+ early_console->flags |= CON_BOOT;
+ register_console(early_console);
+}
+
+static void xdbc_unregister_console(void)
+{
+ if (early_xdbc_console.flags & CON_ENABLED)
+ unregister_console(&early_xdbc_console);
+}
+
+static int xdbc_scrub_function(void *ptr)
+{
+ unsigned long flags;
+
+ while (true) {
+ raw_spin_lock_irqsave(&xdbc.lock, flags);
+ xdbc_handle_events();
+
+ if (!(xdbc.flags & XDBC_FLAGS_INITIALIZED)) {
+ raw_spin_unlock_irqrestore(&xdbc.lock, flags);
+ break;
+ }
+
+ raw_spin_unlock_irqrestore(&xdbc.lock, flags);
+ schedule_timeout_interruptible(1);
+ }
+
+ xdbc_unregister_console();
+ writel(0, &xdbc.xdbc_reg->control);
+ xdbc_trace("dbc scrub function exits\n");
+
+ return 0;
+}
+
+static int __init xdbc_init(void)
+{
+ unsigned long flags;
+ void __iomem *base;
+ int ret = 0;
+ u32 offset;
+
+ if (!(xdbc.flags & XDBC_FLAGS_INITIALIZED))
+ return 0;
+
+ /*
+ * It's time to shut down the DbC, so that the debug
+ * port can be reused by the host controller:
+ */
+ if (early_xdbc_console.index == -1 ||
+ (early_xdbc_console.flags & CON_BOOT)) {
+ xdbc_trace("hardware not used anymore\n");
+ goto free_and_quit;
+ }
+
+ base = ioremap_nocache(xdbc.xhci_start, xdbc.xhci_length);
+ if (!base) {
+ xdbc_trace("failed to remap the io address\n");
+ ret = -ENOMEM;
+ goto free_and_quit;
+ }
+
+ raw_spin_lock_irqsave(&xdbc.lock, flags);
+ early_iounmap(xdbc.xhci_base, xdbc.xhci_length);
+ xdbc.xhci_base = base;
+ offset = xhci_find_next_ext_cap(xdbc.xhci_base, 0, XHCI_EXT_CAPS_DEBUG);
+ xdbc.xdbc_reg = (struct xdbc_regs __iomem *)(xdbc.xhci_base + offset);
+ raw_spin_unlock_irqrestore(&xdbc.lock, flags);
+
+ kthread_run(xdbc_scrub_function, NULL, "%s", "xdbc");
+
+ return 0;
+
+free_and_quit:
+ xdbc_free_ring(&xdbc.evt_ring);
+ xdbc_free_ring(&xdbc.out_ring);
+ xdbc_free_ring(&xdbc.in_ring);
+ memblock_free(xdbc.table_dma, PAGE_SIZE);
+ memblock_free(xdbc.out_dma, PAGE_SIZE);
+ writel(0, &xdbc.xdbc_reg->control);
+ early_iounmap(xdbc.xhci_base, xdbc.xhci_length);
+
+ return ret;
+}
+subsys_initcall(xdbc_init);
--
To view, visit https://review.coreboot.org/c/coreboot/+/36012
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I67ab1792184cba46ef09ee944866c1ca5b810d7c
Gerrit-Change-Number: 36012
Gerrit-PatchSet: 1
Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net>
Gerrit-MessageType: newchange
5
15
Change in coreboot[master]: soc/amd/picasso: Add bootblock
by Marshall Dawson (Code Review) 29 Apr '20
by Marshall Dawson (Code Review) 29 Apr '20
29 Apr '20
Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37490 )
Change subject: soc/amd/picasso: Add bootblock
......................................................................
soc/amd/picasso: Add bootblock
The original plan for Picasso was to always combine features of bootblock
with its romstage due to its unique way of coming out of reset. The arch
and cpu implementations for RESET_VECTOR_IN_RAM are simplified now,
allowing the option of running a more traditional bootblock, albeit in
system DRAM.
Create a new early.c file to contain the initial steps required,
regardless of whether the first stage is bootblock or eventually
romstage. Add bootblock files containing functions that lib/bootblock
expects. Modify Makefile.inc to automatically determine the BIOS image's
base and size.
Change-Id: I1d0784025f2b39f140b16f37726d4a7f36df6c6c
Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com>
---
M src/soc/amd/picasso/Kconfig
M src/soc/amd/picasso/Makefile.inc
A src/soc/amd/picasso/bootblock/bootblock.c
A src/soc/amd/picasso/bootblock/pre_c.S
A src/soc/amd/picasso/early.c
A src/soc/amd/picasso/include/soc/early.h
6 files changed, 258 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/37490/1
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 56c7da7..cbee93d 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -26,6 +26,7 @@
select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
+ select RESET_VECTOR_IN_RAM
select X86_AMD_FIXED_MTRRS
select X86_AMD_INIT_SIPI
select ACPI_AMD_HARDWARE_SLEEP_VALUES
@@ -55,10 +56,6 @@
select SSE2
select RTC
-config HAVE_BOOTBLOCK
- bool
- default n
-
config PRERAM_CBMEM_CONSOLE_SIZE
hex
default 0x1600
@@ -213,6 +210,28 @@
menu "PSP Configuration Options"
+config X86_RESET_VECTOR
+ hex
+ default 0x807fff0
+
+config C_ENV_BOOTBLOCK_SIZE
+ hex
+ default 0x80000
+
+config EARLYRAM_BSP_STACK_SIZE
+ hex
+ default 0x800
+ help
+ The amount of stack allocated to the bootstrap core before ramstage.
+
+config RAM_RESET_VECTOR_STAGE_BSS_SIZE
+ hex
+ depends on RESET_VECTOR_IN_RAM
+ default 0x50000
+ help
+ A common region of DRAM is allocated for use as .bss for all
+ pre-ramstage stages.
+
config AMDFW_OUTSIDE_CBFS
bool "The AMD firmware is outside CBFS"
default n
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc
index 76a4d70..b0cce26 100644
--- a/src/soc/amd/picasso/Makefile.inc
+++ b/src/soc/amd/picasso/Makefile.inc
@@ -37,8 +37,19 @@
subdirs-y += ../../../cpu/x86/pae
subdirs-y += ../../../cpu/x86/smm
+bootblock-y += bootblock/pre_c.S
+bootblock-y += bootblock/bootblock.c
+bootblock-y += early.c
+bootblock-y += southbridge.c
+bootblock-y += i2c.c
+bootblock-$(CONFIG_PICASSO_UART) += uart.c
+bootblock-y += tsc_freq.c
+bootblock-y += gpio.c
+bootblock-y += smi_util.c
+
romstage-y += i2c.c
romstage-y += romstage.c
+romstage-y += early.c
romstage-y += gpio.c
romstage-y += pmutil.c
romstage-y += reset.c
@@ -56,12 +67,6 @@
verstage-$(CONFIG_PICASSO_UART) += uart.c
verstage-y += tsc_freq.c
-postcar-y += monotonic_timer.c
-postcar-$(CONFIG_PICASSO_UART) += uart.c
-postcar-y += memmap.c
-postcar-$(CONFIG_VBOOT_MEASURED_BOOT) += i2c.c
-postcar-y += tsc_freq.c
-
ramstage-y += i2c.c
ramstage-y += chip.c
ramstage-y += cpu.c
@@ -204,8 +209,15 @@
# type = 0x62
PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img
-PSP_BIOSBIN_DEST=$(CONFIG_ROMSTAGE_ADDR)
-PSP_BIOSBIN_SIZE=$(CONFIG_RAM_RESET_VECTOR_STAGE_SIZE)
+PSP_ELF_FILE=$(obj)/cbfs/fallback/bootblock.elf
+PSP_BIOSBIN_SIZE=$(CONFIG_C_ENV_BOOTBLOCK_SIZE)
+PSP_BIOSBIN_DEST=$(shell printf "%x" $(call int-subtract, $(call int-add, $(CONFIG_X86_RESET_VECTOR) 0x10) $(PSP_BIOSBIN_SIZE)))
+
+## INTERM=$(shell printf "%x" $(call int-add, $(CONFIG_X86_RESET_VECTOR) 0x10))
+## $(warning INTERM: $(INTERM))
+
+## $(warning PSP_BIOSBIN_DEST: $(CONFIG_X86_RESET_VECTOR) $(INTERM): $(PSP_BIOSBIN_DEST))
+## #$(shell printf "%d" $(CONFIG_STACK_SIZE))
# type = 0x63
PSP_APOBNV_BASE=$(CONFIG_PSP_APOB_NV_ADDRESS)
@@ -287,6 +299,12 @@
OPT_PSP_UCODE_FILE3=$(call add_opt_prefix, $(PSP_UCODE_FILE3), --instance 2 --ucode)
OPT_MP2CFG_FILE=$(call add_opt_prefix, $(PSP_MP2CFG_FILE), --mp2-config)
+$(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
+ rm -f $@
+ @printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n"
+ $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \
+ --maxsize $(PSP_BIOSBIN_SIZE)
+
$(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \
$(call strip_quotes, $(PUBSIGNEDKEY_FILE)) \
$(call strip_quotes, $(PSPBTLDR_FILE)) \
@@ -391,13 +409,6 @@
--location $(shell printf "0x%x" $(PICASSO_FWM_POSITION)) \
--output $@
-USE_BIOS_FILE=$(obj)/cbfs/fallback/romstage.elf
-$(PSP_BIOSBIN_FILE): $(obj)/cbfs/fallback/romstage.elf $(AMDCOMPRESS)
- rm -f $@
- @printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n"
- $(AMDCOMPRESS) --infile $(USE_BIOS_FILE) --outfile $@ --compress \
- --maxsize $(PSP_BIOSBIN_SIZE)
-
ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
PHONY+=add_amdfw
INTERMEDIATE+=add_amdfw
diff --git a/src/soc/amd/picasso/bootblock/bootblock.c b/src/soc/amd/picasso/bootblock/bootblock.c
new file mode 100644
index 0000000..e448e1b
--- /dev/null
+++ b/src/soc/amd/picasso/bootblock/bootblock.c
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <bootblock_common.h>
+#include <soc/early.h>
+#include <timestamp.h>
+
+asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
+{
+ amd_initmmio();
+ set_caching();
+
+ bootblock_main_with_basetime(base_timestamp);
+}
+
+void bootblock_soc_early_init(void)
+{
+ soc_pre_console_init();
+}
+
+void bootblock_soc_init(void)
+{
+ soc_post_console_init();
+}
diff --git a/src/soc/amd/picasso/bootblock/pre_c.S b/src/soc/amd/picasso/bootblock/pre_c.S
new file mode 100644
index 0000000..ccff7e6
--- /dev/null
+++ b/src/soc/amd/picasso/bootblock/pre_c.S
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <cpu/x86/post_code.h>
+
+/*
+ * on entry:
+ * mm0: BIST (ignored)
+ * mm2_mm1: timestamp at bootblock_protected_mode_entry
+ */
+
+.global bootblock_pre_c_entry
+bootblock_pre_c_entry:
+ post_code(0xa0)
+
+ movl $_eearlyram_stack, %esp
+
+ /* Align the stack and keep aligned for call to bootblock_c_entry() */
+ and $0xfffffff0, %esp
+ sub $8, %esp
+
+ movd %mm2, %eax
+ pushl %eax /* tsc[63:32] */
+ movd %mm1, %eax
+ pushl %eax /* tsc[31:0] */
+
+ post_code(0xa2)
+
+ call bootblock_c_entry
+ /* Never reached */
+
+.halt_forever:
+ post_code(POST_DEAD_CODE)
+ hlt
+ jmp .halt_forever
diff --git a/src/soc/amd/picasso/early.c b/src/soc/amd/picasso/early.c
new file mode 100644
index 0000000..7b03a62
--- /dev/null
+++ b/src/soc/amd/picasso/early.c
@@ -0,0 +1,99 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <cpu/x86/cache.h>
+#include <cpu/x86/msr.h>
+#include <cpu/amd/msr.h>
+#include <cpu/x86/mtrr.h>
+#include <cpu/amd/mtrr.h>
+#include <console/console.h>
+#include <soc/early.h>
+#include <soc/southbridge.h>
+
+void amd_initmmio(void)
+{
+ msr_t mmconf;
+
+ mmconf.hi = 0;
+ mmconf.lo = CONFIG_MMCONF_BASE_ADDRESS | MMIO_RANGE_EN
+ | fms(CONFIG_MMCONF_BUS_NUMBER) << MMIO_BUS_RANGE_SHIFT;
+ wrmsr(MMIO_CONF_BASE, mmconf);
+}
+
+static const unsigned int fixed_mtrrs[] = {
+ MTRR_FIX_64K_00000,
+ MTRR_FIX_16K_80000,
+ MTRR_FIX_16K_A0000,
+ MTRR_FIX_4K_C0000,
+ MTRR_FIX_4K_C8000,
+ MTRR_FIX_4K_D0000,
+ MTRR_FIX_4K_D8000,
+ MTRR_FIX_4K_E0000,
+ MTRR_FIX_4K_E8000,
+ MTRR_FIX_4K_F0000,
+ MTRR_FIX_4K_F8000,
+};
+
+void set_caching(void)
+{
+ msr_t deftype, syscfg, rwmem;
+ int mtrr;
+ int i;
+
+ syscfg = rdmsr(SYSCFG_MSR);
+ syscfg.lo |= SYSCFG_MSR_MtrrFixDramModEn | SYSCFG_MSR_MtrrFixDramEn
+ | SYSCFG_MSR_MtrrVarDramEn;
+ wrmsr(SYSCFG_MSR, syscfg);
+
+ /* Write all as MTRR_READ_MEM | MTRR_WRITE_MEM to send cycles to DRAM */
+ rwmem.hi = rwmem.lo = 0x18181818;
+ for (i = 0 ; i < ARRAY_SIZE(fixed_mtrrs) ; i++)
+ wrmsr(fixed_mtrrs[i], rwmem);
+
+ syscfg.lo &= ~(SYSCFG_MSR_MtrrFixDramModEn | SYSCFG_MSR_MtrrFixDramEn);
+ wrmsr(SYSCFG_MSR, syscfg);
+
+ deftype = rdmsr(MTRR_DEF_TYPE_MSR);
+ deftype.lo &= ~MTRR_DEF_TYPE_MASK;
+ deftype.lo |= MTRR_DEF_TYPE_EN | MTRR_DEF_TYPE_FIX_EN | MTRR_TYPE_UNCACHEABLE;
+ wrmsr(MTRR_DEF_TYPE_MSR, deftype);
+
+ mtrr = get_free_var_mtrr();
+ if (mtrr < 0)
+ return;
+ set_var_mtrr(mtrr, FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT);
+
+ mtrr = get_free_var_mtrr();
+ if (mtrr < 0)
+ return;
+ set_var_mtrr(mtrr, RESET_VECTOR_STAGE_BASE, RESET_VECTOR_STAGE_SIZE,
+ MTRR_TYPE_WRBACK);
+
+ enable_cache();
+}
+
+void soc_pre_console_init(void)
+{
+ sb_reset_i2c_slaves();
+ fch_pre_init();
+}
+
+void soc_post_console_init(void)
+{
+ u32 val = cpuid_eax(1);
+ printk(BIOS_DEBUG, "Family_Model: %08x\n", val);
+
+ fch_early_init();
+ i2c_soc_early_init();
+}
diff --git a/src/soc/amd/picasso/include/soc/early.h b/src/soc/amd/picasso/include/soc/early.h
new file mode 100644
index 0000000..8eb2645
--- /dev/null
+++ b/src/soc/amd/picasso/include/soc/early.h
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __PICASSO_EARLY_H__
+#define __PICASSO_EARLY_H__
+
+#define RESET_VECTOR_STAGE_TOP (CONFIG_X86_RESET_VECTOR + 0x10)
+#define RESET_VECTOR_STAGE_SIZE CONFIG_C_ENV_BOOTBLOCK_SIZE
+#define RESET_VECTOR_STAGE_BASE (RESET_VECTOR_STAGE_TOP - RESET_VECTOR_STAGE_SIZE)
+
+#if (RESET_VECTOR_STAGE_BASE & (RESET_VECTOR_STAGE_SIZE - 1))
+#error "Adjust reset vector and program size for better MTRR coverage"
+#endif
+
+void amd_initmmio(void);
+void set_caching(void);
+void soc_pre_console_init(void);
+void soc_post_console_init(void);
+
+#endif /* __PICASSO_EARLY_H__ */
--
To view, visit https://review.coreboot.org/c/coreboot/+/37490
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I1d0784025f2b39f140b16f37726d4a7f36df6c6c
Gerrit-Change-Number: 37490
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-MessageType: newchange
9
38
Change in coreboot[master]: [WIP] arch/x86: Add linker script for early DRAM
by Kyösti Mälkki (Code Review) 29 Apr '20
by Kyösti Mälkki (Code Review) 29 Apr '20
29 Apr '20
Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35035 )
Change subject: [WIP] arch/x86: Add linker script for early DRAM
......................................................................
[WIP] arch/x86: Add linker script for early DRAM
Change-Id: I9c084ff6fdcf7e9154436f038705e8679daea780
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
A src/arch/x86/early_dram.ld
1 file changed, 50 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/35035/1
diff --git a/src/arch/x86/early_dram.ld b/src/arch/x86/early_dram.ld
new file mode 100644
index 0000000..24b9551
--- /dev/null
+++ b/src/arch/x86/early_dram.ld
@@ -0,0 +1,50 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2006 Advanced Micro Devices, Inc.
+ * Copyright (C) 2008-2010 coresystems GmbH
+ * Copyright 2015 Google Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* This file is included inside a SECTIONS block */
+. = CONFIG_DCACHE_RAM_BASE;
+.car.data . (NOLOAD) : {
+ _car_region_start = . ;
+
+ /* Stack for CAR stages. Since it persists across all stages that
+ * use CAR it can be reused. The chipset/SoC is expected to provide
+ * the stack size. */
+#if CONFIG(C_ENVIRONMENT_BOOTBLOCK)
+ _car_stack_start = .;
+ . += CONFIG_DCACHE_BSP_STACK_SIZE;
+ _car_stack_end = .;
+#endif
+ /* The pre-ram cbmem console as well as the timestamp region are fixed
+ * in size. Therefore place them above the car global section so that
+ * multiple stages (romstage and verstage) have a consistent
+ * link address of these shared objects. */
+ PRERAM_CBMEM_CONSOLE(., CONFIG_PRERAM_CBMEM_CONSOLE_SIZE)
+
+ TIMESTAMP(., 0x200)
+
+ _car_ehci_dbg_info_start = .;
+ /* Reserve sizeof(struct ehci_dbg_info). */
+ . += 80;
+ _car_ehci_dbg_info_end = .;
+
+ _car_region_end = . + CONFIG_DCACHE_RAM_SIZE - (. - _car_region_start);
+}
+
+_bogus = ASSERT((CONFIG_DCACHE_RAM_SIZE == 0) || (SIZEOF(.car.data) <= CONFIG_DCACHE_RAM_SIZE), "Cache as RAM area is too full");
+#if !CONFIG(CAR_GLOBAL_MIGRATION)
+_bogus3 = ASSERT(CONFIG_DCACHE_BSP_STACK_SIZE > 0x0, "BSP stack size not configured");
+#endif
--
To view, visit https://review.coreboot.org/c/coreboot/+/35035
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9c084ff6fdcf7e9154436f038705e8679daea780
Gerrit-Change-Number: 35035
Gerrit-PatchSet: 1
Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Gerrit-MessageType: newchange
10
109
Change in coreboot[master]: vc/amd/fsp/picasso: Update UPD files
by Marshall Dawson (Code Review) 29 Apr '20
by Marshall Dawson (Code Review) 29 Apr '20
29 Apr '20
Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38696 )
Change subject: vc/amd/fsp/picasso: Update UPD files
......................................................................
vc/amd/fsp/picasso: Update UPD files
Include a more recent set of files from a current FSP build. These
are automatically generated.
Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Change-Id: I6428f618afc2a1cf1c35e93e00f905f90b2cd86a
---
M src/vendorcode/amd/fsp/picasso/FspmUpd.h
M src/vendorcode/amd/fsp/picasso/FspsUpd.h
2 files changed, 52 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/38696/1
diff --git a/src/vendorcode/amd/fsp/picasso/FspmUpd.h b/src/vendorcode/amd/fsp/picasso/FspmUpd.h
index aa85adc..b8617f8 100644
--- a/src/vendorcode/amd/fsp/picasso/FspmUpd.h
+++ b/src/vendorcode/amd/fsp/picasso/FspmUpd.h
@@ -21,7 +21,45 @@
/** Offset 0x004C**/ uint32_t serial_port_stride;
/** Offset 0x0050**/ uint32_t serial_port_baudrate;
/** Offset 0x0054**/ uint32_t serial_port_refclk;
- /** Offset 0x0058**/ uint8_t UnusedUpdSpace0[168];
+ /** Offset 0x0058**/ uint32_t telemetry_vddcr_vdd_slope;
+ /** Offset 0x005C**/ uint32_t telemetry_vddcr_vdd_slope2;
+ /** Offset 0x0060**/ uint32_t telemetry_vddcr_vdd_slope3;
+ /** Offset 0x0064**/ uint32_t telemetry_vddcr_vdd_slope4;
+ /** Offset 0x0068**/ uint32_t telemetry_vddcr_vdd_slope5;
+ /** Offset 0x006C**/ uint32_t telemetry_vddcr_vdd_offset;
+ /** Offset 0x0070**/ uint32_t telemetry_vddcr_soc_slope;
+ /** Offset 0x0074**/ uint32_t telemetry_vddcr_soc_offset;
+ /** Offset 0x0078**/ uint8_t aa_mode_en;
+ /** Offset 0x0079**/ uint8_t reserved2;
+ /** Offset 0x007A**/ uint8_t reserved3;
+ /** Offset 0x007B**/ uint8_t reserved4;
+ /** Offset 0x007C**/ uint32_t fast_ppt_limit;
+ /** Offset 0x0080**/ uint32_t slow_ppt_limit;
+ /** Offset 0x0084**/ uint32_t slow_ppt_time_constant;
+ /** Offset 0x0088**/ uint32_t psi0_current_limit;
+ /** Offset 0x008C**/ uint32_t psi0_soc_current_limit;
+ /** Offset 0x0090**/ uint32_t thermctl_limit;
+ /** Offset 0x0094**/ uint32_t vrm_maximum_current_limit;
+ /** Offset 0x0098**/ uint32_t vrm_soc_maximum_current_limit;
+ /** Offset 0x009C**/ uint32_t sustained_power_limit;
+ /** Offset 0x00A0**/ uint32_t stapm_time_constant;
+ /** Offset 0x00A4**/ uint32_t prochot_l_deassertion_ramp_time;
+ /** Offset 0x00A8**/ uint32_t vrm_current_limit;
+ /** Offset 0x00AC**/ uint32_t vrm_soc_current_limit;
+ /** Offset 0x00B0**/ uint32_t vddcr_soc_voltage_margin;
+ /** Offset 0x00B4**/ uint32_t vddcr_vdd_voltage_margin;
+ /** Offset 0x00B8**/ uint32_t smu_feature_control_defines;
+ /** Offset 0x00BC**/ uint32_t smu_feature_control_defines_ext;
+ /** Offset 0x00C0**/ uint8_t sb_tsi_alert_comparator_mode_en;
+ /** Offset 0x00C1**/ uint8_t system_config;
+ /** Offset 0x00C2**/ uint8_t core_dldo_bypass;
+ /** Offset 0x00C3**/ uint8_t min_soc_vid_offset;
+ /** Offset 0x00C4**/ uint8_t aclk_dpm0_freq_400MHz;
+ /** Offset 0x00C5**/ uint8_t reserved5;
+ /** Offset 0x00C6**/ uint8_t reserved6;
+ /** Offset 0x00C7**/ uint8_t reserved7;
+ /** Offset 0x00C8**/ uint32_t tseg_size;
+ /** Offset 0x00CC**/ uint8_t UnusedUpdSpace0[52];
/** Offset 0x0100**/ uint16_t Reserved100;
/** Offset 0x0102**/ uint16_t UpdTerminator;
} FSP_M_CONFIG;
diff --git a/src/vendorcode/amd/fsp/picasso/FspsUpd.h b/src/vendorcode/amd/fsp/picasso/FspsUpd.h
index 5a15435..58ca9ef 100644
--- a/src/vendorcode/amd/fsp/picasso/FspsUpd.h
+++ b/src/vendorcode/amd/fsp/picasso/FspsUpd.h
@@ -13,22 +13,19 @@
typedef struct {
- /** Offset 0x0020**/ uint32_t pcie_port0_topology;
- /** Offset 0x0024**/ uint32_t pcie_port1_topology;
- /** Offset 0x0028**/ uint32_t pcie_port2_topology;
- /** Offset 0x002C**/ uint32_t pcie_port3_topology;
- /** Offset 0x0030**/ uint32_t pcie_port4_topology;
- /** Offset 0x0034**/ uint32_t pcie_port5_topology;
- /** Offset 0x0038**/ uint32_t pcie_port6_topology;
- /** Offset 0x003C**/ uint32_t pcie_sata_topology;
- /** Offset 0x0040**/ uint32_t pcie_xgbe1_topology;
- /** Offset 0x0044**/ uint32_t pcie_xgbe2_topology;
- /** Offset 0x0048**/ uint32_t dp0_connector_type;
- /** Offset 0x004C**/ uint32_t dp1_connector_type;
- /** Offset 0x0050**/ uint32_t dp2_connector_type;
- /** Offset 0x0054**/ uint32_t dp3_connector_type;
- /** Offset 0x0058**/ uint32_t emmc0_mode;
- /** Offset 0x005C**/ uint8_t UnusedUpdSpace0[196];
+ /** Offset 0x0020**/ uint32_t emmc0_mode;
+ /** Offset 0x0024**/ uint8_t reserved_for_later[12];
+ /** Offset 0x0030**/ uint8_t dxio_descriptor0[16];
+ /** Offset 0x0040**/ uint8_t dxio_descriptor1[16];
+ /** Offset 0x0050**/ uint8_t dxio_descriptor2[16];
+ /** Offset 0x0060**/ uint8_t dxio_descriptor3[16];
+ /** Offset 0x0070**/ uint8_t dxio_descriptor4[16];
+ /** Offset 0x0080**/ uint8_t dxio_descriptor5[16];
+ /** Offset 0x0090**/ uint32_t ddi_descriptor0;
+ /** Offset 0x0094**/ uint32_t ddi_descriptor1;
+ /** Offset 0x0098**/ uint32_t ddi_descriptor2;
+ /** Offset 0x009C**/ uint32_t ddi_descriptor3;
+ /** Offset 0x00A0**/ uint8_t UnusedUpdSpace0[128];
/** Offset 0x0120**/ uint16_t UpdTerminator;
} FSP_S_CONFIG;
--
To view, visit https://review.coreboot.org/c/coreboot/+/38696
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I6428f618afc2a1cf1c35e93e00f905f90b2cd86a
Gerrit-Change-Number: 38696
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-MessageType: newchange
4
18
Change in coreboot[master]: src/soc/intel/common/block/cse: Add funtion to send CSE reset msg
by Sridhar Siricilla (Code Review) 28 Apr '20
by Sridhar Siricilla (Code Review) 28 Apr '20
28 Apr '20
Hello Rizwan Qureshi,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/35227
to review the following change.
Change subject: src/soc/intel/common/block/cse: Add funtion to send CSE reset msg
......................................................................
src/soc/intel/common/block/cse: Add funtion to send CSE reset msg
Add send_heci_reset_req_message() to send reset request to CSE. This
reset can be GLOBAL RESET/HOST ONLY RESET/CSE ONLY RESET.
Change-Id: I29b560dde1549b8268163e18d9b1bbbf1935d54a
Signed-off-by: sridhar <sridhar.siricilla(a)intel.com>
Signed-off-by: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
---
M src/soc/intel/common/block/cse/cse.c
M src/soc/intel/common/block/include/intelblocks/cse.h
2 files changed, 70 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/35227/1
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index 7697a4a..9585a09 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -69,10 +69,18 @@
#define HECI_OP_MODE_SEC_OVERRIDE 5
+/* Global Reset Command ID */
+#define MKHI_GLOBAL_RESET_REQ 0xb
+#define MKHI_GROUP_ID_CBM 0
+
+/* RST Origin */
+#define GR_ORIGIN_BIOS_POST 2
+
static struct cse_device {
uintptr_t sec_bar;
} g_cse;
+/* HFSTS1 */
union me_hfs {
u32 data;
struct {
@@ -595,6 +603,54 @@
return reg;
}
+/*
+ * Sends GLOBAL_RESET_REQ cmd to CSE.The reset can be GLOBAL_RESET/
+ * HOST_RESET_ONLY/HOST_RESET_ONLY.
+ */
+int send_heci_reset_req_message(u8 rst_type)
+{
+ int status;
+ struct reset_reply {
+ u8 group_id;
+ u8 command;
+ u8 reserved;
+ u8 result;
+ } __packed reply;
+ struct reset_message {
+ u8 group_id;
+ u8 cmd;
+ u8 reserved;
+ u8 result;
+ u8 req_origin;
+ u8 reset_type;
+ } __packed;
+ struct reset_message msg = {
+ .group_id = MKHI_GROUP_ID_CBM,
+ .cmd = MKHI_GLOBAL_RESET_REQ,
+ .req_origin = GR_ORIGIN_BIOS_POST,
+ .reset_type = rst_type
+ };
+ size_t reply_size;
+
+ if (!((rst_type == GLOBAL_RESET)
+ || (rst_type == HOST_RESET_ONLY)
+ || (rst_type == CSE_RESET_ONLY))) {
+ return -1;
+ }
+
+ heci_reset();
+
+ reply_size = sizeof(reply);
+ memset(&reply, 0, reply_size);
+
+ printk(BIOS_ERR, "HECI Global Reset(type=%d) Command\n", rst_type);
+ status = heci_send_receive(&msg, sizeof(msg), &reply, &reply_size);
+ if (status != 1)
+ return -1;
+
+ printk(BIOS_DEBUG, "HECI GBL RST success!\n");
+ return 0;
+}
#if ENV_RAMSTAGE
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h
index 82e07cf..ceeca88e 100644
--- a/src/soc/intel/common/block/include/intelblocks/cse.h
+++ b/src/soc/intel/common/block/include/intelblocks/cse.h
@@ -70,6 +70,13 @@
*/
int wait_cse_rec(void);
+/*
+ * Sends GLOBAL_RESET_REQ cmd to CSE.The reset can be
+ * GLOBAL_RESET/HOST_RESET_ONLY/HOST_RESET_ONLY.
+ * Returns -1 on failure a 0 on success.
+ */
+int send_heci_reset_req_message(u8 rst_type);
+
#define BIOS_HOST_ADDR 0x00
#define HECI_MKHI_ADDR 0x07
@@ -83,4 +90,11 @@
PCI_ME_HFSTS6 = 0x6C,
};
+
+/* Command GLOBAL_RESET_REQ Reset Types */
+#define GLOBAL_RESET 1
+#define HOST_RESET_ONLY 2
+#define CSE_RESET_ONLY 3
+
+
#endif // SOC_INTEL_COMMON_MSR_H
--
To view, visit https://review.coreboot.org/c/coreboot/+/35227
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I29b560dde1549b8268163e18d9b1bbbf1935d54a
Gerrit-Change-Number: 35227
Gerrit-PatchSet: 1
Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
Gerrit-MessageType: newchange
3
14
Change in coreboot[master]: [WIP] mb/**/hda_verb.{c,h}: Clean up remaining files
by Angel Pons (Code Review) 28 Apr '20
by Angel Pons (Code Review) 28 Apr '20
28 Apr '20
Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37840 )
Change subject: [WIP] mb/**/hda_verb.{c,h}: Clean up remaining files
......................................................................
[WIP] mb/**/hda_verb.{c,h}: Clean up remaining files
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ @
@ DO NOT MERGE AS-IS! @
@ @
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
This is unreviewably large. Also, there are functional changes on a few
files, which would need to be factored out.
Change-Id: I9a3bffcb0fa0de35480a767a1e3aa323e0591198
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
M src/mainboard/amd/padmelon/hda_verb.c
M src/mainboard/apple/macbook21/hda_verb.c
M src/mainboard/asrock/g41c-gs/hda_verb.c
M src/mainboard/asus/p5gc-mx/hda_verb.c
M src/mainboard/asus/p5qc/hda_verb.c
M src/mainboard/asus/p5ql-em/hda_verb.c
M src/mainboard/asus/p5qpl-am/hda_verb.c
M src/mainboard/facebook/fbg1701/hda_verb.c
M src/mainboard/foxconn/d41s/hda_verb.c
M src/mainboard/foxconn/g41s-k/hda_verb.c
M src/mainboard/getac/p470/hda_verb.c
M src/mainboard/gigabyte/ga-945gcm-s2l/hda_verb.c
M src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/include/variant/hda_verb.h
M src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75m-d3v/include/variant/hda_verb.h
M src/mainboard/gigabyte/ga-g41m-es2l/hda_verb.c
M src/mainboard/google/auron/variants/auron_paine/include/variant/hda_verb.h
M src/mainboard/google/auron/variants/auron_yuna/include/variant/hda_verb.h
M src/mainboard/google/auron/variants/buddy/include/variant/hda_verb.h
M src/mainboard/google/auron/variants/gandof/include/variant/hda_verb.h
M src/mainboard/google/auron/variants/lulu/include/variant/hda_verb.h
M src/mainboard/google/beltino/variants/mccloud/hda_verb.c
M src/mainboard/google/beltino/variants/monroe/hda_verb.c
M src/mainboard/google/beltino/variants/panther/hda_verb.c
M src/mainboard/google/beltino/variants/tricky/hda_verb.c
M src/mainboard/google/beltino/variants/zako/hda_verb.c
M src/mainboard/google/butterfly/hda_verb.c
M src/mainboard/google/drallion/variants/drallion/include/variant/hda_verb.h
M src/mainboard/google/jecht/hda_verb.c
M src/mainboard/google/link/hda_verb.c
M src/mainboard/google/parrot/hda_verb.c
M src/mainboard/google/sarien/variants/arcada/include/variant/hda_verb.h
M src/mainboard/google/sarien/variants/sarien/include/variant/hda_verb.h
M src/mainboard/google/slippy/variants/falco/hda_verb.c
M src/mainboard/google/slippy/variants/leon/hda_verb.c
M src/mainboard/google/slippy/variants/peppy/hda_verb.c
M src/mainboard/google/slippy/variants/wolf/hda_verb.c
M src/mainboard/google/stout/hda_verb.c
M src/mainboard/hp/8470p/hda_verb.c
M src/mainboard/intel/baskingridge/hda_verb.c
M src/mainboard/intel/coffeelake_rvp/variants/cfl_h/include/variant/hda_verb.h
M src/mainboard/intel/coffeelake_rvp/variants/cfl_s/include/variant/hda_verb.h
M src/mainboard/intel/coffeelake_rvp/variants/cml_u/include/variant/hda_verb.h
M src/mainboard/intel/coffeelake_rvp/variants/whl_u/include/variant/hda_verb.h
M src/mainboard/intel/d510mo/hda_verb.c
M src/mainboard/intel/dg41wv/hda_verb.c
M src/mainboard/intel/dg43gt/hda_verb.c
M src/mainboard/intel/emeraldlake2/hda_verb.c
M src/mainboard/intel/icelake_rvp/variants/baseboard/include/baseboard/hda_verb.h
M src/mainboard/intel/kblrvp/variants/rvp11/include/variant/hda_verb.h
M src/mainboard/intel/kblrvp/variants/rvp3/include/variant/hda_verb.h
M src/mainboard/intel/kblrvp/variants/rvp7/include/variant/hda_verb.h
M src/mainboard/intel/wtm2/hda_verb.c
M src/mainboard/kontron/ktqm77/hda_verb.c
M src/mainboard/lenovo/t400/hda_verb.c
M src/mainboard/lenovo/t420/hda_verb.c
M src/mainboard/lenovo/t420s/hda_verb.c
M src/mainboard/lenovo/t520/hda_verb.c
M src/mainboard/lenovo/thinkcentre_a58/hda_verb.c
M src/mainboard/lenovo/x131e/hda_verb.c
M src/mainboard/lenovo/x200/hda_verb.c
M src/mainboard/lenovo/x60/hda_verb.c
M src/mainboard/purism/librem_bdw/hda_verb.c
M src/mainboard/purism/librem_skl/hda_verb.c
M src/mainboard/razer/blade_stealth_kbl/hda_verb.c
M src/mainboard/roda/rk9/hda_verb.c
M src/mainboard/roda/rv11/variants/rv11/include/variant/hda_verb.h
M src/mainboard/roda/rv11/variants/rw11/include/variant/hda_verb.h
M src/mainboard/samsung/lumpy/hda_verb.c
M src/mainboard/samsung/stumpy/hda_verb.c
69 files changed, 2,300 insertions(+), 2,270 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/37840/1
diff --git a/src/mainboard/amd/padmelon/hda_verb.c b/src/mainboard/amd/padmelon/hda_verb.c
index 23d566d..4db64c5 100644
--- a/src/mainboard/amd/padmelon/hda_verb.c
+++ b/src/mainboard/amd/padmelon/hda_verb.c
@@ -17,14 +17,11 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- /* Realtek ALC662 rev1 */
- 0x10ec0662, /* Vendor ID */
- 0x80865756, /* Subsystem ID */
- 10, /* Number of entries */
+ 0x10ec0662, /* Vendor ID: Realtek ALC662 rev1 */
+ 0x80865756, /* Subsystem ID */
+ 10, /* Number of entries */
/* Pin Widget Verb Table */
-
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
diff --git a/src/mainboard/apple/macbook21/hda_verb.c b/src/mainboard/apple/macbook21/hda_verb.c
index 0d4149c..5d78ff1 100644
--- a/src/mainboard/apple/macbook21/hda_verb.c
+++ b/src/mainboard/apple/macbook21/hda_verb.c
@@ -16,9 +16,9 @@
#include <device/azalia_device.h>
+#if CONFIG(BOARD_APPLE_MACBOOK11) || CONFIG(BOARD_APPLE_MACBOOK21)
const u32 cim_verb_data[] = {
0x83847680, /* Codec Vendor / Device ID: SigmaTel STAC9221 A1 */
-#if CONFIG(BOARD_APPLE_MACBOOK11) || CONFIG(BOARD_APPLE_MACBOOK21)
0x106b2200, /* Subsystem ID */
11, /* Number of 4 dword sets */
AZALIA_SUBVENDOR(0x0, 0x106b2200),
@@ -32,7 +32,11 @@
AZALIA_PIN_CFG(0x0, 0x11, 0x13c5e240),
AZALIA_PIN_CFG(0x0, 0x15, 0x400000fc),
AZALIA_PIN_CFG(0x0, 0x1b, 0x400000fb),
+};
+
#else /* CONFIG_BOARD_APPLE_IMAC52 */
+const u32 cim_verb_data[] = {
+ 0x83847680, /* Codec Vendor / Device ID: SigmaTel STAC9221 A1 */
0x106b0f00, /* Subsystem ID */
11, /* Number of 4 dword sets */
AZALIA_SUBVENDOR(0x0, 0x106b0f00),
@@ -46,9 +50,8 @@
AZALIA_PIN_CFG(0x0, 0x11, 0x11cbc022),
AZALIA_PIN_CFG(0x0, 0x15, 0x4080e10f),
AZALIA_PIN_CFG(0x0, 0x1b, 0x4080e10f),
-#endif
-
};
+#endif
const u32 pc_beep_verbs[0] = {};
diff --git a/src/mainboard/asrock/g41c-gs/hda_verb.c b/src/mainboard/asrock/g41c-gs/hda_verb.c
index 1c0474b..5e71013 100644
--- a/src/mainboard/asrock/g41c-gs/hda_verb.c
+++ b/src/mainboard/asrock/g41c-gs/hda_verb.c
@@ -17,14 +17,10 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- /* Realtek ALC662 rev1 */
- 0x10ec0662, /* Vendor ID */
- 0x18493662, /* Subsystem ID */
- 10, /* Number of entries */
-
- /* Pin Widget Verb Table */
-
+ /* --- Codec #0 --- */
+ 0x10ec0662, /* Vendor ID: Realtek ALC662 rev1 */
+ 0x18493662, /* Subsystem ID */
+ 10, /* Number of entries */
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
@@ -36,24 +32,16 @@
AZALIA_PIN_CFG(0, 0x1d, 0x4004c601),
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
- /* coreboot specific header */
- /* Intel Eaglelake HDMI */
- 0x80862803, /* Vendor ID */
- 0x80860101, /* Subsystem ID */
- 0x00000001, /* Number of entries */
-
- /* Pin Widget Verb Table */
-
+ /* --- Codec #1 --- */
+ 0x80862803, /* Vendor ID: Intel Eaglelake HDMI */
+ 0x80860101, /* Subsystem ID */
+ 1, /* Number of entries */
AZALIA_PIN_CFG(1, 0x03, 0x18560010),
-
- /* coreboot specific header */
- /* Realtek ALC662 rev1 */
- 0x10ec0662, /* Vendor ID */
- 0x1565821e, /* Subsystem ID */
- 10, /* Number of entries */
-
- /* Pin Widget Verb Table */
+ /* --- Codec #2 --- */
+ 0x10ec0662, /* Vendor ID: Realtek ALC662 rev1 */
+ 0x1565821e, /* Subsystem ID */
+ 10, /* Number of entries */
AZALIA_PIN_CFG(2, 0x14, 0x01014410),
AZALIA_PIN_CFG(2, 0x15, 0x411111f0),
AZALIA_PIN_CFG(2, 0x16, 0x411111f0),
diff --git a/src/mainboard/asus/p5gc-mx/hda_verb.c b/src/mainboard/asus/p5gc-mx/hda_verb.c
index a9c25f3..a7a387c 100644
--- a/src/mainboard/asus/p5gc-mx/hda_verb.c
+++ b/src/mainboard/asus/p5gc-mx/hda_verb.c
@@ -16,10 +16,9 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0883, /* Vendor ID */
- 0x104382c7, /* Subsystem ID */
- 0x0000000c, /* Number of entries */
+ 0x10ec0883, /* Vendor ID */
+ 0x104382c7, /* Subsystem ID */
+ 12, /* Number of entries */
/* Pin Widget Verb Table */
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
@@ -37,4 +36,5 @@
};
const u32 pc_beep_verbs[0] = {};
+
AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/asus/p5qc/hda_verb.c b/src/mainboard/asus/p5qc/hda_verb.c
index 22832bb..c30a6e3 100644
--- a/src/mainboard/asus/p5qc/hda_verb.c
+++ b/src/mainboard/asus/p5qc/hda_verb.c
@@ -17,13 +17,11 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
0x10ec0888,
- 0x104382fe, // Subsystem ID
- 13, // Number of entries
+ 0x104382fe, /* Subsystem ID */
+ 13, /* Number of entries */
/* Pin Widget Verb Table */
-
AZALIA_PIN_CFG(0, 0x11, 0x99430140),
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
AZALIA_PIN_CFG(0, 0x15, 0x01011012),
diff --git a/src/mainboard/asus/p5ql-em/hda_verb.c b/src/mainboard/asus/p5ql-em/hda_verb.c
index 3be50bb..af758fa 100644
--- a/src/mainboard/asus/p5ql-em/hda_verb.c
+++ b/src/mainboard/asus/p5ql-em/hda_verb.c
@@ -15,10 +15,9 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
0x10ec0888,
- 0x104382fe, // Subsystem ID
- 13, // Number of entries
+ 0x104382fe, /* Subsystem ID */
+ 13, /* Number of entries */
/* Pin Widget Verb Table */
AZALIA_PIN_CFG(0, 0x11, 0x99430130),
diff --git a/src/mainboard/asus/p5qpl-am/hda_verb.c b/src/mainboard/asus/p5qpl-am/hda_verb.c
index f941a75..37073af 100644
--- a/src/mainboard/asus/p5qpl-am/hda_verb.c
+++ b/src/mainboard/asus/p5qpl-am/hda_verb.c
@@ -17,14 +17,11 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- /* Realtek ALC662 rev1 */
- 0x10ec0887, /* Vendor ID */
- 0x1043840b, /* Subsystem ID */
- 14, /* Number of entries */
+ 0x10ec0887, /* Vendor ID: Realtek ALC662 rev. 1 */
+ 0x1043840b, /* Subsystem ID */
+ 14, /* Number of entries */
/* Pin Widget Verb Table */
-
AZALIA_PIN_CFG(0, 0x11, 0x411111f0),
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
diff --git a/src/mainboard/facebook/fbg1701/hda_verb.c b/src/mainboard/facebook/fbg1701/hda_verb.c
index 344443f..9c49d6f 100644
--- a/src/mainboard/facebook/fbg1701/hda_verb.c
+++ b/src/mainboard/facebook/fbg1701/hda_verb.c
@@ -17,26 +17,26 @@
const u32 cim_verb_data[] = {
/* coreboot specific header */
- 0x10EC0298, /* Codec Vendor - Device ID: Realtek ALC298 */
- 0x152D1165, /* Subsystem ID Quanta */
- 0x0000000C, /* Number of jacks */
+ 0x10ec0298, /* Codec Vendor - Device ID: Realtek ALC298 */
+ 0x152d1165, /* Subsystem ID Quanta */
+ 12, /* Number of jacks */
/* HDA Codec Subsystem ID Verb Table */
- AZALIA_SUBVENDOR(0x0, 0x152D1165),
+ AZALIA_SUBVENDOR(0x0, 0x152d1165),
/* Pin Widget Verb Table */
/* Widget node 1 (NID 0x01) */
- 0x0017FF00,
- 0x0017FF00,
- 0x0017FF00,
- 0x0017FF00,
+ 0x0017ff00,
+ 0x0017ff00,
+ 0x0017ff00,
+ 0x0017ff00,
/* Pin Complex (NID 0x12) DMIC */
- AZALIA_PIN_CFG(0x0, 0x12, 0x90A60130),
+ AZALIA_PIN_CFG(0x0, 0x12, 0x90a60130),
/* Pin Complex (NID 0x13) DMIC */
- AZALIA_PIN_CFG(0x0, 0x13, 0x411111F0),
+ AZALIA_PIN_CFG(0x0, 0x13, 0x411111f0),
/* Pin Complex (NID 0x14) SPEAKER-OUT (Port-D) */
AZALIA_PIN_CFG(0x0, 0x14, 0x90180110),
@@ -45,32 +45,31 @@
AZALIA_PIN_CFG(0x0, 0x17, 0x01011120),
/* Pin Complex (NID 0x18) MIC1 (Port-B) */
- AZALIA_PIN_CFG(0x0, 0x18, 0x41111F0),
+ AZALIA_PIN_CFG(0x0, 0x18, 0x411111f0),
/* Pin Complex (NID 0x19) I2S-IN */
AZALIA_PIN_CFG(0x0, 0x19, 0x90870140),
- /* Pin Complex (NID 0x1A) LINE1 (Port-C) */
- AZALIA_PIN_CFG(0x0, 0x1A, 0x411111F0),
+ /* Pin Complex (NID 0x1a) LINE1 (Port-C) */
+ AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1D) PC-BEEP */
- AZALIA_PIN_CFG(0x0, 0x1D, 0x40400001),
+ /* Pin Complex (NID 0x1d) PC-BEEP */
+ AZALIA_PIN_CFG(0x0, 0x1d, 0x40400001),
- /* Pin Complex (NID 0x1E) SPDIF-OUT */
- AZALIA_PIN_CFG(0x0, 0x1E, 0x411111F0),
+ /* Pin Complex (NID 0x1e) SPDIF-OUT */
+ AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
- /* Pin Complex (NID 0x1F) SPDIF-IN */
- AZALIA_PIN_CFG(0x0, 0x1F, 0x411111F0),
+ /* Pin Complex (NID 0x1f) SPDIF-IN */
+ AZALIA_PIN_CFG(0x0, 0x1f, 0x411111f0),
/* Pin Complex (NID 0x21) HP-OUT (Port-A) */
- AZALIA_PIN_CFG(0x0, 0x21, 0x411111F0),
+ AZALIA_PIN_CFG(0x0, 0x21, 0x411111f0),
/* POST I2S bypass output SRC */
- 0x0205002D,
- 0x0204C020,
- 0x0205002D,
- 0x0204C020,
-
+ 0x0205002d,
+ 0x0204c020,
+ 0x0205002d,
+ 0x0204c020,
};
const u32 pc_beep_verbs[0] = {};
diff --git a/src/mainboard/foxconn/d41s/hda_verb.c b/src/mainboard/foxconn/d41s/hda_verb.c
index dbe383e..f237ded 100644
--- a/src/mainboard/foxconn/d41s/hda_verb.c
+++ b/src/mainboard/foxconn/d41s/hda_verb.c
@@ -16,10 +16,9 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
0x10ec0662,
- 0x105b0d55, // Subsystem ID
- 0x0000000a, // Number of entries
+ 0x105b0d55, /* Subsystem ID */
+ 10, /* Number of entries */
/* Pin Widget Verb Table */
AZALIA_PIN_CFG(0, 0x14, 0x01014c10),
@@ -34,6 +33,6 @@
AZALIA_PIN_CFG(0, 0x1e, 0x99430120),
};
-const u32 pc_beep_verbs[] = {
-};
+const u32 pc_beep_verbs[] = {};
+
AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/foxconn/g41s-k/hda_verb.c b/src/mainboard/foxconn/g41s-k/hda_verb.c
index bb787b2..b1c495e 100644
--- a/src/mainboard/foxconn/g41s-k/hda_verb.c
+++ b/src/mainboard/foxconn/g41s-k/hda_verb.c
@@ -19,10 +19,9 @@
#if CONFIG(BOARD_FOXCONN_G41S_K)
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0888, /* Vendor ID */
- 0x105b0dda, /* Subsystem ID */
- 0x0000000e, /* Number of entries */
+ 0x10ec0888, /* Vendor ID */
+ 0x105b0dda, /* Subsystem ID */
+ 14, /* Number of entries */
/* Pin Widget Verb Table */
@@ -41,12 +40,12 @@
AZALIA_PIN_CFG(0, 0x1e, 0x01441130),
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
};
+
#else /* CONFIG_BOARD_FOXCONN_G41M */
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0888, /* Vendor ID */
- 0x105b0dc0, /* Subsystem ID */
- 0x0000000e, /* Number of entries */
+ 0x10ec0888, /* Vendor ID */
+ 0x105b0dc0, /* Subsystem ID */
+ 14, /* Number of entries */
/* Pin Widget Verb Table */
diff --git a/src/mainboard/getac/p470/hda_verb.c b/src/mainboard/getac/p470/hda_verb.c
index e858a35..3635966 100644
--- a/src/mainboard/getac/p470/hda_verb.c
+++ b/src/mainboard/getac/p470/hda_verb.c
@@ -16,51 +16,49 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0262, // Codec Vendor / Device ID: Realtek ALC262
- 0x10714700, // Subsystem ID
- 0x0000000d, // Number of jacks
+ 0x10ec0262, /* Codec Vendor / Device ID: Realtek ALC262 */
+ 0x10714700, /* Subsystem ID */
+ 13, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0000 */
- AZALIA_SUBVENDOR(0x0, 0x10EC0000),
+ /* HDA Codec Subsystem ID Verb Table */
+ AZALIA_SUBVENDOR(0x0, 0x10ec0000),
/* Pin Widget Verb Table */
+ /* DMIC */
+ AZALIA_PIN_CFG(0x0, 0x12, 0x411111f0),
- /* Pin Complex (NID 0x12), DMIC */
- AZALIA_PIN_CFG(0x0, 0x12, 0x411111F0),
-
- /* Pin Complex (NID 0x14), LINE_OUT (port D) */
+ /* LINE_OUT (port D) */
AZALIA_PIN_CFG(0x0, 0x14, 0x99130110),
- /* Pin Complex (NID 0x15), HP_OUT (port A) */
+ /* HP_OUT (port A) */
AZALIA_PIN_CFG(0x0, 0x15, 0x01214020),
- /* Pin Complex (NID 0x16), MONO-OUT */
- AZALIA_PIN_CFG(0x0, 0x16, 0x411111F0),
+ /* MONO-OUT */
+ AZALIA_PIN_CFG(0x0, 0x16, 0x411111f0),
- /* Pin Complex (NID 0x18), MIC1 (port B) */
- AZALIA_PIN_CFG(0x0, 0x18, 0x01A19830),
+ /* MIC1 (port B) */
+ AZALIA_PIN_CFG(0x0, 0x18, 0x01a19830),
- /* Pin Complex (NID 0x19), MIC2 (port F) */
- AZALIA_PIN_CFG(0x0, 0x19, 0x99A30931),
+ /* MIC2 (port F) */
+ AZALIA_PIN_CFG(0x0, 0x19, 0x99a30931),
- /* Pin Complex (NID 0x1A), LINE1 (port C) */
- AZALIA_PIN_CFG(0x0, 0x1A, 0x02A1983F),
+ /* LINE1 (port C) */
+ AZALIA_PIN_CFG(0x0, 0x1a, 0x02a1983f),
- /* Pin Complex (NID 0x1B), LINE2 (port E) */
- AZALIA_PIN_CFG(0x0, 0x1B, 0x0221401F),
+ /* LINE2 (port E) */
+ AZALIA_PIN_CFG(0x0, 0x1b, 0x0221401f),
- /* Pin Complex (NID 0x1C), CD_IN */
- AZALIA_PIN_CFG(0x0, 0x1C, 0x411111F0),
+ /* CD_IN */
+ AZALIA_PIN_CFG(0x0, 0x1c, 0x411111f0),
- /* Pin Complex (NID 0x1D), PCBEEP */
- AZALIA_PIN_CFG(0x0, 0x1D, 0x411111F0),
+ /* PCBEEP */
+ AZALIA_PIN_CFG(0x0, 0x1d, 0x411111f0),
- /* Pin Complex (NID 0x1E), S/PDIF-OUT */
- AZALIA_PIN_CFG(0x0, 0x1E, 0x411111F0),
+ /* S/PDIF-OUT */
+ AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
- /* Pin Complex (NID 0x1F), S/PDIF-IN */
- AZALIA_PIN_CFG(0x0, 0x1F, 0x411111F0),
+ /* S/PDIF-IN */
+ AZALIA_PIN_CFG(0x0, 0x1f, 0x411111f0),
};
const u32 pc_beep_verbs[0] = {};
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/hda_verb.c b/src/mainboard/gigabyte/ga-945gcm-s2l/hda_verb.c
index 1b57dfa..8bdde50 100644
--- a/src/mainboard/gigabyte/ga-945gcm-s2l/hda_verb.c
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/hda_verb.c
@@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2016 Arthur Heymans <arthur(a)aheymans.xyz>
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
@@ -15,10 +16,9 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0662, /* Vendor ID */
- 0x1458a002, /* Subsystem ID */
- 0x00000009, /* Number of entries */
+ 0x10ec0662, /* Vendor ID */
+ 0x1458a002, /* Subsystem ID */
+ 9, /* Number of entries */
/* Pin Widget Verb Table */
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
@@ -34,4 +34,5 @@
};
const u32 pc_beep_verbs[0] = {};
+
AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/include/variant/hda_verb.h b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/include/variant/hda_verb.h
index 76c4ed3..cb86aaf 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/include/variant/hda_verb.h
+++ b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/include/variant/hda_verb.h
@@ -15,12 +15,10 @@
#define GA_B75_D3V_HDA_VERB_H
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0887, // Realtek 887
- 0x1458a002, // Subsystem ID
- 0x0000000e, // Number of entries
+ 0x10ec0887, /* Realtek ALC887 */
+ 0x1458a002, /* Subsystem ID */
+ 14, /* Number of entries */
- /* NID 0x01: Subsystem ID. */
AZALIA_SUBVENDOR(0x2, 0x1458a002),
/* Pin Widget Verb Table */
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75m-d3v/include/variant/hda_verb.h b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75m-d3v/include/variant/hda_verb.h
index c84c80d..0e35aca 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75m-d3v/include/variant/hda_verb.h
+++ b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75m-d3v/include/variant/hda_verb.h
@@ -15,10 +15,9 @@
#define GA_B75M_D3V_HDA_VERB_H
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0887, // Realtek 887
- 0x1458a002, // Subsystem ID
- 0x0000000e, // Number of entries
+ 0x10ec0887, /* Realtek ALC887 */
+ 0x1458a002, /* Subsystem ID */
+ 14, /* Number of entries */
/* Pin Widget Verb Table */
AZALIA_PIN_CFG(0, 0x11, 0x411111f0),
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/hda_verb.c b/src/mainboard/gigabyte/ga-g41m-es2l/hda_verb.c
index d606582..4b01181 100644
--- a/src/mainboard/gigabyte/ga-g41m-es2l/hda_verb.c
+++ b/src/mainboard/gigabyte/ga-g41m-es2l/hda_verb.c
@@ -17,13 +17,9 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
0x10ec0887,
- 0x1458a002, // Subsystem ID
- 0x0000000e, // Number of entries
-
- /* Pin Widget Verb Table */
-
+ 0x1458a002, /* Subsystem ID */
+ 14, /* Number of entries */
AZALIA_PIN_CFG(0, 0x11, 0x411110f0),
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
AZALIA_PIN_CFG(0, 0x14, 0x01014410),
diff --git a/src/mainboard/google/auron/variants/auron_paine/include/variant/hda_verb.h b/src/mainboard/google/auron/variants/auron_paine/include/variant/hda_verb.h
index f7cb248..c30b800 100644
--- a/src/mainboard/google/auron/variants/auron_paine/include/variant/hda_verb.h
+++ b/src/mainboard/google/auron/variants/auron_paine/include/variant/hda_verb.h
@@ -16,22 +16,21 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
- 0x10ec0283, // Subsystem ID
- 0x0000000e, // Number of jacks (NID entries)
+ 0x10ec0283, /* Codec Vendor / Device ID: Realtek ALC283 */
+ 0x10ec0283, /* Subsystem ID */
+ 14, /* Number of jacks (NID entries) */
- 0x0017ff00, // Function Reset
- 0x0017ff00, // Double Function Reset
- 0x000F0000, // Pad - get vendor id
- 0x000F0002, // Pad - get revision id
+ 0x0017ff00, /* Function Reset */
+ 0x0017ff00, /* Double Function Reset */
+ 0x000f0000, /* Pad - get vendor id */
+ 0x000f0002, /* Pad - get revision id */
/* Bits 31:28 - Codec Address */
/* Bits 27:20 - NID */
/* Bits 19:8 - Verb ID */
/* Bits 7:0 - Payload */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table */
+ /* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x11790670),
/* Pin Widget Verb Table */
@@ -39,11 +38,13 @@
/* Pin Complex (NID 0x12) DMIC - Disabled */
AZALIA_PIN_CFG(0x0, 0x12, 0x411111f0),
- /* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */
- // group 1, cap 0
- // no connector, no jack detect
- // speaker out, analog
- // fixed function, internal, Location N/A
+ /*
+ * Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers
+ * group 1, cap 0
+ * no connector, no jack detect
+ * speaker out, analog
+ * fixed function, internal, Location N/A
+ */
AZALIA_PIN_CFG(0x0, 0x14, 0x90170110),
/* Pin Complex (NID 0x17) MONO Out - Disabled */
@@ -52,38 +53,46 @@
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
AZALIA_PIN_CFG(0x0, 0x18, 0x411111f0),
- /* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */
- // group2, cap 0
- // black, jack detect
- // Mic in, 3.5mm Jack
- // connector, External left panel
+ /*
+ * Pin Complex (NID 0x19) MIC2 - 3.5mm Jack
+ * group2, cap 0
+ * black, jack detect
+ * Mic in, 3.5mm Jack
+ * connector, External left panel
+ */
AZALIA_PIN_CFG(0x0, 0x19, 0x03a11020),
- /* Pin Complex (NID 0x1A) LINE1 - Internal Mic */
- // group 1, cap 1
- // no connector, no jack detect
- // mic in, analog connection
- // Fixed function, internal, Location N/A
- AZALIA_PIN_CFG(0x0, 0x1A, 0x90a70111),
+ /*
+ * Pin Complex (NID 0x1a) LINE1 - Internal Mic
+ * group 1, cap 1
+ * no connector, no jack detect
+ * mic in, analog connection
+ * Fixed function, internal, Location N/A
+ */
+ AZALIA_PIN_CFG(0x0, 0x1a, 0x90a70111),
- /* Pin Complex (NID 0x1B) LINE2 - Disabled */
- AZALIA_PIN_CFG(0x0, 0x1B, 0x411111f0),
+ /* Pin Complex (NID 0x1b) LINE2 - Disabled */
+ AZALIA_PIN_CFG(0x0, 0x1b, 0x411111f0),
- /* Pin Complex (NID 0x1D) PCBeep */
- // eapd low on ex-amp, laptop, custom enable
- // mute spkr on hpout
- // pcbeep en able, checksum
- // no physical, Internal, Location N/A
- AZALIA_PIN_CFG(0x0, 0x1D, 0x4015812d),
+ /*
+ * Pin Complex (NID 0x1d) PCBeep
+ * eapd low on ex-amp, laptop, custom enable
+ * mute spkr on hpout
+ * pcbeep en able, checksum
+ * no physical, Internal, Location N/A
+ */
+ AZALIA_PIN_CFG(0x0, 0x1d, 0x4015812d),
- /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/
- AZALIA_PIN_CFG(0x0, 0x1E, 0x411111f0),
+ /* Pin Complex (NID 0x1e) SPDIF-OUT - Disabled */
+ AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
- /* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/
- // group2, cap 1
- // black, jack detect
- // HPOut, 3.5mm Jack
- // connector, left panel
+ /*
+ * Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack
+ * group2, cap 1
+ * black, jack detect
+ * HPOut, 3.5mm Jack
+ * connector, left panel
+ */
AZALIA_PIN_CFG(0x0, 0x21, 0x03211021),
/* Undocumented settings from Realtek (needed for beep_gen) */
@@ -95,13 +104,13 @@
/* Tuned jack detection */
0x02050043,
- 0x0204A614,
+ 0x0204a614,
0x02050047,
0x02049470,
};
const u32 pc_beep_verbs[] = {
- 0x00170500, /* power up everything (codec, dac, adc, mixers) */
+ 0x00170500, /* power up everything (codec, dac, adc, mixers) */
0x01470740, /* enable speaker out */
0x01470c02, /* set speaker EAPD pin */
0x0143b01f, /* unmute speaker */
diff --git a/src/mainboard/google/auron/variants/auron_yuna/include/variant/hda_verb.h b/src/mainboard/google/auron/variants/auron_yuna/include/variant/hda_verb.h
index e283e95..34bec66 100644
--- a/src/mainboard/google/auron/variants/auron_yuna/include/variant/hda_verb.h
+++ b/src/mainboard/google/auron/variants/auron_yuna/include/variant/hda_verb.h
@@ -16,22 +16,21 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
- 0x10ec0283, // Subsystem ID
- 0x00000013, // Number of jacks (NID entries)
+ 0x10ec0283, /* Codec Vendor / Device ID: Realtek ALC283 */
+ 0x10ec0283, /* Subsystem ID */
+ 19, /* Number of jacks (NID entries) */
- 0x0017ff00, // Function Reset
- 0x0017ff00, // Double Function Reset
- 0x000F0000, // Pad - get vendor id
- 0x000F0002, // Pad - get revision id
+ 0x0017ff00, /* Function Reset */
+ 0x0017ff00, /* Double Function Reset */
+ 0x000f0000, /* Pad - get vendor id */
+ 0x000f0002, /* Pad - get revision id */
/* Bits 31:28 - Codec Address */
/* Bits 27:20 - NID */
/* Bits 19:8 - Verb ID */
/* Bits 7:0 - Payload */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table */
+ /* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x11790670),
/* Pin Widget Verb Table */
@@ -39,11 +38,13 @@
/* Pin Complex (NID 0x12) DMIC - Enabled */
AZALIA_PIN_CFG(0x0, 0x12, 0x90a60130),
- /* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */
- // group 1, cap 0
- // no connector, no jack detect
- // speaker out, analog
- // fixed function, internal, Location N/A
+ /*
+ * Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers
+ * group 1, cap 0
+ * no connector, no jack detect
+ * speaker out, analog
+ * fixed function, internal, Location N/A
+ */
AZALIA_PIN_CFG(0x0, 0x14, 0x90170110),
/* Pin Complex (NID 0x17) MONO Out - Enabled */
@@ -52,34 +53,40 @@
/* Pin Complex (NID 0x18) Disabled */
AZALIA_PIN_CFG(0x0, 0x18, 0x411111f0),
- /* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */
- // group2, cap 0
- // black, jack detect
- // Mic in, 3.5mm Jack
- // connector, External left panel
+ /*
+ * Pin Complex (NID 0x19) MIC2 - 3.5mm Jack
+ * group2, cap 0
+ * black, jack detect
+ * Mic in, 3.5mm Jack
+ * connector, External left panel
+ */
AZALIA_PIN_CFG(0x0, 0x19, 0x03a11020),
- /* Pin Complex (NID 0x1A) LINE1 - Disabled */
- AZALIA_PIN_CFG(0x0, 0x1A, 0x411111f0),
+ /* Pin Complex (NID 0x1a) LINE1 - Disabled */
+ AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1B) LINE2 - Disabled */
- AZALIA_PIN_CFG(0x0, 0x1B, 0x411111f0),
+ /* Pin Complex (NID 0x1b) LINE2 - Disabled */
+ AZALIA_PIN_CFG(0x0, 0x1b, 0x411111f0),
- /* Pin Complex (NID 0x1D) PCBeep */
- // eapd low on ex-amp, laptop, custom enable
- // mute spkr on hpout
- // pcbeep en able, checksum
- // no physical, Internal, Location N/A
- AZALIA_PIN_CFG(0x0, 0x1D, 0x4015812d),
+ /*
+ * Pin Complex (NID 0x1d) PCBeep
+ * eapd low on ex-amp, laptop, custom enable
+ * mute spkr on hpout
+ * pcbeep en able, checksum
+ * no physical, Internal, Location N/A
+ */
+ AZALIA_PIN_CFG(0x0, 0x1d, 0x4015812d),
- /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/
- AZALIA_PIN_CFG(0x0, 0x1E, 0x411111f0),
+ /* Pin Complex (NID 0x1e) SPDIF-OUT - Disabled */
+ AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
- /* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/
- // group1
- // black, jack detect
- // HPOut, 3.5mm Jack
- // connector, left panel
+ /*
+ * Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack
+ * group1
+ * black, jack detect
+ * HPOut, 3.5mm Jack
+ * connector, left panel
+ */
AZALIA_PIN_CFG(0x0, 0x21, 0x0321101f),
/* Undocumented settings from Realtek (needed for beep_gen) */
@@ -87,28 +94,33 @@
0x02050038,
0x02046900,
0x02050010,
- 0x02040C20,
+ 0x02040c20,
+
/* Widget node 0x20 - 1 */
0x02050019,
0x02041857,
- 0x0205001A,
+ 0x0205001a,
0x02044001,
+
/* Widget node 0x20 - 2 */
- 0x0205001B,
- 0x0204140B,
+ 0x0205001b,
+ 0x0204140b,
0x02050025,
- 0x0204802A,
+ 0x0204802a,
+
/* Widget node 0x20 - 3 */
0x02050045,
0x02045029,
0x02050046,
0x02040004,
+
/* Widget node 0x20 - 4 */
0x02050043,
- 0x0204A614,
+ 0x0204a614,
0x02050043,
- 0x0204A614,
- /* pc beep */
+ 0x0204a614,
+
+ /* PC Beep */
0x02050010,
0x02040c20,
0x0205001b,
@@ -116,13 +128,13 @@
/* Tuned jack detection */
0x02050043,
- 0x0204A614,
+ 0x0204a614,
0x02050047,
0x02049470,
};
const u32 pc_beep_verbs[] = {
- 0x00170500, /* power up everything (codec, dac, adc, mixers) */
+ 0x00170500, /* power up everything (codec, dac, adc, mixers) */
0x01470740, /* enable speaker out */
0x01470c02, /* set speaker EAPD pin */
0x0143b01f, /* unmute speaker */
diff --git a/src/mainboard/google/auron/variants/buddy/include/variant/hda_verb.h b/src/mainboard/google/auron/variants/buddy/include/variant/hda_verb.h
index 7fd9853..d7afc1c 100644
--- a/src/mainboard/google/auron/variants/buddy/include/variant/hda_verb.h
+++ b/src/mainboard/google/auron/variants/buddy/include/variant/hda_verb.h
@@ -17,22 +17,21 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
- 0x10ec0283, // Subsystem ID
- 0x0000000d, // Number of jacks (NID entries)
+ 0x10ec0283, /* Codec Vendor / Device ID: Realtek ALC283 */
+ 0x10ec0283, /* Subsystem ID */
+ 14, /* Number of jacks (NID entries) */
- 0x0017ff00, // Function Reset
- 0x0017ff00, // Double Function Reset
- 0x000F0000, // Pad - get vendor id
- 0x000F0002, // Pad - get revision id
+ 0x0017ff00, /* Function Reset */
+ 0x0017ff00, /* Double Function Reset */
+ 0x000f0000, /* Pad - get vendor id */
+ 0x000f0002, /* Pad - get revision id */
/* Bits 31:28 - Codec Address */
/* Bits 27:20 - NID */
/* Bits 19:8 - Verb ID */
/* Bits 7:0 - Payload */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */
+ /* HDA Codec Subsystem ID Verb Table */
0x00172083,
0x00172102,
0x001722ec,
@@ -41,64 +40,64 @@
/* Pin Widget Verb Table */
/* Pin Complex (NID 0x12) DMIC - Disabled */
- 0x01271cf0, //
- 0x01271d11, //
- 0x01271e11, //
- 0x01271f41, //
+ 0x01271cf0,
+ 0x01271d11,
+ 0x01271e11,
+ 0x01271f41,
/* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */
- 0x01471c10, // group 1, cap 0
- 0x01471d01, // no connector, no jack detect
- 0x01471e17, // speaker out, analog
- 0x01471f90, // fixed function, internal, Location N/A
+ 0x01471c10, /* group 1, cap 0 */
+ 0x01471d01, /* no connector, no jack detect */
+ 0x01471e17, /* speaker out, analog */
+ 0x01471f90, /* fixed function, internal, Location N/A */
/* Pin Complex (NID 0x17) MONO Out - Disabled */
- 0x01771cf0, //
- 0x01771d11, //
- 0x01771e11, //
- 0x01771f41, //
+ 0x01771cf0,
+ 0x01771d11,
+ 0x01771e11,
+ 0x01771f41,
/* Pin Complex (NID 0x18) Disabled */
- 0x01871cf0, //
- 0x01871d11, //
- 0x01871e11, //
- 0x01871f41, //
+ 0x01871cf0,
+ 0x01871d11,
+ 0x01871e11,
+ 0x01871f41,
/* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */
- 0x01971c20, // group2, cap 0
- 0x01971d10, // black, jack detect
- 0x01971ea1, // Mic in, 3.5mm Jack
- 0x01971f03, // connector, External left panel
+ 0x01971c20, /* group2, cap 0 */
+ 0x01971d10, /* black, jack detect */
+ 0x01971ea1, /* Mic in, 3.5mm Jack */
+ 0x01971f03, /* connector, External left panel */
- /* Pin Complex (NID 0x1A) LINE1 - Internal Mic */
- 0x01a71c11, // group 1, cap 1
- 0x01a71d01, // no connector, no jack detect
- 0x01a71ea7, // mic in, analog connection
- 0x01a71f90, // Fixed function, internal, Location N/A
+ /* Pin Complex (NID 0x1a) LINE1 - Internal Mic */
+ 0x01a71c11, /* group 1, cap 1 */
+ 0x01a71d01, /* no connector, no jack detect */
+ 0x01a71ea7, /* mic in, analog connection */
+ 0x01a71f90, /* Fixed function, internal, Location N/A */
- /* Pin Complex (NID 0x1B) LINE2 - Disabled */
- 0x01b71cf0, //
- 0x01b71d11, //
- 0x01b71e11, //
- 0x01b71f41, //
+ /* Pin Complex (NID 0x1b) LINE2 - Disabled */
+ 0x01b71cf0,
+ 0x01b71d11,
+ 0x01b71e11,
+ 0x01b71f41,
- /* Pin Complex (NID 0x1D) PCBeep */
- 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable
- 0x01d71d81, // mute spkr on hpout
- 0x01d71e15, // pcbeep en able, checksum
- 0x01d71f40, // no physical, Internal, Location N/A
+ /* Pin Complex (NID 0x1d) PCBeep */
+ 0x01d71c2d, /* eapd low on ex-amp, laptop, custom enable */
+ 0x01d71d81, /* mute spkr on hpout */
+ 0x01d71e15, /* pcbeep en able, checksum */
+ 0x01d71f40, /* no physical, Internal, Location N/A */
- /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/
- 0x01e71cf0, //
- 0x01e71d11, //
- 0x01e71e11, //
- 0x01e71f41, //
+ /* Pin Complex (NID 0x1e) SPDIF-OUT - Disabled*/
+ 0x01e71cf0,
+ 0x01e71d11,
+ 0x01e71e11,
+ 0x01e71f41,
- /* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/
- 0x02171c21, // group2, cap 1
- 0x02171d10, // black, jack detect
- 0x02171e21, // HPOut, 3.5mm Jack
- 0x02171f03, // connector, left panel
+ /* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack */
+ 0x02171c21, /* group2, cap 1 */
+ 0x02171d10, /* black, jack detect */
+ 0x02171e21, /* HPOut, 3.5mm Jack */
+ 0x02171f03, /* connector, left panel */
/* Undocumented settings from Realtek (needed for beep_gen) */
/* Widget node 0x20 */
@@ -109,7 +108,7 @@
};
const u32 pc_beep_verbs[] = {
- 0x00170500, /* power up everything (codec, dac, adc, mixers) */
+ 0x00170500, /* power up everything (codec, dac, adc, mixers) */
0x01470c00, /* set speaker EAPD pin to low */
0x01470740, /* enable speaker out */
0x0143b01f, /* unmute speaker */
diff --git a/src/mainboard/google/auron/variants/gandof/include/variant/hda_verb.h b/src/mainboard/google/auron/variants/gandof/include/variant/hda_verb.h
index dc2d534..fc29a14 100644
--- a/src/mainboard/google/auron/variants/gandof/include/variant/hda_verb.h
+++ b/src/mainboard/google/auron/variants/gandof/include/variant/hda_verb.h
@@ -16,38 +16,41 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
- 0x10ec0283, // Subsystem ID
- 0x0000000e, // Number of jacks (NID entries)
+ 0x10ec0283, /* Codec Vendor / Device ID: Realtek ALC283 */
+ 0x10ec0283, /* Subsystem ID */
+ 14, /* Number of jacks (NID entries) */
- 0x0017ff00, // Function Reset
- 0x0017ff00, // Double Function Reset
- 0x000F0000, // Pad - get vendor id
- 0x000F0002, // Pad - get revision id
+ 0x0017ff00, /* Function Reset */
+ 0x0017ff00, /* Double Function Reset */
+ 0x000f0000, /* Pad - get vendor id */
+ 0x000f0002, /* Pad - get revision id */
/* Bits 31:28 - Codec Address */
/* Bits 27:20 - NID */
/* Bits 19:8 - Verb ID */
/* Bits 7:0 - Payload */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table */
+ /* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x11790670),
/* Pin Widget Verb Table */
- /* Pin Complex (NID 0x12) DMIC - Internal MIC */
- // group 3, cap 0
- // no connector, no jack detect
- // mic in, digital
- // fixed function, internal
+ /*
+ * Pin Complex (NID 0x12) DMIC - Internal MIC
+ * group 3, cap 0
+ * no connector, no jack detect
+ * mic in, digital
+ * fixed function, internal
+ */
AZALIA_PIN_CFG(0x0, 0x12, 0x90a60130),
- /* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */
- // group 1, cap 0
- // no connector, no jack detect
- // speaker out, analog
- // fixed function, internal, Location N/A
+ /*
+ * Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers
+ * group 1, cap 0
+ * no connector, no jack detect
+ * speaker out, analog
+ * fixed function, internal, Location N/A
+ */
AZALIA_PIN_CFG(0x0, 0x14, 0x90170110),
/* Pin Complex (NID 0x17) MONO Out - Disabled */
@@ -56,34 +59,40 @@
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
AZALIA_PIN_CFG(0x0, 0x18, 0x411111f0),
- /* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */
- // group2, cap 0
- // black, jack detect
- // Mic in, 3.5mm Jack
- // connector, External left panel
+ /*
+ * Pin Complex (NID 0x19) MIC2 - 3.5mm Jack
+ * group2, cap 0
+ * black, jack detect
+ * Mic in, 3.5mm Jack
+ * connector, External left panel
+ */
AZALIA_PIN_CFG(0x0, 0x19, 0x03a11020),
- /* Pin Complex (NID 0x1A) LINE1 - Disabled */
- AZALIA_PIN_CFG(0x0, 0x1A, 0x411111f0),
+ /* Pin Complex (NID 0x1a) LINE1 - Disabled */
+ AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1B) LINE2 - Disabled */
- AZALIA_PIN_CFG(0x0, 0x1B, 0x411111f0),
+ /* Pin Complex (NID 0x1b) LINE2 - Disabled */
+ AZALIA_PIN_CFG(0x0, 0x1b, 0x411111f0),
- /* Pin Complex (NID 0x1D) PCBeep */
- // eapd low on ex-amp, laptop, custom enable
- // mute spkr on hpout
- // pcbeep en able, checksum
- // no physical, Internal, Location N/A
- AZALIA_PIN_CFG(0x0, 0x1D, 0x4015812d),
+ /*
+ * Pin Complex (NID 0x1d) PCBeep
+ * eapd low on ex-amp, laptop, custom enable
+ * mute spkr on hpout
+ * pcbeep en able, checksum
+ * no physical, Internal, Location N/A
+ */
+ AZALIA_PIN_CFG(0x0, 0x1d, 0x4015812d),
- /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled */
- AZALIA_PIN_CFG(0x0, 0x1E, 0x411111f0),
+ /* Pin Complex (NID 0x1e) SPDIF-OUT - Disabled */
+ AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
- /* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack */
- // group2, cap 1
- // black, jack detect
- // HPOut, 3.5mm Jack
- // connector, left panel
+ /*
+ * Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack
+ * group2, cap 1
+ * black, jack detect
+ * HPOut, 3.5mm Jack
+ * connector, left panel
+ */
AZALIA_PIN_CFG(0x0, 0x21, 0x03211021),
/* Undocumented settings from Realtek (needed for beep_gen) */
@@ -95,13 +104,13 @@
/* Tuned jack detection */
0x02050043,
- 0x0204A614,
+ 0x0204a614,
0x02050047,
0x02049470,
};
const u32 pc_beep_verbs[] = {
- 0x00170500, /* power up everything (codec, dac, adc, mixers) */
+ 0x00170500, /* power up everything (codec, dac, adc, mixers) */
0x01470740, /* enable speaker out */
0x01470c02, /* set speaker EAPD pin */
0x0143b01f, /* unmute speaker */
diff --git a/src/mainboard/google/auron/variants/lulu/include/variant/hda_verb.h b/src/mainboard/google/auron/variants/lulu/include/variant/hda_verb.h
index a214a50..fc29a14 100644
--- a/src/mainboard/google/auron/variants/lulu/include/variant/hda_verb.h
+++ b/src/mainboard/google/auron/variants/lulu/include/variant/hda_verb.h
@@ -16,38 +16,41 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
- 0x10ec0283, // Subsystem ID
- 0x0000000e, // Number of jacks (NID entries)
+ 0x10ec0283, /* Codec Vendor / Device ID: Realtek ALC283 */
+ 0x10ec0283, /* Subsystem ID */
+ 14, /* Number of jacks (NID entries) */
- 0x0017ff00, // Function Reset
- 0x0017ff00, // Double Function Reset
- 0x000F0000, // Pad - get vendor id
- 0x000F0002, // Pad - get revision id
+ 0x0017ff00, /* Function Reset */
+ 0x0017ff00, /* Double Function Reset */
+ 0x000f0000, /* Pad - get vendor id */
+ 0x000f0002, /* Pad - get revision id */
/* Bits 31:28 - Codec Address */
/* Bits 27:20 - NID */
/* Bits 19:8 - Verb ID */
/* Bits 7:0 - Payload */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table */
+ /* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x11790670),
/* Pin Widget Verb Table */
- /* Pin Complex (NID 0x12) DMIC - Internal MIC */
- // group 3, cap 0
- // no connector, no jack detect
- // mic in, digital
- // fixed function, internal
+ /*
+ * Pin Complex (NID 0x12) DMIC - Internal MIC
+ * group 3, cap 0
+ * no connector, no jack detect
+ * mic in, digital
+ * fixed function, internal
+ */
AZALIA_PIN_CFG(0x0, 0x12, 0x90a60130),
- /* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */
- // group 1, cap 0
- // no connector, no jack detect
- // speaker out, analog
- // fixed function, internal, Location N/A
+ /*
+ * Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers
+ * group 1, cap 0
+ * no connector, no jack detect
+ * speaker out, analog
+ * fixed function, internal, Location N/A
+ */
AZALIA_PIN_CFG(0x0, 0x14, 0x90170110),
/* Pin Complex (NID 0x17) MONO Out - Disabled */
@@ -56,34 +59,40 @@
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
AZALIA_PIN_CFG(0x0, 0x18, 0x411111f0),
- /* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */
- // group2, cap 0
- // black, jack detect
- // Mic in, 3.5mm Jack
- // connector, External left panel
+ /*
+ * Pin Complex (NID 0x19) MIC2 - 3.5mm Jack
+ * group2, cap 0
+ * black, jack detect
+ * Mic in, 3.5mm Jack
+ * connector, External left panel
+ */
AZALIA_PIN_CFG(0x0, 0x19, 0x03a11020),
- /* Pin Complex (NID 0x1A) LINE1 - Disabled */
- AZALIA_PIN_CFG(0x0, 0x1A, 0x411111f0),
+ /* Pin Complex (NID 0x1a) LINE1 - Disabled */
+ AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1B) LINE2 - Disabled */
- AZALIA_PIN_CFG(0x0, 0x1B, 0x411111f0),
+ /* Pin Complex (NID 0x1b) LINE2 - Disabled */
+ AZALIA_PIN_CFG(0x0, 0x1b, 0x411111f0),
- /* Pin Complex (NID 0x1D) PCBeep */
- // eapd low on ex-amp, laptop, custom enable
- // mute spkr on hpout
- // pcbeep en able, checksum
- // no physical, Internal, Location N/A
+ /*
+ * Pin Complex (NID 0x1d) PCBeep
+ * eapd low on ex-amp, laptop, custom enable
+ * mute spkr on hpout
+ * pcbeep en able, checksum
+ * no physical, Internal, Location N/A
+ */
AZALIA_PIN_CFG(0x0, 0x1d, 0x4015812d),
- /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/
- AZALIA_PIN_CFG(0x0, 0x1E, 0x411111f0),
+ /* Pin Complex (NID 0x1e) SPDIF-OUT - Disabled */
+ AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
- /* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/
- // group2, cap 1
- // black, jack detect
- // HPOut, 3.5mm Jack
- // connector, left panel
+ /*
+ * Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack
+ * group2, cap 1
+ * black, jack detect
+ * HPOut, 3.5mm Jack
+ * connector, left panel
+ */
AZALIA_PIN_CFG(0x0, 0x21, 0x03211021),
/* Undocumented settings from Realtek (needed for beep_gen) */
@@ -95,13 +104,13 @@
/* Tuned jack detection */
0x02050043,
- 0x0204A614,
+ 0x0204a614,
0x02050047,
0x02049470,
};
const u32 pc_beep_verbs[] = {
- 0x00170500, /* power up everything (codec, dac, adc, mixers) */
+ 0x00170500, /* power up everything (codec, dac, adc, mixers) */
0x01470740, /* enable speaker out */
0x01470c02, /* set speaker EAPD pin */
0x0143b01f, /* unmute speaker */
diff --git a/src/mainboard/google/beltino/variants/mccloud/hda_verb.c b/src/mainboard/google/beltino/variants/mccloud/hda_verb.c
index 233a8ee..7162b73 100644
--- a/src/mainboard/google/beltino/variants/mccloud/hda_verb.c
+++ b/src/mainboard/google/beltino/variants/mccloud/hda_verb.c
@@ -13,21 +13,17 @@
* GNU General Public License for more details.
*/
-#ifndef HDA_VERB_H
-#define HDA_VERB_H
-
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
- 0x10ec0283, // Subsystem ID
- 0x0000000e, // Number of jacks (NID entries)
+ 0x10ec0283, /* Codec Vendor / Device ID: Realtek ALC283 */
+ 0x10ec0283, /* Subsystem ID */
+ 14, /* Number of jacks (NID entries) */
- 0x0017ff00, // Function Reset
- 0x0017ff00, // Double Function Reset
- 0x000F0000, // Pad - get vendor id
- 0x000F0002, // Pad - get revision id
+ 0x0017ff00, /* Function Reset */
+ 0x0017ff00, /* Double Function Reset */
+ 0x000f0000, /* Pad - get vendor id */
+ 0x000f0002, /* Pad - get revision id */
/* NID 0x01, HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x11790670),
@@ -43,37 +39,44 @@
/* Pin Complex (NID 0x17) MONO Out - Disabled */
AZALIA_PIN_CFG(0x0, 0x17, 0x411111f0),
- /* Pin Complex (NID 0x18) MIC1 PORTB */
- // group 1, cap 1
- // black, jack detect
- // mic in, analog
- // connector, left panel
- AZALIA_PIN_CFG(0x0, 0x19, 0x03a71011),
- /* Pin Complex (NID 0x19) MIC2 PORTF - Disabled */
+ /* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
AZALIA_PIN_CFG(0x0, 0x18, 0x411111f0),
- /* Pin Complex (NID 0x1A) LINE1 PORTC - Disabled */
+ /*
+ * Pin Complex (NID 0x19) MIC2 PORTF
+ * group 1, cap 1
+ * black, jack detect
+ * mic in, analog
+ * connector, left panel
+ */
+ AZALIA_PIN_CFG(0x0, 0x19, 0x03a71011),
+
+ /* Pin Complex (NID 0x1a) LINE1 PORTC - Disabled */
AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1B) LINE2 PORTE - Disabled */
+ /* Pin Complex (NID 0x1b) LINE2 PORTE - Disabled */
AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1d) PCBeep */
- // eapd low on ex-amp, laptop, custom enable
- // mute spkr on hpout
- // pcbeep en able, checksum
- // no physical, internal
+ /*
+ * Pin Complex (NID 0x1d) PCBeep
+ * eapd low on ex-amp, laptop, custom enable
+ * mute spkr on hpout
+ * pcbeep en able, checksum
+ * no physical, internal
+ */
AZALIA_PIN_CFG(0x0, 0x1d, 0x4015812d),
- /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled */
+ /* Pin Complex (NID 0x1e) SPDIF-OUT - Disabled */
AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
- /* Pin Complex (NID 0x21) HPOUT PORT-I */
- // group1,
- // black, jack detect
- // HPOut, 1/8 stereo
- // connector, left panel
+ /*
+ * Pin Complex (NID 0x21) HPOUT PORT-I
+ * group1,
+ * black, jack detect
+ * HPOut, 1/8 stereo
+ * connector, left panel
+ */
AZALIA_PIN_CFG(0x0, 0x21, 0x0321101f),
/* Undocumented settings from Realtek (needed for beep_gen) */
@@ -85,7 +88,7 @@
/* Tuned jack detection */
0x02050043,
- 0x0204A614,
+ 0x0204a614,
0x02050047,
0x02049470,
};
@@ -99,6 +102,4 @@
0x00b37410, /* unmute mixer nid 0xb beep input and set volume */
};
-
-#endif /* HDA_VERB_H */
AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/google/beltino/variants/monroe/hda_verb.c b/src/mainboard/google/beltino/variants/monroe/hda_verb.c
index 8281fb8..c0f029c 100644
--- a/src/mainboard/google/beltino/variants/monroe/hda_verb.c
+++ b/src/mainboard/google/beltino/variants/monroe/hda_verb.c
@@ -13,21 +13,17 @@
* GNU General Public License for more details.
*/
-#ifndef HDA_VERB_H
-#define HDA_VERB_H
-
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
- 0x10ec0283, // Subsystem ID
- 0x0000000e, // Number of jacks (NID entries)
+ 0x10ec0283, /* Codec Vendor / Device ID: Realtek ALC283 */
+ 0x10ec0283, /* Subsystem ID */
+ 14, /* Number of jacks (NID entries) */
- 0x0017ff00, // Function Reset
- 0x0017ff00, // Double Function Reset
- 0x000F0000, // Pad - get vendor id
- 0x000F0002, // Pad - get revision id
+ 0x0017ff00, /* Function Reset */
+ 0x0017ff00, /* Double Function Reset */
+ 0x000f0000, /* Pad - get vendor id */
+ 0x000f0002, /* Pad - get revision id */
/* NID 0x01, HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x11790670),
@@ -43,26 +39,28 @@
/* Pin Complex (NID 0x17) MONO Out - Disabled */
AZALIA_PIN_CFG(0x0, 0x17, 0x411111f0),
- /* Pin Complex (NID 0x18) MIC1 PORTB - Disabled*/
- AZALIA_PIN_CFG(0x0, 0x19, 0x411111f0),
-
- /* Pin Complex (NID 0x19) MIC2 PORTF - 3.5mm Jack*/
+ /* Pin Complex (NID 0x18) MIC1 PORTB - 3.5mm Jack*/
AZALIA_PIN_CFG(0x0, 0x18, 0x03a11020),
- /* Pin Complex (NID 0x1A) LINE1 PORTC - Disabled */
+ /* Pin Complex (NID 0x19) MIC2 PORTF - Disabled*/
+ AZALIA_PIN_CFG(0x0, 0x19, 0x411111f0),
+
+ /* Pin Complex (NID 0x1a) LINE1 PORTC - Disabled */
AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1B) LINE2 PORTE - Disabled */
- AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
+ /* Pin Complex (NID 0x1b) LINE2 PORTE - Disabled */
+ AZALIA_PIN_CFG(0x0, 0x1b, 0x411111f0),
- /* Pin Complex (NID 0x1d) PCBeep */
- // eapd low on ex-amp, laptop, custom enable
- // mute spkr on hpout
- // pcbeep en able, checksum
- // no physical, internal
+ /*
+ * Pin Complex (NID 0x1d) PCBeep
+ * eapd low on ex-amp, laptop, custom enable
+ * mute spkr on hpout
+ * pcbeep en able, checksum
+ * no physical, internal
+ */
AZALIA_PIN_CFG(0x0, 0x1d, 0x4015812d),
- /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled */
+ /* Pin Complex (NID 0x1e) SPDIF-OUT - Disabled */
AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
/* Pin Complex (NID 0x21) HPOUT PORT-I - Disabled */
@@ -74,6 +72,7 @@
0x02040c20,
0x0205001b,
0x0204081b,
+
/* Undocumented settings for SENSE_B pin jack detection */
0x02050006,
0x02042100,
@@ -86,7 +85,7 @@
/* Tuned jack detection */
0x02050043,
- 0x0204A614,
+ 0x0204a614,
0x02050047,
0x02049470,
};
@@ -100,6 +99,4 @@
0x00b37410, /* unmute mixer nid 0xb beep input and set volume */
};
-
-#endif /* HDA_VERB_H */
AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/google/beltino/variants/panther/hda_verb.c b/src/mainboard/google/beltino/variants/panther/hda_verb.c
index 233a8ee..fbc256b 100644
--- a/src/mainboard/google/beltino/variants/panther/hda_verb.c
+++ b/src/mainboard/google/beltino/variants/panther/hda_verb.c
@@ -13,21 +13,17 @@
* GNU General Public License for more details.
*/
-#ifndef HDA_VERB_H
-#define HDA_VERB_H
-
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
- 0x10ec0283, // Subsystem ID
- 0x0000000e, // Number of jacks (NID entries)
+ 0x10ec0283, /* Codec Vendor / Device ID: Realtek ALC283 */
+ 0x10ec0283, /* Subsystem ID */
+ 14, /* Number of jacks (NID entries) */
- 0x0017ff00, // Function Reset
- 0x0017ff00, // Double Function Reset
- 0x000F0000, // Pad - get vendor id
- 0x000F0002, // Pad - get revision id
+ 0x0017ff00, /* Function Reset */
+ 0x0017ff00, /* Double Function Reset */
+ 0x000f0000, /* Pad - get vendor id */
+ 0x000f0002, /* Pad - get revision id */
/* NID 0x01, HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x11790670),
@@ -43,37 +39,42 @@
/* Pin Complex (NID 0x17) MONO Out - Disabled */
AZALIA_PIN_CFG(0x0, 0x17, 0x411111f0),
- /* Pin Complex (NID 0x18) MIC1 PORTB */
- // group 1, cap 1
- // black, jack detect
- // mic in, analog
- // connector, left panel
+ /* Pin Complex (NID 0x18) MIC1 PORTB
+ * group 1, cap 1
+ * black, jack detect
+ * mic in, analog
+ * connector, left panel
+ */
AZALIA_PIN_CFG(0x0, 0x19, 0x03a71011),
/* Pin Complex (NID 0x19) MIC2 PORTF - Disabled */
AZALIA_PIN_CFG(0x0, 0x18, 0x411111f0),
- /* Pin Complex (NID 0x1A) LINE1 PORTC - Disabled */
+ /* Pin Complex (NID 0x1a) LINE1 PORTC - Disabled */
AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1B) LINE2 PORTE - Disabled */
+ /* Pin Complex (NID 0x1b) LINE2 PORTE - Disabled */
AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1d) PCBeep */
- // eapd low on ex-amp, laptop, custom enable
- // mute spkr on hpout
- // pcbeep en able, checksum
- // no physical, internal
+ /*
+ * Pin Complex (NID 0x1d) PCBeep
+ * eapd low on ex-amp, laptop, custom enable
+ * mute spkr on hpout
+ * pcbeep en able, checksum
+ * no physical, internal
+ */
AZALIA_PIN_CFG(0x0, 0x1d, 0x4015812d),
- /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled */
+ /* Pin Complex (NID 0x1e) SPDIF-OUT - Disabled */
AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
- /* Pin Complex (NID 0x21) HPOUT PORT-I */
- // group1,
- // black, jack detect
- // HPOut, 1/8 stereo
- // connector, left panel
+ /*
+ * Pin Complex (NID 0x21) HPOUT PORT-I
+ * group1,
+ * black, jack detect
+ * HPOut, 1/8 stereo
+ * connector, left panel
+ */
AZALIA_PIN_CFG(0x0, 0x21, 0x0321101f),
/* Undocumented settings from Realtek (needed for beep_gen) */
@@ -85,7 +86,7 @@
/* Tuned jack detection */
0x02050043,
- 0x0204A614,
+ 0x0204a614,
0x02050047,
0x02049470,
};
@@ -99,6 +100,4 @@
0x00b37410, /* unmute mixer nid 0xb beep input and set volume */
};
-
-#endif /* HDA_VERB_H */
AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/google/beltino/variants/tricky/hda_verb.c b/src/mainboard/google/beltino/variants/tricky/hda_verb.c
index 233a8ee..348dfc4 100644
--- a/src/mainboard/google/beltino/variants/tricky/hda_verb.c
+++ b/src/mainboard/google/beltino/variants/tricky/hda_verb.c
@@ -13,21 +13,17 @@
* GNU General Public License for more details.
*/
-#ifndef HDA_VERB_H
-#define HDA_VERB_H
-
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
- 0x10ec0283, // Subsystem ID
- 0x0000000e, // Number of jacks (NID entries)
+ 0x10ec0283, /* Codec Vendor / Device ID: Realtek ALC283 */
+ 0x10ec0283, /* Subsystem ID */
+ 14, /* Number of jacks (NID entries) */
- 0x0017ff00, // Function Reset
- 0x0017ff00, // Double Function Reset
- 0x000F0000, // Pad - get vendor id
- 0x000F0002, // Pad - get revision id
+ 0x0017ff00, /* Function Reset */
+ 0x0017ff00, /* Double Function Reset */
+ 0x000f0000, /* Pad - get vendor id */
+ 0x000f0002, /* Pad - get revision id */
/* NID 0x01, HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x11790670),
@@ -43,37 +39,43 @@
/* Pin Complex (NID 0x17) MONO Out - Disabled */
AZALIA_PIN_CFG(0x0, 0x17, 0x411111f0),
- /* Pin Complex (NID 0x18) MIC1 PORTB */
- // group 1, cap 1
- // black, jack detect
- // mic in, analog
- // connector, left panel
- AZALIA_PIN_CFG(0x0, 0x19, 0x03a71011),
-
- /* Pin Complex (NID 0x19) MIC2 PORTF - Disabled */
+ /* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
AZALIA_PIN_CFG(0x0, 0x18, 0x411111f0),
+ /*
+ * Pin Complex (NID 0x19) MIC2 PORTF
+ * group 1, cap 1
+ * black, jack detect
+ * mic in, analog
+ * connector, left panel
+ */
+ AZALIA_PIN_CFG(0x0, 0x19, 0x03a71011),
+
/* Pin Complex (NID 0x1A) LINE1 PORTC - Disabled */
AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
/* Pin Complex (NID 0x1B) LINE2 PORTE - Disabled */
AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1d) PCBeep */
- // eapd low on ex-amp, laptop, custom enable
- // mute spkr on hpout
- // pcbeep en able, checksum
- // no physical, internal
+ /*
+ * Pin Complex (NID 0x1d) PCBeep
+ * eapd low on ex-amp, laptop, custom enable
+ * mute spkr on hpout
+ * pcbeep en able, checksum
+ * no physical, internal
+ */
AZALIA_PIN_CFG(0x0, 0x1d, 0x4015812d),
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled */
AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
- /* Pin Complex (NID 0x21) HPOUT PORT-I */
- // group1,
- // black, jack detect
- // HPOut, 1/8 stereo
- // connector, left panel
+ /*
+ * Pin Complex (NID 0x21) HPOUT PORT-I
+ * group1,
+ * black, jack detect
+ * HPOut, 1/8 stereo
+ * connector, left panel
+ */
AZALIA_PIN_CFG(0x0, 0x21, 0x0321101f),
/* Undocumented settings from Realtek (needed for beep_gen) */
@@ -85,7 +87,7 @@
/* Tuned jack detection */
0x02050043,
- 0x0204A614,
+ 0x0204a614,
0x02050047,
0x02049470,
};
@@ -100,5 +102,4 @@
};
-#endif /* HDA_VERB_H */
AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/google/beltino/variants/zako/hda_verb.c b/src/mainboard/google/beltino/variants/zako/hda_verb.c
index 233a8ee..af6bbf9 100644
--- a/src/mainboard/google/beltino/variants/zako/hda_verb.c
+++ b/src/mainboard/google/beltino/variants/zako/hda_verb.c
@@ -13,21 +13,17 @@
* GNU General Public License for more details.
*/
-#ifndef HDA_VERB_H
-#define HDA_VERB_H
-
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
- 0x10ec0283, // Subsystem ID
- 0x0000000e, // Number of jacks (NID entries)
+ 0x10ec0283, /* Codec Vendor / Device ID: Realtek ALC283 */
+ 0x10ec0283, /* Subsystem ID */
+ 14, /* Number of jacks (NID entries) */
- 0x0017ff00, // Function Reset
- 0x0017ff00, // Double Function Reset
- 0x000F0000, // Pad - get vendor id
- 0x000F0002, // Pad - get revision id
+ 0x0017ff00, /* Function Reset */
+ 0x0017ff00, /* Double Function Reset */
+ 0x000f0000, /* Pad - get vendor id */
+ 0x000f0002, /* Pad - get revision id */
/* NID 0x01, HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x11790670),
@@ -43,37 +39,43 @@
/* Pin Complex (NID 0x17) MONO Out - Disabled */
AZALIA_PIN_CFG(0x0, 0x17, 0x411111f0),
- /* Pin Complex (NID 0x18) MIC1 PORTB */
- // group 1, cap 1
- // black, jack detect
- // mic in, analog
- // connector, left panel
- AZALIA_PIN_CFG(0x0, 0x19, 0x03a71011),
-
- /* Pin Complex (NID 0x19) MIC2 PORTF - Disabled */
+ /* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
AZALIA_PIN_CFG(0x0, 0x18, 0x411111f0),
+ /*
+ * Pin Complex (NID 0x19) MIC2 PORTF
+ * group 1, cap 1
+ * black, jack detect
+ * mic in, analog
+ * connector, left panel
+ */
+ AZALIA_PIN_CFG(0x0, 0x19, 0x03a71011),
+
/* Pin Complex (NID 0x1A) LINE1 PORTC - Disabled */
AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
/* Pin Complex (NID 0x1B) LINE2 PORTE - Disabled */
AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1d) PCBeep */
- // eapd low on ex-amp, laptop, custom enable
- // mute spkr on hpout
- // pcbeep en able, checksum
- // no physical, internal
+ /*
+ * Pin Complex (NID 0x1d) PCBeep
+ * eapd low on ex-amp, laptop, custom enable
+ * mute spkr on hpout
+ * pcbeep en able, checksum
+ * no physical, internal
+ */
AZALIA_PIN_CFG(0x0, 0x1d, 0x4015812d),
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled */
AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
- /* Pin Complex (NID 0x21) HPOUT PORT-I */
- // group1,
- // black, jack detect
- // HPOut, 1/8 stereo
- // connector, left panel
+ /*
+ * Pin Complex (NID 0x21) HPOUT PORT-I
+ * group1,
+ * black, jack detect
+ * HPOut, 1/8 stereo
+ * connector, left panel
+ */
AZALIA_PIN_CFG(0x0, 0x21, 0x0321101f),
/* Undocumented settings from Realtek (needed for beep_gen) */
@@ -85,7 +87,7 @@
/* Tuned jack detection */
0x02050043,
- 0x0204A614,
+ 0x0204a614,
0x02050047,
0x02049470,
};
@@ -99,6 +101,4 @@
0x00b37410, /* unmute mixer nid 0xb beep input and set volume */
};
-
-#endif /* HDA_VERB_H */
AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/google/butterfly/hda_verb.c b/src/mainboard/google/butterfly/hda_verb.c
index 231c188..85f2859 100644
--- a/src/mainboard/google/butterfly/hda_verb.c
+++ b/src/mainboard/google/butterfly/hda_verb.c
@@ -17,10 +17,10 @@
const u32 cim_verb_data[] = {
/* --- Codec #0 --- */
- 0x111d76e5, // Codec Vendor / Device ID: IDT 92HD99
- 0x103c18f9, // Subsystem ID
- 115, // Number of 4 dword sets
- AZALIA_SUBVENDOR(0x0, 0x103c18F9),
+ 0x111d76e5, /* Codec Vendor / Device ID: IDT 92HD99 */
+ 0x103c18f9, /* Subsystem ID */
+ 115, /* Number of 4 dword sets */
+ AZALIA_SUBVENDOR(0x0, 0x103c18f9),
/* Ext. Microphone Connector: External,Right; MicIn,3.5mm; Black,JD; DA,Seq */
AZALIA_PIN_CFG(0x0, 0x0a, 0x04a11020),
@@ -163,18 +163,16 @@
0x00b707c0, /* Enable PortB as Output with HP amp */
0x00d70740, /* Enable PortD as Output */
0x0017a200, /* Disable ClkEn of PortSenseTst */
- 0x0017c621, /* Slave Port - Port A used as microphone input for
- combo Jack
+ 0x0017c621, /* Slave Port - Port A used as microphone input for combo Jack
Master Port - Port B used for Jack Presence Detect
Enable Combo Jack Detection */
0x0017a208, /* Enable ClkEn of PortSenseTst */
0x00170500, /* Set power state to D0 */
/* --- Codec #3 --- */
- 0x80862806, // Codec Vendor / Device ID: Intel PantherPoint HDMI
- 0x80860101, // Subsystem ID
- // Revision ID: 0x100000
- 4, // Number of 4 dword sets
+ 0x80862806, /* Codec Vendor / Device ID: Intel PantherPoint HDMI */
+ 0x80860101, /* Subsystem ID */
+ 4, /* Number of 4 dword sets */
AZALIA_SUBVENDOR(0x3, 0x80860101),
AZALIA_PIN_CFG(0x3, 0x05, 0x18560010),
AZALIA_PIN_CFG(0x3, 0x06, 0x18560020),
diff --git a/src/mainboard/google/drallion/variants/drallion/include/variant/hda_verb.h b/src/mainboard/google/drallion/variants/drallion/include/variant/hda_verb.h
index 10fbaf1..e502760 100644
--- a/src/mainboard/google/drallion/variants/drallion/include/variant/hda_verb.h
+++ b/src/mainboard/google/drallion/variants/drallion/include/variant/hda_verb.h
@@ -19,14 +19,14 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0295, // Codec Vendor / Device ID: Realtek ALC3204
- 0xffffffff, // Subsystem ID
- 0x0000002b, // Number of jacks (NID entries)
+ 0x10ec0295, /* Codec Vendor / Device ID: Realtek ALC3204 */
+ 0xffffffff, /* Subsystem ID */
+ 43, /* Number of jacks (NID entries) */
- /* Rest Codec First */
+ /* Reset Codec First */
AZALIA_RESET(0x1),
- /* NID 0x01, HDA Codec Subsystem ID Verb Table */
+
+ /* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x102808b6),
/* Pin Widget Verb Table */
@@ -44,164 +44,192 @@
AZALIA_PIN_CFG(0x0, 0x21, 0x04211020),
/* D reset */
- 0x0205003C,
- 0x0204F254,
- 0x0205003C,
- 0x0204F214,
+ 0x0205003c,
+ 0x0204f254,
+ 0x0205003c,
+ 0x0204f214,
+
/* JD1 - 2port JD mode */
0x02050009,
- 0x0204E003,
- 0x0205000A,
+ 0x0204e003,
+ 0x0205000a,
0x02047770,
+
/* Set TRS type-1 */
0x02050045,
0x02045289,
0x02050049,
0x02040049,
- /* Set TRS type-2 + Set UAJ Line2 vref(ALC3254) */
- 0x0205004A,
- 0x0204A830,
+
+ /* Set TRS type-2 + Set UaJ Line2 vref(ALC3254) */
+ 0x0205004a,
+ 0x0204a830,
0x02050063,
- 0x0204CF00,
- /* NID 0x20 set class-D to 2W@4ohm (+12dB gain)
- * + Set sine tone gain(0x34) */
+ 0x0204cf00,
+
+ /* NID 0x20 set class-D to 2W@4ohm (+12db gain) + Set sine tone gain(0x34) */
0x02050038,
0x02043909,
- 0x05C50000,
- 0x05C43482,
- /* AGC-1 Disable + (Front Gain=0dB ) */
- 0x05D50006,
- 0x05D44C50,
- 0x05D50002,
- 0x05D44004,
- /* AGC-2 (Backt Boost Gain= -0.375dB ,Limiter = -3dB) */
- 0x05D50003,
- 0x05D45E5E,
- 0x05D50001,
- 0x05D4D788,
+ 0x05c50000,
+ 0x05c43482,
+
+ /* AGC-1 disable + (front Gain: 0db) */
+ 0x05d50006,
+ 0x05d44c50,
+ 0x05d50002,
+ 0x05d44004,
+
+ /* AGC-2 (back boost Gain: -0.375db, Limiter: -3db) */
+ 0x05d50003,
+ 0x05d45e5e,
+ 0x05d50001,
+ 0x05d4d788,
+
/* AGC-3 + AGC Enable */
- 0x05D50009,
- 0x05D451FF,
- 0x05D50006,
- 0x05D44E50,
+ 0x05d50009,
+ 0x05d451ff,
+ 0x05d50006,
+ 0x05d44e50,
+
/* HP-JD Enable +Nokia type */
- 0x0205004A,
+ 0x0205004a,
0x02042010,
0x02050008,
- 0x02046A0C,
- /* EAPD set to verb-control + I2C Un-use+ DVDD3.3V */
+ 0x02046a0c,
+
+ /* EAPD set to verb-control + I2c Un-use+ dVdd3.3V */
0x02050010,
0x02040020,
0x02050034,
- 0x0204A23D,
- /* Class D silent detection Enable -84dB threshold */
+ 0x0204a23d,
+
+ /* Class D silent detection Enable -84db threshold */
0x02050030,
0x02049000,
0x02050037,
- 0x0204FE15,
- /* Disable EQ + set 250Hz 3rd High Pass filter */
+ 0x0204fe15,
+
+ /* disable eQ + set 250Hz 3rd High Pass filter */
0x05350000,
- 0x0534203A,
+ 0x0534203a,
0x05350000,
- 0x0534203A,
+ 0x0534203a,
+
/* Left Channel-1 */
0x0535001d,
0x05340800,
0x0535001e,
0x05340800,
+
/* Left Channel-2 */
0x05350003,
- 0x05341EF8,
+ 0x05341ef8,
0x05350004,
0x05340000,
+
/* Left Channel-3 */
0x05350005,
- 0x053403EE,
+ 0x053403ee,
0x05350006,
- 0x0534FA60,
+ 0x0534fa60,
+
/* Left Channel-4 */
0x05350007,
- 0x05341E10,
+ 0x05341e10,
0x05350008,
- 0x05347B86,
+ 0x05347b86,
+
/* Left Channel-5 */
0x05350009,
- 0x053401F7,
- 0x0535000A,
- 0x05349FB6,
+ 0x053401f7,
+ 0x0535000a,
+ 0x05349fb6,
+
/* Left Channel-6 */
- 0x0535000B,
- 0x05341C00,
- 0x0535000C,
+ 0x0535000b,
+ 0x05341c00,
+ 0x0535000c,
0x05340000,
+
/* Left Channel-7 */
- 0x0535000D,
+ 0x0535000d,
0x05340200,
- 0x0535000E,
+ 0x0535000e,
0x05340000,
+
/* Right Channel-1 */
0x05450000,
0x05442000,
0x0545001d,
0x05440800,
+
/* Right Channel-2 */
0x0545001e,
0x05440800,
0x05450003,
- 0x05441EF8,
+ 0x05441ef8,
+
/* Right Channel-3 */
0x05450004,
0x05440000,
0x05450005,
- 0x054403EE,
+ 0x054403ee,
+
/* Right Channel-4 */
0x05450006,
- 0x0544FA60,
+ 0x0544fa60,
0x05450007,
- 0x05441E10,
+ 0x05441e10,
+
/* Right Channel-5 */
0x05450008,
- 0x05447B86,
+ 0x05447b86,
0x05450009,
- 0x054401F7,
+ 0x054401f7,
+
/* Right Channel-6 */
- 0x0545000A,
- 0x05449FB6,
- 0x0545000B,
- 0x05441C00,
+ 0x0545000a,
+ 0x05449fb6,
+ 0x0545000b,
+ 0x05441c00,
+
/* Right Channel-7 */
- 0x0545000C,
+ 0x0545000c,
0x05440000,
- 0x0545000D,
+ 0x0545000d,
0x05440200,
+
/* Right Channel-8 + EQ Update & Enable */
- 0x0545000E,
+ 0x0545000e,
0x05440000,
0x05350000,
- 0x0534E03A,
+ 0x0534e03a,
+
/* Enable all Microphone */
- 0x0205000D,
- 0x0204A023,
- 0x0205000D,
- 0x0204A023,
+ 0x0205000d,
+ 0x0204a023,
+ 0x0205000d,
+ 0x0204a023,
+
/* Enable Internal Speaker (NID14) */
- 0x0205000F,
+ 0x0205000f,
0x02040000,
- 0x0205000F,
+ 0x0205000f,
0x02040000,
};
const u32 pc_beep_verbs[] = {
/* PCBeep pass through to NID14 for ePSA test-1 */
0x02050036,
- 0x020477D7,
- 0x0143B000,
+ 0x020477d7,
+ 0x0143b000,
0x01470740,
+
/* PCBeep pass through to NID14 for ePSA test-2 */
- 0x01470C02,
- 0x01470C02,
- 0x01470C02,
- 0x01470C02,
+ 0x01470c02,
+ 0x01470c02,
+ 0x01470c02,
+ 0x01470c02,
};
AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/google/jecht/hda_verb.c b/src/mainboard/google/jecht/hda_verb.c
index 01ba78f..3e031c0 100644
--- a/src/mainboard/google/jecht/hda_verb.c
+++ b/src/mainboard/google/jecht/hda_verb.c
@@ -16,15 +16,14 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
- 0x10ec0283, // Subsystem ID
- 0x0000000e, // Number of jacks (NID entries)
+ 0x10ec0283, /* Codec Vendor / Device ID: Realtek ALC283 */
+ 0x10ec0283, /* Subsystem ID */
+ 14, /* Number of jacks (NID entries) */
- 0x0017ff00, // Function Reset
- 0x0017ff00, // Double Function Reset
- 0x000F0000, // Pad - get vendor id
- 0x000F0002, // Pad - get revision id
+ 0x0017ff00, /* Function Reset */
+ 0x0017ff00, /* Double Function Reset */
+ 0x000f0000, /* Pad - get vendor id */
+ 0x000f0002, /* Pad - get revision id */
/* NID 0x01, HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x11790670),
@@ -40,11 +39,13 @@
/* Pin Complex (NID 0x17) MONO Out - Disabled */
AZALIA_PIN_CFG(0x0, 0x17, 0x411111f0),
- /* Pin Complex (NID 0x18) MIC1 PORTB */
- // group 1, cap 1
- // black, jack detect
- // mic in, analog
- // connector, left panel
+ /*
+ * Pin Complex (NID 0x18) MIC1 PORTB
+ * group 1, cap 1
+ * black, jack detect
+ * mic in, analog
+ * connector, left panel
+ */
AZALIA_PIN_CFG(0x0, 0x18, 0x03a71011),
/* Pin Complex (NID 0x19) MIC2 PORTF - Disabled */
@@ -56,21 +57,25 @@
/* Pin Complex (NID 0x1B) LINE2 PORTE - Disabled */
AZALIA_PIN_CFG(0x0, 0x1B, 0x411111f0),
- /* Pin Complex (NID 0x1D) PCBeep */
- // eapd low on ex-amp, laptop, custom enable
- // mute spkr on hpout
- // pcbeep en able, checksum
- // no physical, internal
+ /*
+ * Pin Complex (NID 0x1D) PCBeep
+ * eapd low on ex-amp, laptop, custom enable
+ * mute spkr on hpout
+ * pcbeep en able, checksum
+ * no physical, internal
+ */
AZALIA_PIN_CFG(0x0, 0x1D, 0x4015812d),
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled */
AZALIA_PIN_CFG(0x0, 0x1E, 0x411111f0),
- /* Pin Complex (NID 0x21) HPOUT PORT-I */
- // group1,
- // black, jack detect
- // HPOut, 1/8 stereo
- // connector, left panel
+ /*
+ * Pin Complex (NID 0x21) HPOUT PORT-I
+ * group1,
+ * black, jack detect
+ * HPOut, 1/8 stereo
+ * connector, left panel
+ */
AZALIA_PIN_CFG(0x0, 0x21, 0x0321101f),
/* Undocumented settings from Realtek (needed for beep_gen) */
@@ -82,7 +87,7 @@
/* Tuned jack detection */
0x02050043,
- 0x0204A614,
+ 0x0204a614,
0x02050047,
0x02049470,
};
diff --git a/src/mainboard/google/link/hda_verb.c b/src/mainboard/google/link/hda_verb.c
index b824f0f..0c31b07 100644
--- a/src/mainboard/google/link/hda_verb.c
+++ b/src/mainboard/google/link/hda_verb.c
@@ -16,13 +16,12 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x11020011, // Codec Vendor / Device ID: Creative CA0132
- 0x144dc0c2, // Subsystem ID
- 0x00000014, // Number of jacks + Number of Malcolm setup blocks.
+ /* --- Codec #0 --- */
+ 0x11020011, /* Codec Vendor / Device ID: Creative CA0132 */
+ 0x144dc0c2, /* Subsystem ID */
+ 20, /* Number of jacks + Number of Malcolm setup blocks. */
/* Malcolm Setup */
-
0x01570d09,
0x01570c23,
0x01570a01,
@@ -75,10 +74,10 @@
/* Pin Widget Verb Table */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x144DC0C2 */
+ /* NID 0x01, HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x144dc0c2),
- /* Pin Complex (NID 0x0B) Port-G Analog Unknown Speaker at Int N/A */
+ /* Pin Complex (NID 0x0B) Port-G Analog Unknown Speaker at Int N/A */
AZALIA_PIN_CFG(0x0, 0x0b, 0x901700f0),
/* Pin Complex (NID 0x0C) N/C */
@@ -105,12 +104,12 @@
/* Pin Complex (NID 0x13) What you hear */
AZALIA_PIN_CFG(0x0, 0x13, 0x90d600f0),
- /* coreboot specific header */
- 0x80862806, // Codec Vendor / Device ID: Intel CougarPoint HDMI
- 0x80860101, // Subsystem ID
- 0x00000004, // Number of jacks
+ /* --- Codec #3 --- */
+ 0x80862806, /* Codec Vendor / Device ID: Intel CougarPoint HDMI */
+ 0x80860101, /* Subsystem ID */
+ 4, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */
+ /* NID 0x01, HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x3, 0x80860101),
/* Pin Complex (NID 0x05) Digital Out at Int HDMI */
@@ -123,14 +122,14 @@
AZALIA_PIN_CFG(0x3, 0x07, 0x18560030)
};
-
const u32 pc_beep_verbs[] = {
- 0x00170500, /* power up codec */
- 0x00270500, /* power up DAC */
- 0x00b70500, /* power up speaker */
- 0x00b70740, /* enable speaker out */
- 0x00b78d00, /* enable EAPD pin */
- 0x00b70c02, /* set EAPD pin */
- 0x0143b013, /* beep volume */
+ 0x00170500, /* power up codec */
+ 0x00270500, /* power up DAC */
+ 0x00b70500, /* power up speaker */
+ 0x00b70740, /* enable speaker out */
+ 0x00b78d00, /* enable EAPD pin */
+ 0x00b70c02, /* set EAPD pin */
+ 0x0143b013, /* beep volume */
};
+
AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/google/parrot/hda_verb.c b/src/mainboard/google/parrot/hda_verb.c
index e0454c7..12d49ff 100644
--- a/src/mainboard/google/parrot/hda_verb.c
+++ b/src/mainboard/google/parrot/hda_verb.c
@@ -31,11 +31,10 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0269, // Codec Vendor / Device ID: Realtek ALC269
- 0x10250742, // Subsystem ID
- 0x0000000E, // Number of jacks (NID entries)
-
+ /* --- Codec #0 --- */
+ 0x10ec0269, /* Codec Vendor / Device ID: Realtek ALC269 */
+ 0x10250742, /* Subsystem ID */
+ 14, /* Number of jacks (NID entries) */
/* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10250742 */
AZALIA_SUBVENDOR(0x0, 0x10250742),
@@ -45,11 +44,13 @@
/* Pin Complex (NID 0x12) DMIC */
AZALIA_PIN_CFG(0x0, 0x12, 0x411111f0),
- /* Pin Complex (NID 0x14) SPKR-OUT PORTD */
- // group 1, front left/right
- // no connector, no jack detect
- // speaker out, analog
- // fixed function, internal
+ /*
+ * Pin Complex (NID 0x14) SPKR-OUT PORTD
+ * group 1, front left/right
+ * no connector, no jack detect
+ * speaker out, analog
+ * fixed function, internal
+ */
AZALIA_PIN_CFG(0x0, 0x14, 0x90170110),
/* Pin Complex (NID 0x17) */
@@ -58,38 +59,46 @@
/* Pin Complex (NID 0x18) MIC1 PORTB */
AZALIA_PIN_CFG(0x0, 0x18, 0x411111f0),
- /* Pin Complex (NID 0x19) MIC2 PORTF */
- // group 2, cap 1
- // black, jack detect
- // mic in, analog
- // connector, right panel
+ /*
+ * Pin Complex (NID 0x19) MIC2 PORTF
+ * group 2, cap 1
+ * black, jack detect
+ * mic in, analog
+ * connector, right panel
+ */
AZALIA_PIN_CFG(0x0, 0x19, 0x04a71021),
- /* Pin Complex (NID 0x1A) LINE1 PORTC */
+ /* Pin Complex (NID 0x1a) LINE1 PORTC */
AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1B) LINE2 PORTE */
- // group 2, cap 0
- // no connector, no jack detect
- // mic in, analog
- // fixed function, internal
+ /*
+ * Pin Complex (NID 0x1B) LINE2 PORTE
+ * group 2, cap 0
+ * no connector, no jack detect
+ * mic in, analog
+ * fixed function, internal
+ */
AZALIA_PIN_CFG(0x0, 0x1b, 0x90a70120),
- /* Pin Complex (NID 0x1d) PCBeep */
- // eapd low on ex-amp, laptop, custom enable
- // mute spkr on hpout
- // pcbeep en able, checksum
- // no physical, internal
+ /*
+ * Pin Complex (NID 0x1d) PCBeep
+ * eapd low on ex-amp, laptop, custom enable
+ * mute spkr on hpout
+ * pcbeep en able, checksum
+ * no physical, internal
+ */
AZALIA_PIN_CFG(0x0, 0x1d, 0x4015812d),
- /* Pin Complex (NID 0x1E) SPDIF-OUT */
+ /* Pin Complex (NID 0x1e) SPDIF-OUT */
AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
- /* Pin Complex (NID 0x21) HPOUT PORTA? */
- // group1,
- // black, jack detect
- // HPOut, 1/8 stereo
- // connector, right panel
+ /*
+ * Pin Complex (NID 0x21) HPOUT PORTA?
+ * group1,
+ * black, jack detect
+ * HPOut, 1/8 stereo
+ * connector, right panel
+ */
AZALIA_PIN_CFG(0x0, 0x21, 0x0421101f),
/* Undocumented speaker output volume settings from Compal and Realtek */
@@ -100,32 +109,24 @@
0x02041901,
0x02050002,
- 0x0204AAB8,
- 0x0205000D,
+ 0x0204aab8,
+ 0x0205000d,
0x02044440,
0x02050008,
0x02040300,
0x02050017,
- 0x020400AF,
+ 0x020400af,
- /* --- Next Codec --- */
-
- /* coreboot specific header */
- 0x80862806, // Codec Vendor / Device ID: Intel PantherPoint HDMI
- 0x80860101, // Subsystem ID
- 0x00000004, // Number of jacks
+ /* --- Codec #3 --- */
+ 0x80862806, /* Codec Vendor / Device ID: Intel PantherPoint HDMI */
+ 0x80860101, /* Subsystem ID */
+ 4, /* Number of jacks */
/* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */
AZALIA_SUBVENDOR(0x0, 0x80860101),
-
- /* Pin Complex (NID 0x05) Digital Out at Int HDMI */
AZALIA_PIN_CFG(0x3, 0x05, 0x18560010),
-
- /* Pin Complex (NID 0x06) Digital Out at Int HDMI */
AZALIA_PIN_CFG(0x3, 0x06, 0x18560020),
-
- /* Pin Complex (NID 0x07) Digital Out at Int HDMI */
AZALIA_PIN_CFG(0x3, 0x07, 0x18560030)
};
diff --git a/src/mainboard/google/sarien/variants/arcada/include/variant/hda_verb.h b/src/mainboard/google/sarien/variants/arcada/include/variant/hda_verb.h
index 10fbaf1..e502760 100644
--- a/src/mainboard/google/sarien/variants/arcada/include/variant/hda_verb.h
+++ b/src/mainboard/google/sarien/variants/arcada/include/variant/hda_verb.h
@@ -19,14 +19,14 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0295, // Codec Vendor / Device ID: Realtek ALC3204
- 0xffffffff, // Subsystem ID
- 0x0000002b, // Number of jacks (NID entries)
+ 0x10ec0295, /* Codec Vendor / Device ID: Realtek ALC3204 */
+ 0xffffffff, /* Subsystem ID */
+ 43, /* Number of jacks (NID entries) */
- /* Rest Codec First */
+ /* Reset Codec First */
AZALIA_RESET(0x1),
- /* NID 0x01, HDA Codec Subsystem ID Verb Table */
+
+ /* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x102808b6),
/* Pin Widget Verb Table */
@@ -44,164 +44,192 @@
AZALIA_PIN_CFG(0x0, 0x21, 0x04211020),
/* D reset */
- 0x0205003C,
- 0x0204F254,
- 0x0205003C,
- 0x0204F214,
+ 0x0205003c,
+ 0x0204f254,
+ 0x0205003c,
+ 0x0204f214,
+
/* JD1 - 2port JD mode */
0x02050009,
- 0x0204E003,
- 0x0205000A,
+ 0x0204e003,
+ 0x0205000a,
0x02047770,
+
/* Set TRS type-1 */
0x02050045,
0x02045289,
0x02050049,
0x02040049,
- /* Set TRS type-2 + Set UAJ Line2 vref(ALC3254) */
- 0x0205004A,
- 0x0204A830,
+
+ /* Set TRS type-2 + Set UaJ Line2 vref(ALC3254) */
+ 0x0205004a,
+ 0x0204a830,
0x02050063,
- 0x0204CF00,
- /* NID 0x20 set class-D to 2W@4ohm (+12dB gain)
- * + Set sine tone gain(0x34) */
+ 0x0204cf00,
+
+ /* NID 0x20 set class-D to 2W@4ohm (+12db gain) + Set sine tone gain(0x34) */
0x02050038,
0x02043909,
- 0x05C50000,
- 0x05C43482,
- /* AGC-1 Disable + (Front Gain=0dB ) */
- 0x05D50006,
- 0x05D44C50,
- 0x05D50002,
- 0x05D44004,
- /* AGC-2 (Backt Boost Gain= -0.375dB ,Limiter = -3dB) */
- 0x05D50003,
- 0x05D45E5E,
- 0x05D50001,
- 0x05D4D788,
+ 0x05c50000,
+ 0x05c43482,
+
+ /* AGC-1 disable + (front Gain: 0db) */
+ 0x05d50006,
+ 0x05d44c50,
+ 0x05d50002,
+ 0x05d44004,
+
+ /* AGC-2 (back boost Gain: -0.375db, Limiter: -3db) */
+ 0x05d50003,
+ 0x05d45e5e,
+ 0x05d50001,
+ 0x05d4d788,
+
/* AGC-3 + AGC Enable */
- 0x05D50009,
- 0x05D451FF,
- 0x05D50006,
- 0x05D44E50,
+ 0x05d50009,
+ 0x05d451ff,
+ 0x05d50006,
+ 0x05d44e50,
+
/* HP-JD Enable +Nokia type */
- 0x0205004A,
+ 0x0205004a,
0x02042010,
0x02050008,
- 0x02046A0C,
- /* EAPD set to verb-control + I2C Un-use+ DVDD3.3V */
+ 0x02046a0c,
+
+ /* EAPD set to verb-control + I2c Un-use+ dVdd3.3V */
0x02050010,
0x02040020,
0x02050034,
- 0x0204A23D,
- /* Class D silent detection Enable -84dB threshold */
+ 0x0204a23d,
+
+ /* Class D silent detection Enable -84db threshold */
0x02050030,
0x02049000,
0x02050037,
- 0x0204FE15,
- /* Disable EQ + set 250Hz 3rd High Pass filter */
+ 0x0204fe15,
+
+ /* disable eQ + set 250Hz 3rd High Pass filter */
0x05350000,
- 0x0534203A,
+ 0x0534203a,
0x05350000,
- 0x0534203A,
+ 0x0534203a,
+
/* Left Channel-1 */
0x0535001d,
0x05340800,
0x0535001e,
0x05340800,
+
/* Left Channel-2 */
0x05350003,
- 0x05341EF8,
+ 0x05341ef8,
0x05350004,
0x05340000,
+
/* Left Channel-3 */
0x05350005,
- 0x053403EE,
+ 0x053403ee,
0x05350006,
- 0x0534FA60,
+ 0x0534fa60,
+
/* Left Channel-4 */
0x05350007,
- 0x05341E10,
+ 0x05341e10,
0x05350008,
- 0x05347B86,
+ 0x05347b86,
+
/* Left Channel-5 */
0x05350009,
- 0x053401F7,
- 0x0535000A,
- 0x05349FB6,
+ 0x053401f7,
+ 0x0535000a,
+ 0x05349fb6,
+
/* Left Channel-6 */
- 0x0535000B,
- 0x05341C00,
- 0x0535000C,
+ 0x0535000b,
+ 0x05341c00,
+ 0x0535000c,
0x05340000,
+
/* Left Channel-7 */
- 0x0535000D,
+ 0x0535000d,
0x05340200,
- 0x0535000E,
+ 0x0535000e,
0x05340000,
+
/* Right Channel-1 */
0x05450000,
0x05442000,
0x0545001d,
0x05440800,
+
/* Right Channel-2 */
0x0545001e,
0x05440800,
0x05450003,
- 0x05441EF8,
+ 0x05441ef8,
+
/* Right Channel-3 */
0x05450004,
0x05440000,
0x05450005,
- 0x054403EE,
+ 0x054403ee,
+
/* Right Channel-4 */
0x05450006,
- 0x0544FA60,
+ 0x0544fa60,
0x05450007,
- 0x05441E10,
+ 0x05441e10,
+
/* Right Channel-5 */
0x05450008,
- 0x05447B86,
+ 0x05447b86,
0x05450009,
- 0x054401F7,
+ 0x054401f7,
+
/* Right Channel-6 */
- 0x0545000A,
- 0x05449FB6,
- 0x0545000B,
- 0x05441C00,
+ 0x0545000a,
+ 0x05449fb6,
+ 0x0545000b,
+ 0x05441c00,
+
/* Right Channel-7 */
- 0x0545000C,
+ 0x0545000c,
0x05440000,
- 0x0545000D,
+ 0x0545000d,
0x05440200,
+
/* Right Channel-8 + EQ Update & Enable */
- 0x0545000E,
+ 0x0545000e,
0x05440000,
0x05350000,
- 0x0534E03A,
+ 0x0534e03a,
+
/* Enable all Microphone */
- 0x0205000D,
- 0x0204A023,
- 0x0205000D,
- 0x0204A023,
+ 0x0205000d,
+ 0x0204a023,
+ 0x0205000d,
+ 0x0204a023,
+
/* Enable Internal Speaker (NID14) */
- 0x0205000F,
+ 0x0205000f,
0x02040000,
- 0x0205000F,
+ 0x0205000f,
0x02040000,
};
const u32 pc_beep_verbs[] = {
/* PCBeep pass through to NID14 for ePSA test-1 */
0x02050036,
- 0x020477D7,
- 0x0143B000,
+ 0x020477d7,
+ 0x0143b000,
0x01470740,
+
/* PCBeep pass through to NID14 for ePSA test-2 */
- 0x01470C02,
- 0x01470C02,
- 0x01470C02,
- 0x01470C02,
+ 0x01470c02,
+ 0x01470c02,
+ 0x01470c02,
+ 0x01470c02,
};
AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/google/sarien/variants/sarien/include/variant/hda_verb.h b/src/mainboard/google/sarien/variants/sarien/include/variant/hda_verb.h
index 6eb6d14..2114ed3 100644
--- a/src/mainboard/google/sarien/variants/sarien/include/variant/hda_verb.h
+++ b/src/mainboard/google/sarien/variants/sarien/include/variant/hda_verb.h
@@ -19,14 +19,14 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0236, // Codec Vendor / Device ID: Realtek ALC3204
- 0xffffffff, // Subsystem ID
- 0x0000001e, // Number of jacks (NID entries)
+ 0x10ec0236, /* Codec Vendor / Device ID: Realtek ALC3204 */
+ 0xffffffff, /* Subsystem ID */
+ 30, /* Number of jacks (NID entries) */
- /* Rest Codec First */
+ /* Reset Codec First */
AZALIA_RESET(0x1),
- /* NID 0x01, HDA Codec Subsystem ID Verb Table */
+
+ /* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x102808b8),
/* Pin Widget Verb Table */
@@ -45,106 +45,123 @@
0x02050040,
0x02049800,
0x02050034,
- 0x0204023C,
+ 0x0204023c,
+
/* ALC3204 default-2 */
- 0x0205003C,
+ 0x0205003c,
0x02040354,
- 0x0205003C,
+ 0x0205003c,
0x02040314,
- /* ALC3204 Speaker output power - 4 ohm 2W (+12dB gain)
- * + Combo Jack TRS setting */
+
+ /* ALC3204 Speaker output power - 4 ohm 2W (+12dB gain) + Combo Jack TRS setting */
0x02050038,
0x02043901,
0x02050045,
0x02045089,
+
/* H/W AGC setting-1 */
0x02050016,
- 0x02040C50,
+ 0x02040c50,
0x02050012,
- 0x0204EBC2,
+ 0x0204ebc2,
+
/* H/W AGC setting-2 */
0x02050013,
0x0204401D,
0x02050016,
0x02044E50,
+
/* Zero data + EAPD to verb-control */
0x02050037,
- 0x0204FE15,
+ 0x0204fe15,
0x02050010,
0x02040020,
+
/* Zero data */
0x02050030,
0x02048000,
0x02050030,
0x02048000,
+
/* ALC3204 default-3 */
0x05750003,
- 0x05740DA3,
+ 0x05740da3,
0x02050046,
0x02040004,
+
/* ALC3204 default-4 */
- 0x0205001B,
- 0x02040A4B,
+ 0x0205001b,
+ 0x02040a4b,
0x02050008,
- 0x02046A6C,
+ 0x02046a6c,
+
/* JD1 */
0x02050009,
- 0x0204E003,
- 0x0205000A,
+ 0x0204e003,
+ 0x0205000a,
0x02047770,
- /* Microphone + Array MIC security Disable +ADC clock Enable */
- 0x0205000D,
- 0x0204A020,
+
+ /* Microphone + Array MIC security Disable + ADC clock Enable */
+ 0x0205000d,
+ 0x0204a020,
0x02050005,
0x02040700,
+
/* Speaker Enable */
- 0x0205000C,
- 0x020401EF,
- 0x0205000C,
- 0x020401EF,
+ 0x0205000c,
+ 0x020401ef,
+ 0x0205000c,
+ 0x020401ef,
+
/* EQ Bypass + EQ HPF cutoff 250Hz */
0x05350000,
- 0x0534201A,
+ 0x0534201a,
0x0535001d,
0x05340800,
+
/* EQ-2 */
0x0535001e,
0x05340800,
0x05350003,
- 0x05341EF8,
+ 0x05341ef8,
+
/* EQ-3 */
0x05350004,
0x05340000,
0x05450000,
0x05442000,
+
/* EQ-4 */
0x0545001d,
0x05440800,
0x0545001e,
0x05440800,
+
/* EQ-5 */
0x05450003,
- 0x05441EF8,
+ 0x05441ef8,
0x05450004,
0x05440000,
+
/* EQ Update */
0x05350000,
- 0x0534E01A,
+ 0x0534e01a,
0x05350000,
- 0x0534E01A,
+ 0x0534e01a,
};
const u32 pc_beep_verbs[] = {
-/* PCBeep pass through to NID14 for ePSA test-1 */
+ /* PCBeep pass through to NID14 for ePSA test-1 */
0x02050036,
0x02047717,
0x02050036,
0x02047717,
-/* PCBeep pass through to NID14 for ePSA test-2 */
+
+ /* PCBeep pass through to NID14 for ePSA test-2 */
0x01470740,
- 0x0143B000,
- 0x01470C02,
- 0x01470C02,
+ 0x0143b000,
+ 0x01470c02,
+ 0x01470c02,
};
AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/google/slippy/variants/falco/hda_verb.c b/src/mainboard/google/slippy/variants/falco/hda_verb.c
index 3d12d8a..f130420 100644
--- a/src/mainboard/google/slippy/variants/falco/hda_verb.c
+++ b/src/mainboard/google/slippy/variants/falco/hda_verb.c
@@ -16,15 +16,14 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
- 0x10ec0283, // Subsystem ID
- 0x0000000e, // Number of jacks (NID entries)
+ 0x10ec0283, /* Codec Vendor / Device ID: Realtek ALC283 */
+ 0x10ec0283, /* Subsystem ID */
+ 14, /* Number of jacks (NID entries) */
- 0x0017ff00, // Function Reset
- 0x0017ff00, // Double Function Reset
- 0x000F0000, // Pad - get vendor id
- 0x000F0002, // Pad - get revision id
+ 0x0017ff00, /* Function Reset */
+ 0x0017ff00, /* Double Function Reset */
+ 0x000f0000, /* Pad - get vendor id */
+ 0x000f0002, /* Pad - get revision id */
/* NID 0x01, HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x11790670),
@@ -34,11 +33,13 @@
/* Pin Complex (NID 0x12) DMIC - interior mobile lid */
AZALIA_PIN_CFG(0x0, 0x12, 0xb7a60110),
- /* Pin Complex (NID 0x14) SPKR-OUT PORTD */
- // group 1, front left/right
- // no connector, no jack detect
- // speaker out, analog
- // fixed function, internal
+ /*
+ * Pin Complex (NID 0x14) SPKR-OUT PORTD
+ * group 1, cap 0
+ * no connector, no jack detect
+ * speaker out, analog
+ * fixed function, internal
+ */
AZALIA_PIN_CFG(0x0, 0x14, 0x90170110),
/* Pin Complex (NID 0x17) MONO Out - Disabled */
@@ -47,34 +48,40 @@
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
AZALIA_PIN_CFG(0x0, 0x18, 0x411111f0),
- /* Pin Complex (NID 0x19) MIC2 PORTF */
- // group 1, cap 1
- // black, jack detect
- // mic in, analog
- // connector, left panel
+ /*
+ * Pin Complex (NID 0x19) MIC2 PORTF
+ * group1, cap 1
+ * black, jack detect
+ * mic in, analog
+ * connector, left panel
+ */
AZALIA_PIN_CFG(0x0, 0x19, 0x03a71011),
- /* Pin Complex (NID 0x1A) LINE1 PORTC - Disabled */
+ /* Pin Complex (NID 0x1a) LINE1 PORTC - Disabled */
AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1B) LINE2 PORTE - Disabled */
+ /* Pin Complex (NID 0x1b) LINE2 PORTE - Disabled */
AZALIA_PIN_CFG(0x0, 0x1b, 0x411111f0),
- /* Pin Complex (NID 0x1d) PCBeep */
- // eapd low on ex-amp, laptop, custom enable
- // mute spkr on hpout
- // pcbeep en able, checksum
- // no physical, internal
+ /*
+ * Pin Complex (NID 0x1d) PCBeep
+ * eapd low on ex-amp, laptop, custom enable
+ * mute spkr on hpout
+ * pcbeep enable, checksum
+ * no physical, internal
+ */
AZALIA_PIN_CFG(0x0, 0x1d, 0x4015812d),
- /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled */
+ /* Pin Complex (NID 0x1e) SPDIF-OUT - Disabled */
AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
- /* Pin Complex (NID 0x21) HPOUT PORT-I */
- // group1,
- // black, jack detect
- // HPOut, 1/8 stereo
- // connector, left panel
+ /*
+ * Pin Complex (NID 0x21) HPOUT PORT-I
+ * group1,
+ * black, jack detect
+ * HPOut, 1/8 stereo
+ * connector, left panel
+ */
AZALIA_PIN_CFG(0x0, 0x21, 0x0321101f),
/* Undocumented settings from Realtek (needed for beep_gen) */
@@ -86,7 +93,7 @@
/* Tuned jack detection */
0x02050043,
- 0x0204A614,
+ 0x0204a614,
0x02050047,
0x02049470,
};
diff --git a/src/mainboard/google/slippy/variants/leon/hda_verb.c b/src/mainboard/google/slippy/variants/leon/hda_verb.c
index 39a5c78..00abada 100644
--- a/src/mainboard/google/slippy/variants/leon/hda_verb.c
+++ b/src/mainboard/google/slippy/variants/leon/hda_verb.c
@@ -16,15 +16,14 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
- 0x10ec0283, // Subsystem ID
- 0x0000000e, // Number of jacks (NID entries)
+ 0x10ec0283, /* Codec Vendor / Device ID: Realtek ALC283 */
+ 0x10ec0283, /* Subsystem ID */
+ 14, /* Number of jacks (NID entries) */
- 0x0017ff00, // Function Reset
- 0x0017ff00, // Double Function Reset
- 0x000F0000, // Pad - get vendor id
- 0x000F0002, // Pad - get revision id
+ 0x0017ff00, /* Function Reset */
+ 0x0017ff00, /* Double Function Reset */
+ 0x000f0000, /* Pad - get vendor id */
+ 0x000f0002, /* Pad - get revision id */
/* NID 0x01, HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x11790670),
@@ -34,11 +33,13 @@
/* Pin Complex (NID 0x12) DMIC - Internal Mic */
AZALIA_PIN_CFG(0x0, 0x12, 0xb7a61010),
- /* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */
- // group 1, cap 0
- // no connector, no jack detect
- // speaker out, analog
- // fixed function, internal
+ /*
+ * Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers
+ * group 1, cap 0
+ * no connector, no jack detect
+ * speaker out, analog
+ * fixed function, internal
+ */
AZALIA_PIN_CFG(0x0, 0x14, 0x90170110),
/* Pin Complex (NID 0x17) MONO Out - Disabled */
@@ -47,34 +48,40 @@
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
AZALIA_PIN_CFG(0x0, 0x18, 0x411111f0),
- /* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */
- // group2, cap 0
- // black, jack detect
- // Mic in, 3.5mm Jack
- // connector, External left panel
+ /*
+ * Pin Complex (NID 0x19) MIC2 - 3.5mm Jack
+ * group2, cap 0
+ * black, jack detect
+ * Mic in, 3.5mm Jack
+ * connector, External left panel
+ */
AZALIA_PIN_CFG(0x0, 0x19, 0x03a11020),
- /* Pin Complex (NID 0x1A) LINE1 - Disabled */
+ /* Pin Complex (NID 0x1a) LINE1 - Disabled */
AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1B) LINE2 - Disabled */
+ /* Pin Complex (NID 0x1b) LINE2 - Disabled */
AZALIA_PIN_CFG(0x0, 0x1b, 0x411111f0),
- /* Pin Complex (NID 0x1D) PCBeep */
- // eapd low on ex-amp, laptop, custom enable
- // mute spkr on hpout
- // pcbeep en able, checksum
- // no physical, Internal, Location N/A
+ /*
+ * Pin Complex (NID 0x1d) PCBeep
+ * eapd low on ex-amp, laptop, custom enable
+ * mute spkr on hpout
+ * pcbeep enable, checksum
+ * no physical, Internal, Location N/A
+ */
AZALIA_PIN_CFG(0x0, 0x1d, 0x4015812d),
- /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/
+ /* Pin Complex (NID 0x1e) SPDIF-OUT - Disabled*/
AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
- /* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/
- // group2, cap 1
- // black, jack detect
- // HPOut, 3.5mm Jack
- // connector, left panel
+ /*
+ * Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack
+ * group2, cap 1
+ * black, jack detect
+ * HPOut, 3.5mm Jack
+ * connector, left panel
+ */
AZALIA_PIN_CFG(0x0, 0x21, 0x03211021),
/* Undocumented settings from Realtek (needed for beep_gen) */
@@ -86,7 +93,7 @@
/* Tuned jack detection */
0x02050043,
- 0x0204A614,
+ 0x0204a614,
0x02050047,
0x02049470,
};
diff --git a/src/mainboard/google/slippy/variants/peppy/hda_verb.c b/src/mainboard/google/slippy/variants/peppy/hda_verb.c
index a5ec9bb..f653d34 100644
--- a/src/mainboard/google/slippy/variants/peppy/hda_verb.c
+++ b/src/mainboard/google/slippy/variants/peppy/hda_verb.c
@@ -16,15 +16,14 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
- 0x10ec0283, // Subsystem ID
- 0x0000000e, // Number of jacks (NID entries)
+ 0x10ec0283, /* Codec Vendor / Device ID: Realtek ALC283 */
+ 0x10ec0283, /* Subsystem ID */
+ 14, /* Number of jacks (NID entries) */
- 0x0017ff00, // Function Reset
- 0x0017ff00, // Double Function Reset
- 0x000F0000, // Pad - get vendor id
- 0x000F0002, // Pad - get revision id
+ 0x0017ff00, /* Function Reset */
+ 0x0017ff00, /* Double Function Reset */
+ 0x000f0000, /* Pad - get vendor id */
+ 0x000f0002, /* Pad - get revision id */
/* NID 0x01, HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x11790670),
@@ -34,11 +33,13 @@
/* Pin Complex (NID 0x12) DMIC - Disabled */
AZALIA_PIN_CFG(0x0, 0x12, 0x411111f0),
- /* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */
- // group 1, cap 0
- // no connector, no jack detect
- // speaker out, analog
- // fixed function, internal, Location N/A
+ /*
+ * Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers
+ * group 1, cap 0
+ * no connector, no jack detect
+ * speaker out, analog
+ * fixed function, internal
+ */
AZALIA_PIN_CFG(0x0, 0x14, 0x90170110),
/* Pin Complex (NID 0x17) MONO Out - Disabled */
@@ -47,38 +48,46 @@
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
AZALIA_PIN_CFG(0x0, 0x18, 0x411111f0),
- /* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */
- // group2, cap 0
- // black, jack detect
- // Mic in, 3.5mm Jack
- // connector, External left panel
+ /*
+ * Pin Complex (NID 0x19) MIC2 - 3.5mm Jack
+ * group2, cap 0
+ * black, jack detect
+ * Mic in, 3.5mm Jack
+ * connector, External left panel
+ */
AZALIA_PIN_CFG(0x0, 0x19, 0x03a11020),
- /* Pin Complex (NID 0x1A) LINE1 - Internal Mic */
- // group 1, cap 1
- // no connector, no jack detect
- // mic in, analog connection
- // Fixed function, internal, Location N/A
+ /*
+ * Pin Complex (NID 0x1a) LINE1 - Internal Mic
+ * group 1, cap 1
+ * no connector, no jack detect
+ * mic in, analog connection
+ * Fixed function, internal, Location N/A
+ */
AZALIA_PIN_CFG(0x0, 0x1a, 0x90a70111),
- /* Pin Complex (NID 0x1B) LINE2 - Disabled */
+ /* Pin Complex (NID 0x1b) LINE2 - Disabled */
AZALIA_PIN_CFG(0x0, 0x1b, 0x411111f0),
- /* Pin Complex (NID 0x1D) PCBeep */
- // eapd low on ex-amp, laptop, custom enable
- // mute spkr on hpout
- // pcbeep en able, checksum
- // no physical, Internal, Location N/A
+ /*
+ * Pin Complex (NID 0x1d) PCBeep
+ * eapd low on ex-amp, laptop, custom enable
+ * mute spkr on hpout
+ * pcbeep enable, checksum
+ * no physical, Internal, Location N/A
+ */
AZALIA_PIN_CFG(0x0, 0x1d, 0x4015812d),
- /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/
+ /* Pin Complex (NID 0x1e) SPDIF-OUT - Disabled*/
AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
- /* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/
- // group2, cap 1
- // black, jack detect
- // HPOut, 3.5mm Jack
- // connector, left panel
+ /*
+ * Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack
+ * group2, cap 1
+ * black, jack detect
+ * HPOut, 3.5mm Jack
+ * connector, left panel
+ */
AZALIA_PIN_CFG(0x0, 0x21, 0x03211021),
/* Undocumented settings from Realtek (needed for beep_gen) */
@@ -90,7 +99,7 @@
/* Tuned jack detection */
0x02050043,
- 0x0204A614,
+ 0x0204a614,
0x02050047,
0x02049470,
};
diff --git a/src/mainboard/google/slippy/variants/wolf/hda_verb.c b/src/mainboard/google/slippy/variants/wolf/hda_verb.c
index 56fe320..5024a1e 100644
--- a/src/mainboard/google/slippy/variants/wolf/hda_verb.c
+++ b/src/mainboard/google/slippy/variants/wolf/hda_verb.c
@@ -16,15 +16,14 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
- 0x10ec0283, // Subsystem ID
- 0x0000000e, // Number of jacks (NID entries)
+ 0x10ec0283, /* Codec Vendor / Device ID: Realtek ALC283 */
+ 0x10ec0283, /* Subsystem ID */
+ 14, /* Number of jacks (NID entries) */
- 0x0017ff00, // Function Reset
- 0x0017ff00, // Double Function Reset
- 0x000F0000, // Pad - get vendor id
- 0x000F0002, // Pad - get revision id
+ 0x0017ff00, /* Function Reset */
+ 0x0017ff00, /* Double Function Reset */
+ 0x000f0000, /* Pad - get vendor id */
+ 0x000f0002, /* Pad - get revision id */
/* Bits 31:28 - Codec Address */
/* Bits 27:20 - NID */
@@ -39,11 +38,13 @@
/* Pin Complex (NID 0x12) DMIC - interior mobile lid */
AZALIA_PIN_CFG(0x0, 0x12, 0xb7a60110),
- /* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */
- // group 1, cap 0
- // no connector, no jack detect
- // speaker out, analog
- // fixed function, internal, Location N/A
+ /*
+ * Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers
+ * group 1, cap 0
+ * no connector, no jack detect
+ * speaker out, analog
+ * fixed function, internal
+ */
AZALIA_PIN_CFG(0x0, 0x14, 0x90170110),
/* Pin Complex (NID 0x17) MONO Out - Disabled */
@@ -52,34 +53,40 @@
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
AZALIA_PIN_CFG(0x0, 0x18, 0x411111f0),
- /* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */
- // group2, cap 0
- // black, jack detect
- // Mic in, 3.5mm Jack
- // connector, External left panel
+ /*
+ * Pin Complex (NID 0x19) MIC2 - 3.5mm Jack
+ * group2, cap 0
+ * black, jack detect
+ * Mic in, 3.5mm Jack
+ * connector, External left panel
+ */
AZALIA_PIN_CFG(0x0, 0x19, 0x03a11020),
- /* Pin Complex (NID 0x1A) LINE1 PORTC - Disabled */
+ /* Pin Complex (NID 0x1a) LINE1 PORTC - Disabled */
AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1B) LINE2 - Disabled */
+ /* Pin Complex (NID 0x1b) LINE2 - Disabled */
AZALIA_PIN_CFG(0x0, 0x1b, 0x411111f0),
- /* Pin Complex (NID 0x1D) PCBeep */
- // eapd low on ex-amp, laptop, custom enable
- // mute spkr on hpout
- // pcbeep en able, checksum
- // no physical, Internal, Location N/A
+ /*
+ * Pin Complex (NID 0x1d) PCBeep
+ * eapd low on ex-amp, laptop, custom enable
+ * mute spkr on hpout
+ * pcbeep enable, checksum
+ * no physical, Internal, Location N/A
+ */
AZALIA_PIN_CFG(0x0, 0x1d, 0x4015812d),
- /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/
+ /* Pin Complex (NID 0x1e) SPDIF-OUT - Disabled*/
AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
- /* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/
- // group2, cap 1
- // black, jack detect
- // HPOut, 3.5mm Jack
- // connector, left panel
+ /*
+ * Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack
+ * group2, cap 1
+ * black, jack detect
+ * HPOut, 3.5mm Jack
+ * connector, left panel
+ */
AZALIA_PIN_CFG(0x0, 0x21, 0x03211021),
/* Undocumented settings from Realtek (needed for beep_gen) */
@@ -91,7 +98,7 @@
/* Tuned jack detection */
0x02050043,
- 0x0204A614,
+ 0x0204a614,
0x02050047,
0x02049470,
};
diff --git a/src/mainboard/google/stout/hda_verb.c b/src/mainboard/google/stout/hda_verb.c
index 46ca274..30d234f 100644
--- a/src/mainboard/google/stout/hda_verb.c
+++ b/src/mainboard/google/stout/hda_verb.c
@@ -16,44 +16,44 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0269, // Codec Vendor / Device ID: Realtek
- 0x17aa21fe, // Subsystem ID
- 0x0000000c, // Number of jacks
+ /* --- Codec #0 --- */
+ 0x10ec0269, /* Codec Vendor / Device ID: Realtek ALC269 */
+ 0x17aa21fe, /* Subsystem ID */
+ 12, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x17aa21fe */
+ /* NID 0x01, HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x17aa21fe),
/* Pin Widget Verb Table */
- /* Pin Complex (NID 0x12): 0x90a60930 DMIC */
+ /* Pin Complex (NID 0x12): DMIC */
AZALIA_PIN_CFG(0x0, 0x12, 0x90a60930),
- /* Pin Complex (NID 0x14): 0x90170110 SPEAKER-OUT (Port-D) */
+ /* Pin Complex (NID 0x14): SPEAKER-OUT (Port-D) */
AZALIA_PIN_CFG(0x0, 0x14, 0x90170110),
- /* Pin Complex (NID 0x15): 0x0321101f HP-OUT (Port-A) */
+ /* Pin Complex (NID 0x15): HP-OUT (Port-A) */
AZALIA_PIN_CFG(0x0, 0x15, 0x0321101f),
- /* Pin Complex (NID 0x17): 0x411111f0 MONO-OUT (Port-H) */
+ /* Pin Complex (NID 0x17): MONO-OUT (Port-H) */
AZALIA_PIN_CFG(0x0, 0x17, 0x411111f0),
- /* Pin Complex (NID 0x18): 0x03a11820 MIC1 (Port-B) */
+ /* Pin Complex (NID 0x18): MIC1 (Port-B) */
AZALIA_PIN_CFG(0x0, 0x18, 0x03a11820),
- /* Pin Complex (NID 0x19): 0x411111f0 MIC2 (Port-F) */
+ /* Pin Complex (NID 0x19): MIC2 (Port-F) */
AZALIA_PIN_CFG(0x0, 0x19, 0x411111f0),
- /* Pin Complex (NID 0x1a): 0x411111f0 LINE1 (Port-C) */
+ /* Pin Complex (NID 0x1a): LINE1 (Port-C) */
AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1b): 0x411111f0 LINE2 (Port-E) */
+ /* Pin Complex (NID 0x1b): LINE2 (Port-E) */
AZALIA_PIN_CFG(0x0, 0x1b, 0x411111f0),
- /* Pin Complex (NID 0x1d): 0x4016862d PC-BEEP */
+ /* Pin Complex (NID 0x1d): PC-BEEP */
AZALIA_PIN_CFG(0x0, 0x1d, 0x4016862d),
- /* Pin Complex (NID 0x1e): 0x411111f0 S/PDIF-OUT */
+ /* Pin Complex (NID 0x1e): S/PDIF-OUT */
AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
/* Stout MIC detect setup */
@@ -62,12 +62,12 @@
0x02050008,
0x02040300,
- /* coreboot specific header */
- 0x80862806, // Codec Vendor / Device ID: Intel PantherPoint HDMI
- 0x80860101, // Subsystem ID
- 0x00000004, // Number of jacks
+ /* --- Codec #3 --- */
+ 0x80862806, /* Codec Vendor / Device ID: Intel PantherPoint HDMI */
+ 0x80860101, /* Subsystem ID */
+ 4, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */
+ /* NID 0x01, HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x3, 0x80860101),
/* Pin Complex (NID 0x05) Digital Out at Int HDMI */
diff --git a/src/mainboard/hp/8470p/hda_verb.c b/src/mainboard/hp/8470p/hda_verb.c
index a24aeb2..78d49db 100644
--- a/src/mainboard/hp/8470p/hda_verb.c
+++ b/src/mainboard/hp/8470p/hda_verb.c
@@ -18,56 +18,27 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- 0x111d7605, /* Codec Vendor / Device ID: IDT */
- 0x103c17c2, /* Subsystem ID */
-
- 11, /* Number of 4 dword sets */
- /* NID 0x01: Subsystem ID. */
+ 0x111d7605, /* Codec Vendor / Device ID: IDT */
+ 0x103c17c2, /* Subsystem ID */
+ 11, /* Number of 4 dword sets */
AZALIA_SUBVENDOR(0x0, 0x103c17c2),
-
- /* NID 0x0a. */
AZALIA_PIN_CFG(0x0, 0x0a, 0x21011030),
-
- /* NID 0x0b. */
AZALIA_PIN_CFG(0x0, 0x0b, 0x0421101f),
-
- /* NID 0x0c. */
AZALIA_PIN_CFG(0x0, 0x0c, 0x04a11020),
-
- /* NID 0x0d. */
AZALIA_PIN_CFG(0x0, 0x0d, 0x90170110),
-
- /* NID 0x0e. */
AZALIA_PIN_CFG(0x0, 0x0e, 0x40f000f0),
-
- /* NID 0x0f. */
AZALIA_PIN_CFG(0x0, 0x0f, 0x2181102e),
-
- /* NID 0x10. */
AZALIA_PIN_CFG(0x0, 0x10, 0x40f000f0),
-
- /* NID 0x11. */
AZALIA_PIN_CFG(0x0, 0x11, 0xd5a30140),
-
- /* NID 0x1f. */
AZALIA_PIN_CFG(0x0, 0x1f, 0x40f000f0),
-
- /* NID 0x20. */
AZALIA_PIN_CFG(0x0, 0x20, 0x40f000f0),
- 0x80862806, /* Codec Vendor / Device ID: Intel */
- 0x80860101, /* Subsystem ID */
- 4, /* Number of 4 dword sets */
- /* NID 0x01: Subsystem ID. */
+ 0x80862806, /* Codec Vendor / Device ID: Intel */
+ 0x80860101, /* Subsystem ID */
+ 4, /* Number of 4 dword sets */
AZALIA_SUBVENDOR(0x3, 0x80860101),
-
- /* NID 0x05. */
AZALIA_PIN_CFG(0x3, 0x05, 0x18560010),
-
- /* NID 0x06. */
AZALIA_PIN_CFG(0x3, 0x06, 0x18560020),
-
- /* NID 0x07. */
AZALIA_PIN_CFG(0x3, 0x07, 0x18560030),
};
diff --git a/src/mainboard/intel/baskingridge/hda_verb.c b/src/mainboard/intel/baskingridge/hda_verb.c
index bee63f4..ea1a11c 100644
--- a/src/mainboard/intel/baskingridge/hda_verb.c
+++ b/src/mainboard/intel/baskingridge/hda_verb.c
@@ -16,16 +16,15 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10134210, // Codec Vendor / Device ID: Cirrus Logic CS4210
- 0x10134210, // Subsystem ID
- 0x00000007, // Number of jacks
+ /* --- Codec #0 --- */
+ 0x10134210, /* Codec Vendor / Device ID: Cirrus Logic CS4210 */
+ 0x10134210, /* Subsystem ID */
+ 7, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10134210 */
+ /* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x10134210),
/* Pin Widget Verb Table */
-
/* Pin Complex (NID 0x05) 1/8 Gray HP Out at Ext Front */
AZALIA_PIN_CFG(0x0, 0x05, 0x022120f0),
@@ -44,13 +43,13 @@
/* Pin Complex (NID 0x0a) Optical Black SPDIF Out at Ext N/A */
AZALIA_PIN_CFG(0x0, 0x0a, 0x434510f0),
- /* coreboot specific header */
- 0x80862805, // Codec Vendor / Device ID: Intel CougarPoint HDMI
- 0x80860101, // Subsystem ID
- 0x00000004, // Number of jacks
+ /* --- Codec #3 --- */
+ 0x80862805, /* Codec Vendor / Device ID: Intel CougarPoint HDMI */
+ 0x80860101, /* Subsystem ID */
+ 4, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */
- AZALIA_SUBVENDOR(0x0, 0x80860101),
+ /* HDA Codec Subsystem ID Verb Table */
+ AZALIA_SUBVENDOR(0x3, 0x80860101),
/* Pin Complex (NID 0x05) Digital Out at Int HDMI */
AZALIA_PIN_CFG(0x3, 0x05, 0x18560010),
diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/include/variant/hda_verb.h b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/include/variant/hda_verb.h
index f921f3f..bca9016 100644
--- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/include/variant/hda_verb.h
+++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/include/variant/hda_verb.h
@@ -20,20 +20,13 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
-
- /*
- * VerbTable: CFL Display Audio Codec
- * Revision ID = 0xFF
- * Codec Vendor: 0x8086280B
- */
-
- 0x8086280B,
- 0xFFFFFFFF,
- 0x00000005,
+ 0x8086280b, /* Codec Vendor / Device ID: Intel CFL Display Audio */
+ 0xffffffff, /* Subsystem ID */
+ 5, /* Number of jacks */
/*
* Display Audio Verb Table
- * For GEN9, the Vendor Node ID is 08h
+ * For GEN9, the Vendor Node ID is 0x08
* Port to be exposed to the inbox driver in the vanilla mode
* PORT C - BIT[7:6] = 01b
*/
@@ -41,147 +34,164 @@
0x00878140,
0x00878140,
0x00878140,
+
/* Pin Widget 5 - PORT B - Configuration Default: 0x18560010 */
- 0x00571C10,
- 0x00571D00,
- 0x00571E56,
- 0x00571F18,
+ 0x00571c10,
+ 0x00571d00,
+ 0x00571e56,
+ 0x00571f18,
+
/* Pin Widget 6 - PORT C - Configuration Default: 0x18560020 */
- 0x00671C20,
- 0x00671D00,
- 0x00671E56,
- 0x00671F18,
+ 0x00671c20,
+ 0x00671d00,
+ 0x00671e56,
+ 0x00671f18,
+
/* Pin Widget 7 - PORT D - Configuration Default: 0x18560030 */
- 0x00771C30,
- 0x00771D00,
- 0x00771E56,
- 0x00771F18,
- /* Disable the third converter and third Pin (NID 08h) */
+ 0x00771c30,
+ 0x00771d00,
+ 0x00771e56,
+ 0x00771f18,
+
+ /* Disable the third converter and third pin (NID 0x08) */
0x00878140,
0x00878140,
0x00878140,
0x00878140,
- /* ALC700 */
- 0x10EC0700,
- 0xFFFFFFFF,
- 0x00000015,
+
+
+ 0x10ec0700, /* Codec Vendor / Device ID: Realtek ALC700 */
+ 0xffffffff, /* Subsystem ID */
+ 21, /* Number of jacks */
/*
* HDA Codec Subsystem ID Verb-table
- * HDA Codec Subsystem ID : 0x10EC112C
+ * HDA Codec Subsystem ID : 0x10ec112c
*/
- 0x0017202C,
+ 0x0017202c,
0x00172111,
- 0x001722EC,
+ 0x001722ec,
0x00172310,
/*
* Pin Widget Verb-table
* Widget node 0x01
*/
- 0x0017FF00,
- 0x0017FF00,
- 0x0017FF00,
- 0x0017FF00,
+ 0x0017ff00,
+ 0x0017ff00,
+ 0x0017ff00,
+ 0x0017ff00,
+
/* Pin widget 0x12 - DMIC */
- 0x01271C00,
- 0x01271D00,
- 0x01271E00,
- 0x01271F40,
+ 0x01271c00,
+ 0x01271d00,
+ 0x01271e00,
+ 0x01271f40,
+
/* Pin widget 0x13 - DMIC */
- 0x01371CF0,
- 0x01371D11,
- 0x01371E11,
- 0x01371F41,
+ 0x01371cf0,
+ 0x01371d11,
+ 0x01371e11,
+ 0x01371f41,
+
/* Pin widget 0x14 - FRONT (Port-D) */
- 0x01471CF0,
- 0x01471D11,
- 0x01471E11,
- 0x01471F41,
+ 0x01471cf0,
+ 0x01471d11,
+ 0x01471e11,
+ 0x01471f41,
+
/* Pin widget 0x15 - I2S-OUT */
- 0x01571C10,
- 0x01571D01,
- 0x01571E17,
- 0x01571F90,
+ 0x01571c10,
+ 0x01571d01,
+ 0x01571e17,
+ 0x01571f90,
+
/* Pin widget 0x16 - LINE3 (Port-B) */
- 0x01671C20,
- 0x01671D10,
- 0x01671E01,
- 0x01671F01,
+ 0x01671c20,
+ 0x01671d10,
+ 0x01671e01,
+ 0x01671f01,
+
/* Pin widget 0x17 - I2S-OUT */
- 0x01771CF0,
- 0x01771D11,
- 0x01771E11,
- 0x01771F41,
+ 0x01771cf0,
+ 0x01771d11,
+ 0x01771e11,
+ 0x01771f41,
+
/* Pin widget 0x18 - I2S-IN */
- 0x01871CF0,
- 0x01871D11,
- 0x01871E11,
- 0x01871F41,
- /* Pin widget 0x19 - MIC2 (Port-F) */
- 0x01971C30,
- 0x01971D90,
- 0x01971EA1,
- 0x01971F02,
- /* Pin widget 0x1A - LINE1 (Port-C) */
- 0x01A71CF0,
- 0x01A71D11,
- 0x01A71E11,
- 0x01A71F41,
- /* Pin widget 0x1B - LINE2 (Port-E) */
- 0x01B71C40,
- 0x01B71D90,
- 0x01B71EA1,
- 0x01B71F01,
- /* Pin widget 0x1D - PC-BEEP */
- 0x01D71C69,
- 0x01D71D84,
- 0x01D71E45,
- 0x01D71F40,
- /* Pin widget 0x1E - S/PDIF-OUT */
- 0x01E71CF0,
- 0x01E71D11,
- 0x01E71E11,
- 0x01E71F41,
- /* Pin widget 0x1F - S/PDIF-IN */
- 0x01F71CF0,
- 0x01F71D11,
- 0x01F71E11,
- 0x01F71F41,
+ 0x01871cf0,
+ 0x01871d11,
+ 0x01871e11,
+ 0x01871f41,
+
+ /* Pin widget 0x19 - MIc2 (Port-F) */
+ 0x01971c30,
+ 0x01971d90,
+ 0x01971ea1,
+ 0x01971f02,
+
+ /* Pin widget 0x1a - LINE1 (Port-C) */
+ 0x01a71cf0,
+ 0x01a71d11,
+ 0x01a71e11,
+ 0x01a71f41,
+
+ /* Pin widget 0x1b - LINe2 (Port-E) */
+ 0x01b71c40,
+ 0x01b71d90,
+ 0x01b71ea1,
+ 0x01b71f01,
+
+ /* Pin widget 0x1d - PC-BEEP */
+ 0x01d71c69,
+ 0x01d71d84,
+ 0x01d71e45,
+ 0x01d71f40,
+
+ /* Pin widget 0x1e - S/PDIF-OUT */
+ 0x01e71cf0,
+ 0x01e71d11,
+ 0x01e71e11,
+ 0x01e71f41,
+
+ /* Pin widget 0x1f - S/PDIF-IN */
+ 0x01f71cf0,
+ 0x01f71d11,
+ 0x01f71e11,
+ 0x01f71f41,
+
/* Pin widget 0x21 - P-OUT (Port-I) */
- 0x02171C2F,
- 0x02171D10,
- 0x02171E21,
- 0x02171F02,
+ 0x02171c2f,
+ 0x02171d10,
+ 0x02171e21,
+ 0x02171f02,
+
/* Pin widget 0x29 - I2S-IN */
- 0x02971CF0,
- 0x02971D11,
- 0x02971E11,
- 0x02971F41,
- /*
- * Widget node 0x20 : MIC2-Vrefo-R and MIC2-vrefo-L
- * to independent control
- */
+ 0x02971cf0,
+ 0x02971d11,
+ 0x02971e11,
+ 0x02971f41,
+
+ /* Widget node 0x20 : Mic2-Vrefo-R and Mic2-Vrefo-L to independent control */
0x02050045,
0x02045089,
- 0x0205004A,
- 0x0204201B,
+ 0x0205004a,
+ 0x0204201b,
+
/* Widget node 0x20 - 1 */
0x05850000,
0x05843888,
- 0x0205006F,
- 0x02042C0B,
- /*
- * Widget node 0x20 - 2 : Line2-JD gating MIC2-Vrefo-R,
- * P-JD gating MIC2-vrefo-L
- */
- 0x0205006B,
- 0x02044260,
- 0x05B50010,
- 0x05B45C1D,
+ 0x0205006f,
+ 0x02042c0b,
- /* Widget node 0X20 for ALC1305 */
+ /* Widget node 0x20 - 2 : Line2-JD gating Mic2-Vrefo-R, P-JD gating Mic2-Vrefo-L */
+ 0x0205006b,
+ 0x02044260,
+ 0x05b50010,
+ 0x05b45c1d,
+
+ /* Widget node 0x20 for ALC1305 */
0x02050024,
0x02040010,
0x02050026,
@@ -189,7 +199,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
};
diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/include/variant/hda_verb.h b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/include/variant/hda_verb.h
index f921f3f..ec94002 100644
--- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/include/variant/hda_verb.h
+++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/include/variant/hda_verb.h
@@ -20,20 +20,13 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
-
- /*
- * VerbTable: CFL Display Audio Codec
- * Revision ID = 0xFF
- * Codec Vendor: 0x8086280B
- */
-
- 0x8086280B,
- 0xFFFFFFFF,
- 0x00000005,
+ 0x8086280b, /* Codec Vendor / Device ID: Intel CFL Display Audio */
+ 0xffffffff, /* Subsystem ID */
+ 5, /* Number of jacks */
/*
* Display Audio Verb Table
- * For GEN9, the Vendor Node ID is 08h
+ * For GEN9, the Vendor Node ID is 0x08
* Port to be exposed to the inbox driver in the vanilla mode
* PORT C - BIT[7:6] = 01b
*/
@@ -41,147 +34,161 @@
0x00878140,
0x00878140,
0x00878140,
+
/* Pin Widget 5 - PORT B - Configuration Default: 0x18560010 */
- 0x00571C10,
- 0x00571D00,
- 0x00571E56,
- 0x00571F18,
+ 0x00571c10,
+ 0x00571d00,
+ 0x00571e56,
+ 0x00571f18,
+
/* Pin Widget 6 - PORT C - Configuration Default: 0x18560020 */
- 0x00671C20,
- 0x00671D00,
- 0x00671E56,
- 0x00671F18,
+ 0x00671c20,
+ 0x00671d00,
+ 0x00671e56,
+ 0x00671f18,
+
/* Pin Widget 7 - PORT D - Configuration Default: 0x18560030 */
- 0x00771C30,
- 0x00771D00,
- 0x00771E56,
- 0x00771F18,
- /* Disable the third converter and third Pin (NID 08h) */
+ 0x00771c30,
+ 0x00771d00,
+ 0x00771e56,
+ 0x00771f18,
+
+ /* Disable the third converter and third pin (NID 0x08) */
0x00878140,
0x00878140,
0x00878140,
0x00878140,
- /* ALC700 */
- 0x10EC0700,
- 0xFFFFFFFF,
- 0x00000015,
+
+
+ 0x10ec0700, /* Codec Vendor / Device ID: Realtek ALC700 */
+ 0xffffffff, /* Subsystem ID */
+ 21, /* Number of jacks */
/*
* HDA Codec Subsystem ID Verb-table
- * HDA Codec Subsystem ID : 0x10EC112C
+ * HDA Codec Subsystem ID : 0x10ec112c
*/
- 0x0017202C,
+ 0x0017202c,
0x00172111,
- 0x001722EC,
+ 0x001722ec,
0x00172310,
- /*
- * Pin Widget Verb-table
- * Widget node 0x01
- */
- 0x0017FF00,
- 0x0017FF00,
- 0x0017FF00,
- 0x0017FF00,
+ /* Pin Widget Verb-table */
+ 0x0017ff00,
+ 0x0017ff00,
+ 0x0017ff00,
+ 0x0017ff00,
+
/* Pin widget 0x12 - DMIC */
- 0x01271C00,
- 0x01271D00,
- 0x01271E00,
- 0x01271F40,
+ 0x01271c00,
+ 0x01271d00,
+ 0x01271e00,
+ 0x01271f40,
+
/* Pin widget 0x13 - DMIC */
- 0x01371CF0,
- 0x01371D11,
- 0x01371E11,
- 0x01371F41,
+ 0x01371cf0,
+ 0x01371d11,
+ 0x01371e11,
+ 0x01371f41,
+
/* Pin widget 0x14 - FRONT (Port-D) */
- 0x01471CF0,
- 0x01471D11,
- 0x01471E11,
- 0x01471F41,
+ 0x01471cf0,
+ 0x01471d11,
+ 0x01471e11,
+ 0x01471f41,
+
/* Pin widget 0x15 - I2S-OUT */
- 0x01571C10,
- 0x01571D01,
- 0x01571E17,
- 0x01571F90,
+ 0x01571c10,
+ 0x01571d01,
+ 0x01571e17,
+ 0x01571f90,
+
/* Pin widget 0x16 - LINE3 (Port-B) */
- 0x01671C20,
- 0x01671D10,
- 0x01671E01,
- 0x01671F01,
+ 0x01671c20,
+ 0x01671d10,
+ 0x01671e01,
+ 0x01671f01,
+
/* Pin widget 0x17 - I2S-OUT */
- 0x01771CF0,
- 0x01771D11,
- 0x01771E11,
- 0x01771F41,
+ 0x01771cf0,
+ 0x01771d11,
+ 0x01771e11,
+ 0x01771f41,
+
/* Pin widget 0x18 - I2S-IN */
- 0x01871CF0,
- 0x01871D11,
- 0x01871E11,
- 0x01871F41,
- /* Pin widget 0x19 - MIC2 (Port-F) */
- 0x01971C30,
- 0x01971D90,
- 0x01971EA1,
- 0x01971F02,
- /* Pin widget 0x1A - LINE1 (Port-C) */
- 0x01A71CF0,
- 0x01A71D11,
- 0x01A71E11,
- 0x01A71F41,
- /* Pin widget 0x1B - LINE2 (Port-E) */
- 0x01B71C40,
- 0x01B71D90,
- 0x01B71EA1,
- 0x01B71F01,
- /* Pin widget 0x1D - PC-BEEP */
- 0x01D71C69,
- 0x01D71D84,
- 0x01D71E45,
- 0x01D71F40,
- /* Pin widget 0x1E - S/PDIF-OUT */
- 0x01E71CF0,
- 0x01E71D11,
- 0x01E71E11,
- 0x01E71F41,
- /* Pin widget 0x1F - S/PDIF-IN */
- 0x01F71CF0,
- 0x01F71D11,
- 0x01F71E11,
- 0x01F71F41,
+ 0x01871cf0,
+ 0x01871d11,
+ 0x01871e11,
+ 0x01871f41,
+
+ /* Pin widget 0x19 - Mic2 (Port-F) */
+ 0x01971c30,
+ 0x01971d90,
+ 0x01971ea1,
+ 0x01971f02,
+
+ /* Pin widget 0x1a - LINE1 (Port-C) */
+ 0x01a71cf0,
+ 0x01a71d11,
+ 0x01a71e11,
+ 0x01a71f41,
+
+ /* Pin widget 0x1b - LINe2 (Port-E) */
+ 0x01b71c40,
+ 0x01b71d90,
+ 0x01b71ea1,
+ 0x01b71f01,
+
+ /* Pin widget 0x1d - PC-BEEP */
+ 0x01d71c69,
+ 0x01d71d84,
+ 0x01d71e45,
+ 0x01d71f40,
+
+ /* Pin widget 0x1e - S/PDIF-OUT */
+ 0x01e71cf0,
+ 0x01e71d11,
+ 0x01e71e11,
+ 0x01e71f41,
+
+ /* Pin widget 0x1f - S/PDIF-IN */
+ 0x01f71cf0,
+ 0x01f71d11,
+ 0x01f71e11,
+ 0x01f71f41,
+
/* Pin widget 0x21 - P-OUT (Port-I) */
- 0x02171C2F,
- 0x02171D10,
- 0x02171E21,
- 0x02171F02,
+ 0x02171c2f,
+ 0x02171d10,
+ 0x02171e21,
+ 0x02171f02,
+
/* Pin widget 0x29 - I2S-IN */
- 0x02971CF0,
- 0x02971D11,
- 0x02971E11,
- 0x02971F41,
- /*
- * Widget node 0x20 : MIC2-Vrefo-R and MIC2-vrefo-L
- * to independent control
- */
+ 0x02971cf0,
+ 0x02971d11,
+ 0x02971e11,
+ 0x02971f41,
+
+ /* Widget node 0x20 : Mic2-Vrefo-R and Mic2-Vrefo-L to independent control */
0x02050045,
0x02045089,
- 0x0205004A,
- 0x0204201B,
+ 0x0205004a,
+ 0x0204201b,
+
/* Widget node 0x20 - 1 */
0x05850000,
0x05843888,
- 0x0205006F,
- 0x02042C0B,
- /*
- * Widget node 0x20 - 2 : Line2-JD gating MIC2-Vrefo-R,
- * P-JD gating MIC2-vrefo-L
- */
- 0x0205006B,
- 0x02044260,
- 0x05B50010,
- 0x05B45C1D,
+ 0x0205006f,
+ 0x02042c0b,
- /* Widget node 0X20 for ALC1305 */
+ /* Widget node 0x20 - 2 : Line2-JD gating Mic2-Vrefo-R, P-JD gating Mic2-Vrefo-L */
+ 0x0205006b,
+ 0x02044260,
+ 0x05b50010,
+ 0x05b45c1d,
+
+ /* Widget node 0x20 for ALC1305 */
0x02050024,
0x02040010,
0x02050026,
@@ -189,12 +196,11 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
-
+ 0x0204b024,
};
-const u32 pc_beep_verbs[] = {
-};
+const u32 pc_beep_verbs[] = {};
AZALIA_ARRAY_SIZES;
+
#endif
diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cml_u/include/variant/hda_verb.h b/src/mainboard/intel/coffeelake_rvp/variants/cml_u/include/variant/hda_verb.h
index 7a68625..0624c89 100644
--- a/src/mainboard/intel/coffeelake_rvp/variants/cml_u/include/variant/hda_verb.h
+++ b/src/mainboard/intel/coffeelake_rvp/variants/cml_u/include/variant/hda_verb.h
@@ -19,41 +19,41 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* ALC 700 */
- 0x10EC0700,
- 0xFFFFFFFF,
- 0x00000023,
+ 0x10ec0700, /* Codec Vendor / Device ID: Realtek ALC700 */
+ 0xffffffff, /* Subsystem ID */
+ 35, /* Number of jacks */
- AZALIA_SUBVENDOR(0, 0x10EC10F2),
+ AZALIA_SUBVENDOR(0, 0x10ec10f2),
AZALIA_PIN_CFG(0, 0x01, 0x00000000),
AZALIA_PIN_CFG(0, 0x12, 0x40000000),
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
- AZALIA_PIN_CFG(0, 0x14, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x15, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x16, 0x411111F0),
+ AZALIA_PIN_CFG(0, 0x14, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
AZALIA_PIN_CFG(0, 0x17, 0x90170110),
- AZALIA_PIN_CFG(0, 0x18, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x19, 0x04A11030),
- AZALIA_PIN_CFG(0, 0x1A, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x1B, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x1D, 0x40622005),
- AZALIA_PIN_CFG(0, 0x1E, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x1F, 0x411111F0),
+ AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x19, 0x04a11030),
+ AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1d, 0x40622005),
+ AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
AZALIA_PIN_CFG(0, 0x21, 0x04211020),
- AZALIA_PIN_CFG(0, 0x29, 0x411111F0),
+ AZALIA_PIN_CFG(0, 0x29, 0x411111f0),
/* Widget node 0x20 */
0x02050045,
0x02045289,
- 0x0205004A,
- 0x0204201B,
+ 0x0205004a,
+ 0x0204201b,
+
/* Widget node 0x20 - 1 */
0x05850000,
0x05843888,
- 0x0205006F,
- 0x02042C0B,
+ 0x0205006f,
+ 0x02042c0b,
- //Widget node 0X20 for ALC1305 20160603 update
+ /* Widget node 0x20 for ALC1305 20160603 update */
0x02050024,
0x02040010,
0x02050026,
@@ -61,7 +61,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -70,16 +70,16 @@
0x02050028,
0x02040600,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204003C,
+ 0x0204003c,
0x02050028,
- 0x0204FFD0,
+ 0x0204ffd0,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -88,7 +88,7 @@
0x02050028,
0x02040080,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -97,34 +97,34 @@
0x02050028,
0x02040880,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204003A,
+ 0x0204003a,
0x02050028,
- 0x02040DFE,
+ 0x02040dfe,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006A,
+ 0x0204006a,
0x02050028,
- 0x0204005D,
+ 0x0204005d,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006C,
+ 0x0204006c,
0x02050028,
0x02040442,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -133,7 +133,7 @@
0x02050028,
0x02040880,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -142,79 +142,79 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040008,
0x02050028,
- 0x0204B000,
+ 0x0204b000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204002E,
+ 0x0204002e,
0x02050028,
0x02040800,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006A,
+ 0x0204006a,
0x02050028,
- 0x020400C3,
+ 0x020400c3,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006C,
+ 0x0204006c,
0x02050028,
- 0x0204D4A0,
+ 0x0204d4a0,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006A,
+ 0x0204006a,
0x02050028,
- 0x020400CC,
+ 0x020400cc,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006C,
+ 0x0204006c,
0x02050028,
- 0x0204400A,
+ 0x0204400a,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006A,
+ 0x0204006a,
0x02050028,
- 0x020400C1,
+ 0x020400c1,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006C,
+ 0x0204006c,
0x02050028,
0x02040320,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -223,223 +223,223 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204003B,
+ 0x0204003b,
0x02050028,
- 0x0204FFFF,
+ 0x0204ffff,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204003C,
+ 0x0204003c,
0x02050028,
- 0x0204FC20,
+ 0x0204fc20,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204003A,
+ 0x0204003a,
0x02050028,
- 0x02041DFE,
+ 0x02041dfe,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C0,
+ 0x020400c0,
0x02050028,
- 0x020401FA,
+ 0x020401fa,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C1,
+ 0x020400c1,
0x02050028,
- 0x0204DE23,
+ 0x0204de23,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C2,
+ 0x020400c2,
0x02050028,
- 0x02041C00,
+ 0x02041c00,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C3,
+ 0x020400c3,
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C4,
+ 0x020400c4,
0x02050028,
0x02040200,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C5,
+ 0x020400c5,
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C6,
+ 0x020400c6,
0x02050028,
- 0x020403F5,
+ 0x020403f5,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C7,
+ 0x020400c7,
0x02050028,
- 0x0204AF1B,
+ 0x0204af1b,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C8,
+ 0x020400c8,
0x02050028,
- 0x02041E0A,
+ 0x02041e0a,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C9,
+ 0x020400c9,
0x02050028,
- 0x0204368E,
+ 0x0204368e,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CA,
+ 0x020400ca,
0x02050028,
- 0x020401FA,
+ 0x020401fa,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CB,
+ 0x020400cb,
0x02050028,
- 0x0204DE23,
+ 0x0204de23,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CC,
+ 0x020400cc,
0x02050028,
- 0x02041C00,
+ 0x02041c00,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CD,
+ 0x020400cd,
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CE,
+ 0x020400ce,
0x02050028,
0x02040200,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CF,
+ 0x020400cf,
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400D0,
+ 0x020400d0,
0x02050028,
- 0x020403F5,
+ 0x020403f5,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400D1,
+ 0x020400d1,
0x02050028,
- 0x0204AF1B,
+ 0x0204af1b,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400D2,
+ 0x020400d2,
0x02050028,
- 0x02041E0A,
+ 0x02041e0a,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400D3,
+ 0x020400d3,
0x02050028,
- 0x0204368E,
+ 0x0204368e,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040040,
0x02050028,
- 0x0204800F,
+ 0x0204800f,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -448,7 +448,7 @@
0x02050028,
0x02048000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -457,7 +457,7 @@
0x02050028,
0x02044848,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -466,7 +466,7 @@
0x02050028,
0x02040800,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -475,7 +475,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -484,7 +484,7 @@
0x02050028,
0x02044004,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -493,25 +493,25 @@
0x02050028,
0x02040802,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040068,
0x02050028,
- 0x0204890F,
+ 0x0204890f,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040069,
0x02050028,
- 0x0204E021,
+ 0x0204e021,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -520,7 +520,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -529,7 +529,7 @@
0x02050000,
0x02043330,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -538,7 +538,7 @@
0x02050000,
0x02043333,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -547,7 +547,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -556,7 +556,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -565,7 +565,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -574,16 +574,16 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040050,
0x02050028,
- 0x020402EC,
+ 0x020402ec,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -592,34 +592,34 @@
0x02050028,
0x02044909,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040052,
0x02050028,
- 0x020440B0,
+ 0x020440b0,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040046,
0x02050028,
- 0x0204C22E,
+ 0x0204c22e,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040047,
0x02050028,
- 0x02040C00,
+ 0x02040c00,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -628,7 +628,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -637,52 +637,52 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204004A,
+ 0x0204004a,
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204004B,
+ 0x0204004b,
0x02050028,
- 0x02041C00,
+ 0x02041c00,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006A,
+ 0x0204006a,
0x02050028,
0x02040090,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006C,
+ 0x0204006c,
0x02050028,
- 0x0204721F,
+ 0x0204721f,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204009E,
+ 0x0204009e,
0x02050028,
0x02040001,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -691,10 +691,11 @@
0x02050028,
0x02040500,
0x02050029,
- 0x0204B024
+ 0x0204b024,
};
-const u32 pc_beep_verbs[] = {
-};
+const u32 pc_beep_verbs[] = {};
+
AZALIA_ARRAY_SIZES;
+
#endif
diff --git a/src/mainboard/intel/coffeelake_rvp/variants/whl_u/include/variant/hda_verb.h b/src/mainboard/intel/coffeelake_rvp/variants/whl_u/include/variant/hda_verb.h
index d821a26..c9746b7 100644
--- a/src/mainboard/intel/coffeelake_rvp/variants/whl_u/include/variant/hda_verb.h
+++ b/src/mainboard/intel/coffeelake_rvp/variants/whl_u/include/variant/hda_verb.h
@@ -19,41 +19,41 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* ALC 700 */
- 0x10EC0700,
- 0xFFFFFFFF,
- 0x00000023,
+ 0x10ec0700, /* Codec Vendor / Device ID: Realtek ALC700 */
+ 0xffffffff, /* Subsystem ID */
+ 35, /* Number of jacks */
- AZALIA_SUBVENDOR(0, 0x10EC10F2),
+ AZALIA_SUBVENDOR(0, 0x10ec10f2),
AZALIA_PIN_CFG(0, 0x01, 0x00000000),
AZALIA_PIN_CFG(0, 0x12, 0x40000000),
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
- AZALIA_PIN_CFG(0, 0x14, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x15, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x16, 0x411111F0),
+ AZALIA_PIN_CFG(0, 0x14, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
AZALIA_PIN_CFG(0, 0x17, 0x90170110),
- AZALIA_PIN_CFG(0, 0x18, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x19, 0x04A11030),
- AZALIA_PIN_CFG(0, 0x1A, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x1B, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x1D, 0x40622005),
- AZALIA_PIN_CFG(0, 0x1E, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x1F, 0x411111F0),
+ AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x19, 0x04a11030),
+ AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1d, 0x40622005),
+ AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
AZALIA_PIN_CFG(0, 0x21, 0x04211020),
- AZALIA_PIN_CFG(0, 0x29, 0x411111F0),
+ AZALIA_PIN_CFG(0, 0x29, 0x411111f0),
/* Widget node 0x20 */
0x02050045,
0x02045289,
- 0x0205004A,
- 0x0204201B,
+ 0x0205004a,
+ 0x0204201b,
+
/* Widget node 0x20 - 1 */
0x05850000,
0x05843888,
- 0x0205006F,
- 0x02042C0B,
+ 0x0205006f,
+ 0x02042c0b,
- //Widget node 0X20 for ALC1305 20160603 update
+ /* Widget node 0x20 for ALC1305 20160603 update */
0x02050024,
0x02040010,
0x02050026,
@@ -61,7 +61,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -70,16 +70,16 @@
0x02050028,
0x02040600,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204003C,
+ 0x0204003c,
0x02050028,
- 0x0204FFD0,
+ 0x0204ffd0,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -88,7 +88,7 @@
0x02050028,
0x02040080,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -97,34 +97,34 @@
0x02050028,
0x02040880,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204003A,
+ 0x0204003a,
0x02050028,
- 0x02040DFE,
+ 0x02040dfe,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006A,
+ 0x0204006a,
0x02050028,
- 0x0204005D,
+ 0x0204005d,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006C,
+ 0x0204006c,
0x02050028,
0x02040442,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -133,7 +133,7 @@
0x02050028,
0x02040880,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -142,79 +142,79 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040008,
0x02050028,
- 0x0204B000,
+ 0x0204b000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204002E,
+ 0x0204002e,
0x02050028,
0x02040800,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006A,
+ 0x0204006a,
0x02050028,
- 0x020400C3,
+ 0x020400c3,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006C,
+ 0x0204006c,
0x02050028,
- 0x0204D4A0,
+ 0x0204d4a0,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006A,
+ 0x0204006a,
0x02050028,
- 0x020400CC,
+ 0x020400cc,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006C,
+ 0x0204006c,
0x02050028,
- 0x0204400A,
+ 0x0204400a,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006A,
+ 0x0204006a,
0x02050028,
- 0x020400C1,
+ 0x020400c1,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006C,
+ 0x0204006c,
0x02050028,
0x02040320,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -223,223 +223,223 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204003B,
+ 0x0204003b,
0x02050028,
- 0x0204FFFF,
+ 0x0204ffff,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204003C,
+ 0x0204003c,
0x02050028,
- 0x0204FC20,
+ 0x0204fc20,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204003A,
+ 0x0204003a,
0x02050028,
- 0x02041DFE,
+ 0x02041dfe,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C0,
+ 0x020400c0,
0x02050028,
- 0x020401FA,
+ 0x020401fa,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C1,
+ 0x020400c1,
0x02050028,
- 0x0204DE23,
+ 0x0204de23,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C2,
+ 0x020400c2,
0x02050028,
- 0x02041C00,
+ 0x02041c00,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C3,
+ 0x020400c3,
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C4,
+ 0x020400c4,
0x02050028,
0x02040200,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C5,
+ 0x020400c5,
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C6,
+ 0x020400c6,
0x02050028,
- 0x020403F5,
+ 0x020403f5,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C7,
+ 0x020400c7,
0x02050028,
- 0x0204AF1B,
+ 0x0204af1b,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C8,
+ 0x020400c8,
0x02050028,
- 0x02041E0A,
+ 0x02041e0a,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C9,
+ 0x020400c9,
0x02050028,
- 0x0204368E,
+ 0x0204368e,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CA,
+ 0x020400ca,
0x02050028,
- 0x020401FA,
+ 0x020401fa,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CB,
+ 0x020400cb,
0x02050028,
- 0x0204DE23,
+ 0x0204de23,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CC,
+ 0x020400cc,
0x02050028,
- 0x02041C00,
+ 0x02041c00,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CD,
+ 0x020400cd,
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CE,
+ 0x020400ce,
0x02050028,
0x02040200,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CF,
+ 0x020400cf,
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400D0,
+ 0x020400d0,
0x02050028,
- 0x020403F5,
+ 0x020403f5,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400D1,
+ 0x020400d1,
0x02050028,
- 0x0204AF1B,
+ 0x0204af1b,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400D2,
+ 0x020400d2,
0x02050028,
- 0x02041E0A,
+ 0x02041e0a,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400D3,
+ 0x020400d3,
0x02050028,
- 0x0204368E,
+ 0x0204368e,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040040,
0x02050028,
- 0x0204800F,
+ 0x0204800f,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -448,7 +448,7 @@
0x02050028,
0x02048000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -457,7 +457,7 @@
0x02050028,
0x02044848,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -466,7 +466,7 @@
0x02050028,
0x02040800,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -475,7 +475,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -484,7 +484,7 @@
0x02050028,
0x02044004,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -493,25 +493,25 @@
0x02050028,
0x02040802,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040068,
0x02050028,
- 0x0204890F,
+ 0x0204890f,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040069,
0x02050028,
- 0x0204E021,
+ 0x0204e021,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -520,7 +520,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -529,7 +529,7 @@
0x02050000,
0x02043330,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -538,7 +538,7 @@
0x02050000,
0x02043333,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -547,7 +547,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -556,7 +556,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -565,7 +565,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -574,16 +574,16 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040050,
0x02050028,
- 0x020402EC,
+ 0x020402ec,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -592,34 +592,34 @@
0x02050028,
0x02044909,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040052,
0x02050028,
- 0x020440B0,
+ 0x020440b0,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040046,
0x02050028,
- 0x0204C22E,
+ 0x0204c22e,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040047,
0x02050028,
- 0x02040C00,
+ 0x02040c00,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -628,7 +628,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -637,52 +637,52 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204004A,
+ 0x0204004a,
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204004B,
+ 0x0204004b,
0x02050028,
- 0x02041C00,
+ 0x02041c00,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006A,
+ 0x0204006a,
0x02050028,
0x02040090,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006C,
+ 0x0204006c,
0x02050028,
- 0x0204721F,
+ 0x0204721f,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204009E,
+ 0x0204009e,
0x02050028,
0x02040001,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -691,10 +691,11 @@
0x02050028,
0x02040500,
0x02050029,
- 0x0204B024
+ 0x0204b024,
};
-const u32 pc_beep_verbs[] = {
-};
+const u32 pc_beep_verbs[] = {};
+
AZALIA_ARRAY_SIZES;
+
#endif
diff --git a/src/mainboard/intel/d510mo/hda_verb.c b/src/mainboard/intel/d510mo/hda_verb.c
index a0dba38..e3b80fc 100644
--- a/src/mainboard/intel/d510mo/hda_verb.c
+++ b/src/mainboard/intel/d510mo/hda_verb.c
@@ -16,10 +16,9 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
0x10ec0662,
- 0x8086d618, // Subsystem ID
- 0x0000000a, // Number of entries
+ 0x8086d618, /* Subsystem ID */
+ 10, /* Number of entries */
/* Pin Widget Verb Table */
AZALIA_PIN_CFG(0, 0x14, 0x01014410),
@@ -34,6 +33,6 @@
AZALIA_PIN_CFG(0, 0x1e, 0x99430130),
};
-const u32 pc_beep_verbs[] = {
-};
+const u32 pc_beep_verbs[] = {};
+
AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/intel/dg41wv/hda_verb.c b/src/mainboard/intel/dg41wv/hda_verb.c
index 23d566d..4db64c5 100644
--- a/src/mainboard/intel/dg41wv/hda_verb.c
+++ b/src/mainboard/intel/dg41wv/hda_verb.c
@@ -17,14 +17,11 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- /* Realtek ALC662 rev1 */
- 0x10ec0662, /* Vendor ID */
- 0x80865756, /* Subsystem ID */
- 10, /* Number of entries */
+ 0x10ec0662, /* Vendor ID: Realtek ALC662 rev1 */
+ 0x80865756, /* Subsystem ID */
+ 10, /* Number of entries */
/* Pin Widget Verb Table */
-
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
diff --git a/src/mainboard/intel/dg43gt/hda_verb.c b/src/mainboard/intel/dg43gt/hda_verb.c
index e9b1fae..63e4f3e 100644
--- a/src/mainboard/intel/dg43gt/hda_verb.c
+++ b/src/mainboard/intel/dg43gt/hda_verb.c
@@ -17,13 +17,10 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
+ /* --- Codec #0 --- */
0x10ec0888,
- 0x80860028, // Subsystem ID
- 14, // Number of entries
-
- /* Pin Widget Verb Table */
-
+ 0x80860028, /* Subsystem ID */
+ 14, /* Number of entries */
AZALIA_PIN_CFG(0, 0x11, 0x01452140),
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
AZALIA_PIN_CFG(0, 0x14, 0x01014410),
@@ -39,11 +36,10 @@
AZALIA_PIN_CFG(0, 0x1e, 0x99430130),
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
- /* HDMI */
- 0x80862803,
- 0x80860101,
- 1,
-
+ /* --- Codec #3 --- */
+ 0x80862803, /* Vendor ID: Intel HDMI */
+ 0x80860101, /* Subsystem ID */
+ 1, /* Number of entries */
AZALIA_PIN_CFG(0, 0x03, 0x18560010)
};
diff --git a/src/mainboard/intel/emeraldlake2/hda_verb.c b/src/mainboard/intel/emeraldlake2/hda_verb.c
index bee63f4..68d74bb 100644
--- a/src/mainboard/intel/emeraldlake2/hda_verb.c
+++ b/src/mainboard/intel/emeraldlake2/hda_verb.c
@@ -16,16 +16,14 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10134210, // Codec Vendor / Device ID: Cirrus Logic CS4210
- 0x10134210, // Subsystem ID
- 0x00000007, // Number of jacks
+ /* --- Codec #0 --- */
+ 0x10134210, /* Codec Vendor / Device ID: Cirrus Logic CS4210 */
+ 0x10134210, /* Subsystem ID */
+ 7, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10134210 */
+ /* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x10134210),
- /* Pin Widget Verb Table */
-
/* Pin Complex (NID 0x05) 1/8 Gray HP Out at Ext Front */
AZALIA_PIN_CFG(0x0, 0x05, 0x022120f0),
@@ -44,13 +42,13 @@
/* Pin Complex (NID 0x0a) Optical Black SPDIF Out at Ext N/A */
AZALIA_PIN_CFG(0x0, 0x0a, 0x434510f0),
- /* coreboot specific header */
- 0x80862805, // Codec Vendor / Device ID: Intel CougarPoint HDMI
- 0x80860101, // Subsystem ID
- 0x00000004, // Number of jacks
+ /* --- Codec #3 --- */
+ 0x80862805, /* Codec Vendor / Device ID: Intel CougarPoint HDMI */
+ 0x80860101, /* Subsystem ID */
+ 4, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */
- AZALIA_SUBVENDOR(0x0, 0x80860101),
+ /* HDA Codec Subsystem ID Verb Table */
+ AZALIA_SUBVENDOR(0x3, 0x80860101),
/* Pin Complex (NID 0x05) Digital Out at Int HDMI */
AZALIA_PIN_CFG(0x3, 0x05, 0x18560010),
diff --git a/src/mainboard/intel/icelake_rvp/variants/baseboard/include/baseboard/hda_verb.h b/src/mainboard/intel/icelake_rvp/variants/baseboard/include/baseboard/hda_verb.h
index d821a26..c9746b7 100644
--- a/src/mainboard/intel/icelake_rvp/variants/baseboard/include/baseboard/hda_verb.h
+++ b/src/mainboard/intel/icelake_rvp/variants/baseboard/include/baseboard/hda_verb.h
@@ -19,41 +19,41 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* ALC 700 */
- 0x10EC0700,
- 0xFFFFFFFF,
- 0x00000023,
+ 0x10ec0700, /* Codec Vendor / Device ID: Realtek ALC700 */
+ 0xffffffff, /* Subsystem ID */
+ 35, /* Number of jacks */
- AZALIA_SUBVENDOR(0, 0x10EC10F2),
+ AZALIA_SUBVENDOR(0, 0x10ec10f2),
AZALIA_PIN_CFG(0, 0x01, 0x00000000),
AZALIA_PIN_CFG(0, 0x12, 0x40000000),
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
- AZALIA_PIN_CFG(0, 0x14, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x15, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x16, 0x411111F0),
+ AZALIA_PIN_CFG(0, 0x14, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
AZALIA_PIN_CFG(0, 0x17, 0x90170110),
- AZALIA_PIN_CFG(0, 0x18, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x19, 0x04A11030),
- AZALIA_PIN_CFG(0, 0x1A, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x1B, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x1D, 0x40622005),
- AZALIA_PIN_CFG(0, 0x1E, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x1F, 0x411111F0),
+ AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x19, 0x04a11030),
+ AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1d, 0x40622005),
+ AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
AZALIA_PIN_CFG(0, 0x21, 0x04211020),
- AZALIA_PIN_CFG(0, 0x29, 0x411111F0),
+ AZALIA_PIN_CFG(0, 0x29, 0x411111f0),
/* Widget node 0x20 */
0x02050045,
0x02045289,
- 0x0205004A,
- 0x0204201B,
+ 0x0205004a,
+ 0x0204201b,
+
/* Widget node 0x20 - 1 */
0x05850000,
0x05843888,
- 0x0205006F,
- 0x02042C0B,
+ 0x0205006f,
+ 0x02042c0b,
- //Widget node 0X20 for ALC1305 20160603 update
+ /* Widget node 0x20 for ALC1305 20160603 update */
0x02050024,
0x02040010,
0x02050026,
@@ -61,7 +61,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -70,16 +70,16 @@
0x02050028,
0x02040600,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204003C,
+ 0x0204003c,
0x02050028,
- 0x0204FFD0,
+ 0x0204ffd0,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -88,7 +88,7 @@
0x02050028,
0x02040080,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -97,34 +97,34 @@
0x02050028,
0x02040880,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204003A,
+ 0x0204003a,
0x02050028,
- 0x02040DFE,
+ 0x02040dfe,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006A,
+ 0x0204006a,
0x02050028,
- 0x0204005D,
+ 0x0204005d,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006C,
+ 0x0204006c,
0x02050028,
0x02040442,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -133,7 +133,7 @@
0x02050028,
0x02040880,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -142,79 +142,79 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040008,
0x02050028,
- 0x0204B000,
+ 0x0204b000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204002E,
+ 0x0204002e,
0x02050028,
0x02040800,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006A,
+ 0x0204006a,
0x02050028,
- 0x020400C3,
+ 0x020400c3,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006C,
+ 0x0204006c,
0x02050028,
- 0x0204D4A0,
+ 0x0204d4a0,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006A,
+ 0x0204006a,
0x02050028,
- 0x020400CC,
+ 0x020400cc,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006C,
+ 0x0204006c,
0x02050028,
- 0x0204400A,
+ 0x0204400a,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006A,
+ 0x0204006a,
0x02050028,
- 0x020400C1,
+ 0x020400c1,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006C,
+ 0x0204006c,
0x02050028,
0x02040320,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -223,223 +223,223 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204003B,
+ 0x0204003b,
0x02050028,
- 0x0204FFFF,
+ 0x0204ffff,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204003C,
+ 0x0204003c,
0x02050028,
- 0x0204FC20,
+ 0x0204fc20,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204003A,
+ 0x0204003a,
0x02050028,
- 0x02041DFE,
+ 0x02041dfe,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C0,
+ 0x020400c0,
0x02050028,
- 0x020401FA,
+ 0x020401fa,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C1,
+ 0x020400c1,
0x02050028,
- 0x0204DE23,
+ 0x0204de23,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C2,
+ 0x020400c2,
0x02050028,
- 0x02041C00,
+ 0x02041c00,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C3,
+ 0x020400c3,
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C4,
+ 0x020400c4,
0x02050028,
0x02040200,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C5,
+ 0x020400c5,
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C6,
+ 0x020400c6,
0x02050028,
- 0x020403F5,
+ 0x020403f5,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C7,
+ 0x020400c7,
0x02050028,
- 0x0204AF1B,
+ 0x0204af1b,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C8,
+ 0x020400c8,
0x02050028,
- 0x02041E0A,
+ 0x02041e0a,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400C9,
+ 0x020400c9,
0x02050028,
- 0x0204368E,
+ 0x0204368e,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CA,
+ 0x020400ca,
0x02050028,
- 0x020401FA,
+ 0x020401fa,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CB,
+ 0x020400cb,
0x02050028,
- 0x0204DE23,
+ 0x0204de23,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CC,
+ 0x020400cc,
0x02050028,
- 0x02041C00,
+ 0x02041c00,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CD,
+ 0x020400cd,
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CE,
+ 0x020400ce,
0x02050028,
0x02040200,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400CF,
+ 0x020400cf,
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400D0,
+ 0x020400d0,
0x02050028,
- 0x020403F5,
+ 0x020403f5,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400D1,
+ 0x020400d1,
0x02050028,
- 0x0204AF1B,
+ 0x0204af1b,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400D2,
+ 0x020400d2,
0x02050028,
- 0x02041E0A,
+ 0x02041e0a,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x020400D3,
+ 0x020400d3,
0x02050028,
- 0x0204368E,
+ 0x0204368e,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040040,
0x02050028,
- 0x0204800F,
+ 0x0204800f,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -448,7 +448,7 @@
0x02050028,
0x02048000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -457,7 +457,7 @@
0x02050028,
0x02044848,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -466,7 +466,7 @@
0x02050028,
0x02040800,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -475,7 +475,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -484,7 +484,7 @@
0x02050028,
0x02044004,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -493,25 +493,25 @@
0x02050028,
0x02040802,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040068,
0x02050028,
- 0x0204890F,
+ 0x0204890f,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040069,
0x02050028,
- 0x0204E021,
+ 0x0204e021,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -520,7 +520,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -529,7 +529,7 @@
0x02050000,
0x02043330,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -538,7 +538,7 @@
0x02050000,
0x02043333,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -547,7 +547,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -556,7 +556,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -565,7 +565,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -574,16 +574,16 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040050,
0x02050028,
- 0x020402EC,
+ 0x020402ec,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -592,34 +592,34 @@
0x02050028,
0x02044909,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040052,
0x02050028,
- 0x020440B0,
+ 0x020440b0,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040046,
0x02050028,
- 0x0204C22E,
+ 0x0204c22e,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
0x02040047,
0x02050028,
- 0x02040C00,
+ 0x02040c00,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -628,7 +628,7 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -637,52 +637,52 @@
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204004A,
+ 0x0204004a,
0x02050028,
0x02040000,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204004B,
+ 0x0204004b,
0x02050028,
- 0x02041C00,
+ 0x02041c00,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006A,
+ 0x0204006a,
0x02050028,
0x02040090,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204006C,
+ 0x0204006c,
0x02050028,
- 0x0204721F,
+ 0x0204721f,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
0x02050026,
- 0x0204009E,
+ 0x0204009e,
0x02050028,
0x02040001,
0x02050029,
- 0x0204B024,
+ 0x0204b024,
0x02050024,
0x02040010,
@@ -691,10 +691,11 @@
0x02050028,
0x02040500,
0x02050029,
- 0x0204B024
+ 0x0204b024,
};
-const u32 pc_beep_verbs[] = {
-};
+const u32 pc_beep_verbs[] = {};
+
AZALIA_ARRAY_SIZES;
+
#endif
diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/hda_verb.h b/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/hda_verb.h
index 4119e69..ce684e2 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/hda_verb.h
+++ b/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/hda_verb.h
@@ -19,14 +19,13 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
-
- 0x8086280B,
- 0x00000000,
- 0x00000005,
+ 0x8086280b, /* Codec Vendor / Device ID */
+ 0x00000000, /* Subsystem ID */
+ 5, /* Number of jacks */
/*
* Display Audio Verb Table
- * Enable the third converter and Pin first (NID 08h)
+ * Enable the third converter and Pin first (NID 0x08)
*/
0x00878101,
0x00878101,
@@ -37,55 +36,61 @@
AZALIA_PIN_CFG(0, 0x06, 0x18560020),
AZALIA_PIN_CFG(0, 0x07, 0x18560030),
- /* Disable the third converter and third Pin (NID 08h) */
+ /* Disable the third converter and third pin (NID 0x08) */
0x00878100,
0x00878100,
0x00878100,
0x00878100,
- /* ALC 298 */
- 0x10EC0298,
- 0x00000000,
- 0x00000023,
- AZALIA_SUBVENDOR(0, 0x10EC109C),
+
+ 0x10ec0298, /* Codec Vendor / Device ID: Realtek ALC298 */
+ 0xffffffff, /* Subsystem ID */
+ 35, /* Number of jacks */
+
+ AZALIA_SUBVENDOR(0, 0x10ec109c),
AZALIA_PIN_CFG(0, 0x01, 0x00000000),
- AZALIA_PIN_CFG(0, 0x12, 0x411111F0),
+ AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
- AZALIA_PIN_CFG(0, 0x14, 0x9017011F),
+ AZALIA_PIN_CFG(0, 0x14, 0x9017011f),
AZALIA_PIN_CFG(0, 0x17, 0x90170110),
- AZALIA_PIN_CFG(0, 0x18, 0x03A11040),
- AZALIA_PIN_CFG(0, 0x19, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x1A, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x1D, 0x4066A22D),
- AZALIA_PIN_CFG(0, 0x1E, 0x411111F0),
+ AZALIA_PIN_CFG(0, 0x18, 0x03a11040),
+ AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1d, 0x4066a22d),
+ AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
AZALIA_PIN_CFG(0, 0x21, 0x03211020),
/* Widget node 0x20 */
- 0x0205004F,
- 0x0204B009,
+ 0x0205004f,
+ 0x0204b009,
0x02050050,
0x02041000,
+
/* Widget node 0x20 - 1 */
0x02050019,
0x02040017,
0x02050020,
0x02040002,
+
/* Widget node 0x20 - 2 */
- 0x0205008F,
+ 0x0205008f,
0x02041008,
0x02050036,
- 0x020462C0,
+ 0x020462c0,
+
/* Widget node 0x20 - 3 */
- 0x0205002B,
- 0x02040D10,
- 0x0205002D,
+ 0x0205002b,
+ 0x02040d10,
+ 0x0205002d,
0x02044020,
+
/* Widget node 0x20 - 4 */
- 0x0205000E,
- 0x02046F80,
- 0x01771F90,
- 0x01771F90,
+ 0x0205000e,
+ 0x02046f80,
+ 0x01771f90,
+ 0x01771f90,
+
/* Widget node 0x20 - 5 */
0x02050079,
0x02046800,
@@ -94,106 +99,107 @@
/* TI AMP settings */
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
0x02040000,
0x02050025,
0x02040000,
0x02050026,
- 0x0204B010,
+ 0x0204b010,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
0x02040002,
0x02050025,
0x02040011,
0x02050026,
- 0x0204B010,
+ 0x0204b010,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
- 0x0204000F,
+ 0x0204000f,
0x02050025,
0x02040010,
0x02050026,
- 0x0204B010,
+ 0x0204b010,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
0x02040025,
0x02050025,
0x02040008,
0x02050026,
- 0x0204B010,
+ 0x0204b010,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
0x02040002,
0x02050025,
0x02040000,
0x02050026,
- 0x0204B010,
+ 0x0204b010,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
0x02040003,
0x02050025,
0x02040000,
0x02050026,
- 0x0204B010
+ 0x0204b010,
};
-const u32 pc_beep_verbs[] = {
-};
+const u32 pc_beep_verbs[] = {};
+
AZALIA_ARRAY_SIZES;
+
#endif
diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/include/variant/hda_verb.h b/src/mainboard/intel/kblrvp/variants/rvp3/include/variant/hda_verb.h
index 9d6e8b0..35b4ec8 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp3/include/variant/hda_verb.h
+++ b/src/mainboard/intel/kblrvp/variants/rvp3/include/variant/hda_verb.h
@@ -20,14 +20,13 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
-
- 0x8086280B,
- 0x00000000,
- 0x00000005,
+ 0x8086280b, /* Codec Vendor / Device ID */
+ 0x00000000, /* Subsystem ID */
+ 5, /* Number of jacks */
/*
* Display Audio Verb Table
- * Enable the third converter and pin first (NID 08h)
+ * Enable the third converter and pin first (NID 0x08)
*/
0x00878101,
0x00878101,
@@ -38,163 +37,169 @@
AZALIA_PIN_CFG(0, 0x06, 0x18560020),
AZALIA_PIN_CFG(0, 0x07, 0x18560030),
- /* Disable the third converter and third pin (NID 08h) */
+ /* Disable the third converter and third pin (NID 0x08) */
0x00878100,
0x00878100,
0x00878100,
0x00878100,
- /* ALC 286 */
- 0x10EC0286,
- 0x00000000,
- 0x00000023,
- AZALIA_SUBVENDOR(0, 0x10EC108E),
+
+ 0x10ec0286, /* Codec Vendor / Device ID: Realtek ALC286 */
+ 0x00000000, /* Subsystem ID */
+ 35, /* Number of jacks */
+
+ AZALIA_SUBVENDOR(0, 0x10ec108e),
AZALIA_PIN_CFG(0, 0x01, 0x00000000),
- AZALIA_PIN_CFG(0, 0x12, 0x411111F0),
+ AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
- AZALIA_PIN_CFG(0, 0x14, 0x9017011F),
+ AZALIA_PIN_CFG(0, 0x14, 0x9017011f),
AZALIA_PIN_CFG(0, 0x17, 0x90170110),
- AZALIA_PIN_CFG(0, 0x18, 0x03A11040),
- AZALIA_PIN_CFG(0, 0x19, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x1A, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x1D, 0x4066A22D),
- AZALIA_PIN_CFG(0, 0x1E, 0x411111F0),
+ AZALIA_PIN_CFG(0, 0x18, 0x03a11040),
+ AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1d, 0x4066a22d),
+ AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
AZALIA_PIN_CFG(0, 0x21, 0x03211020),
/* Widget node 0x20 */
0x02050071,
0x02040014,
0x02050010,
- 0x02040C22,
+ 0x02040c22,
+
/* Widget node 0x20 - 1 */
- 0x0205004F,
+ 0x0205004f,
0x02045029,
- 0x0205004F,
+ 0x0205004f,
0x02045029,
+
/* Widget node 0x20 - 2 */
- 0x0205002B,
- 0x02040DD0,
- 0x0205002D,
+ 0x0205002b,
+ 0x02040dd0,
+ 0x0205002d,
0x02047020,
+
/* Widget node 0x20 - 3 */
- 0x0205000E,
- 0x02046C80,
- 0x01771F90,
- 0x01771F90,
+ 0x0205000e,
+ 0x02046c80,
+ 0x01771f90,
+ 0x01771f90,
+
/* TI AMP settings */
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
0x02040000,
0x02050025,
0x02040000,
0x02050026,
- 0x0204B010,
+ 0x0204b010,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
0x02040002,
0x02050025,
0x02040011,
0x02050026,
- 0x0204B010,
+ 0x0204b010,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
- 0x0204000D,
+ 0x0204000d,
0x02050025,
0x02040010,
0x02050026,
- 0x0204B010,
+ 0x0204b010,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
0x02040025,
0x02050025,
0x02040008,
0x02050026,
- 0x0204B010,
+ 0x0204b010,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
0x02040002,
0x02050025,
0x02040000,
0x02050026,
- 0x0204B010,
+ 0x0204b010,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
0x02040003,
0x02050025,
0x02040000,
0x02050026,
- 0x0204B010
+ 0x0204b010,
};
-const u32 pc_beep_verbs[] = {
-};
+const u32 pc_beep_verbs[] = {};
+
AZALIA_ARRAY_SIZES;
+
#endif
diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/hda_verb.h b/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/hda_verb.h
index d0f68c8..663a104 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/hda_verb.h
+++ b/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/hda_verb.h
@@ -20,14 +20,13 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
-
- 0x8086280B,
- 0x00000000,
- 0x00000005,
+ 0x8086280b, /* Codec Vendor / Device ID */
+ 0x00000000, /* Subsystem ID */
+ 5, /* Number of jacks */
/*
* Display Audio Verb Table
- * Enable the third converter and Pin first (NID 08h)
+ * Enable the third converter and pin first (NID 0x08)
*/
0x00878101,
0x00878101,
@@ -38,163 +37,169 @@
AZALIA_PIN_CFG(0, 0x06, 0x18560020),
AZALIA_PIN_CFG(0, 0x07, 0x18560030),
- /* Disable the third converter and third Pin (NID 08h) */
+ /* Disable the third converter and third pin (NID 0x08) */
0x00878100,
0x00878100,
0x00878100,
0x00878100,
- /* ALC 286 */
- 0x10EC0286,
- 0x00000000,
- 0x00000023,
- AZALIA_SUBVENDOR(0, 0x10EC1092),
+
+ 0x10ec0286, /* Codec Vendor / Device ID: Realtek ALC286 */
+ 0x00000000, /* Subsystem ID */
+ 35, /* Number of jacks */
+
+ AZALIA_SUBVENDOR(0, 0x10ec1092),
AZALIA_PIN_CFG(0, 0x01, 0x00000000),
- AZALIA_PIN_CFG(0, 0x12, 0x411111F0),
+ AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
- AZALIA_PIN_CFG(0, 0x14, 0x9017011F),
+ AZALIA_PIN_CFG(0, 0x14, 0x9017011f),
AZALIA_PIN_CFG(0, 0x17, 0x90170110),
- AZALIA_PIN_CFG(0, 0x18, 0x03A11040),
- AZALIA_PIN_CFG(0, 0x19, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x1A, 0x411111F0),
- AZALIA_PIN_CFG(0, 0x1D, 0x4066A22D),
- AZALIA_PIN_CFG(0, 0x1E, 0x411111F0),
+ AZALIA_PIN_CFG(0, 0x18, 0x03a11040),
+ AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1d, 0x4066a22d),
+ AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
AZALIA_PIN_CFG(0, 0x21, 0x03211020),
/* Widget node 0x20 */
0x02050071,
0x02040014,
0x02050010,
- 0x02040C22,
+ 0x02040c22,
+
/* Widget node 0x20 - 1 */
- 0x0205004F,
+ 0x0205004f,
0x02045029,
- 0x0205004F,
+ 0x0205004f,
0x02045029,
+
/* Widget node 0x20 - 2 */
- 0x0205002B,
- 0x02040DD0,
- 0x0205002D,
+ 0x0205002b,
+ 0x02040dd0,
+ 0x0205002d,
0x02047020,
+
/* Widget node 0x20 - 3 */
- 0x0205000E,
- 0x02046C80,
- 0x01771F90,
- 0x01771F90,
+ 0x0205000e,
+ 0x02046c80,
+ 0x01771f90,
+ 0x01771f90,
+
/* TI AMP settings */
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
0x02040000,
0x02050025,
0x02040000,
0x02050026,
- 0x0204B010,
+ 0x0204b010,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
0x02040002,
0x02050025,
0x02040011,
0x02050026,
- 0x0204B010,
+ 0x0204b010,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
- 0x0204000D,
+ 0x0204000d,
0x02050025,
0x02040010,
0x02050026,
- 0x0204B010,
+ 0x0204b010,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
0x02040025,
0x02050025,
0x02040008,
0x02050026,
- 0x0204B010,
+ 0x0204b010,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
0x02040002,
0x02050025,
0x02040000,
0x02050026,
- 0x0204B010,
+ 0x0204b010,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
- 0x000F0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
+ 0x000f0000,
0x02050022,
- 0x0204004C,
+ 0x0204004c,
0x02050023,
0x02040003,
0x02050025,
0x02040000,
0x02050026,
- 0x0204B010
+ 0x0204b010,
};
-const u32 pc_beep_verbs[] = {
-};
+const u32 pc_beep_verbs[] = {};
+
AZALIA_ARRAY_SIZES;
+
#endif
diff --git a/src/mainboard/intel/wtm2/hda_verb.c b/src/mainboard/intel/wtm2/hda_verb.c
index f7b74a1..22dec1b 100644
--- a/src/mainboard/intel/wtm2/hda_verb.c
+++ b/src/mainboard/intel/wtm2/hda_verb.c
@@ -16,16 +16,15 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10134210, // Codec Vendor / Device ID: Cirrus Logic CS4210
- 0x10134210, // Subsystem ID
- 0x00000007, // Number of jacks
+ /* --- Codec #0 --- */
+ 0x10134210, /* Codec Vendor / Device ID: Cirrus Logic CS4210 */
+ 0x10134210, /* Subsystem ID */
+ 7, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10134210 */
+ /* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x10134210),
/* Pin Widget Verb Table */
-
/* Pin Complex (NID 0x05) 1/8 Gray HP Out at Ext Front */
AZALIA_PIN_CFG(0x0, 0x05, 0x022120f0),
@@ -44,13 +43,13 @@
/* Pin Complex (NID 0x0a) Optical Black SPDIF Out at Ext N/A */
AZALIA_PIN_CFG(0x0, 0x0a, 0x434510f0),
- /* coreboot specific header */
- 0x80862805, // Codec Vendor / Device ID: Intel CougarPoint HDMI
- 0x80860101, // Subsystem ID
- 0x00000004, // Number of jacks
+ /* --- Codec #3 --- */
+ 0x80862805, /* Codec Vendor / Device ID: Intel CougarPoint HDMI */
+ 0x80860101, /* Subsystem ID */
+ 4, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */
- AZALIA_SUBVENDOR(0x0, 0x80860101),
+ /* HDA Codec Subsystem ID Verb Table */
+ AZALIA_SUBVENDOR(0x3, 0x80860101),
/* Pin Complex (NID 0x05) Digital Out at Int HDMI */
AZALIA_PIN_CFG(0x3, 0x05, 0x18560010),
diff --git a/src/mainboard/kontron/ktqm77/hda_verb.c b/src/mainboard/kontron/ktqm77/hda_verb.c
index fdbc977..9b1d147 100644
--- a/src/mainboard/kontron/ktqm77/hda_verb.c
+++ b/src/mainboard/kontron/ktqm77/hda_verb.c
@@ -17,16 +17,15 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
+ /* --- Codec #0 --- */
0x11060397, /* Codec Vendor / Device ID: Via VT1708S */
0x11060000, /* Subsystem ID */
- 0x0000000c, /* Number of jacks */
+ 12, /* Number of jacks */
/* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x11060000 */
AZALIA_SUBVENDOR(0x0, 0x11060000),
/* Pin Widget Verb Table */
-
/*
* NID 0x19 [Port A (SURR)]:
* Jack Internal Speaker N/A Black
@@ -93,11 +92,10 @@
*/
AZALIA_PIN_CFG(0, 0x23, 0x10102114),
-
- /* coreboot specific header */
+ /* --- Codec #3 --- */
0x80862806, /* Codec Vendor / Device ID: Intel PantherPoint HDMI */
0x80860101, /* Subsystem ID */
- 0x00000004, /* Number of jacks */
+ 4, /* Number of jacks */
/* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */
AZALIA_SUBVENDOR(0x0, 0x80860101),
diff --git a/src/mainboard/lenovo/t400/hda_verb.c b/src/mainboard/lenovo/t400/hda_verb.c
index 9890151..4d97b5d 100644
--- a/src/mainboard/lenovo/t400/hda_verb.c
+++ b/src/mainboard/lenovo/t400/hda_verb.c
@@ -17,13 +17,11 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x14f15051, // Conexant CX20561 (Hermosa)
- 0x17aa211c, // Subsystem ID
- 0x00000008, // Number of entries
+ 0x14f15051, /* Conexant CX20561 (Hermosa) */
+ 0x17aa211c, /* Subsystem ID */
+ 8, /* Number of entries */
/* Pin Widget Verb Table */
-
AZALIA_PIN_CFG(0, 0x16, 0x022140f0),
AZALIA_PIN_CFG(0, 0x17, 0x61a190f0),
AZALIA_PIN_CFG(0, 0x18, 0x02a190f0),
diff --git a/src/mainboard/lenovo/t420/hda_verb.c b/src/mainboard/lenovo/t420/hda_verb.c
index 4c68c73..53503f1 100644
--- a/src/mainboard/lenovo/t420/hda_verb.c
+++ b/src/mainboard/lenovo/t420/hda_verb.c
@@ -41,8 +41,7 @@
0x00b707C0, /* Enable PortB as Output with HP amp */
0x00d70740, /* Enable PortD as Output */
0x0017a200, /* Disable ClkEn of PortSenseTst */
- 0x0017c621, /* Slave Port - Port A used as microphone input for
- combo Jack
+ 0x0017c621, /* Slave Port - Port A used as microphone input for combo Jack
Master Port - Port B used for Jack Presence Detect
Enable Combo Jack Detection */
0x0017a208, /* Enable ClkEn of PortSenseTst */
diff --git a/src/mainboard/lenovo/t420s/hda_verb.c b/src/mainboard/lenovo/t420s/hda_verb.c
index 9d315d7..af2a7fb 100644
--- a/src/mainboard/lenovo/t420s/hda_verb.c
+++ b/src/mainboard/lenovo/t420s/hda_verb.c
@@ -41,8 +41,7 @@
0x00b707C0, /* Enable PortB as Output with HP amp */
0x00d70740, /* Enable PortD as Output */
0x0017a200, /* Disable ClkEn of PortSenseTst */
- 0x0017c621, /* Slave Port - Port A used as microphone input for
- combo Jack
+ 0x0017c621, /* Slave Port - Port A used as microphone input for combo Jack
Master Port - Port B used for Jack Presence Detect
Enable Combo Jack Detection */
0x0017a208, /* Enable ClkEn of PortSenseTst */
diff --git a/src/mainboard/lenovo/t520/hda_verb.c b/src/mainboard/lenovo/t520/hda_verb.c
index 46d7d94..a1cf688 100644
--- a/src/mainboard/lenovo/t520/hda_verb.c
+++ b/src/mainboard/lenovo/t520/hda_verb.c
@@ -41,8 +41,7 @@
0x00b707c0, /* Enable PortB as Output with HP amp */
0x00d70740, /* Enable PortD as Output */
0x0017a200, /* Disable ClkEn of PortSenseTst */
- 0x0017c621, /* Slave Port - Port A used as microphone input for
- combo Jack
+ 0x0017c621, /* Slave Port - Port A used as microphone input for combo Jack
Master Port - Port B used for Jack Presence Detect
Enable Combo Jack Detection */
0x0017a208, /* Enable ClkEn of PortSenseTst */
diff --git a/src/mainboard/lenovo/thinkcentre_a58/hda_verb.c b/src/mainboard/lenovo/thinkcentre_a58/hda_verb.c
index 94ffcfe..17b97bc 100644
--- a/src/mainboard/lenovo/thinkcentre_a58/hda_verb.c
+++ b/src/mainboard/lenovo/thinkcentre_a58/hda_verb.c
@@ -17,14 +17,11 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- /* Realtek ALC662 rev1 */
- 0x10ec0662, /* Vendor ID */
- 0x17aa304f, /* Subsystem ID */
- 10, /* Number of entries */
+ 0x10ec0662, /* Vendor ID: Realtek ALC662 rev1 */
+ 0x17aa304f, /* Subsystem ID */
+ 10, /* Number of entries */
/* Pin Widget Verb Table */
-
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
AZALIA_PIN_CFG(0, 0x15, 0x99130120),
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
diff --git a/src/mainboard/lenovo/x131e/hda_verb.c b/src/mainboard/lenovo/x131e/hda_verb.c
index 83b5148..a1481f1 100644
--- a/src/mainboard/lenovo/x131e/hda_verb.c
+++ b/src/mainboard/lenovo/x131e/hda_verb.c
@@ -17,61 +17,61 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0269, // Codec Vendor / Device ID: Realtek
- 0x17aa21fe, // Subsystem ID
- 0x0000000b, // Number of jacks
+ /* --- Codec #0 --- */
+ 0x10ec0269, /* Codec Vendor / Device ID: Realtek */
+ 0x17aa21fe, /* Subsystem ID */
+ 11, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x17aa21fe */
+ /* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x17aa21fe),
/* Pin Widget Verb Table */
- /* Pin Complex (NID 0x12): 0x90a60930 DMIC */
+ /* DMIC */
AZALIA_PIN_CFG(0x0, 0x12, 0x90a60930),
- /* Pin Complex (NID 0x14): 0x90170110 SPEAKER-OUT (Port-D) */
+ /* SPEAKER-OUT (Port-D) */
AZALIA_PIN_CFG(0x0, 0x14, 0x90170110),
- /* Pin Complex (NID 0x15): 0x0321101f HP-OUT (Port-A) */
+ /* HP-OUT (Port-A) */
AZALIA_PIN_CFG(0x0, 0x15, 0x0321101f),
- /* Pin Complex (NID 0x17): 0x411111f0 MONO-OUT (Port-H) */
+ /* MONO-OUT (Port-H) */
AZALIA_PIN_CFG(0x0, 0x17, 0x411111f0),
- /* Pin Complex (NID 0x18): 0x03a11820 MIC1 (Port-B) */
+ /* MIC1 (Port-B) */
AZALIA_PIN_CFG(0x0, 0x18, 0x03a11820),
- /* Pin Complex (NID 0x19): 0x411111f0 MIC2 (Port-F) */
+ /* MIC2 (Port-F) */
AZALIA_PIN_CFG(0x0, 0x19, 0x411111f0),
- /* Pin Complex (NID 0x1a): 0x411111f0 LINE1 (Port-C) */
+ /* LINE1 (Port-C) */
AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
- /* Pin Complex (NID 0x1b): 0x411111f0 LINE2 (Port-E) */
+ /* LINE2 (Port-E) */
AZALIA_PIN_CFG(0x0, 0x1b, 0x411111f0),
- /* Pin Complex (NID 0x1d): 0x4016862d PC-BEEP */
+ /* PC-BEEP */
AZALIA_PIN_CFG(0x0, 0x1d, 0x4016862d),
- /* Pin Complex (NID 0x1e): 0x411111f0 S/PDIF-OUT */
+ /* S/PDIF-OUT */
AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
- /* coreboot specific header */
- 0x80862806, // Codec Vendor / Device ID: Intel PantherPoint HDMI
- 0x80860101, // Subsystem ID
- 0x00000004, // Number of jacks
+ /* --- Codec #3 --- */
+ 0x80862806, /* Codec Vendor / Device ID: Intel PantherPoint HDMI */
+ 0x80860101, /* Subsystem ID */
+ 0x00000004, /* Number of jacks */
/* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */
AZALIA_SUBVENDOR(0x3, 0x80860101),
- /* Pin Complex (NID 0x05) Digital Out at Int HDMI */
+ /* Digital Out at Int HDMI */
AZALIA_PIN_CFG(0x3, 0x05, 0x18560010),
- /* Pin Complex (NID 0x06) Not Connected */
+ /* Not Connected */
AZALIA_PIN_CFG(0x3, 0x06, 0x58560020),
- /* Pin Complex (NID 0x07) Not Connected */
+ /* Not Connected */
AZALIA_PIN_CFG(0x3, 0x07, 0x58560030),
};
diff --git a/src/mainboard/lenovo/x200/hda_verb.c b/src/mainboard/lenovo/x200/hda_verb.c
index 890b6c5..15ff4eb 100644
--- a/src/mainboard/lenovo/x200/hda_verb.c
+++ b/src/mainboard/lenovo/x200/hda_verb.c
@@ -17,13 +17,11 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x14f15051, // Conexant CX20561 (Hermosa)
- 0x17aa20ff, // Subsystem ID
- 0x00000008, // Number of entries
+ 0x14f15051, /* Conexant CX20561 (Hermosa) */
+ 0x17aa20ff, /* Subsystem ID */
+ 8, /* Number of entries */
/* Pin Widget Verb Table */
-
AZALIA_PIN_CFG(0, 0x16, 0x042140f0),
AZALIA_PIN_CFG(0, 0x17, 0x61a190f0),
AZALIA_PIN_CFG(0, 0x18, 0x04a190f0),
diff --git a/src/mainboard/lenovo/x60/hda_verb.c b/src/mainboard/lenovo/x60/hda_verb.c
index 0712498..02f56c7 100644
--- a/src/mainboard/lenovo/x60/hda_verb.c
+++ b/src/mainboard/lenovo/x60/hda_verb.c
@@ -17,9 +17,7 @@
0x11d41981, /* Codec Vendor / Device ID: Analog Devices AD1981 */
0x17aa2025, /* Subsystem ID */
11, /* Number of 4 dword sets */
-
AZALIA_SUBVENDOR(0x0, 0x17aa2025),
-
AZALIA_PIN_CFG(0, 0x05, 0xc3014110),
AZALIA_PIN_CFG(0, 0x06, 0x4221401f),
AZALIA_PIN_CFG(0, 0x07, 0x591311f0),
@@ -31,5 +29,7 @@
AZALIA_PIN_CFG(0, 0x18, 0x41a19023),
AZALIA_PIN_CFG(0, 0x19, 0x9933e12e)
};
+
const u32 pc_beep_verbs[0] = {};
+
AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/purism/librem_bdw/hda_verb.c b/src/mainboard/purism/librem_bdw/hda_verb.c
index 958a939..ffa878f 100644
--- a/src/mainboard/purism/librem_bdw/hda_verb.c
+++ b/src/mainboard/purism/librem_bdw/hda_verb.c
@@ -16,13 +16,13 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
0x10ec0269, /* Codec Vendor / Device ID: Realtek ALC269 */
0x19910269, /* Subsystem ID */
- 0x0000000c, /* Number of jacks (NID entries) */
+ 12, /* Number of jacks (NID entries) */
- 0x0017ff00, /* Function Reset */
- 0x0017ff00, /* Double Function Reset */
+ /* Function Reset four times */
+ 0x0017ff00,
+ 0x0017ff00,
0x0017ff00,
0x0017ff00,
@@ -31,7 +31,7 @@
/* Bits 19:8 - Verb ID */
/* Bits 7:0 - Payload */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x19910269 */
+ /* NID 0x01, HDA Codec Subsystem ID Verb Table */
0x00172069,
0x00172102,
0x00172291,
@@ -69,25 +69,25 @@
0x01971ea7,
0x01971f90,
- /* Pin Complex (NID 0x1A) */
+ /* Pin Complex (NID 0x1a) */
0x01a71cf0,
0x01a71d11,
0x01a71e11,
0x01a71f41,
- /* Pin Complex (NID 0x1B) */
+ /* Pin Complex (NID 0x1b) */
0x01b71cf0,
0x01b71d11,
0x01b71e11,
0x01b71f41,
- /* Pin Complex (NID 0x1D) */
+ /* Pin Complex (NID 0x1d) */
0x01d71c05,
0x01d71d9d,
0x01d71e56,
0x01d71f40,
- /* Pin Complex (NID 0x1E) */
+ /* Pin Complex (NID 0x1e) */
0x01e71cf0,
0x01e71d11,
0x01e71e11,
diff --git a/src/mainboard/purism/librem_skl/hda_verb.c b/src/mainboard/purism/librem_skl/hda_verb.c
index ea89f00..8f72290 100644
--- a/src/mainboard/purism/librem_skl/hda_verb.c
+++ b/src/mainboard/purism/librem_skl/hda_verb.c
@@ -16,13 +16,13 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
0x10ec0269, /* Codec Vendor / Device ID: Realtek ALC269 */
0x19910269, /* Subsystem ID */
- 0x0000000c, /* Number of jacks (NID entries) */
+ 12, /* Number of jacks (NID entries) */
- 0x0017ff00, /* Function Reset */
- 0x0017ff00, /* Double Function Reset */
+ /* Function Reset four times */
+ 0x0017ff00,
+ 0x0017ff00,
0x0017ff00,
0x0017ff00,
@@ -31,40 +31,20 @@
/* Bits 19:8 - Verb ID */
/* Bits 7:0 - Payload */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x19910269 */
+ /* NID 0x01, HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x19910269),
/* Pin Widget Verb Table */
-
- /* Pin Complex (NID 0x12) */
AZALIA_PIN_CFG(0x0, 0x12, 0x40000000),
-
- /* Pin Complex (NID 0x14) */
AZALIA_PIN_CFG(0x0, 0x14, 0x90170110),
-
- /* Pin Complex (NID 0x15) */
AZALIA_PIN_CFG(0x0, 0x15, 0x04214020),
-
- /* Pin Complex (NID 0x17) */
AZALIA_PIN_CFG(0x0, 0x17, 0x411111f0),
-
- /* Pin Complex (NID 0x18) */
AZALIA_PIN_CFG(0x0, 0x18, 0x04a19040),
-
- /* Pin Complex (NID 0x19) */
AZALIA_PIN_CFG(0x0, 0x19, 0x90a70130),
-
- /* Pin Complex (NID 0x1A) */
- AZALIA_PIN_CFG(0x0, 0x1A, 0x411111f0),
-
- /* Pin Complex (NID 0x1B) */
- AZALIA_PIN_CFG(0x0, 0x1B, 0x411111f0),
-
- /* Pin Complex (NID 0x1D) */
- AZALIA_PIN_CFG(0x0, 0x1D, 0x40548505),
-
- /* Pin Complex (NID 0x1E) */
- AZALIA_PIN_CFG(0x0, 0x1E, 0x411111f0),
+ AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0),
+ AZALIA_PIN_CFG(0x0, 0x1b, 0x411111f0),
+ AZALIA_PIN_CFG(0x0, 0x1d, 0x40548505),
+ AZALIA_PIN_CFG(0x0, 0x1e, 0x411111f0),
};
const u32 pc_beep_verbs[] = {};
diff --git a/src/mainboard/razer/blade_stealth_kbl/hda_verb.c b/src/mainboard/razer/blade_stealth_kbl/hda_verb.c
index 457d1d9..61c940a 100644
--- a/src/mainboard/razer/blade_stealth_kbl/hda_verb.c
+++ b/src/mainboard/razer/blade_stealth_kbl/hda_verb.c
@@ -17,11 +17,10 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
-
- /* Realtek, ALC298 */
- 0x10ec0298, /* Vendor ID */
- 0x1a586752, /* Subsystem ID */
- 12, /* Number of entries */
+ /* --- Codec #0 --- */
+ 0x10ec0298, /* Vendor ID: Realtek ALC298 */
+ 0x1a586752, /* Subsystem ID */
+ 12, /* Number of entries */
AZALIA_SUBVENDOR(0, 0x1a586752),
AZALIA_PIN_CFG(0, 0x12, 0xb7a60140),
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
@@ -35,10 +34,10 @@
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
AZALIA_PIN_CFG(0, 0x21, 0x03211020),
- /* Intel, KabylakeHDMI */
- 0x8086280b, /* Vendor ID */
- 0x80860101, /* Subsystem ID */
- 4, /* Number of entries */
+ /* --- Codec #2 --- */
+ 0x8086280b, /* Vendor ID: Intel Kaby Lake HDMI */
+ 0x80860101, /* Subsystem ID */
+ 4, /* Number of entries */
AZALIA_SUBVENDOR(2, 0x80860101),
AZALIA_PIN_CFG(2, 0x05, 0x18560010),
AZALIA_PIN_CFG(2, 0x06, 0x18560010),
@@ -46,4 +45,5 @@
};
const u32 pc_beep_verbs[] = {};
+
AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/roda/rk9/hda_verb.c b/src/mainboard/roda/rk9/hda_verb.c
index a7d2698..9e58076 100644
--- a/src/mainboard/roda/rk9/hda_verb.c
+++ b/src/mainboard/roda/rk9/hda_verb.c
@@ -17,36 +17,46 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
0x10ec0262, /* Codec Vendor / Device ID: Realtek ALC262 */
0x43528986, /* Subsystem ID */
0x0000000c, /* Number of entries */
/* Pin Widget Verb Table */
- /* Pin Complex (NID 0x11), S/PDIF-OUT2: not connected */
+ /* S/PDIF-OUT2: not connected */
AZALIA_PIN_CFG(0, 0x11, 0x411111f0),
- /* Pin Complex (NID 0x14), LINE_OUT (port D): Speakers */
+
+ /* LINE_OUT (port D): Speakers */
AZALIA_PIN_CFG(0, 0x14, 0x99130110),
- /* Pin Complex (NID 0x15), HP_OUT (port A): Head phones */
+
+ /* HP_OUT (port A): Headphones */
AZALIA_PIN_CFG(0, 0x15, 0x0121411f),
- /* Pin Complex (NID 0x16), MONO-OUT: not connected */
+
+ /* MONO-OUT: not connected */
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
- /* Pin Complex (NID 0x18), MIC1 (port B): Microphone */
+
+ /* MIC1 (port B): Microphone */
AZALIA_PIN_CFG(0, 0x18, 0x01a19920),
- /* Pin Complex (NID 0x19), MIC2 (port F): not connected */
+
+ /* MIC2 (port F): not connected */
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
- /* Pin Complex (NID 0x1a), LINE1 (port C): Line-In */
+
+ /* LINE1 (port C): Line-In */
AZALIA_PIN_CFG(0, 0x1a, 0x01813121),
- /* Pin Complex (NID 0x1b), LINE2 (port E): MDC */
+
+ /* LINE2 (port E): MDC */
AZALIA_PIN_CFG(0, 0x1b, 0x9983012f),
- /* Pin Complex (NID 0x1c), CD_IN */
+
+ /* CD_IN */
AZALIA_PIN_CFG(0, 0x1c, 0x593301f0),
- /* Pin Complex (NID 0x1d), PCBEEP */
+
+ /* PCBEEP */
AZALIA_PIN_CFG(0, 0x1d, 0x4014022d),
- /* Pin Complex (NID 0x1e), S/PDIF-OUT: not connected */
+
+ /* S/PDIF-OUT: not connected */
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
- /* Pin Complex (NID 0x1f), S/PDIF-IN: not connected */
+
+ /* S/PDIF-IN: not connected */
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0)
};
diff --git a/src/mainboard/roda/rv11/variants/rv11/include/variant/hda_verb.h b/src/mainboard/roda/rv11/variants/rv11/include/variant/hda_verb.h
index e80edc5..cdfa6fd 100644
--- a/src/mainboard/roda/rv11/variants/rv11/include/variant/hda_verb.h
+++ b/src/mainboard/roda/rv11/variants/rv11/include/variant/hda_verb.h
@@ -14,54 +14,33 @@
*/
const u32 cim_verb_data[] = {
- /* coreboot specific header */
0x10ec0262, /* Codec Vendor / Device ID: Realtek ALC262 */
0x1a864352, /* Subsystem ID */
- 0x0000000e, /* Number of jacks */
+ 14, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0262 */
+ /* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0, 0x1a864352),
-
AZALIA_PIN_CFG(0, 0x11, 0x40000000),
-
AZALIA_PIN_CFG(0, 0x12, 0x90a60140),
-
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
-
AZALIA_PIN_CFG(0, 0x15, 0x01214020),
-
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
-
AZALIA_PIN_CFG(0, 0x18, 0x01a19030),
-
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
-
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
-
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
-
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
-
AZALIA_PIN_CFG(0, 0x1d, 0x4036a235),
-
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
-
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
- /* coreboot specific header */
0x80862806, /* Codec Vendor / Device ID: Intel PantherPoint HDMI */
0x80860101, /* Subsystem ID */
- 0x00000004, /* Number of jacks */
+ 4, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */
+ /* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(3, 0x80860101),
-
- /* Pin Complex (NID 0x05) Digital Out at Int HDMI */
AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-
- /* Pin Complex (NID 0x06) Digital Out at Int HDMI */
AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-
- /* Pin Complex (NID 0x07) Digital Out at Int HDMI */
AZALIA_PIN_CFG(3, 0x07, 0x18560030),
};
diff --git a/src/mainboard/roda/rv11/variants/rw11/include/variant/hda_verb.h b/src/mainboard/roda/rv11/variants/rw11/include/variant/hda_verb.h
index edc5f64..8ffba41 100644
--- a/src/mainboard/roda/rv11/variants/rw11/include/variant/hda_verb.h
+++ b/src/mainboard/roda/rv11/variants/rw11/include/variant/hda_verb.h
@@ -14,54 +14,33 @@
*/
const u32 cim_verb_data[] = {
- /* coreboot specific header */
0x10ec0262, /* Codec Vendor / Device ID: Realtek ALC262 */
0x1a864352, /* Subsystem ID */
- 0x0000000e, /* Number of jacks */
+ 14, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0262 */
+ /* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0, 0x1a864352),
-
AZALIA_PIN_CFG(0, 0x11, 0x18561180),
-
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
-
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
-
AZALIA_PIN_CFG(0, 0x15, 0x03214020),
-
AZALIA_PIN_CFG(0, 0x16, 0x40000000),
-
AZALIA_PIN_CFG(0, 0x18, 0x03a19040),
-
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
-
AZALIA_PIN_CFG(0, 0x1a, 0x03813050),
-
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
-
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
-
AZALIA_PIN_CFG(0, 0x1d, 0x40d6862d),
-
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
-
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
- /* coreboot specific header */
0x80862806, /* Codec Vendor / Device ID: Intel PantherPoint HDMI */
0x80860101, /* Subsystem ID */
- 0x00000004, /* Number of jacks */
+ 4, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */
+ /* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(3, 0x80860101),
-
- /* Pin Complex (NID 0x05) Digital Out at Int HDMI */
AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-
- /* Pin Complex (NID 0x06) Digital Out at Int HDMI */
AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-
- /* Pin Complex (NID 0x07) Digital Out at Int HDMI */
AZALIA_PIN_CFG(3, 0x07, 0x18560030),
};
diff --git a/src/mainboard/samsung/lumpy/hda_verb.c b/src/mainboard/samsung/lumpy/hda_verb.c
index 252d872..bcf1fdd 100644
--- a/src/mainboard/samsung/lumpy/hda_verb.c
+++ b/src/mainboard/samsung/lumpy/hda_verb.c
@@ -16,42 +16,30 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10134210, // Codec Vendor / Device ID: Cirrus Logic CS4210
- 0x152D0924, // Subsystem ID
- 0x00000007, // Number of jacks
+ 0x10134210, /* Codec Vendor / Device ID: Cirrus Logic CS4210 */
+ 0x152d0924, /* Subsystem ID */
+ 7, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x152D0924 */
- AZALIA_SUBVENDOR(0x0, 0x152D0924),
+ /* HDA Codec Subsystem ID Verb Table */
+ AZALIA_SUBVENDOR(0x0, 0x152d0924),
0x00170500,
/* Pin Widget Verb Table */
-
- /* Pin Complex (NID 0x05) */
AZALIA_PIN_CFG(0x0, 0x05, 0x022110f0),
-
- /* Pin Complex (NID 0x06) */
AZALIA_PIN_CFG(0x0, 0x06, 0x901700f0),
-
- /* Pin Complex (NID 0x07) */
AZALIA_PIN_CFG(0x0, 0x07, 0x02a110f0),
-
- /* Pin Complex (NID 0x08) */
AZALIA_PIN_CFG(0x0, 0x08, 0x77a70037),
-
- /* Pin Complex (NID 0x09) */
AZALIA_PIN_CFG(0x0, 0x09, 0xb7a6003e),
-
- /* Pin Complex (NID 0x0a) */
AZALIA_PIN_CFG(0x0, 0x0a, 0x434510f0)
};
const u32 pc_beep_verbs[] = {
- 0x00170500, /* power up codec */
- 0x00270500, /* power up DAC */
- 0x00670500, /* power up speaker */
- 0x00670740, /* enable speaker output */
- 0x0023B04B, /* set DAC gain */
+ 0x00170500, /* power up codec */
+ 0x00270500, /* power up DAC */
+ 0x00670500, /* power up speaker */
+ 0x00670740, /* enable speaker output */
+ 0x0023b04b, /* set DAC gain */
};
+
AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/samsung/stumpy/hda_verb.c b/src/mainboard/samsung/stumpy/hda_verb.c
index 1fa6e35..6cb23a5 100644
--- a/src/mainboard/samsung/stumpy/hda_verb.c
+++ b/src/mainboard/samsung/stumpy/hda_verb.c
@@ -16,16 +16,14 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10134210, // Codec Vendor / Device ID: Cirrus Logic CS4210
- 0x10134210, // Subsystem ID
- 0x00000007, // Number of jacks
+ /* --- Codec #0 --- */
+ 0x10134210, /* Codec Vendor / Device ID: Cirrus Logic CS4210 */
+ 0x10134210, /* Subsystem ID */
+ 7, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10134210 */
+ /* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x10134210),
- /* Pin Widget Verb Table */
-
/* Pin Complex (NID 0x05) 1/8 Gray HP Out at Ext Front */
AZALIA_PIN_CFG(0x0, 0x05, 0x022120f0),
@@ -44,13 +42,13 @@
/* Pin Complex (NID 0x0a) Optical Black SPDIF Out at Ext N/A */
AZALIA_PIN_CFG(0x0, 0x0a, 0x434510f0),
- /* coreboot specific header */
- 0x80862805, // Codec Vendor / Device ID: Intel CougarPoint HDMI
- 0x80860101, // Subsystem ID
- 0x00000004, // Number of jacks
+ /* --- Codec #3 --- */
+ 0x80862805, /* Codec Vendor / Device ID: Intel CougarPoint HDMI */
+ 0x80860101, /* Subsystem ID */
+ 4, /* Number of jacks */
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */
- AZALIA_SUBVENDOR(0x0, 0x80860101),
+ /* HDA Codec Subsystem ID Verb Table */
+ AZALIA_SUBVENDOR(0x3, 0x80860101),
/* Pin Complex (NID 0x05) Digital Out at Int HDMI */
AZALIA_PIN_CFG(0x3, 0x05, 0x18560010),
@@ -63,10 +61,11 @@
};
const u32 pc_beep_verbs[] = {
- 0x00170500, /* power up codec */
- 0x00270500, /* power up DAC */
- 0x00670500, /* power up speaker */
- 0x00670740, /* enable speaker output */
- 0x0023B04B, /* set DAC gain */
+ 0x00170500, /* power up codec */
+ 0x00270500, /* power up DAC */
+ 0x00670500, /* power up speaker */
+ 0x00670740, /* enable speaker output */
+ 0x0023b04b, /* set DAC gain */
};
+
AZALIA_ARRAY_SIZES;
--
To view, visit https://review.coreboot.org/c/coreboot/+/37840
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9a3bffcb0fa0de35480a767a1e3aa323e0591198
Gerrit-Change-Number: 37840
Gerrit-PatchSet: 1
Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-MessageType: newchange
5
22
Change in ...coreboot[master]: security/lockdown: Write-protect WP_RO
by Patrick Rudolph (Code Review) 28 Apr '20
by Patrick Rudolph (Code Review) 28 Apr '20
28 Apr '20
Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32705
Change subject: security/lockdown: Write-protect WP_RO
......................................................................
security/lockdown: Write-protect WP_RO
Add another choice to boot media protection and write-protect WP_RO
in case VBOOT is enabled.
Tested on Lenovo T520:
The WP_RO region is write-protected.
Change-Id: I72c3e1a0720514b9b85b0433944ab5fb7109b2a2
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M src/security/lockdown/Kconfig
M src/security/lockdown/bootmedia.c
2 files changed, 29 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/32705/1
diff --git a/src/security/lockdown/Kconfig b/src/security/lockdown/Kconfig
index bb4d072..1e982d8 100644
--- a/src/security/lockdown/Kconfig
+++ b/src/security/lockdown/Kconfig
@@ -15,6 +15,18 @@
config BOOTMEDIA_LOCK_NONE
bool "Don't lock boot media sections"
+config BOOTMEDIA_LOCK_VBOOT_RO
+ bool "Write-protect WP_RO region in boot media"
+ depends on VBOOT
+ help
+ Select this if you want to write-protect the WP_RO region as specified
+ in the VBOOT FMAP. You will only be able to write the regions
+ FW_MAIN_A/FW_MAIN_B, which are not write-protected using the internal
+ programmer.
+ The locking will take place during the chipset lockdown, which
+ is either triggered by coreboot (when INTEL_CHIPSET_LOCKDOWN is set)
+ or has to be triggered later (e.g. by the payload or the OS).
+
config BOOTMEDIA_LOCK_RO
bool "Write-protect the whole boot media"
help
diff --git a/src/security/lockdown/bootmedia.c b/src/security/lockdown/bootmedia.c
index 8fb4ae9..6fa2de2 100644
--- a/src/security/lockdown/bootmedia.c
+++ b/src/security/lockdown/bootmedia.c
@@ -17,6 +17,7 @@
#include <commonlib/region.h>
#include <console/console.h>
#include <bootstate.h>
+#include <fmap.h>
/*
* Enable write protection on the WP_RO region of the bootmedia.
@@ -47,8 +48,23 @@
"of whole bootmedia\n");
locked = true;
}
- }
+ } else if (CONFIG(BOOTMEDIA_LOCK_VBOOT_RO)) {
+ struct region_device dev;
+ if (fmap_locate_area_as_rdev("WP_RO", &dev) < 0) {
+ printk(BIOS_ERR, "BM-LOCKDOWN: Could not find region 'WP_RO'\n");
+ } else {
+ for (size_t i = 0; i < ARRAY_SIZE(wp_prot); i++) {
+ printk(BIOS_DEBUG, "BM-LOCKDOWN: Trying write-protection"
+ "#%zu ...\n", i);
+ if (boot_device_wp_region(&dev, wp_prot[i]) < 0)
+ continue;
+ printk(BIOS_INFO, "BM-LOCKDOWN: Enabled write-protection of"
+ "WP_RO region\n");
+ locked = true;
+ }
+ }
+ }
if (!locked)
printk(BIOS_INFO, "BM-LOCKDOWN: Didn't enable bootmedia protection\n");
}
--
To view, visit https://review.coreboot.org/c/coreboot/+/32705
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I72c3e1a0720514b9b85b0433944ab5fb7109b2a2
Gerrit-Change-Number: 32705
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-MessageType: newchange
11
54
Change in ...coreboot[master]: security: Add common boot media write protection
by Patrick Rudolph (Code Review) 28 Apr '20
by Patrick Rudolph (Code Review) 28 Apr '20
28 Apr '20
Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32704
Change subject: security: Add common boot media write protection
......................................................................
security: Add common boot media write protection
Introduce boot media protection settings and use the existing
boot_device_wp_region() function to apply settings on all
platforms that supports it yet.
Also remove the Intel southbridge code, which is now obsolete.
Tested on Lenovo T520. The whole flash is protected.
Change-Id: Iceb3ecf0bde5cec562bc62d1d5c79da35305d183
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M src/security/Kconfig
M src/security/Makefile.inc
A src/security/lockdown/Kconfig
A src/security/lockdown/Makefile.inc
A src/security/lockdown/bootmedia.c
M src/soc/intel/common/block/fast_spi/Kconfig
M src/southbridge/intel/common/Kconfig
M src/southbridge/intel/common/finalize.c
8 files changed, 124 insertions(+), 49 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/32704/1
diff --git a/src/security/Kconfig b/src/security/Kconfig
index 6a334ac..99cb054 100644
--- a/src/security/Kconfig
+++ b/src/security/Kconfig
@@ -14,3 +14,4 @@
source "src/security/vboot/Kconfig"
source "src/security/tpm/Kconfig"
+source "src/security/lockdown/Kconfig"
diff --git a/src/security/Makefile.inc b/src/security/Makefile.inc
index a940b82..a74e498 100644
--- a/src/security/Makefile.inc
+++ b/src/security/Makefile.inc
@@ -1,2 +1,3 @@
subdirs-y += vboot
subdirs-y += tpm
+subdirs-y += lockdown
diff --git a/src/security/lockdown/Kconfig b/src/security/lockdown/Kconfig
new file mode 100644
index 0000000..bb4d072
--- /dev/null
+++ b/src/security/lockdown/Kconfig
@@ -0,0 +1,46 @@
+
+config SECURITY_BOOTMEDIA_LOCKDOWN
+ bool
+ default n
+ help
+ Platform support the locking of boot media. This can be for example
+ SPI controller protected regions or flash status register locking.
+
+if SECURITY_BOOTMEDIA_LOCKDOWN
+
+choice
+ prompt "Boot media protection"
+ default BOOTMEDIA_LOCK_NONE
+
+config BOOTMEDIA_LOCK_NONE
+ bool "Don't lock boot media sections"
+
+config BOOTMEDIA_LOCK_RO
+ bool "Write-protect the whole boot media"
+ help
+ Select this if you want to write-protect the whole firmware boot
+ media. The locking will take place during the chipset lockdown, which
+ is either triggered by coreboot (when INTEL_CHIPSET_LOCKDOWN is set)
+ or has to be triggered later (e.g. by the payload or the OS).
+
+ NOTE: If you trigger the chipset lockdown unconditionally,
+ you won't be able to write to the flash chip using the
+ internal programmer any more.
+
+config BOOTMEDIA_LOCK_NO_ACCESS
+ bool "Read- and write-protect the whole boot media"
+ help
+ Select this if you want to protect the firmware boot media against
+ all further accesses. On platforms that memory map a part of the
+ boot media the corresponding region is still readable.
+ The locking will take place during the chipset lockdown, which is
+ either triggered by coreboot (when INTEL_CHIPSET_LOCKDOWN is set) or
+ has to be triggered later (e.g. by the payload or the OS).
+
+ NOTE: If you trigger the chipset lockdown unconditionally,
+ you won't be able to write to the boot media using the
+ internal programmer any more.
+
+endchoice
+
+endif
diff --git a/src/security/lockdown/Makefile.inc b/src/security/lockdown/Makefile.inc
new file mode 100644
index 0000000..c287b9b
--- /dev/null
+++ b/src/security/lockdown/Makefile.inc
@@ -0,0 +1,16 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2019 9elements Agency GmbH <patrick.rudolph(a)9elements.com>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+ramstage-$(CONFIG_SECURITY_BOOTMEDIA_LOCKDOWN) += bootmedia.c
diff --git a/src/security/lockdown/bootmedia.c b/src/security/lockdown/bootmedia.c
new file mode 100644
index 0000000..8fb4ae9
--- /dev/null
+++ b/src/security/lockdown/bootmedia.c
@@ -0,0 +1,58 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2019 9elements Agency GmbH <patrick.rudolph(a)9elements.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <boot_device.h>
+#include <commonlib/region.h>
+#include <console/console.h>
+#include <bootstate.h>
+
+/*
+ * Enable write protection on the WP_RO region of the bootmedia.
+ */
+static void security_lockdown_bootmedia(void *unused)
+{
+ static const int wp_prot[] = {MEDIA_WP, CTRLR_WP};
+ const struct region_device *rdev;
+ bool locked = false;
+
+ if (CONFIG(BOOTMEDIA_LOCK_RO)) {
+ rdev = boot_device_ro();
+
+ for (size_t i = 0; i < ARRAY_SIZE(wp_prot); i++) {
+ printk(BIOS_DEBUG, "BM-LOCKDOWN: Trying write-protection"
+ "#%zu ...\n", i);
+ if (boot_device_wp_region(rdev, wp_prot[i]) < 0)
+ continue;
+
+ printk(BIOS_INFO, "BM-LOCKDOWN: Enabled write-protection of"
+ "whole bootmedia\n");
+ locked = true;
+ }
+ } else if (CONFIG(BOOTMEDIA_LOCK_NO_ACCESS)) {
+ rdev = boot_device_ro();
+ if (boot_device_wp_region(rdev, CTRLR_RWP) == 0) {
+ printk(BIOS_INFO, "BM-LOCKDOWN: Enabled read- and write protection"
+ "of whole bootmedia\n");
+ locked = true;
+ }
+ }
+
+ if (!locked)
+ printk(BIOS_INFO, "BM-LOCKDOWN: Didn't enable bootmedia protection\n");
+}
+
+/* BS_POST_DEVICE will lock the hardware */
+BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, security_lockdown_bootmedia,
+ NULL);
diff --git a/src/soc/intel/common/block/fast_spi/Kconfig b/src/soc/intel/common/block/fast_spi/Kconfig
index 4bd1f59..ff02844 100644
--- a/src/soc/intel/common/block/fast_spi/Kconfig
+++ b/src/soc/intel/common/block/fast_spi/Kconfig
@@ -1,5 +1,6 @@
config SOC_INTEL_COMMON_BLOCK_FAST_SPI
bool
+ select SECURITY_BOOTMEDIA_LOCKDOWN
help
Intel Processor common FAST_SPI support
diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig
index c3bd90d..39234a8 100644
--- a/src/southbridge/intel/common/Kconfig
+++ b/src/southbridge/intel/common/Kconfig
@@ -20,6 +20,7 @@
config SOUTHBRIDGE_INTEL_COMMON_SPI
def_bool n
select SPI_FLASH
+ select SECURITY_BOOTMEDIA_LOCKDOWN
config SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN
def_bool n
@@ -68,42 +69,3 @@
config SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
bool
depends on SOUTHBRIDGE_INTEL_COMMON
-
-if SOUTHBRIDGE_INTEL_COMMON_FINALIZE
-
-choice
- prompt "Flash locking during chipset lockdown"
- default LOCK_SPI_FLASH_NONE
-
-config LOCK_SPI_FLASH_NONE
- bool "Don't lock flash sections"
-
-config LOCK_SPI_FLASH_RO
- bool "Write-protect all flash sections"
- help
- Select this if you want to write-protect the whole firmware flash
- chip. The locking will take place during the chipset lockdown, which
- is either triggered by coreboot (when INTEL_CHIPSET_LOCKDOWN is set)
- or has to be triggered later (e.g. by the payload or the OS).
-
- NOTE: If you trigger the chipset lockdown unconditionally,
- you won't be able to write to the flash chip using the
- internal programmer any more.
-
-config LOCK_SPI_FLASH_NO_ACCESS
- bool "Write-protect all flash sections and read-protect non-BIOS sections"
- help
- Select this if you want to protect the firmware flash against all
- further accesses (with the exception of the memory mapped BIOS re-
- gion which is always readable). The locking will take place during
- the chipset lockdown, which is either triggered by coreboot (when
- INTEL_CHIPSET_LOCKDOWN is set) or has to be triggered later (e.g.
- by the payload or the OS).
-
- NOTE: If you trigger the chipset lockdown unconditionally,
- you won't be able to write to the flash chip using the
- internal programmer any more.
-
-endchoice
-
-endif
diff --git a/src/southbridge/intel/common/finalize.c b/src/southbridge/intel/common/finalize.c
index 80c65bb..6f7934a 100644
--- a/src/southbridge/intel/common/finalize.c
+++ b/src/southbridge/intel/common/finalize.c
@@ -28,16 +28,6 @@
{
const pci_devfn_t lpc_dev = PCI_DEV(0, 0x1f, 0);
- if (CONFIG(LOCK_SPI_FLASH_RO) ||
- CONFIG(LOCK_SPI_FLASH_NO_ACCESS)) {
- int i;
- u32 lockmask = 1UL << 31;
- if (CONFIG(LOCK_SPI_FLASH_NO_ACCESS))
- lockmask |= 1 << 15;
- for (i = 0; i < 20; i += 4)
- RCBA32(0x3874 + i) = RCBA32(0x3854 + i) | lockmask;
- }
-
/* Lock SPIBAR */
RCBA32_OR(0x3804, (1 << 15));
--
To view, visit https://review.coreboot.org/c/coreboot/+/32704
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iceb3ecf0bde5cec562bc62d1d5c79da35305d183
Gerrit-Change-Number: 32704
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-MessageType: newchange
7
39