coreboot-gerrit February 2020

coreboot-gerrit@coreboot.org

1 participants
1797 discussions

Change in coreboot[master]: soc/intel/common/block/lpc: create lpc_get_device() helper function
by Subrata Banik (Code Review) 17 Feb '20

17 Feb '20

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30209 ) Change subject: soc/intel/common/block/lpc: create lpc_get_device() helper function ...................................................................... Patch Set 1: (3 comments) https://review.coreboot.org/c/coreboot/+/30209/1/src/soc/intel/common/block… File src/soc/intel/common/block/lpc/lpc_lib.c: https://review.coreboot.org/c/coreboot/+/30209/1/src/soc/intel/common/block… PS1, Line 30: PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn)) > pci_devfn_t is a u32. I don't see why you need a function for this. […] Ack https://review.coreboot.org/c/coreboot/+/30209/1/src/soc/intel/common/block… PS1, Line 32: PCI_DEV_INVALID > no. […] Ack https://review.coreboot.org/c/coreboot/+/30209/1/src/soc/intel/common/block… PS1, Line 48: #define LPC_GET_DEV lpc_get_device() > I understand why you want to remove the __SIMPLE_DEVICE__ definition here. […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/30209 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I84a6102bf3849e9d4fe28e4c6a11bc7badcf5114 Gerrit-Change-Number: 30209 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 17 Feb 2020 06:42:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: cpu: Add microcode at pre-defined address
by Andrey Petrov (Code Review) 17 Feb '20

17 Feb '20

Andrey Petrov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38640 ) Change subject: cpu: Add microcode at pre-defined address ...................................................................... Patch Set 7: (3 comments) > Patch Set 6: > > (1 comment) https://review.coreboot.org/c/coreboot/+/38640/6//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/38640/6//COMMIT_MSG@7 PS6, Line 7: c > Coreboot has native assembly code to update microcode by parsing cbfs, removing the need for microco […] the assembly code around FSP-T invocation actually finds microcode location and size. However, at that time we do not have CAR (because by definition FSP-T is meant to set it up). So we are limited to register memory only. Unfortunately FSP-T TempRamInit call takes 1 parameter (register) that is a address of a structure. Unfortunately it is not really possible to modify that structure unless you somehow get a temporary storage of some sort. So no it is not possible. If FSP-T would take microcode location as a register, that would have totally worked https://review.coreboot.org/c/coreboot/+/38640/6//COMMIT_MSG@13 PS6, Line 13: : Also, on current version of FSP-T on Xeons microcode is not optional. > This was also observed on some older FSP1.1 versions, possibly for the same reason. https://blog. […] I think we all agree we need less blobs not more. I think fake microcode for FSP-T is yet another crutch. What we need is to drop FSP-T for good. Now then, for servers FSP-T is slightly more complicated that what I have seen on atoms. Since multiple cores come out at the same-time, all of them step into FSP-T and some sort of synchronization is performed there. I have tried to implement FSP-T functionality in regular C code in bootblock. However, I got stuck pretty early. I believe the documentation I was given is incomplete. Long story short, we are working with Intel on trying to get rid of FSP-T for xeons but there is no ETA yet. However at present time this is crutch we have to live with. Once Intel updates the documentation I am pretty confident we can implement FSP-T. https://review.coreboot.org/c/coreboot/+/38640/6//COMMIT_MSG@20 PS6, Line 20: TP > That's Tioga Pass, right? yes -- To view, visit https://review.coreboot.org/c/coreboot/+/38640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6c02601a7ac64078e556e2032baeccaf27f77da2 Gerrit-Change-Number: 38640 Gerrit-PatchSet: 7 Gerrit-Owner: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 17 Feb 2020 04:48:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: cpu: Add microcode at pre-defined address
by Andrey Petrov (Code Review) 17 Feb '20

17 Feb '20

Hello Jonathan Zhang, David Hendricks, Philipp Deppenwiese, Lance Zhao, build bot (Jenkins), Lijian Zhao, Anjaneya "Reddy" Chagam, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/38640 to look at the new patch set (#7). Change subject: cpu: Add microcode at pre-defined address ...................................................................... cpu: Add microcode at pre-defined address FSP-T takes microcode pointer and location parameters, and FSP-T is invoked before CAR is setup and before memory is trained. So it is not possible to modify supplied microcode pointer in runtime. Because of that we have to hardcode the pointer in bootblock. Also, on current version of FSP-T on Xeons microcode is not optional. Reasons for that are currently unclear and are being investigated. However for the present time we need to be able to add microcode at a certain offset so FSP-T can be used TEST=test on OCP TiogaPass board, as well as out-of-tree CPU/board Change-Id: I6c02601a7ac64078e556e2032baeccaf27f77da2 Signed-off-by: Andrey Petrov <anpetrov(a)fb.com> --- M src/cpu/Makefile.inc 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/38640/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/38640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6c02601a7ac64078e556e2032baeccaf27f77da2 Gerrit-Change-Number: 38640 Gerrit-PatchSet: 7 Gerrit-Owner: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common/{block, pch}: Move smihandler common functions into ...
by V Sowmya (Code Review) 17 Feb '20

17 Feb '20

V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/26138 ) Change subject: soc/intel/common/{block, pch}: Move smihandler common functions into common code ...................................................................... Patch Set 38: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/26138 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic082bc5d556dd19617d83ab86f93a53574b5bc03 Gerrit-Change-Number: 26138 Gerrit-PatchSet: 38 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 17 Feb 2020 03:39:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/block: Move cse common functions into block/cse
by Subrata Banik (Code Review) 16 Feb '20

16 Feb '20

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/26133 ) Change subject: soc/intel/common/block: Move cse common functions into block/cse ...................................................................... Patch Set 37: (1 comment) https://review.coreboot.org/c/coreboot/+/26133/37/src/soc/intel/tigerlake/s… File src/soc/intel/tigerlake/smihandler.c: https://review.coreboot.org/c/coreboot/+/26133/37/src/soc/intel/tigerlake/s… PS37, Line 37: heci_disable > Does TGL really support this? yes, after CNP PCH all PCH will support this, use of SMM mode to make HECI function disable. only exception was CMP due to dependency over CPU where SMM mode function disabling was not supported. > I remember we had this discussion on CML where you had mentioned that disabling of HECI might not be possible in SMM for CML and future platforms? Or am I remembering this incorrectly? True for CML but not for future platforms. What we had proposed was that for future platform we will try to provide both options as FSP UPD to use PMC API for HECI function disable and continuing SMM mode support using coreboot. if i remember correctly, we have agreed to continue with coreboot support of disabling heci using SMM mode rather relying on FSP as CML due to more control in hand over FSP -- To view, visit https://review.coreboot.org/c/coreboot/+/26133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22a4cc05d3967c7653d2abe2c829b4876516d179 Gerrit-Change-Number: 26133 Gerrit-PatchSet: 37 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 16 Feb 2020 17:14:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/{block, pch}: Move smihandler common functions into ...
by Subrata Banik (Code Review) 16 Feb '20

16 Feb '20

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/26138 ) Change subject: soc/intel/common/{block, pch}: Move smihandler common functions into common code ...................................................................... Patch Set 38: (1 comment) https://review.coreboot.org/c/coreboot/+/26138/38/src/soc/intel/common/pch/… File src/soc/intel/common/pch/smm/smihandler.c: PS38: > I am curious why this is a separate file and the contents here were not moved to soc/intel/common/block/smm? majorly because of APL/GLK not having exact same code as big core platform are using For an example: 1. get_smm_save_state_ops function returns "em64t100_smm_ops" for APL/GLK and cores are using em64t101_smm_ops https://github.com/coreboot/coreboot/blob/master/src/soc/intel/apollolake/s… const struct smm_save_state_ops *get_smm_save_state_ops(void) { return &em64t100_smm_ops; } 2. smihandler_soc_get_sci_mask function is doing the same operation in big core and small cores but bit definitions are not same for APL/GLK below macro names are not same with cores SLP_SMI_STS, APM_SMI_STS. All small cores are using consistent macro name <something>_STS in pm.h but on core platform we are using macro names like <something>_STS_BIT example: APM_STS_BIT and SMI_ON_SLP_EN_STS_BIT Was thinking why we need to rename macros in APL/GLK to align with core platform. hence this file exist to maintain common core platform functions rather moving into common/block > Also, how was it decided that function smihandler_soc_get_sci_mask() should live in this file? I hope to provide answer above, let me know if some confusion -- To view, visit https://review.coreboot.org/c/coreboot/+/26138 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic082bc5d556dd19617d83ab86f93a53574b5bc03 Gerrit-Change-Number: 26138 Gerrit-PatchSet: 38 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 16 Feb 2020 17:07:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/apollolake: disable DSP and HDA together
by Maxim Polyakov (Code Review) 16 Feb '20

16 Feb '20

Maxim Polyakov has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/38816 ) Change subject: soc/intel/apollolake: disable DSP and HDA together ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/38816 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I860dda1daa5f01a278eb0be322bd4ed5acaddf81 Gerrit-Change-Number: 38816 Gerrit-PatchSet: 6 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: soc/intel/common/block: Move cse common functions into block/cse
by Furquan Shaikh (Code Review) 16 Feb '20

16 Feb '20

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/26133 ) Change subject: soc/intel/common/block: Move cse common functions into block/cse ...................................................................... Patch Set 37: (1 comment) https://review.coreboot.org/c/coreboot/+/26133/37/src/soc/intel/tigerlake/s… File src/soc/intel/tigerlake/smihandler.c: https://review.coreboot.org/c/coreboot/+/26133/37/src/soc/intel/tigerlake/s… PS37, Line 37: heci_disable Does TGL really support this? I remember we had this discussion on CML where you had mentioned that disabling of HECI might not be possible in SMM for CML and future platforms? Or am I remembering this incorrectly? -- To view, visit https://review.coreboot.org/c/coreboot/+/26133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22a4cc05d3967c7653d2abe2c829b4876516d179 Gerrit-Change-Number: 26133 Gerrit-PatchSet: 37 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 16 Feb 2020 08:53:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/{block, pch}: Move smihandler common functions into ...
by Furquan Shaikh (Code Review) 16 Feb '20

16 Feb '20

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/26138 ) Change subject: soc/intel/common/{block, pch}: Move smihandler common functions into common code ...................................................................... Patch Set 38: (1 comment) https://review.coreboot.org/c/coreboot/+/26138/38/src/soc/intel/common/pch/… File src/soc/intel/common/pch/smm/smihandler.c: PS38: I am curious why this is a separate file and the contents here were not moved to soc/intel/common/block/smm? Also, how was it decided that function smihandler_soc_get_sci_mask() should live in this file? -- To view, visit https://review.coreboot.org/c/coreboot/+/26138 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic082bc5d556dd19617d83ab86f93a53574b5bc03 Gerrit-Change-Number: 26138 Gerrit-PatchSet: 38 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 16 Feb 2020 08:51:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mainboard: Add Dell Inspiron 660s
by Jean Lucas (Code Review) 16 Feb '20

16 Feb '20

Jean Lucas has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/22682 ) Change subject: mainboard: Add Dell Inspiron 660s ...................................................................... Abandoned No longer own this board. -- To view, visit https://review.coreboot.org/c/coreboot/+/22682 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8dabb1e1d14e60957e8c8800b0c30921d6bb5d8e Gerrit-Change-Number: 22682 Gerrit-PatchSet: 12 Gerrit-Owner: Jean Lucas <jean(a)4ray.co> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Jean Lucas <jean(a)4ray.co> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Vladimir Serbinenko <phcoder(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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coreboot-gerrit February 2020