coreboot-gerrit February 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: xeonsp: Initial Skylake-SP support
by Andrey Petrov (Code Review) 19 Feb '20

19 Feb '20

Hello Patrick Rudolph, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/38839 to look at the new patch set (#7). Change subject: xeonsp: Initial Skylake-SP support ...................................................................... xeonsp: Initial Skylake-SP support This adds very basic Skylake-SP support. TEST=bootblock works and prints on serial on OCP TiogaPass Change-Id: Iaccd8e0034abd5954e3169bf7e585b5f59fe1ead Signed-off-by: Andrey Petrov <anpetrov(a)fb.com> --- M src/cpu/intel/Kconfig M src/cpu/intel/xeonsp/Makefile.inc A src/cpu/intel/xeonsp/cpu/skylake-sp/Kconfig A src/cpu/intel/xeonsp/cpu/skylake-sp/Makefile.inc A src/cpu/intel/xeonsp/cpu/skylake-sp/chip.h A src/cpu/intel/xeonsp/cpu/skylake-sp/include/soc/pci_devs.h A src/cpu/intel/xeonsp/cpu/skylake-sp/romstage.c 7 files changed, 114 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/38839/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/38839 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaccd8e0034abd5954e3169bf7e585b5f59fe1ead Gerrit-Change-Number: 38839 Gerrit-PatchSet: 7 Gerrit-Owner: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: cpu: Add initial xeonsp support boilerplate
by Andrey Petrov (Code Review) 19 Feb '20

19 Feb '20

Hello Patrick Rudolph, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/38838 to look at the new patch set (#7). Change subject: cpu: Add initial xeonsp support boilerplate ...................................................................... cpu: Add initial xeonsp support boilerplate This adds boilerplate code that is common across several Xeon SP processors. The idea is that common xeonsp code should go into cpu/intel/xeonsp/ and CPU-specific files and overrides should go into a subfolder. Change-Id: I24346b8a5c30342419db23b5f1adf27d4d0ebc5f Signed-off-by: Andrey Petrov <anpetrov(a)fb.com> --- M src/cpu/intel/Kconfig M src/cpu/intel/Makefile.inc A src/cpu/intel/xeonsp/Kconfig A src/cpu/intel/xeonsp/Makefile.inc A src/cpu/intel/xeonsp/bootblock.c A src/cpu/intel/xeonsp/include/soc/cpu.h A src/cpu/intel/xeonsp/include/soc/gpe.h A src/cpu/intel/xeonsp/include/soc/gpio.h A src/cpu/intel/xeonsp/include/soc/iomap.h A src/cpu/intel/xeonsp/include/soc/pm.h A src/cpu/intel/xeonsp/include/soc/pmc.h A src/cpu/intel/xeonsp/include/soc/smbus.h A src/cpu/intel/xeonsp/include/soc/systemagent.h A src/cpu/intel/xeonsp/lpc.c A src/cpu/intel/xeonsp/model_xeonsp_init.c A src/cpu/intel/xeonsp/postcar.c A src/cpu/intel/xeonsp/ramstage.c A src/cpu/intel/xeonsp/romstage.c 18 files changed, 475 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/38838/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/38838 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I24346b8a5c30342419db23b5f1adf27d4d0ebc5f Gerrit-Change-Number: 38838 Gerrit-PatchSet: 7 Gerrit-Owner: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: cpu: Add initial xeonsp support boilerplate
by build bot (Jenkins) (Code Review) 19 Feb '20

19 Feb '20

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38838 ) Change subject: cpu: Add initial xeonsp support boilerplate ...................................................................... Patch Set 6: (2 comments) https://review.coreboot.org/c/coreboot/+/38838/6/src/cpu/intel/xeonsp/inclu… File src/cpu/intel/xeonsp/include/soc/gpio.h: https://review.coreboot.org/c/coreboot/+/38838/6/src/cpu/intel/xeonsp/inclu… PS6, Line 17: #define NUM_GPI_STATUS_REGS 0 adding a line without newline at end of file https://review.coreboot.org/c/coreboot/+/38838/6/src/cpu/intel/xeonsp/postc… File src/cpu/intel/xeonsp/postcar.c: https://review.coreboot.org/c/coreboot/+/38838/6/src/cpu/intel/xeonsp/postc… PS6, Line 20: void fill_postcar_frame(struct postcar_frame *pcf) { open brace '{' following function definitions go on the next line -- To view, visit https://review.coreboot.org/c/coreboot/+/38838 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I24346b8a5c30342419db23b5f1adf27d4d0ebc5f Gerrit-Change-Number: 38838 Gerrit-PatchSet: 6 Gerrit-Owner: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 19 Feb 2020 05:49:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mainboard: Add OCP Tioga Pass board
by build bot (Jenkins) (Code Review) 19 Feb '20

19 Feb '20

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38840 ) Change subject: mainboard: Add OCP Tioga Pass board ...................................................................... Patch Set 7: (1 comment) https://review.coreboot.org/c/coreboot/+/38840/7/src/mainboard/ocp/tiogapas… File src/mainboard/ocp/tiogapass/bootblock.c: https://review.coreboot.org/c/coreboot/+/38840/7/src/mainboard/ocp/tiogapas… PS7, Line 46: if (CONFIG(BOOTBLOCK_CONSOLE)) { braces {} are not necessary for single statement blocks -- To view, visit https://review.coreboot.org/c/coreboot/+/38840 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6c5da3c3856b035af5f2b3b80f0894f6fb81696 Gerrit-Change-Number: 38840 Gerrit-PatchSet: 7 Gerrit-Owner: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 19 Feb 2020 05:49:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mainboard: Add OCP Tioga Pass board
by Andrey Petrov (Code Review) 19 Feb '20

19 Feb '20

Hello Jonathan Zhang, David Hendricks, Stefan Reinauer, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/38840 to look at the new patch set (#7). Change subject: mainboard: Add OCP Tioga Pass board ...................................................................... mainboard: Add OCP Tioga Pass board This adds mainboard skeleton file set. Change-Id: Ic6c5da3c3856b035af5f2b3b80f0894f6fb81696 Signed-off-by: Andrey Petrov <anpetrov(a)fb.com> --- A src/mainboard/ocp/Kconfig A src/mainboard/ocp/Kconfig.name A src/mainboard/ocp/tiogapass/Kconfig A src/mainboard/ocp/tiogapass/Kconfig.name A src/mainboard/ocp/tiogapass/Makefile.inc A src/mainboard/ocp/tiogapass/acpi_tables.c A src/mainboard/ocp/tiogapass/board.fmd A src/mainboard/ocp/tiogapass/board_info.txt A src/mainboard/ocp/tiogapass/bootblock.c A src/mainboard/ocp/tiogapass/devicetree.cb A src/mainboard/ocp/tiogapass/dsdt.asl A src/mainboard/ocp/tiogapass/romstage.c 12 files changed, 211 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/38840/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/38840 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6c5da3c3856b035af5f2b3b80f0894f6fb81696 Gerrit-Change-Number: 38840 Gerrit-PatchSet: 7 Gerrit-Owner: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: cpu: Add initial xeonsp support boilerplate
by Andrey Petrov (Code Review) 19 Feb '20

19 Feb '20

Hello Patrick Rudolph, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/38838 to look at the new patch set (#6). Change subject: cpu: Add initial xeonsp support boilerplate ...................................................................... cpu: Add initial xeonsp support boilerplate This adds boilerplate code that is common across several Xeon SP processors. The idea is that common xeonsp code should go into cpu/intel/xeonsp/ and CPU-specific files and overrides should go into a subfolder. Change-Id: I24346b8a5c30342419db23b5f1adf27d4d0ebc5f Signed-off-by: Andrey Petrov <anpetrov(a)fb.com> --- M src/cpu/intel/Kconfig M src/cpu/intel/Makefile.inc A src/cpu/intel/xeonsp/Kconfig A src/cpu/intel/xeonsp/Makefile.inc A src/cpu/intel/xeonsp/bootblock.c A src/cpu/intel/xeonsp/include/soc/cpu.h A src/cpu/intel/xeonsp/include/soc/gpe.h A src/cpu/intel/xeonsp/include/soc/gpio.h A src/cpu/intel/xeonsp/include/soc/iomap.h A src/cpu/intel/xeonsp/include/soc/pm.h A src/cpu/intel/xeonsp/include/soc/pmc.h A src/cpu/intel/xeonsp/include/soc/smbus.h A src/cpu/intel/xeonsp/include/soc/systemagent.h A src/cpu/intel/xeonsp/lpc.c A src/cpu/intel/xeonsp/model_xeonsp_init.c A src/cpu/intel/xeonsp/postcar.c A src/cpu/intel/xeonsp/ramstage.c A src/cpu/intel/xeonsp/romstage.c 18 files changed, 474 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/38838/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/38838 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I24346b8a5c30342419db23b5f1adf27d4d0ebc5f Gerrit-Change-Number: 38838 Gerrit-PatchSet: 6 Gerrit-Owner: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: cpu: Add initial xeonsp support boilerplate
by build bot (Jenkins) (Code Review) 19 Feb '20

19 Feb '20

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38838 ) Change subject: cpu: Add initial xeonsp support boilerplate ...................................................................... Patch Set 5: (2 comments) https://review.coreboot.org/c/coreboot/+/38838/5/src/cpu/intel/xeonsp/inclu… File src/cpu/intel/xeonsp/include/soc/gpio.h: https://review.coreboot.org/c/coreboot/+/38838/5/src/cpu/intel/xeonsp/inclu… PS5, Line 17: #define NUM_GPI_STATUS_REGS 0 adding a line without newline at end of file https://review.coreboot.org/c/coreboot/+/38838/5/src/cpu/intel/xeonsp/postc… File src/cpu/intel/xeonsp/postcar.c: https://review.coreboot.org/c/coreboot/+/38838/5/src/cpu/intel/xeonsp/postc… PS5, Line 20: void fill_postcar_frame(struct postcar_frame *pcf) { open brace '{' following function definitions go on the next line -- To view, visit https://review.coreboot.org/c/coreboot/+/38838 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I24346b8a5c30342419db23b5f1adf27d4d0ebc5f Gerrit-Change-Number: 38838 Gerrit-PatchSet: 5 Gerrit-Owner: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 19 Feb 2020 05:26:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mainboard: Add OCP Tioga Pass board
by build bot (Jenkins) (Code Review) 19 Feb '20

19 Feb '20

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38840 ) Change subject: mainboard: Add OCP Tioga Pass board ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/c/coreboot/+/38840/6/src/mainboard/ocp/tiogapas… File src/mainboard/ocp/tiogapass/bootblock.c: https://review.coreboot.org/c/coreboot/+/38840/6/src/mainboard/ocp/tiogapas… PS6, Line 29: if (CONFIG(BOOTBLOCK_CONSOLE)) { braces {} are not necessary for single statement blocks -- To view, visit https://review.coreboot.org/c/coreboot/+/38840 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6c5da3c3856b035af5f2b3b80f0894f6fb81696 Gerrit-Change-Number: 38840 Gerrit-PatchSet: 6 Gerrit-Owner: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 19 Feb 2020 05:26:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: cpu: Add initial xeonsp support boilerplate
by Andrey Petrov (Code Review) 19 Feb '20

19 Feb '20

Hello Patrick Rudolph, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/38838 to look at the new patch set (#5). Change subject: cpu: Add initial xeonsp support boilerplate ...................................................................... cpu: Add initial xeonsp support boilerplate This adds boilerplate code that is common across several Xeon SP processors. The idea is that common xeonsp code should go into cpu/intel/xeonsp/ and CPU-specific files and overrides should go into a subfolder. Change-Id: I24346b8a5c30342419db23b5f1adf27d4d0ebc5f Signed-off-by: Andrey Petrov <anpetrov(a)fb.com> --- M src/cpu/intel/Kconfig M src/cpu/intel/Makefile.inc A src/cpu/intel/xeonsp/Kconfig A src/cpu/intel/xeonsp/Makefile.inc A src/cpu/intel/xeonsp/bootblock.c A src/cpu/intel/xeonsp/include/soc/cpu.h A src/cpu/intel/xeonsp/include/soc/gpe.h A src/cpu/intel/xeonsp/include/soc/gpio.h A src/cpu/intel/xeonsp/include/soc/iomap.h A src/cpu/intel/xeonsp/include/soc/pm.h A src/cpu/intel/xeonsp/include/soc/pmc.h A src/cpu/intel/xeonsp/include/soc/smbus.h A src/cpu/intel/xeonsp/include/soc/systemagent.h A src/cpu/intel/xeonsp/lpc.c A src/cpu/intel/xeonsp/model_xeonsp_init.c A src/cpu/intel/xeonsp/postcar.c A src/cpu/intel/xeonsp/ramstage.c A src/cpu/intel/xeonsp/romstage.c 18 files changed, 476 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/38838/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/38838 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I24346b8a5c30342419db23b5f1adf27d4d0ebc5f Gerrit-Change-Number: 38838 Gerrit-PatchSet: 5 Gerrit-Owner: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in gerrit-avatars[master]: Add my avatar
by Jacob Garber (Code Review) 19 Feb '20

19 Feb '20

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/gerrit-avatars/+/38990 ) Change subject: Add my avatar ...................................................................... Add my avatar Change-Id: I3279e4650114c4e4e12844aebf8807f70c4087bc Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- A 1002313.jpg 1 file changed, 0 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/gerrit-avatars refs/changes/90/38990/1 diff --git a/1002313.jpg b/1002313.jpg new file mode 100644 index 0000000..837c8a6 --- /dev/null +++ b/1002313.jpg Binary files differ -- To view, visit https://review.coreboot.org/c/gerrit-avatars/+/38990 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: gerrit-avatars Gerrit-Branch: master Gerrit-Change-Id: I3279e4650114c4e4e12844aebf8807f70c4087bc Gerrit-Change-Number: 38990 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

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coreboot-gerrit February 2020