coreboot-gerrit November 2020

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Change in coreboot[master]: mb/purism/librem_cnl: Adjust in preparation for new variants
by Matt DeVillier (Code Review) 03 Nov '20

03 Nov '20

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47051 ) Change subject: mb/purism/librem_cnl: Adjust in preparation for new variants ...................................................................... mb/purism/librem_cnl: Adjust in preparation for new variants - Move the SoC select to board config (vs baseboard config) - Qualify the VGA PCI ID and CBFS size values based on board selection - Move devicetree to variant dir and add Kconfig entry - Use a separate board_info.txt for the baseboard and each variant Change-Id: I4764f2c1243ea49bd08e0735865cc3cb7a66441f Signed-off-by: Matt DeVillier <matt.devillier(a)puri.sm> --- M src/mainboard/purism/librem_cnl/Kconfig M src/mainboard/purism/librem_cnl/Kconfig.name M src/mainboard/purism/librem_cnl/board_info.txt A src/mainboard/purism/librem_cnl/variants/librem_mini/board_info.txt R src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb 5 files changed, 17 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/47051/1 diff --git a/src/mainboard/purism/librem_cnl/Kconfig b/src/mainboard/purism/librem_cnl/Kconfig index 38be380..464350c 100644 --- a/src/mainboard/purism/librem_cnl/Kconfig +++ b/src/mainboard/purism/librem_cnl/Kconfig @@ -9,7 +9,6 @@ select NO_UART_ON_SUPERIO select SOC_INTEL_COMMON_BLOCK_HDA select SOC_INTEL_COMMON_BLOCK_HDA_VERB - select SOC_INTEL_WHISKEYLAKE select SPD_READ_BY_WORD select USE_LEGACY_8254_TIMER @@ -31,9 +30,13 @@ string default "librem_mini" if BOARD_PURISM_LIBREM_MINI +config DEVICETREE + string + default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" + config CBFS_SIZE hex - default 0x800000 + default 0x800000 if BOARD_PURISM_LIBREM_MINI config MAX_CPUS int @@ -49,7 +52,7 @@ config VGA_BIOS_ID string - default "8086,3ea0" + default "8086,3ea0" if BOARD_PURISM_LIBREM_MINI config PXE_ROM_ID string diff --git a/src/mainboard/purism/librem_cnl/Kconfig.name b/src/mainboard/purism/librem_cnl/Kconfig.name index 326165ba..83f1495 100644 --- a/src/mainboard/purism/librem_cnl/Kconfig.name +++ b/src/mainboard/purism/librem_cnl/Kconfig.name @@ -1,3 +1,4 @@ config BOARD_PURISM_LIBREM_MINI bool "Librem Mini" select BOARD_PURISM_BASEBOARD_LIBREM_CNL + select SOC_INTEL_WHISKEYLAKE diff --git a/src/mainboard/purism/librem_cnl/board_info.txt b/src/mainboard/purism/librem_cnl/board_info.txt index ca61edd..6c7620c 100644 --- a/src/mainboard/purism/librem_cnl/board_info.txt +++ b/src/mainboard/purism/librem_cnl/board_info.txt @@ -1,6 +1,6 @@ Vendor name: Purism -Board name: librem_cnl -Category: desktop +Board name: Librem Cannonlake baseboard +Category: misc Release year: 2020 ROM package: SOIC-8 ROM protocol: SPI diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/board_info.txt b/src/mainboard/purism/librem_cnl/variants/librem_mini/board_info.txt new file mode 100644 index 0000000..843ff9f --- /dev/null +++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/board_info.txt @@ -0,0 +1,8 @@ +Vendor name: Purism +Board name: Librem Mini +Category: desktop +Release year: 2020 +ROM package: SOIC-8 +ROM protocol: SPI +ROM socketed: n +Flashrom support: y diff --git a/src/mainboard/purism/librem_cnl/devicetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb similarity index 100% rename from src/mainboard/purism/librem_cnl/devicetree.cb rename to src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb -- To view, visit https://review.coreboot.org/c/coreboot/+/47051 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4764f2c1243ea49bd08e0735865cc3cb7a66441f Gerrit-Change-Number: 47051 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: newchange

5 26

Change in coreboot[master]: mb/purism/librem_whl: rename to librem_cnl
by Matt DeVillier (Code Review) 03 Nov '20

03 Nov '20

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47050 ) Change subject: mb/purism/librem_whl: rename to librem_cnl ...................................................................... mb/purism/librem_whl: rename to librem_cnl Since Whiskeylake SoC code is actually a subset of soc/intel/cannonlake, rename the baseboard so that boards using other 'cannonlake family' SoCs (e.g., Cometlake) can be added with minimal confusion. Rename the mainboard dir and baseboard name, and adjust any references to them. Change-Id: I2af7977f1622070eb8bf8449bc8306f9d75b9851 Signed-off-by: Matt DeVillier <matt.devillier(a)puri.sm> --- R src/mainboard/purism/librem_cnl/Kconfig A src/mainboard/purism/librem_cnl/Kconfig.name R src/mainboard/purism/librem_cnl/Makefile.inc R src/mainboard/purism/librem_cnl/acpi/mainboard.asl R src/mainboard/purism/librem_cnl/board_info.txt R src/mainboard/purism/librem_cnl/devicetree.cb R src/mainboard/purism/librem_cnl/dsdt.asl R src/mainboard/purism/librem_cnl/ramstage.c R src/mainboard/purism/librem_cnl/romstage.c R src/mainboard/purism/librem_cnl/variants/librem_mini/data.vbt R src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c R src/mainboard/purism/librem_cnl/variants/librem_mini/hda_verb.c R src/mainboard/purism/librem_cnl/variants/librem_mini/include/variant/gpio.h D src/mainboard/purism/librem_whl/Kconfig.name 14 files changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/47050/1 diff --git a/src/mainboard/purism/librem_whl/Kconfig b/src/mainboard/purism/librem_cnl/Kconfig similarity index 90% rename from src/mainboard/purism/librem_whl/Kconfig rename to src/mainboard/purism/librem_cnl/Kconfig index bc25fb5..38be380 100644 --- a/src/mainboard/purism/librem_whl/Kconfig +++ b/src/mainboard/purism/librem_cnl/Kconfig @@ -1,4 +1,4 @@ -config BOARD_PURISM_BASEBOARD_LIBREM_WHL +config BOARD_PURISM_BASEBOARD_LIBREM_CNL def_bool n select BOARD_ROMSIZE_KB_16384 select DRIVERS_GENERIC_CBFS_SERIAL @@ -13,11 +13,11 @@ select SPD_READ_BY_WORD select USE_LEGACY_8254_TIMER -if BOARD_PURISM_BASEBOARD_LIBREM_WHL +if BOARD_PURISM_BASEBOARD_LIBREM_CNL config MAINBOARD_DIR string - default "purism/librem_whl" + default "purism/librem_cnl" config MAINBOARD_FAMILY string diff --git a/src/mainboard/purism/librem_cnl/Kconfig.name b/src/mainboard/purism/librem_cnl/Kconfig.name new file mode 100644 index 0000000..326165ba --- /dev/null +++ b/src/mainboard/purism/librem_cnl/Kconfig.name @@ -0,0 +1,3 @@ +config BOARD_PURISM_LIBREM_MINI + bool "Librem Mini" + select BOARD_PURISM_BASEBOARD_LIBREM_CNL diff --git a/src/mainboard/purism/librem_whl/Makefile.inc b/src/mainboard/purism/librem_cnl/Makefile.inc similarity index 100% rename from src/mainboard/purism/librem_whl/Makefile.inc rename to src/mainboard/purism/librem_cnl/Makefile.inc diff --git a/src/mainboard/purism/librem_whl/acpi/mainboard.asl b/src/mainboard/purism/librem_cnl/acpi/mainboard.asl similarity index 100% rename from src/mainboard/purism/librem_whl/acpi/mainboard.asl rename to src/mainboard/purism/librem_cnl/acpi/mainboard.asl diff --git a/src/mainboard/purism/librem_whl/board_info.txt b/src/mainboard/purism/librem_cnl/board_info.txt similarity index 84% rename from src/mainboard/purism/librem_whl/board_info.txt rename to src/mainboard/purism/librem_cnl/board_info.txt index e72dcdf2..ca61edd 100644 --- a/src/mainboard/purism/librem_whl/board_info.txt +++ b/src/mainboard/purism/librem_cnl/board_info.txt @@ -1,5 +1,5 @@ Vendor name: Purism -Board name: librem_whl +Board name: librem_cnl Category: desktop Release year: 2020 ROM package: SOIC-8 diff --git a/src/mainboard/purism/librem_whl/devicetree.cb b/src/mainboard/purism/librem_cnl/devicetree.cb similarity index 100% rename from src/mainboard/purism/librem_whl/devicetree.cb rename to src/mainboard/purism/librem_cnl/devicetree.cb diff --git a/src/mainboard/purism/librem_whl/dsdt.asl b/src/mainboard/purism/librem_cnl/dsdt.asl similarity index 100% rename from src/mainboard/purism/librem_whl/dsdt.asl rename to src/mainboard/purism/librem_cnl/dsdt.asl diff --git a/src/mainboard/purism/librem_whl/ramstage.c b/src/mainboard/purism/librem_cnl/ramstage.c similarity index 100% rename from src/mainboard/purism/librem_whl/ramstage.c rename to src/mainboard/purism/librem_cnl/ramstage.c diff --git a/src/mainboard/purism/librem_whl/romstage.c b/src/mainboard/purism/librem_cnl/romstage.c similarity index 100% rename from src/mainboard/purism/librem_whl/romstage.c rename to src/mainboard/purism/librem_cnl/romstage.c diff --git a/src/mainboard/purism/librem_whl/variants/librem_mini/data.vbt b/src/mainboard/purism/librem_cnl/variants/librem_mini/data.vbt similarity index 100% rename from src/mainboard/purism/librem_whl/variants/librem_mini/data.vbt rename to src/mainboard/purism/librem_cnl/variants/librem_mini/data.vbt Binary files differ diff --git a/src/mainboard/purism/librem_whl/variants/librem_mini/gpio.c b/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c similarity index 100% rename from src/mainboard/purism/librem_whl/variants/librem_mini/gpio.c rename to src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c diff --git a/src/mainboard/purism/librem_whl/variants/librem_mini/hda_verb.c b/src/mainboard/purism/librem_cnl/variants/librem_mini/hda_verb.c similarity index 100% rename from src/mainboard/purism/librem_whl/variants/librem_mini/hda_verb.c rename to src/mainboard/purism/librem_cnl/variants/librem_mini/hda_verb.c diff --git a/src/mainboard/purism/librem_whl/variants/librem_mini/include/variant/gpio.h b/src/mainboard/purism/librem_cnl/variants/librem_mini/include/variant/gpio.h similarity index 100% rename from src/mainboard/purism/librem_whl/variants/librem_mini/include/variant/gpio.h rename to src/mainboard/purism/librem_cnl/variants/librem_mini/include/variant/gpio.h diff --git a/src/mainboard/purism/librem_whl/Kconfig.name b/src/mainboard/purism/librem_whl/Kconfig.name deleted file mode 100644 index 41a4003..0000000 --- a/src/mainboard/purism/librem_whl/Kconfig.name +++ /dev/null @@ -1,3 +0,0 @@ -config BOARD_PURISM_LIBREM_MINI - bool "Librem Mini" - select BOARD_PURISM_BASEBOARD_LIBREM_WHL -- To view, visit https://review.coreboot.org/c/coreboot/+/47050 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2af7977f1622070eb8bf8449bc8306f9d75b9851 Gerrit-Change-Number: 47050 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

4 10

Change in coreboot[master]: mainboard: Drop unused `slow_cpu` option
by Angel Pons (Code Review) 03 Nov '20

03 Nov '20

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47178 ) Change subject: mainboard: Drop unused `slow_cpu` option ...................................................................... mainboard: Drop unused `slow_cpu` option This option is never used in coreboot code. Change-Id: I1e1b94c85c0c0f048a40ae60c99d2896f96e07ee Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/amd/inagua/cmos.layout M src/mainboard/amd/olivehill/cmos.layout M src/mainboard/amd/parmer/cmos.layout M src/mainboard/amd/persimmon/cmos.layout M src/mainboard/amd/south_station/cmos.layout M src/mainboard/amd/thatcher/cmos.layout M src/mainboard/amd/union_station/cmos.layout M src/mainboard/asrock/e350m1/cmos.layout M src/mainboard/asrock/imb-a180/cmos.layout M src/mainboard/asus/a88xm-e/cmos.layout M src/mainboard/asus/f2a85-m/cmos.layout M src/mainboard/bap/ode_e20XX/cmos.layout M src/mainboard/biostar/a68n_5200/cmos.layout M src/mainboard/biostar/am1ml/cmos.layout M src/mainboard/elmex/pcm205400/cmos.layout M src/mainboard/gizmosphere/gizmo/cmos.layout M src/mainboard/gizmosphere/gizmo2/cmos.layout M src/mainboard/hp/abm/cmos.layout M src/mainboard/jetway/nf81-t56n-lf/cmos.layout M src/mainboard/lenovo/g505s/cmos.layout M src/mainboard/lippert/frontrunner-af/cmos.layout M src/mainboard/msi/ms7721/cmos.layout M src/mainboard/pcengines/apu2/cmos.layout 23 files changed, 0 insertions(+), 207 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/47178/1 diff --git a/src/mainboard/amd/inagua/cmos.layout b/src/mainboard/amd/inagua/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/amd/inagua/cmos.layout +++ b/src/mainboard/amd/inagua/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/amd/olivehill/cmos.layout b/src/mainboard/amd/olivehill/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/amd/olivehill/cmos.layout +++ b/src/mainboard/amd/olivehill/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/amd/parmer/cmos.layout b/src/mainboard/amd/parmer/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/amd/parmer/cmos.layout +++ b/src/mainboard/amd/parmer/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/amd/persimmon/cmos.layout b/src/mainboard/amd/persimmon/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/amd/persimmon/cmos.layout +++ b/src/mainboard/amd/persimmon/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/amd/south_station/cmos.layout b/src/mainboard/amd/south_station/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/amd/south_station/cmos.layout +++ b/src/mainboard/amd/south_station/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/amd/thatcher/cmos.layout b/src/mainboard/amd/thatcher/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/amd/thatcher/cmos.layout +++ b/src/mainboard/amd/thatcher/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/amd/union_station/cmos.layout b/src/mainboard/amd/union_station/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/amd/union_station/cmos.layout +++ b/src/mainboard/amd/union_station/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/asrock/e350m1/cmos.layout b/src/mainboard/asrock/e350m1/cmos.layout index 28b4b42..1fb9f0f 100644 --- a/src/mainboard/asrock/e350m1/cmos.layout +++ b/src/mainboard/asrock/e350m1/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 2 e 3 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -43,14 +42,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/asrock/imb-a180/cmos.layout b/src/mainboard/asrock/imb-a180/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/asrock/imb-a180/cmos.layout +++ b/src/mainboard/asrock/imb-a180/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/asus/a88xm-e/cmos.layout b/src/mainboard/asus/a88xm-e/cmos.layout index 4839dd5..173d8c4 100644 --- a/src/mainboard/asus/a88xm-e/cmos.layout +++ b/src/mainboard/asus/a88xm-e/cmos.layout @@ -11,7 +11,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu #456 1 e 1 ECC_memory @@ -42,14 +41,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/asus/f2a85-m/cmos.layout b/src/mainboard/asus/f2a85-m/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/asus/f2a85-m/cmos.layout +++ b/src/mainboard/asus/f2a85-m/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/bap/ode_e20XX/cmos.layout b/src/mainboard/bap/ode_e20XX/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/bap/ode_e20XX/cmos.layout +++ b/src/mainboard/bap/ode_e20XX/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/biostar/a68n_5200/cmos.layout b/src/mainboard/biostar/a68n_5200/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/biostar/a68n_5200/cmos.layout +++ b/src/mainboard/biostar/a68n_5200/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/biostar/am1ml/cmos.layout b/src/mainboard/biostar/am1ml/cmos.layout index 7430eb0..6f61f97 100644 --- a/src/mainboard/biostar/am1ml/cmos.layout +++ b/src/mainboard/biostar/am1ml/cmos.layout @@ -43,7 +43,6 @@ 424 4 e 7 boot_third 428 4 h 0 boot_index 432 8 h 0 boot_countdown -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 728 256 h 0 user_data @@ -75,14 +74,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/elmex/pcm205400/cmos.layout b/src/mainboard/elmex/pcm205400/cmos.layout index 586e22a..d7d5d12 100644 --- a/src/mainboard/elmex/pcm205400/cmos.layout +++ b/src/mainboard/elmex/pcm205400/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/gizmosphere/gizmo/cmos.layout b/src/mainboard/gizmosphere/gizmo/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/gizmosphere/gizmo/cmos.layout +++ b/src/mainboard/gizmosphere/gizmo/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/gizmosphere/gizmo2/cmos.layout b/src/mainboard/gizmosphere/gizmo2/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/gizmosphere/gizmo2/cmos.layout +++ b/src/mainboard/gizmosphere/gizmo2/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/hp/abm/cmos.layout b/src/mainboard/hp/abm/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/hp/abm/cmos.layout +++ b/src/mainboard/hp/abm/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/jetway/nf81-t56n-lf/cmos.layout b/src/mainboard/jetway/nf81-t56n-lf/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/cmos.layout +++ b/src/mainboard/jetway/nf81-t56n-lf/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/lenovo/g505s/cmos.layout b/src/mainboard/lenovo/g505s/cmos.layout index 04ffe7e..076ca9d 100644 --- a/src/mainboard/lenovo/g505s/cmos.layout +++ b/src/mainboard/lenovo/g505s/cmos.layout @@ -15,7 +15,6 @@ #400 8 r 8 reserved for century byte 408 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -41,14 +40,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/lippert/frontrunner-af/cmos.layout b/src/mainboard/lippert/frontrunner-af/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/lippert/frontrunner-af/cmos.layout +++ b/src/mainboard/lippert/frontrunner-af/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/msi/ms7721/cmos.layout b/src/mainboard/msi/ms7721/cmos.layout index b076f0a..d26d6aa 100644 --- a/src/mainboard/msi/ms7721/cmos.layout +++ b/src/mainboard/msi/ms7721/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums diff --git a/src/mainboard/pcengines/apu2/cmos.layout b/src/mainboard/pcengines/apu2/cmos.layout index 586e22a..d7d5d12 100644 --- a/src/mainboard/pcengines/apu2/cmos.layout +++ b/src/mainboard/pcengines/apu2/cmos.layout @@ -14,7 +14,6 @@ 399 1 e 2 multi_core 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level -440 4 e 9 slow_cpu 444 1 e 1 nmi 445 1 e 1 iommu 456 1 e 1 ECC_memory @@ -40,14 +39,6 @@ 8 1 333Mhz 8 2 266Mhz 8 3 200Mhz -9 0 off -9 1 87.5% -9 2 75.0% -9 3 62.5% -9 4 50.0% -9 5 37.5% -9 6 25.0% -9 7 12.5% checksums -- To view, visit https://review.coreboot.org/c/coreboot/+/47178 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e1b94c85c0c0f048a40ae60c99d2896f96e07ee Gerrit-Change-Number: 47178 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/common/acpi: add _HID to PEPD
by Michael Niewöhner (Code Review) 03 Nov '20

03 Nov '20

Hello build bot (Jenkins), Furquan Shaikh, Matt DeVillier, Paul Menzel, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/46469 to look at the new patch set (#5). Change subject: soc/intel/common/acpi: add _HID to PEPD ...................................................................... soc/intel/common/acpi: add _HID to PEPD Add the _HID INT33A1 to PEPD to make Linux recognize it as "Intel Power Engine" in the pmc core driver. The _ADR gets dropped, because _HID and _ADR are mutually exclusive. Change-Id: I7a0335681f1601f7fd8a9245a3dea72ffd100b55 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/common/block/acpi/acpi/pep.asl 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/46469/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/46469 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a0335681f1601f7fd8a9245a3dea72ffd100b55 Gerrit-Change-Number: 46469 Gerrit-PatchSet: 5 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common/acpi,mb/*: replace LPID with PEPD
by Michael Niewöhner (Code Review) 03 Nov '20

03 Nov '20

Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Matt DeVillier, Tim Wawrzynczak, Paul Menzel, Subrata Banik, Patrick Rudolph, Karthikeyan Ramasubramanian, Venkata Krishna Nimmagadda, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/46471 to look at the new patch set (#7). Change subject: soc/intel/common/acpi,mb/*: replace LPID with PEPD ...................................................................... soc/intel/common/acpi,mb/*: replace LPID with PEPD Replace the two duplicate LPID with the new PEPD device. The PEPD device gets included in the plaforms' `southbridge.asl`, since it is required to load the `intel_pmc_core` module in Linux, which checks for the _HID. (See CB:46469 for more info on that.) There is no harm for mainboards not supporting S0ix, because the _DSM function won't be called with the LPS0 uuid on such boards. Such boards can use the debugging functionality of `intel_pmc_core`, too. Change-Id: Ic8427db33286451618b50ca429d41b604dbb08a5 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/mainboard/google/deltaur/dsdt.asl M src/mainboard/google/drallion/dsdt.asl M src/mainboard/google/hatch/dsdt.asl M src/mainboard/google/sarien/dsdt.asl M src/mainboard/google/volteer/dsdt.asl M src/soc/intel/alderlake/acpi/southbridge.asl M src/soc/intel/cannonlake/acpi/southbridge.asl D src/soc/intel/common/acpi/lpit.asl A src/soc/intel/common/block/acpi/acpi/pep.asl D src/soc/intel/common/block/acpi/acpi/pmc.asl M src/soc/intel/elkhartlake/acpi/southbridge.asl M src/soc/intel/jasperlake/acpi/southbridge.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 13 files changed, 135 insertions(+), 162 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/46471/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/46471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic8427db33286451618b50ca429d41b604dbb08a5 Gerrit-Change-Number: 46471 Gerrit-PatchSet: 7 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Venkata Krishna Nimmagadda <Venkata.krishna.nimmagadda(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common/acpi: correct return value for PEPD enum function
by Michael Niewöhner (Code Review) 03 Nov '20

03 Nov '20

Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Matt DeVillier, Paul Menzel, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph, Karthikeyan Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/47140 to look at the new patch set (#3). Change subject: soc/intel/common/acpi: correct return value for PEPD enum function ...................................................................... soc/intel/common/acpi: correct return value for PEPD enum function The PEPD enum function returns a bitmask to announce supported/enabled PEPD functions. Add a comment describing this bitmask and correct the return value to announce function 1, 5 and 6 as supported. Change-Id: Ib523a54f5ad695e79005aba422282e03f2bc4bed Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/common/acpi/lpit.asl 1 file changed, 6 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/47140/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/47140 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib523a54f5ad695e79005aba422282e03f2bc4bed Gerrit-Change-Number: 47140 Gerrit-PatchSet: 3 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common/acpi: drop return value for disabled PEPD function 2
by Michael Niewöhner (Code Review) 03 Nov '20

03 Nov '20

Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Matt DeVillier, Paul Menzel, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph, Karthikeyan Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/47139 to look at the new patch set (#3). Change subject: soc/intel/common/acpi: drop return value for disabled PEPD function 2 ...................................................................... soc/intel/common/acpi: drop return value for disabled PEPD function 2 PEPD function 2 is currently unused and disabled. Thus, drop the return value, which matches the default return value. Change-Id: Ia95b8b36fcb78e8976b66de15ec214a38c178cda Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/common/acpi/lpit.asl 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/47139/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/47139 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia95b8b36fcb78e8976b66de15ec214a38c178cda Gerrit-Change-Number: 47139 Gerrit-PatchSet: 3 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/intel/common/acpi: fix Windows crash on S0ix-enabled boards
by Michael Niewöhner (Code Review) 03 Nov '20

03 Nov '20

Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Matt DeVillier, Christian Walter, Paul Menzel, Tim Wawrzynczak, Angel Pons, Subrata Banik, Arthur Heymans, Patrick Rudolph, Karthikeyan Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/47138 to look at the new patch set (#3). Change subject: soc/intel/common/acpi: fix Windows crash on S0ix-enabled boards ...................................................................... soc/intel/common/acpi: fix Windows crash on S0ix-enabled boards Windows does not comply with the Low Power Idle S0 specification and crashes with an `INTERNAL_POWER_ERROR` bluescreen when function 1, does not return at least one device constraint, even when function 1 is announced as being not available by the enum function. Returning an empty package does not work. At least the following Windows versions were verified to be affected: - Windows 8.1 x64, release 6.3.9600 - Windows 10 x64, version 1903, build 18362.53 - Windows 10 x64, version 2004, build 19041.508 - Windows 10 x64, version 20H2 / 2009, build 19042.450 To make Windows work on S0ix-enabled boards, return a dummy constraint package with a disabled dummy device. Since the device constraints are only used for debugging low power states in Linux and probably also in Windows, there shouldn't be any negative effect to S0ix. Real device constraint entries can be added at a later point. Test: no bluescreen anymore on Clevo L140CU on all Windows versions listed above and S0ix gets detected in `powercfg -a`. Change-Id: Icd08cbcb1dfcb8cbb23f4f4c902bf8c367c8e3ac Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/common/acpi/lpit.asl 1 file changed, 22 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/47138/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/47138 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd08cbcb1dfcb8cbb23f4f4c902bf8c367c8e3ac Gerrit-Change-Number: 47138 Gerrit-PatchSet: 3 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: [RFC]security/memory/memory_clear: Skip IORESOURCE_RESERVE resources
by Arthur Heymans (Code Review) 03 Nov '20

03 Nov '20

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47160 ) Change subject: [RFC]security/memory/memory_clear: Skip IORESOURCE_RESERVE resources ...................................................................... [RFC]security/memory/memory_clear: Skip IORESOURCE_RESERVE resources This would skip attempting to clear regions like TSEG, GTT, IGD, ... Change-Id: I2ac9d53f2c405100d21720ec0fcd1b498a028416 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/security/memory/memory_clear.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/47160/1 diff --git a/src/security/memory/memory_clear.c b/src/security/memory/memory_clear.c index 557125d..411af73 100644 --- a/src/security/memory/memory_clear.c +++ b/src/security/memory/memory_clear.c @@ -67,7 +67,7 @@ memranges_init(&mem, IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED | - IORESOURCE_CACHEABLE, + IORESOURCE_CACHEABLE | IORESOURCE_RESERVE, IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED | IORESOURCE_CACHEABLE, -- To view, visit https://review.coreboot.org/c/coreboot/+/47160 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2ac9d53f2c405100d21720ec0fcd1b498a028416 Gerrit-Change-Number: 47160 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/dedede/var/boten: Add LTE power on/off sequence
by Peichao Wang (Code Review) 03 Nov '20

03 Nov '20

Peichao Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44588 ) Change subject: mb/google/dedede/var/boten: Add LTE power on/off sequence ...................................................................... Patch Set 10: (2 comments) https://review.coreboot.org/c/coreboot/+/44588/10/src/mainboard/google/dede… File src/mainboard/google/dedede/variants/boten/gpio.c: https://review.coreboot.org/c/coreboot/+/44588/10/src/mainboard/google/dede… PS10, Line 11: 1 > That is what I wrote in patchset 9 and it was verified to meet the power sequence requirement. […] Dear Furquan and Karthik, if set its value equal 0, LTE module can not work, we have do the experiment like ticket: https://partnerissuetracker.corp.google.com/issues/163100335#comment94 Thanks a lot https://review.coreboot.org/c/coreboot/+/44588/10/src/mainboard/google/dede… PS10, Line 45: 1 > Shouldn't this be 0? Since it is being deasserted by the ACPI methods? I think ACPI still not validation if set value equal 0 in here. -- To view, visit https://review.coreboot.org/c/coreboot/+/44588 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6d5d21ce5267f147b332a4c9b01a29b3b8ccfb8 Gerrit-Change-Number: 44588 Gerrit-PatchSet: 10 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Alec Wang <alec.wang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-Comment-Date: Tue, 03 Nov 2020 17:30:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit November 2020