Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46470 )
Change subject: soc/intel/common/acpi: rename LPID to PEPD
......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46470/4/src/soc/intel/common/acpi/…
File src/soc/intel/common/acpi/lpit.asl:
https://review.coreboot.org/c/coreboot/+/46470/4/src/soc/intel/common/acpi/…
PS4, Line 3: PEPD_DSM_ARG2_ENUM_FUNCTIONS
> I think it would be good to have LPI(Low Power Idle) in the name to make it clear that it is specifi […]
yeah, sounds good
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46470 )
Change subject: soc/intel/common/acpi: rename LPID to PEPD
......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46470/4//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/46470/4//COMMIT_MSG@7
PS4, Line 7: PEPD
> `PNP0D80` is the class ID for the Power Management Controller, but `INT33A1` is called "Intel Power […]
Oh, and it's the name used in refcode and by IBVs
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46470 )
Change subject: soc/intel/common/acpi: rename LPID to PEPD
......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46470/4//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/46470/4//COMMIT_MSG@7
PS4, Line 7: PEPD
> Can we instead rename this to PMCD? PEPD is something very Windows-specific and I see it being used […]
`PNP0D80` is the class ID for the Power Management Controller, but `INT33A1` is called "Intel Power Engine" by ACPICA: http://web.mit.edu/freebsd/head/sys/contrib/dev/acpica/common/ahids.c
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47138 )
Change subject: soc/intel/common/acpi: work around Windows crash on S0ix-enabled boards
......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47138/3//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/47138/3//COMMIT_MSG@7
PS3, Line 7: fix
> it *is* broken atm
reworded as discussed on irc
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Gerrit-MessageType: comment
Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Matt DeVillier, Tim Wawrzynczak, Paul Menzel, Subrata Banik, Patrick Rudolph, Karthikeyan Ramasubramanian, Venkata Krishna Nimmagadda,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46471
to look at the new patch set (#8).
Change subject: soc/intel/common/acpi,mb/*: replace LPID with PEPD
......................................................................
soc/intel/common/acpi,mb/*: replace LPID with PEPD
Replace the two duplicate LPID with the new PEPD device.
The PEPD device gets included in the plaforms' `southbridge.asl`, since
it is required to load the `intel_pmc_core` module in Linux, which
checks for the _HID. (See CB:46469 for more info on that.)
There is no harm for mainboards not supporting S0ix, because the _DSM
function won't be called with the LPS0 uuid on such boards. Such boards
can use the debugging functionality of `intel_pmc_core`, too.
Change-Id: Ic8427db33286451618b50ca429d41b604dbb08a5
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/mainboard/google/deltaur/dsdt.asl
M src/mainboard/google/drallion/dsdt.asl
M src/mainboard/google/hatch/dsdt.asl
M src/mainboard/google/sarien/dsdt.asl
M src/mainboard/google/volteer/dsdt.asl
M src/soc/intel/alderlake/acpi/southbridge.asl
M src/soc/intel/cannonlake/acpi/southbridge.asl
D src/soc/intel/common/acpi/lpit.asl
A src/soc/intel/common/block/acpi/acpi/pep.asl
D src/soc/intel/common/block/acpi/acpi/pmc.asl
M src/soc/intel/elkhartlake/acpi/southbridge.asl
M src/soc/intel/jasperlake/acpi/southbridge.asl
M src/soc/intel/tigerlake/acpi/southbridge.asl
13 files changed, 133 insertions(+), 160 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/46471/8
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Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Matt DeVillier, Christian Walter, Paul Menzel, Tim Wawrzynczak, Angel Pons, Subrata Banik, Arthur Heymans, Patrick Rudolph, Karthikeyan Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47138
to look at the new patch set (#4).
Change subject: soc/intel/common/acpi: work around Windows crash on S0ix-enabled boards
......................................................................
soc/intel/common/acpi: work around Windows crash on S0ix-enabled boards
Windows does not comply with the Low Power Idle S0 specification and
crashes with an `INTERNAL_POWER_ERROR` bluescreen when function 1, does
not return at least one device constraint, even when function 1 is
announced as being not available by the enum function. Returning an
empty package does not work.
At least the following Windows versions were verified to be affected:
- Windows 8.1 x64, release 6.3.9600
- Windoes 10 x64, version 1809, build 17763.379
- Windows 10 x64, version 1903, build 18362.53
- Windows 10 x64, version 2004, build 19041.508
- Windows 10 x64, version 20H2 / 2009, build 19042.450
To make Windows work on S0ix-enabled boards, return a dummy constraint
package with a disabled dummy device.
Since the device constraints are only used for debugging low power
states in Linux and probably also in Windows, there shouldn't be any
negative effect to S0ix. Real device constraint entries could be added
at a later point, if needed.
Test: no bluescreen anymore on Clevo L140CU on all Windows versions
listed above and S0ix gets detected in `powercfg -a`.
Change-Id: Icd08cbcb1dfcb8cbb23f4f4c902bf8c367c8e3ac
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/soc/intel/common/acpi/lpit.asl
1 file changed, 20 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/47138/4
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