coreboot-gerrit November 2020

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Change in coreboot[master]: soc/intel/common/acpi: work around Windows crash on S0ix-enabled boards
by Michael Niewöhner (Code Review) 06 Nov '20

06 Nov '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47138 ) Change subject: soc/intel/common/acpi: work around Windows crash on S0ix-enabled boards ...................................................................... Patch Set 9: (1 comment) https://review.coreboot.org/c/coreboot/+/47138/8/src/soc/intel/common/block… File src/soc/intel/common/block/acpi/acpi/pep.asl: https://review.coreboot.org/c/coreboot/+/47138/8/src/soc/intel/common/block… PS8, Line 32: 0, > SG. I didn't mean to say that it should be done as part of this CL. […] ack :-) -- To view, visit https://review.coreboot.org/c/coreboot/+/47138 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd08cbcb1dfcb8cbb23f4f4c902bf8c367c8e3ac Gerrit-Change-Number: 47138 Gerrit-PatchSet: 9 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Fri, 06 Nov 2020 09:02:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/ocp/deltalake: Insert IO port in linux command line
by Bryant Ou (Code Review) 06 Nov '20

06 Nov '20

Bryant Ou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45410 ) Change subject: mb/ocp/deltalake: Insert IO port in linux command line ...................................................................... mb/ocp/deltalake: Insert IO port in linux command line Search "uart8250,io," string in CONFIG_LINUX_COMMAND_LINE, then insert uart base address which defined in VPD. Tested=On OCP Delta Lake, payload use correct uart base address to output messages via VPD variable. Signed-off-by: Bryant Ou <Bryant.Ou.Q(a)gmail.com> Change-Id: I8747a23c7246aabe8c01ad5be668e1672b586f2c --- M src/mainboard/ocp/deltalake/Kconfig M src/mainboard/ocp/deltalake/ramstage.c 2 files changed, 76 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/45410/1 diff --git a/src/mainboard/ocp/deltalake/Kconfig b/src/mainboard/ocp/deltalake/Kconfig index 5671664..0ab8bbb 100644 --- a/src/mainboard/ocp/deltalake/Kconfig +++ b/src/mainboard/ocp/deltalake/Kconfig @@ -54,4 +54,10 @@ bool default y +config LINUX_COMMAND_LINE_OVERRIDE + bool + default y + help + Override linux command line by using VPD. + endif # BOARD_OCP_DELTALAKE diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c index e00f1c3..115f7d3 100644 --- a/src/mainboard/ocp/deltalake/ramstage.c +++ b/src/mainboard/ocp/deltalake/ramstage.c @@ -10,6 +10,7 @@ #include <soc/ramstage.h> #include <soc/soc_util.h> #include <stdio.h> +#include <stdlib.h> #include <string.h> #include <smbios.h> #include <device/pci_def.h> @@ -18,10 +19,13 @@ #include <hob_iiouds.h> #include <hob_memmap.h> #include <cpxsp_dl_gpio.h> - +#include <program_loading.h> +#include <drivers/vpd/vpd.h> +#include "vpd.h" #include "ipmi.h" #define SLOT_ID_LEN 2 +#define COMMAND_LINE_LOC 0x91000 extern struct fru_info_str fru_strings; static char slot_id_str[SLOT_ID_LEN]; @@ -285,3 +289,68 @@ } BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, pull_post_complete_pin, NULL); + +#if (CONFIG(LINUX_COMMAND_LINE_OVERRIDE)) +void platform_segment_loaded(uintptr_t start, size_t size, int flags) +{ + char *port; + char *dupstr = strdup((char*)start); + const char s[] = {"uart8250,io,"}; + char *new = NULL; + char *p; + char *slice[10]; + char *found; + char *pre; + char *t1; + char *t2; + int count = 0; + int i; + int c; + int len; + int pos; + + /* Add IO port into linux command line */ + if (start == COMMAND_LINE_LOC) { + port = malloc(VPD_LEN); + if (vpd_gets(UART_IOPORT, port, VPD_LEN, VPD_RW_THEN_RO)) { + port = strconcat(port, ","); + } else { + printk(BIOS_ERR, "UART_IOPORT is not found in VPD\n"); + port = strconcat(UART_IOPORT_DEFAULT, ","); + } + strcpy(new, ""); + for (p = strtok(dupstr, " "); p; p = strtok(NULL, " ")) { + slice[count] = p; + count++; + } + for (i = 0; i < count; i++) { + len = strlen(slice[i]); + found = strstr(slice[i], s); + if (found != NULL) { + pos = found - slice[i] + strlen(s); + t1 = malloc(pos); + for (c = 0; c < pos; c++) { + *(t1 + c) = *(slice[i] + c); + } + *(t1 + c) = '\0'; + pre = strconcat(t1, port); + free(t1); + t2 = malloc(len - pos + 2); + for (c = 0; c < (len - pos + 1); c++) { + *(t2 + c) = *((slice[i] + pos) + c); + } + *(t2 + c) = '\0'; + pre = strconcat(pre, t2); + free(t2); + slice[i] = strdup(pre); + } + new = strconcat(new, slice[i]); + if (i < count - 1) + new = strconcat(new, " "); + } + free(port); + memset((uint8_t*)start, 0, size); + memcpy((uint8_t*)start, new, strlen(new)); + } +} +#endif -- To view, visit https://review.coreboot.org/c/coreboot/+/45410 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8747a23c7246aabe8c01ad5be668e1672b586f2c Gerrit-Change-Number: 45410 Gerrit-PatchSet: 1 Gerrit-Owner: Bryant Ou <bryant.ou.q(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: src/arch/x86:Add support for low power idle table
by Shaunak Saha (Code Review) 06 Nov '20

06 Nov '20

Shaunak Saha has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32350 ) Change subject: src/arch/x86:Add support for low power idle table ...................................................................... Patch Set 4: (2 comments) https://review.coreboot.org/c/coreboot/+/32350/4/src/arch/x86/acpi.c File src/arch/x86/acpi.c: https://review.coreboot.org/c/coreboot/+/32350/4/src/arch/x86/acpi.c@1253 PS4, Line 1253: __weak void soc_residency_counter(struct acpi_lpit_native *lpit_native) > We can also have the generic code in src/acpi/acpi.c btw. […] Got it. This solution seems to be good,thanks. I will implement the same way and update the patch. https://review.coreboot.org/c/coreboot/+/32350/4/src/arch/x86/acpi.c@1255 PS4, Line 1255: lpit_native->residency_counter.space_id = 0x7F; > why is this "the" default for all platforms? Some of this values are platform independent and depends on acpi specs.Working on it to implement 2 different values for for cpu and system level residencies. -- To view, visit https://review.coreboot.org/c/coreboot/+/32350 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie76ab0d50f09c98762bc674c2758520d53789137 Gerrit-Change-Number: 32350 Gerrit-PatchSet: 4 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 06 Nov 2020 06:53:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shaunak Saha <shaunak.saha(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Comment-In-Reply-To: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/octopus/variants/garg: update new LTE SKU
by Kevin Chiu (Code Review) 06 Nov '20

06 Nov '20

Hello Kevin Chiu, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/47015 to review the following change. Change subject: mb/google/octopus/variants/garg: update new LTE SKU ...................................................................... mb/google/octopus/variants/garg: update new LTE SKU Add new SKU definition: Garg360 (LTE DB, touch, no stylus, rear camera) SKU ID - 39 BUG=b:170708728 BRANCH=octopus TEST=emerge-octopus coreboot chromeos-bootimage Change-Id: Ifec4e1360bd1aff3825bc6413b0a2ccd8b822075 Signed-off-by: Kevin Chiu <kevin.chiu(a)quantatw.com> --- M src/mainboard/google/octopus/variants/garg/gpio.c M src/mainboard/google/octopus/variants/garg/include/variant/sku.h M src/mainboard/google/octopus/variants/garg/variant.c 3 files changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/47015/1 diff --git a/src/mainboard/google/octopus/variants/garg/gpio.c b/src/mainboard/google/octopus/variants/garg/gpio.c index 67e1056..7ae59f8 100644 --- a/src/mainboard/google/octopus/variants/garg/gpio.c +++ b/src/mainboard/google/octopus/variants/garg/gpio.c @@ -71,6 +71,7 @@ return hdmi_override_table; case SKU_17_LTE: case SKU_18_LTE_TS: + case SKU_39_2A2C_360_LTE_TS_STYLUES: *num = ARRAY_SIZE(lte_override_table); return lte_override_table; default: diff --git a/src/mainboard/google/octopus/variants/garg/include/variant/sku.h b/src/mainboard/google/octopus/variants/garg/include/variant/sku.h index 8fc63cc..b325801 100644 --- a/src/mainboard/google/octopus/variants/garg/include/variant/sku.h +++ b/src/mainboard/google/octopus/variants/garg/include/variant/sku.h @@ -12,6 +12,7 @@ SKU_20_2A2C_TS = 20, SKU_37_2A2C_360 = 37, SKU_38_2A2C_360_TS_NO_STYLUES = 38, + SKU_39_2A2C_360_LTE_TS_STYLUES = 39, SKU_49_2A2C_TS = 49, SKU_50_HDMI = 50, SKU_51_2A2C = 51, diff --git a/src/mainboard/google/octopus/variants/garg/variant.c b/src/mainboard/google/octopus/variants/garg/variant.c index 0a6574d..a0ae71f 100644 --- a/src/mainboard/google/octopus/variants/garg/variant.c +++ b/src/mainboard/google/octopus/variants/garg/variant.c @@ -37,6 +37,7 @@ switch (google_chromeec_get_board_sku()) { case SKU_17_LTE: case SKU_18_LTE_TS: + case SKU_39_2A2C_360_LTE_TS_STYLUES: power_off_lte_module(); return; default: @@ -54,6 +55,7 @@ switch (google_chromeec_get_board_sku()) { case SKU_17_LTE: case SKU_18_LTE_TS: + case SKU_39_2A2C_360_LTE_TS_STYLUES: cfg->disable_xhci_lfps_pm = 1; return; default: -- To view, visit https://review.coreboot.org/c/coreboot/+/47015 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifec4e1360bd1aff3825bc6413b0a2ccd8b822075 Gerrit-Change-Number: 47015 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Kevin Chiu <kevin.chiu(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/dedede/var/boten: Add LTE power on/off sequence
by Furquan Shaikh (Code Review) 06 Nov '20

06 Nov '20

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44588 ) Change subject: mb/google/dedede/var/boten: Add LTE power on/off sequence ...................................................................... Patch Set 11: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/44588 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6d5d21ce5267f147b332a4c9b01a29b3b8ccfb8 Gerrit-Change-Number: 44588 Gerrit-PatchSet: 11 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Alec Wang <alec.wang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rasheed Hsueh <rasheed.hsueh(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Fri, 06 Nov 2020 02:18:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede: Add support for variant specific SMI sleep flow
by Furquan Shaikh (Code Review) 06 Nov '20

06 Nov '20

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44587 ) Change subject: mb/google/dedede: Add support for variant specific SMI sleep flow ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/44587 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib43ada784666919a4d26246a683dad7f3546fabb Gerrit-Change-Number: 44587 Gerrit-PatchSet: 7 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rasheed Hsueh <rasheed.hsueh(a)lcfc.corp-partner.google.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 06 Nov 2020 02:17:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: driver/usb/acpi: Add power resources for devices on USB ports
by Furquan Shaikh (Code Review) 06 Nov '20

06 Nov '20

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46713 ) Change subject: driver/usb/acpi: Add power resources for devices on USB ports ...................................................................... Patch Set 3: Code-Review+2 (1 comment) https://review.coreboot.org/c/coreboot/+/46713/3/src/drivers/usb/acpi/usb_a… File src/drivers/usb/acpi/usb_acpi.c: https://review.coreboot.org/c/coreboot/+/46713/3/src/drivers/usb/acpi/usb_a… PS3, Line 17: cfg->has_power_resource || cfg->reset_gpio.pin_count == 0 This will have to be changed to: if (cfg->reset_gpio.pin_count != 0 && !cfg->has_power_resource) return true; return false; This is because there is another change coming where we are adding privacy gpio to _CRS. Anyways, I can provide feedback on that CL to ensure we coordinate the changes correctly. -- To view, visit https://review.coreboot.org/c/coreboot/+/46713 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icc1aebfb9e3e646a7f608f0cd391079fd30dd1c0 Gerrit-Change-Number: 46713 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rasheed Hsueh <rasheed.hsueh(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Fri, 06 Nov 2020 02:16:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/boten: Add LTE power on/off sequence
by Marco Chen (Code Review) 06 Nov '20

06 Nov '20

Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44588 ) Change subject: mb/google/dedede/var/boten: Add LTE power on/off sequence ...................................................................... Patch Set 11: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/44588 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6d5d21ce5267f147b332a4c9b01a29b3b8ccfb8 Gerrit-Change-Number: 44588 Gerrit-PatchSet: 11 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Alec Wang <alec.wang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Rasheed Hsueh <rasheed.hsueh(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Fri, 06 Nov 2020 01:37:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede: Add support for variant specific SMI sleep flow
by Marco Chen (Code Review) 06 Nov '20

06 Nov '20

Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44587 ) Change subject: mb/google/dedede: Add support for variant specific SMI sleep flow ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/44587 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib43ada784666919a4d26246a683dad7f3546fabb Gerrit-Change-Number: 44587 Gerrit-PatchSet: 7 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 06 Nov 2020 01:35:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede: Add support for variant specific SMI sleep flow
by Peichao Wang (Code Review) 06 Nov '20

06 Nov '20

Peichao Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44587 ) Change subject: mb/google/dedede: Add support for variant specific SMI sleep flow ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/44587 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib43ada784666919a4d26246a683dad7f3546fabb Gerrit-Change-Number: 44587 Gerrit-PatchSet: 7 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 06 Nov 2020 01:28:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit November 2020