Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45911 )
Change subject: drivers/i2c: Add chip driver for GPIO based I2C multiplexer
......................................................................
Patch Set 4:
This should also add a device property in the _DSD describing "mux-gpios" listing the gpios that are defined, to match https://kernel.googlesource.com/pub/scm/linux/kernel/git/next/linux-next/+/…
It would be good to design this to support more than one GPIO for mux control so it matches what the kernel supports.
That will require supporting a list of GPIOs for a property. Right now we only handle a single gpio per property with acpi_dp_add_gpio():
Package () {
"mux-gpios",
Package () {^FOO, 3, 0, 0},
},
But this would need to support multiple gpios in the property, for example:
Package () {
"mux-gpios",
Package () {
^FOO, 0, 0, 1,
^FOO, 1, 0, 1,
^FOO, 2, 0, 1,
}
},
It might be best to add a new function like acpi_dp_add_gpio_array() to avoid having to change the existing use cases..
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Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45889 )
Change subject: mb/google/volteer: Expand WP_RO region to 8MB in fmap
......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45889/2/src/mainboard/google/volte…
File src/mainboard/google/volteer/chromeos.fmd:
https://review.coreboot.org/c/coreboot/+/45889/2/src/mainboard/google/volte…
PS2, Line 9: # SPI flash only the top 16MiB actually gets memory mapped.
> intel recently bumped up these regions by 2MB to allow headroom for CSE Lite in CB:43790.
Thanks for the link Furquan! I will take a look at adapting it for volteer.
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Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45911 )
Change subject: drivers/i2c: Add chip driver for GPIO based I2C multiplexer
......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45911/4//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/45911/4//COMMIT_MSG@8
PS4, Line 8:
Can you mention the kernel driver this is intended to be used with?
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Change subject: drivers/i2c: Add chip driver for GPIO based I2C multiplexer
......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45911/4/src/drivers/i2c/gpio_mux/g…
File src/drivers/i2c/gpio_mux/gpio_mux.c:
PS4:
Should this really just two separate chip drivers? It looks like the acpi_fill_ssdt() for each is totally separate. Just a thought, it might clean up the code and the devicetree too.
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Change subject: drivers/i2c: Add chip driver for GPIO based I2C multiplexer
......................................................................
Patch Set 4:
(6 comments)
https://review.coreboot.org/c/coreboot/+/45911/3/src/drivers/i2c/gpio_mux/g…
File src/drivers/i2c/gpio_mux/gpio_mux.c:
https://review.coreboot.org/c/coreboot/+/45911/3/src/drivers/i2c/gpio_mux/g…
PS3, Line 34: i2c_gpio_mux_adapter_fill_ssdt
suggestion: i2c_gpio_mux_adapter_fill
https://review.coreboot.org/c/coreboot/+/45911/3/src/drivers/i2c/gpio_mux/g…
PS3, Line 37: acpigen_write_name_integer
acpigen_write_ADR ?
https://review.coreboot.org/c/coreboot/+/45911/3/src/drivers/i2c/gpio_mux/g…
PS3, Line 40: i2c_gpio_mux_fill_ssdt
suggestion: i2c_gpio_mux_write_gpios
https://review.coreboot.org/c/coreboot/+/45911/3/src/drivers/i2c/gpio_mux/g…
PS3, Line 40: static void i2c_gpio_mux_fill_ssdt(struct drivers_i2c_gpio_mux_config *config)
: {
: /* Resources */
: acpigen_write_name("_CRS");
: acpigen_write_resourcetemplate_header();
: acpi_device_write_gpio(&config->mux_gpio);
: acpigen_write_resourcetemplate_footer();
All this function uses from `config` is the mux_gpio field, why not pass that in instead (const struct acpi_gpio *) ?
https://review.coreboot.org/c/coreboot/+/45911/3/src/drivers/i2c/gpio_mux/g…
PS3, Line 50: i2c_gpio_mux_fill_ssdt_generator
note: we removed the 'generator' names a while ago.
https://review.coreboot.org/c/coreboot/+/45911/3/src/drivers/i2c/gpio_mux/g…
PS3, Line 51: {
: const char *scope = acpi_device_scope(dev);
: const char *path = acpi_device_path(dev);
: struct drivers_i2c_gpio_mux_config *config = dev->chip_info;
:
: if (!dev->enabled || !scope)
: return;
:
Could you restructure this so that dev is checked for NULL first? That will make coverity happy.
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Rob Barnes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44775 )
Change subject: treewide: stop using hexdumps for SPD files
......................................................................
Patch Set 27:
> Patch Set 27:
>
> > Patch Set 27:
> >
> > > Patch Set 27: Code-Review-1
> > >
> > > > Patch Set 27: Code-Review+1
> > > >
> > > > > Patch Set 27:
> > > > >
> > > > > > I'd vote for not checking binaries into the coreboot source tree at all. Personally, I'd like to get rid of the vbt binaries and have a tool to compile them as well. My understanding was that there wasn't documentation for the VBT fields, but it seems that maybe this is no longer the case. [1]
> > > > >
> > > > > In general I agree, but it seems hard to get authoritative sources on the precise format, even for SPD dumps - that ought to be standardized but get repurposed in lots of "wonderful" ways by memory reference code. As far as we know, the "spec" to these files is the reference code, and that's not public.
> > > > >
> > > > > Some of the SPD tools we use on newer chipsets (for lp4x?) may come close to that. In which case: why ship hex dumps or binaries at all?
> > > > >
> > > > > > As far as vendors adding custom flags, I don't see how binary vs text solves any problem there.
> > > > > The transition here removes the hex-to-bin translation that's been fragile. Michael offers a patch that fixes things for him - that I'm relatively sure breaks building that part of the tree on other UNIX systems, since I vaguely remember having had these issues myself. My guess would be Solaris but it might be some odd BSD as well.
> > > > >
> > > > > The text files we ship are plain hex dumps. They don't add anything of value, do they? So why should we pretend that they're "source" and make our live miserable?
> > > > >
> > > > > My proposal is to get this in to remove the pain point that this is dealing with (the fragile hex-to-bin translation) and whoever is motivated to do so looks into providing a higher level description for these files and translating things to that, removing the opaque datasets we have (no matter the format) from the tree.
> > > >
> > > > spd_tools was already updated to output binary SPD files, so now spd_tools is not usable for adding parts until this change goes in. So this is a 2nd vote for getting this in as is to unblock spd_tools.
> > > >
> > > > spd_tools generates SPD binaries from a json input. This could certainly be made part of the build so the generated SPD binaries do not need to be checked in. The only blocker is golang support in the build or rewriting the tool in a supported language.
> > >
> > > Why not revert the change that made spd_tools output binaries instead? I'm not convinced using binaries would help with the issue at hand.
> >
> > So revert or patch spd_tools to support both hex and binary with a commandline flag. Michael, do you have a preference?
>
> I don't have any preference here. Let's just revert it. If we decide later that we need hex output again, this can be added with a flag.
Revert here: CB:44999
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Rob Barnes has created a revert of this change. ( https://review.coreboot.org/c/coreboot/+/44878 )
Change subject: util/spd_tools: output binaries instead of hexdumps
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45131 )
Change subject: lib/Makefile.inc: fail build when SPD would be empty
......................................................................
Patch Set 14:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45131/14/src/lib/Makefile.inc
File src/lib/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/45131/14/src/lib/Makefile.inc@360
PS14, Line 360: test -n "$(SPD_SOURCES)" || \
: (echo "HAVE_SPD_BIN_IN_CBFS is set but SPD_SOURCES is empty" && exit 1)
> > I'd rather avoid getting such incomplete states of board variants into the tree. […]
Thanks for the detailed explanation. I wasn't aware that some of these ports are for boards that do not exist yet. I'm fine with this approach to adding new variants, as it seems to address the copy-paste problem rather well. However, completely dropping the `spd file would be empty` build-time check is IMHO unacceptable.
If the type of memory a new variant is known at creation time, it's just a matter of using the right empty SPD file (why are they within soc/ though???). Otherwise, I would just use the baseboard default. And if that still caused problems, why not use a generic`fixme_empty_spd_placeholder.hex` file?
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Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45131 )
Change subject: lib/Makefile.inc: fail build when SPD would be empty
......................................................................
Patch Set 14:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45131/14/src/lib/Makefile.inc
File src/lib/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/45131/14/src/lib/Makefile.inc@360
PS14, Line 360: test -n "$(SPD_SOURCES)" || \
: (echo "HAVE_SPD_BIN_IN_CBFS is set but SPD_SOURCES is empty" && exit 1)
> I'd rather avoid getting such incomplete states of board variants into the tree. I expect boards that make it into master to be able to boot, even if half of the features (e.g. Wi-Fi, touchpad, touchscreen, suspend and resume...) don't work.
The initial commits are primarily to seed the variant. Example: the template file commits for different google variants that are added in the tree. It is to help anyone easily add a new variant without having to manually copy the same code around (most of the times, people end up copying the wrong bits which never get dropped until someone runs into an issue). Thus, the scripts to seed a new variant enable building it with bare minimum files. Almost every time, you need more follow-up code to actually have that variant boot -- it might come out of reset, but I don't think it is fair to assume that it will just boot all the way.
Even if we add a board manually, it is much easier to add and review smaller logical pieces of code than copy-pasting a big chunk. One good example is dedede - https://review.coreboot.org/c/coreboot/+/38277. That series broke down in small logical pieces the addition of a mainboard support. In my opinion, it made things very easy to review as well.
I understand your intention to ensure that we are carrying tested code. But, for a new board being added, this is very difficult (example: almost every time a new board is added, it's hardware is not available and so even a complete board support wouldn't be tested until the change lands and makes it to a build that is provided to factory).
The reason I brought this up is https://review.coreboot.org/c/coreboot/+/45746. That CL works fine to ensure that we start with an empty SPD. But the problem I see is in terms of maintenance. Example: Volteer supports variants which might have LP4x or DDR4 memories. To avoid confusion, the CL is changing ddr4-empty-spd.hex in tigerlake to empty.spd.hex so that the starting SPD doesn't mention any particular type. It works okay as long as the empty.spd.hex is not used later for filling in empty SPDs when some DRAM strap IDs are unused - else we need to ensure that the size of the empty SPDs are correct as per the memory type. I don't think it's difficult to get all of that correct. But, I think we are unnecessarily adding more manual work to ensure things always stay this way and don't silently cause other issues.
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