coreboot-gerrit October 2020

coreboot-gerrit@coreboot.org

1 participants
3473 discussions

Change in coreboot[master]: src/soc/intel: deduplicate cpu code
by Michael Niewöhner (Code Review) 11 Oct '20

11 Oct '20

Hello Felix Singer, build bot (Jenkins), Nico Huber, Paul Menzel, Subrata Banik, Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/46274 to look at the new patch set (#2). Change subject: src/soc/intel: deduplicate cpu code ...................................................................... src/soc/intel: deduplicate cpu code Move a whole bunch of copy-pasta code from soc/intel/{bdw,skl,cnl,icl, tgl,ehl,jsl,adl} to soc/intel/common. Change-Id: Ib0cc834de8492d59c423317598e1c11847a0b1ab Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/alderlake/cpu.c M src/soc/intel/broadwell/cpu.c M src/soc/intel/cannonlake/cpu.c M src/soc/intel/common/block/cpu/cpulib.c M src/soc/intel/common/block/include/intelblocks/cpulib.h M src/soc/intel/elkhartlake/cpu.c M src/soc/intel/icelake/cpu.c M src/soc/intel/jasperlake/cpu.c M src/soc/intel/skylake/cpu.c M src/soc/intel/tigerlake/cpu.c 10 files changed, 72 insertions(+), 356 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/46274/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/46274 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0cc834de8492d59c423317598e1c11847a0b1ab Gerrit-Change-Number: 46274 Gerrit-PatchSet: 2 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: src/soc/intel: deduplicate cpu code
by Subrata Banik (Code Review) 11 Oct '20

11 Oct '20

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46274 ) Change subject: src/soc/intel: deduplicate cpu code ...................................................................... Patch Set 1: BDW doesn't use IA-common code "common/block/cpu" -- To view, visit https://review.coreboot.org/c/coreboot/+/46274 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0cc834de8492d59c423317598e1c11847a0b1ab Gerrit-Change-Number: 46274 Gerrit-PatchSet: 1 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Sun, 11 Oct 2020 12:11:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: src/soc/intel: deduplicate cpu code
by Michael Niewöhner (Code Review) 11 Oct '20

11 Oct '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46274 ) Change subject: src/soc/intel: deduplicate cpu code ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/46274 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0cc834de8492d59c423317598e1c11847a0b1ab Gerrit-Change-Number: 46274 Gerrit-PatchSet: 1 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Sun, 11 Oct 2020 12:08:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: ec/kontron/kempld: Fix code style
by Maxim Polyakov (Code Review) 11 Oct '20

11 Oct '20

Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45372 ) Change subject: ec/kontron/kempld: Fix code style ...................................................................... ec/kontron/kempld: Fix code style Change-Id: Ia5ad0715b742427dffa6c0c507269d904fe19bcb Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- M src/ec/kontron/kempld/chip.h M src/ec/kontron/kempld/early_kempld.c M src/ec/kontron/kempld/kempld.c M src/ec/kontron/kempld/kempld_i2c.c M src/ec/kontron/kempld/kempld_internal.h 5 files changed, 30 insertions(+), 46 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/45372/1 diff --git a/src/ec/kontron/kempld/chip.h b/src/ec/kontron/kempld/chip.h index 2ac0949..b520e6e 100644 --- a/src/ec/kontron/kempld/chip.h +++ b/src/ec/kontron/kempld/chip.h @@ -3,7 +3,7 @@ #ifndef EC_KONTRON_KEMPLD_CHIP_H #define EC_KONTRON_KEMPLD_CHIP_H -#define KEMPLD_NUM_UARTS 2 +#define KEMPLD_NUM_UARTS 2 enum kempld_uart_io { KEMPLD_UART_3F8 = 0, @@ -19,7 +19,7 @@ struct ec_kontron_kempld_config { struct kempld_uart uart[KEMPLD_NUM_UARTS]; - unsigned short i2c_freq_khz; + unsigned short i2c_freq_khz; }; #endif /* EC_KONTRON_KEMPLD_CHIP_H */ diff --git a/src/ec/kontron/kempld/early_kempld.c b/src/ec/kontron/kempld/early_kempld.c index cb33a8b..d25896c 100644 --- a/src/ec/kontron/kempld/early_kempld.c +++ b/src/ec/kontron/kempld/early_kempld.c @@ -3,7 +3,6 @@ #include <stdint.h> #include <arch/io.h> #include <delay.h> - #include "chip.h" #include "kempld.h" #include "kempld_internal.h" @@ -43,13 +42,11 @@ switch (CONFIG_UART_FOR_CONSOLE) { case 0: kempld_write8(KEMPLD_UART_0, - KEMPLD_UART_ENABLE | - KEMPLD_UART_3F8 << KEMPLD_UART_IO_SHIFT); + KEMPLD_UART_ENABLE | KEMPLD_UART_3F8 << KEMPLD_UART_IO_SHIFT); break; case 1: kempld_write8(KEMPLD_UART_1, - KEMPLD_UART_ENABLE | - KEMPLD_UART_2F8 << KEMPLD_UART_IO_SHIFT); + KEMPLD_UART_ENABLE | KEMPLD_UART_2F8 << KEMPLD_UART_IO_SHIFT); break; default: break; diff --git a/src/ec/kontron/kempld/kempld.c b/src/ec/kontron/kempld/kempld.c index 19376c7..22e5376 100644 --- a/src/ec/kontron/kempld/kempld.c +++ b/src/ec/kontron/kempld/kempld.c @@ -2,7 +2,6 @@ #include <console/console.h> #include <device/device.h> - #include "chip.h" #include "kempld.h" #include "kempld_internal.h" @@ -10,27 +9,24 @@ static void kempld_uart_read_resources(struct device *dev) { static const unsigned int io_addr[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; - const struct ec_kontron_kempld_config *const config = dev->chip_info; - struct resource *const res_io = new_resource(dev, 0); struct resource *const res_irq = new_resource(dev, 1); const unsigned int uart = dev->path.generic.subid; + if (!config || !res_io || !res_irq || uart >= KEMPLD_NUM_UARTS) return; const enum kempld_uart_io io = config->uart[uart].io; if (io >= ARRAY_SIZE(io_addr)) { - printk(BIOS_ERR, "KEMPLD: Bad io value '%d' for UART#%u\n.", - io, uart); + printk(BIOS_ERR, "KEMPLD: Bad io value '%d' for UART#%u\n.", io, uart); dev->enabled = false; return; } const int irq = config->uart[uart].irq; if (irq >= 16) { - printk(BIOS_ERR, "KEMPLD: Bad irq value '%d' for UART#%u\n.", - irq, uart); + printk(BIOS_ERR, "KEMPLD: Bad irq value '%d' for UART#%u\n.", irq, uart); dev->enabled = false; return; } @@ -49,22 +45,23 @@ const uint8_t reg = uart ? KEMPLD_UART_1 : KEMPLD_UART_0; const uint8_t val = kempld_read8(reg); - kempld_write8(reg, (val & ~(KEMPLD_UART_IO_MASK | KEMPLD_UART_IRQ_MASK)) - | io << KEMPLD_UART_IO_SHIFT - | irq << KEMPLD_UART_IRQ_SHIFT); + kempld_write8(reg, + (val & ~(KEMPLD_UART_IO_MASK | KEMPLD_UART_IRQ_MASK)) | + io << KEMPLD_UART_IO_SHIFT | + irq << KEMPLD_UART_IRQ_SHIFT); kempld_release_mutex(); } static void kempld_uart_enable_resources(struct device *dev) { + const unsigned int uart = dev->path.generic.subid; + const uint8_t reg = uart ? KEMPLD_UART_1 : KEMPLD_UART_0; + if (kempld_get_mutex(100) < 0) return; - const unsigned int uart = dev->path.generic.subid; - const uint8_t reg = uart ? KEMPLD_UART_1 : KEMPLD_UART_0; kempld_write8(reg, kempld_read8(reg) | KEMPLD_UART_ENABLE); - kempld_release_mutex(); } @@ -90,9 +87,7 @@ } /* Fall through. */ default: - printk(BIOS_WARNING, - "KEMPLD: Spurious device %s.\n", - dev_path(dev)); + printk(BIOS_WARNING, "KEMPLD: Spurious device %s.\n", dev_path(dev)); break; } } diff --git a/src/ec/kontron/kempld/kempld_i2c.c b/src/ec/kontron/kempld/kempld_i2c.c index 0145d97..8701205 100644 --- a/src/ec/kontron/kempld/kempld_i2c.c +++ b/src/ec/kontron/kempld/kempld_i2c.c @@ -1,18 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* - * I2C bus driver for Kontron COM modules - * - * Based on the similar driver in Linux. - */ - #include <stdint.h> #include <console/console.h> #include <device/device.h> #include <device/i2c_bus.h> #include <timer.h> #include <delay.h> - #include "chip.h" #include "kempld.h" #include "kempld_internal.h" @@ -41,10 +34,10 @@ #define I2C_CMD_READ_NACK 0x29 #define I2C_CMD_IACK 0x01 -#define EIO 5 -#define ENXIO 6 -#define EAGAIN 11 -#define EBUSY 16 +#define EIO 5 +#define ENXIO 6 +#define EAGAIN 11 +#define EBUSY 16 #define ETIMEDOUT 110 enum kempld_i2c_freq_stadart { @@ -66,10 +59,10 @@ }; struct kempld_i2c_data { - const struct i2c_msg *msg; - size_t pos; - size_t nmsgs; - enum kempld_i2c_state state; + const struct i2c_msg *msg; + size_t pos; + size_t nmsgs; + enum kempld_i2c_state state; }; /* @@ -158,8 +151,7 @@ i2c->state = STATE_ADDR; return 0; } - i2c->state = (msg->flags & I2C_M_RD) - ? STATE_READ : STATE_WRITE; + i2c->state = (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; } else { i2c->state = STATE_DONE; kempld_write8(KEMPLD_I2C_CMD, I2C_CMD_STOP); @@ -229,8 +221,8 @@ }; static struct device_operations kempld_i2c_dev_ops = { - .scan_bus = &scan_smbus, - .ops_i2c_bus = &kempld_i2c_bus_ops, + .scan_bus = &scan_smbus, + .ops_i2c_bus = &kempld_i2c_bus_ops, }; void kempld_i2c_device_init(struct device *const dev) diff --git a/src/ec/kontron/kempld/kempld_internal.h b/src/ec/kontron/kempld/kempld_internal.h index 014778c..4fb42dc 100644 --- a/src/ec/kontron/kempld/kempld_internal.h +++ b/src/ec/kontron/kempld/kempld_internal.h @@ -6,9 +6,9 @@ #include <device/device.h> /* i/o ports */ -#define KEMPLD_IDX 0xa80 -#define KEMPLD_MUTEX_KEY 0x80 -#define KEMPLD_DAT 0xa81 +#define KEMPLD_IDX 0xa80 +#define KEMPLD_MUTEX_KEY 0x80 +#define KEMPLD_DAT 0xa81 /* indexed registers */ #define KEMPLD_SPEC 0x06 @@ -26,7 +26,7 @@ #define KEMPLD_UART_IO_MASK (0x3 << KEMPLD_UART_IO_SHIFT) #define KEMPLD_UART_ENABLE 0x80 -#define KEMPLD_CLK 33333333 /* 33MHz */ +#define KEMPLD_CLK 33333333 /* 33MHz */ void kempld_i2c_device_init(struct device *const dev); -- To view, visit https://review.coreboot.org/c/coreboot/+/45372 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia5ad0715b742427dffa6c0c507269d904fe19bcb Gerrit-Change-Number: 45372 Gerrit-PatchSet: 1 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-MessageType: newchange

4 11

Change in coreboot[master]: soc/intel: set turbo mode on all processors
by Michael Niewöhner (Code Review) 11 Oct '20

11 Oct '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/27611 ) Change subject: soc/intel: set turbo mode on all processors ...................................................................... Patch Set 1: > Patch Set 1: > > (1 comment) > > MSR_TURBO_RATIO_LIMIT is package scoped uhm, ignore this. we're not setting this msr here -- To view, visit https://review.coreboot.org/c/coreboot/+/27611 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9b9989fdcb211f2a6a03cf60a7037cdbd028a7f Gerrit-Change-Number: 27611 Gerrit-PatchSet: 1 Gerrit-Owner: Matt Delco <delco(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Sun, 11 Oct 2020 11:42:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel: set turbo mode on all processors
by Michael Niewöhner (Code Review) 11 Oct '20

11 Oct '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/27611 ) Change subject: soc/intel: set turbo mode on all processors ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/c/coreboot/+/27611/1//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/27611/1//COMMIT_MSG@7 PS1, Line 7: soc/intel: set turbo mode on all processors that's not really what this change does. turbo mode *is* being set on all processors in soc_core_init() via enable_turbo() -- To view, visit https://review.coreboot.org/c/coreboot/+/27611 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9b9989fdcb211f2a6a03cf60a7037cdbd028a7f Gerrit-Change-Number: 27611 Gerrit-PatchSet: 1 Gerrit-Owner: Matt Delco <delco(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Sun, 11 Oct 2020 11:28:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel: set turbo mode on all processors
by Michael Niewöhner (Code Review) 11 Oct '20

11 Oct '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/27611 ) Change subject: soc/intel: set turbo mode on all processors ...................................................................... Patch Set 1: (1 comment) MSR_TURBO_RATIO_LIMIT is package scoped https://review.coreboot.org/c/coreboot/+/27611/1/src/soc/intel/common/block… File src/soc/intel/common/block/cpu/cpulib.c: https://review.coreboot.org/c/coreboot/+/27611/1/src/soc/intel/common/block… PS1, Line 304: * 31:24 - MAX_TURBO_4_CORES : * : add 6 and 8 cores? -- To view, visit https://review.coreboot.org/c/coreboot/+/27611 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9b9989fdcb211f2a6a03cf60a7037cdbd028a7f Gerrit-Change-Number: 27611 Gerrit-PatchSet: 1 Gerrit-Owner: Matt Delco <delco(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Sun, 11 Oct 2020 11:24:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: drivers/i2c/nct7802y: configure local temp sensor [WIP]
by Maxim Polyakov (Code Review) 11 Oct '20

11 Oct '20

Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39766 ) Change subject: drivers/i2c/nct7802y: configure local temp sensor [WIP] ...................................................................... drivers/i2c/nct7802y: configure local temp sensor [WIP] According to the documentation[1], the Mode Selection Register sets the operation mode of the local temperature sensors. The patch allows to do this from a tree of devices for a board that uses uses this HWM. [1] page 30, section 7.2.32, Nuvoton Hardware Monitoring IC NCT7802Y with PECI 3.0 interface, datasheet, revision 1.2, february 2012 Change-Id: I28cc4e5cae76cf0bcdad26a50ee6cd43a201d31e --- M src/drivers/i2c/nct7802y/chip.h M src/drivers/i2c/nct7802y/nct7802y.h M src/drivers/i2c/nct7802y/nct7802y_fan.c 3 files changed, 33 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/39766/1 diff --git a/src/drivers/i2c/nct7802y/chip.h b/src/drivers/i2c/nct7802y/chip.h index adff0f5..693cc41 100644 --- a/src/drivers/i2c/nct7802y/chip.h +++ b/src/drivers/i2c/nct7802y/chip.h @@ -19,6 +19,13 @@ #define NCT7802Y_PECI_CNT 2 #define NCT7802Y_FAN_CNT 3 +enum nct7802y_sensor_mode_type { + RTD_CLOSED = 0, + RTD_CURRENT_MODE, + RTD_THERMISTOR_MODE, + RTD_VOLTAGE_MODE, +}; + enum nct7802y_peci_mode { PECI_DISABLED = 0, PECI_DOMAIN_0, @@ -64,6 +71,14 @@ TEMP_SOURCE_PROGRAMMABLE_1, }; +/* Local temperature sensor configuration */ +struct nct7802y_sensor_mode_selection { + bool local_temp_sensor_enable; + enum nct7802y_sensor_mode_type rtd3_md; + enum nct7802y_sensor_mode_type rtd2_md; + enum nct7802y_sensor_mode_type rtd1_md; +}; + struct nct7802y_fan_smartconfig { enum nct7802y_fan_smartmode mode; enum nct7802y_fan_speed speed; @@ -85,6 +100,7 @@ /* Implements only those parts currently used by coreboot mainboards. */ struct drivers_i2c_nct7802y_config { + struct nct7802y_sensor_mode_selection sensor_mode; struct nct7802y_peci_config peci[NCT7802Y_PECI_CNT]; struct nct7802y_fan_config fan[NCT7802Y_FAN_CNT]; enum nct7802y_fan_pecierror on_pecierror; diff --git a/src/drivers/i2c/nct7802y/nct7802y.h b/src/drivers/i2c/nct7802y/nct7802y.h index 9f3aaef..a105fea 100644 --- a/src/drivers/i2c/nct7802y/nct7802y.h +++ b/src/drivers/i2c/nct7802y/nct7802y.h @@ -23,6 +23,15 @@ /* Bank 0 */ +#define MODE_SELECTION 0x22 +#define MODE_SELECTION_EN_LTD(x) (x << 6) +#define MODE_SELECTION_RTD3_MD(x) (x << 4) +#define MODE_SELECTION_RTD2_MD(x) (x << 2) +#define MODE_SELECTION_RTD1_MD(x) (x) + +#define PECI_ENABLE 0x23 +#define PECI_ENABLE_AGENTx(x) (1 << (x)) + #define PECI_ENABLE 0x23 #define PECI_ENABLE_AGENTx(x) (1 << (x)) diff --git a/src/drivers/i2c/nct7802y/nct7802y_fan.c b/src/drivers/i2c/nct7802y/nct7802y_fan.c index d7cfb90..1193bb9 100644 --- a/src/drivers/i2c/nct7802y/nct7802y_fan.c +++ b/src/drivers/i2c/nct7802y/nct7802y_fan.c @@ -89,6 +89,14 @@ init_fan(dev, &config->fan[i], i); } + if (config->sensor_mode.local_temp_sensor_enable) { + nct7802y_write(dev, MODE_SELECTION, + MODE_SELECTION_EN_LTD(config->sensor_mode.local_temp_sensor_enable) | + MODE_SELECTION_RTD3_MD(config->sensor_mode.rtd3_md) | + MODE_SELECTION_RTD2_MD(config->sensor_mode.rtd2_md) | + MODE_SELECTION_RTD1_MD(config->sensor_mode.rtd1_md)); + } + switch (config->on_pecierror) { case PECI_ERROR_KEEP: set = CLOSE_LOOP_FAN_PECI_ERR_CURR; -- To view, visit https://review.coreboot.org/c/coreboot/+/39766 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28cc4e5cae76cf0bcdad26a50ee6cd43a201d31e Gerrit-Change-Number: 39766 Gerrit-PatchSet: 1 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-MessageType: newchange

7 28

Change in coreboot[master]: soc/intel/cnl: lock AES-NI feature
by Michael Niewöhner (Code Review) 11 Oct '20

11 Oct '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46273 ) Change subject: soc/intel/cnl: lock AES-NI feature ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/46273 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79495bfbd3ebf3b712ce9ecf2040cecfd954178d Gerrit-Change-Number: 46273 Gerrit-PatchSet: 1 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Sun, 11 Oct 2020 11:23:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/{common,skl}: move AES-NI locking to common code
by Michael Niewöhner (Code Review) 11 Oct '20

11 Oct '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46272 ) Change subject: soc/intel/{common,skl}: move AES-NI locking to common code ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/46272 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81ad5c0d4797b139435c57d3af0a95db94a5c15e Gerrit-Change-Number: 46272 Gerrit-PatchSet: 1 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Sun, 11 Oct 2020 11:23:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit October 2020