Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Matt DeVillier, Tim Wawrzynczak, Paul Menzel, Angel Pons, Subrata Banik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: soc/intel/common/acpi: correct indentation
......................................................................
soc/intel/common/acpi: correct indentation
Test: built google/volteer with `abuild --timeless` - hashes match
Change-Id: Ice6cef402dfcc33f1fc7fdced66d38c380d338e5
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/soc/intel/common/acpi/lpit.asl
1 file changed, 69 insertions(+), 69 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/46467/2
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46459 )
Change subject: mb/google/dedede: replace dt option by MSR write for disabling HWP capability
......................................................................
Patch Set 2:
Karthikeyan, can you tell us more about the reasons to disable ISST in "early silicon" on these boards, please?
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45151 )
Change subject: device: Enable bus mastering on system-class devices conditionally
......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45151/4//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/45151/4//COMMIT_MSG@9
PS4, Line 9: Devices of class type "system" are arbitrary devices and it's not clear
: which of them need bus mastering. Therefore, enable bus mastering
: conditionally based on Kconfig option PCI_ALLOW_BUS_MASTER_ANY_DEVICE.
:
hmm. as a user, what when I want to enable *any* devices but not system-class devices? I'd have to select "any devices" even if didn't want this. I'd add another Kconfig with `default y`
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45150 )
Change subject: device: Allow configuring bus mastering for PCI bridges conditionally
......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45150/3/src/device/Kconfig
File src/device/Kconfig:
https://review.coreboot.org/c/coreboot/+/45150/3/src/device/Kconfig@537
PS3, Line 537: ALLOW
well, is it really "allow"? the code reads like "set it if the Kconfig is set"
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Gerrit-Comment-Date: Fri, 16 Oct 2020 06:59:26 +0000
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45149 )
Change subject: device: Rework bus master option
......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/45149/3/src/device/Kconfig
File src/device/Kconfig:
https://review.coreboot.org/c/coreboot/+/45149/3/src/device/Kconfig@537
PS3, Line 537: config PCI_ALLOW_BUS_MASTER_ANY_DEVICE
> add a help text
could be skipped, assuming this is clear to the user in context of the options in the follow-ups
https://review.coreboot.org/c/coreboot/+/45149/3/src/device/Kconfig@538
PS3, Line 538: Any devices
> if `n`, is it just *some* devices?
ah, reading the follow-up It got it ;) maybe a choice would be better here to select "any device", "custom config" (which is then done via the other option(s) in the follow-ups
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45149 )
Change subject: device: Rework bus master option
......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/45149/3/src/device/Kconfig
File src/device/Kconfig:
https://review.coreboot.org/c/coreboot/+/45149/3/src/device/Kconfig@537
PS3, Line 537: config PCI_ALLOW_BUS_MASTER_ANY_DEVICE
add a help text
https://review.coreboot.org/c/coreboot/+/45149/3/src/device/Kconfig@538
PS3, Line 538: Any devices
if `n`, is it just *some* devices?
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45826 )
Change subject: soc/intel/icl: enable common CPU code
......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45826/2/src/soc/intel/icelake/roms…
File src/soc/intel/icelake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/45826/2/src/soc/intel/icelake/roms…
PS2, Line 59: m_cfg->VmxEnable = CONFIG(ENABLE_VMX);
> Better than yet another `if`?
There is no `if`, when we use variant 1. set_vmx_and_lock() must be called explicitly in soc code. When we don't call it, because FSP does everything, the Kconfigs won't do anything.
If we want to do it ourselves, we'd need to set VmxEnable=0 always and call set_vmx_and_lock(). Then the user has full control.
So, the question is 1) let FSP do and fake force-enable Kconfig or 2) keep FSP from doing anything (VmxEnable=0) and call set_vmx_and_lock(), which does not need hacking Kconfig.
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Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46462 )
Change subject: mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`
......................................................................
Patch Set 4: Code-Review+1
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