coreboot-gerrit August 2019

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/kukui: Move panel description to CBFS files
by Hung-Te Lin (Code Review) 22 Aug '19

22 Aug '19

Hung-Te Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34877 ) Change subject: mb/google/kukui: Move panel description to CBFS files ...................................................................... mb/google/kukui: Move panel description to CBFS files The panel description may be pretty large (for example, 1.3k for BOE TV101) due to init commands and we should only load the right config when display is needed. BUG=None TEST=make -j; boots and see display on Krane. Change-Id: I2560a11ecf7badfd0605ab189d57ec9456850f75 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> --- M src/mainboard/google/kukui/Makefile.inc M src/mainboard/google/kukui/mainboard.c M src/mainboard/google/kukui/panel.h M src/mainboard/google/kukui/panel_kodama.c M src/mainboard/google/kukui/panel_krane.c M src/mainboard/google/kukui/panel_kukui.c A src/mainboard/google/kukui/panel_params/Makefile.inc A src/mainboard/google/kukui/panel_params/panel-AUO_KD101N80_45NA.c A src/mainboard/google/kukui/panel_params/panel-BOE_TV101WUM_N53.c A src/mainboard/google/kukui/panel_params/panel-BOE_TV101WUM_NL6.c A src/mainboard/google/kukui/panel_params/panel-CMN_P097PFG_SSD2858.c 11 files changed, 859 insertions(+), 742 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/34877/1 diff --git a/src/mainboard/google/kukui/Makefile.inc b/src/mainboard/google/kukui/Makefile.inc index e34bff1..4f5a201 100644 --- a/src/mainboard/google/kukui/Makefile.inc +++ b/src/mainboard/google/kukui/Makefile.inc @@ -1,4 +1,5 @@ subdirs-y += sdram_params/ +subdirs-y += panel_params/ bootblock-y += boardid.c bootblock-y += bootblock.c diff --git a/src/mainboard/google/kukui/mainboard.c b/src/mainboard/google/kukui/mainboard.c index 9f90b0f..61a2ebe 100644 --- a/src/mainboard/google/kukui/mainboard.c +++ b/src/mainboard/google/kukui/mainboard.c @@ -15,6 +15,7 @@ #include <boardid.h> #include <bootmode.h> +#include <cbfs.h> #include <console/console.h> #include <delay.h> #include <device/device.h> @@ -26,6 +27,7 @@ #include <soc/mmu_operations.h> #include <soc/mtcmos.h> #include <soc/usb.h> +#include <string.h> #include "panel.h" @@ -93,6 +95,35 @@ mdelay(6); } +struct panel_description *get_panel_from_cbfs(int panel_id, + const char * const panel_names[], + size_t entries) +{ + /* + * CBFS file name should be 'panel-%MANUFATURER_%ID', where + * MANUFATURER takes 3 bytes and ID is 13[+1], so 32 should be enough. + */ + char cbfs_name[32]; + if (panel_id < 0 || panel_id >= entries) { + printk(BIOS_ERR, "Panel ID %u out of range [0-%lu].\n", + panel_id, entries - 1); + return NULL; + } + + const char *panel_name = panel_names[panel_id]; + if (!*panel_name) { + printk(BIOS_ERR, "Panel ID %d is not defined.\n", panel_id); + return NULL; + } + snprintf(cbfs_name, sizeof(cbfs_name), "panel-%s\n", panel_name); + + void *data = cbfs_boot_map_with_leak(cbfs_name, CBFS_TYPE_STRUCT, NULL); + if (!data) + printk(BIOS_ERR, "Panel %s (ID %d) does not exist in CBFS.\n", + panel_name, panel_id); + return data; +} + static struct panel_description *get_active_panel(void) { /* TODO(hungte) Create a dedicated panel_id() in board_id.c */ diff --git a/src/mainboard/google/kukui/panel.h b/src/mainboard/google/kukui/panel.h index 321e366..7210e30 100644 --- a/src/mainboard/google/kukui/panel.h +++ b/src/mainboard/google/kukui/panel.h @@ -29,6 +29,11 @@ /* Returns the panel description from given ID. */ extern struct panel_description *get_panel_description(int panel_id); +/* Loads panel description from CBFS. */ +struct panel_description *get_panel_from_cbfs(int panel_id, + const char * const panel_names[], + size_t entries); + #define INIT_DCS_CMD(...) \ LCM_DCS_CMD, \ sizeof((u8[]){__VA_ARGS__}), \ diff --git a/src/mainboard/google/kukui/panel_kodama.c b/src/mainboard/google/kukui/panel_kodama.c index 8f7ef2b..7012c45 100644 --- a/src/mainboard/google/kukui/panel_kodama.c +++ b/src/mainboard/google/kukui/panel_kodama.c @@ -15,328 +15,12 @@ #include "panel.h" -static struct panel_description BOE_TV101WUM_N53 = { - .edid = { - .ascii_string = "TV101WUM-N53", - .manufacturer_name = "BOE", - .panel_bits_per_color = 8, - .panel_bits_per_pixel = 24, - .mode = { - .name = "1200x1920@60Hz", - .pixel_clock = 156297, - .lvds_dual_channel = 0, - .refresh = 60, - .ha = 1200, .hbl = 164, .hso = 60, .hspw = 24, - .va = 1920, .vbl = 26, .vso = 14, .vspw = 2, - .phsync = '-', .pvsync = '-', - .x_mm = 135, .y_mm = 216, - }, - }, - .orientation = LB_FB_ORIENTATION_LEFT_UP, - .init = { - INIT_DELAY_CMD(24), - INIT_DCS_CMD(0xB0, 0x05), - INIT_DCS_CMD(0xB1, 0xE5), - INIT_DCS_CMD(0xB3, 0x52), - INIT_DCS_CMD(0xB0, 0x00), - INIT_DCS_CMD(0xB3, 0x88), - INIT_DCS_CMD(0xB0, 0x04), - INIT_DCS_CMD(0xB8, 0x00), - INIT_DCS_CMD(0xB0, 0x00), - INIT_DCS_CMD(0xB6, 0x03), - INIT_DCS_CMD(0xBA, 0x8B), - INIT_DCS_CMD(0xBF, 0x1A), - INIT_DCS_CMD(0xC0, 0x0F), - INIT_DCS_CMD(0xC2, 0x0C), - INIT_DCS_CMD(0xC3, 0x02), - INIT_DCS_CMD(0xC4, 0x0C), - INIT_DCS_CMD(0xC5, 0x02), - INIT_DCS_CMD(0xB0, 0x01), - INIT_DCS_CMD(0xE0, 0x26), - INIT_DCS_CMD(0xE1, 0x26), - INIT_DCS_CMD(0xDC, 0x00), - INIT_DCS_CMD(0xDD, 0x00), - INIT_DCS_CMD(0xCC, 0x26), - INIT_DCS_CMD(0xCD, 0x26), - INIT_DCS_CMD(0xC8, 0x00), - INIT_DCS_CMD(0xC9, 0x00), - INIT_DCS_CMD(0xD2, 0x03), - INIT_DCS_CMD(0xD3, 0x03), - INIT_DCS_CMD(0xE6, 0x04), - INIT_DCS_CMD(0xE7, 0x04), - INIT_DCS_CMD(0xC4, 0x09), - INIT_DCS_CMD(0xC5, 0x09), - INIT_DCS_CMD(0xD8, 0x0A), - INIT_DCS_CMD(0xD9, 0x0A), - INIT_DCS_CMD(0xC2, 0x0B), - INIT_DCS_CMD(0xC3, 0x0B), - INIT_DCS_CMD(0xD6, 0x0C), - INIT_DCS_CMD(0xD7, 0x0C), - INIT_DCS_CMD(0xC0, 0x05), - INIT_DCS_CMD(0xC1, 0x05), - INIT_DCS_CMD(0xD4, 0x06), - INIT_DCS_CMD(0xD5, 0x06), - INIT_DCS_CMD(0xCA, 0x07), - INIT_DCS_CMD(0xCB, 0x07), - INIT_DCS_CMD(0xDE, 0x08), - INIT_DCS_CMD(0xDF, 0x08), - INIT_DCS_CMD(0xB0, 0x02), - INIT_DCS_CMD(0xC0, 0x00), - INIT_DCS_CMD(0xC1, 0x0D), - INIT_DCS_CMD(0xC2, 0x17), - INIT_DCS_CMD(0xC3, 0x26), - INIT_DCS_CMD(0xC4, 0x31), - INIT_DCS_CMD(0xC5, 0x1C), - INIT_DCS_CMD(0xC6, 0x2C), - INIT_DCS_CMD(0xC7, 0x33), - INIT_DCS_CMD(0xC8, 0x31), - INIT_DCS_CMD(0xC9, 0x37), - INIT_DCS_CMD(0xCA, 0x37), - INIT_DCS_CMD(0xCB, 0x37), - INIT_DCS_CMD(0xCC, 0x39), - INIT_DCS_CMD(0xCD, 0x2E), - INIT_DCS_CMD(0xCE, 0x2F), - INIT_DCS_CMD(0xCF, 0x2F), - INIT_DCS_CMD(0xD0, 0x07), - INIT_DCS_CMD(0xD2, 0x00), - INIT_DCS_CMD(0xD3, 0x0D), - INIT_DCS_CMD(0xD4, 0x17), - INIT_DCS_CMD(0xD5, 0x26), - INIT_DCS_CMD(0xD6, 0x31), - INIT_DCS_CMD(0xD7, 0x3F), - INIT_DCS_CMD(0xD8, 0x3F), - INIT_DCS_CMD(0xD9, 0x3F), - INIT_DCS_CMD(0xDA, 0x3F), - INIT_DCS_CMD(0xDB, 0x37), - INIT_DCS_CMD(0xDC, 0x37), - INIT_DCS_CMD(0xDD, 0x37), - INIT_DCS_CMD(0xDE, 0x39), - INIT_DCS_CMD(0xDF, 0x2E), - INIT_DCS_CMD(0xE0, 0x2F), - INIT_DCS_CMD(0xE1, 0x2F), - INIT_DCS_CMD(0xE2, 0x07), - INIT_DCS_CMD(0xB0, 0x03), - INIT_DCS_CMD(0xC8, 0x0B), - INIT_DCS_CMD(0xC9, 0x07), - INIT_DCS_CMD(0xC3, 0x00), - INIT_DCS_CMD(0xE7, 0x00), - INIT_DCS_CMD(0xC5, 0x2A), - INIT_DCS_CMD(0xDE, 0x2A), - INIT_DCS_CMD(0xCA, 0x43), - INIT_DCS_CMD(0xC9, 0x07), - INIT_DCS_CMD(0xE4, 0xC0), - INIT_DCS_CMD(0xE5, 0x0D), - INIT_DCS_CMD(0xCB, 0x00), - INIT_DCS_CMD(0xB0, 0x06), - INIT_DCS_CMD(0xB8, 0xA5), - INIT_DCS_CMD(0xC0, 0xA5), - INIT_DCS_CMD(0xC7, 0x0F), - INIT_DCS_CMD(0xD5, 0x32), - INIT_DCS_CMD(0xB8, 0x00), - INIT_DCS_CMD(0xC0, 0x00), - INIT_DCS_CMD(0xBC, 0x00), - INIT_DCS_CMD(0xB0, 0x07), - INIT_DCS_CMD(0xB1, 0x00), - INIT_DCS_CMD(0xB2, 0x02), - INIT_DCS_CMD(0xB3, 0x0F), - INIT_DCS_CMD(0xB4, 0x25), - INIT_DCS_CMD(0xB5, 0x39), - INIT_DCS_CMD(0xB6, 0x4E), - INIT_DCS_CMD(0xB7, 0x72), - INIT_DCS_CMD(0xB8, 0x97), - INIT_DCS_CMD(0xB9, 0xDC), - INIT_DCS_CMD(0xBA, 0x22), - INIT_DCS_CMD(0xBB, 0xA4), - INIT_DCS_CMD(0xBC, 0x2B), - INIT_DCS_CMD(0xBD, 0x2F), - INIT_DCS_CMD(0xBE, 0xA9), - INIT_DCS_CMD(0xBF, 0x25), - INIT_DCS_CMD(0xC0, 0x61), - INIT_DCS_CMD(0xC1, 0x97), - INIT_DCS_CMD(0xC2, 0xB2), - INIT_DCS_CMD(0xC3, 0xCD), - INIT_DCS_CMD(0xC4, 0xD9), - INIT_DCS_CMD(0xC5, 0xE7), - INIT_DCS_CMD(0xC6, 0xF4), - INIT_DCS_CMD(0xC7, 0xFA), - INIT_DCS_CMD(0xC8, 0xFC), - INIT_DCS_CMD(0xC9, 0x00), - INIT_DCS_CMD(0xCA, 0x00), - INIT_DCS_CMD(0xCB, 0x16), - INIT_DCS_CMD(0xCC, 0xAF), - INIT_DCS_CMD(0xCD, 0xFF), - INIT_DCS_CMD(0xCE, 0xFF), - INIT_DCS_CMD(0xB0, 0x08), - INIT_DCS_CMD(0xB1, 0x04), - INIT_DCS_CMD(0xB2, 0x05), - INIT_DCS_CMD(0xB3, 0x11), - INIT_DCS_CMD(0xB4, 0x24), - INIT_DCS_CMD(0xB5, 0x39), - INIT_DCS_CMD(0xB6, 0x4F), - INIT_DCS_CMD(0xB7, 0x72), - INIT_DCS_CMD(0xB8, 0x98), - INIT_DCS_CMD(0xB9, 0xDC), - INIT_DCS_CMD(0xBA, 0x23), - INIT_DCS_CMD(0xBB, 0xA6), - INIT_DCS_CMD(0xBC, 0x2C), - INIT_DCS_CMD(0xBD, 0x30), - INIT_DCS_CMD(0xBE, 0xAA), - INIT_DCS_CMD(0xBF, 0x26), - INIT_DCS_CMD(0xC0, 0x62), - INIT_DCS_CMD(0xC1, 0x9B), - INIT_DCS_CMD(0xC2, 0xB5), - INIT_DCS_CMD(0xC3, 0xCF), - INIT_DCS_CMD(0xC4, 0xDB), - INIT_DCS_CMD(0xC5, 0xE8), - INIT_DCS_CMD(0xC6, 0xF5), - INIT_DCS_CMD(0xC7, 0xFA), - INIT_DCS_CMD(0xC8, 0xFC), - INIT_DCS_CMD(0xC9, 0x00), - INIT_DCS_CMD(0xCA, 0x00), - INIT_DCS_CMD(0xCB, 0x16), - INIT_DCS_CMD(0xCC, 0xAF), - INIT_DCS_CMD(0xCD, 0xFF), - INIT_DCS_CMD(0xCE, 0xFF), - INIT_DCS_CMD(0xB0, 0x09), - INIT_DCS_CMD(0xB1, 0x04), - INIT_DCS_CMD(0xB2, 0x02), - INIT_DCS_CMD(0xB3, 0x16), - INIT_DCS_CMD(0xB4, 0x24), - INIT_DCS_CMD(0xB5, 0x3B), - INIT_DCS_CMD(0xB6, 0x4F), - INIT_DCS_CMD(0xB7, 0x73), - INIT_DCS_CMD(0xB8, 0x99), - INIT_DCS_CMD(0xB9, 0xE0), - INIT_DCS_CMD(0xBA, 0x26), - INIT_DCS_CMD(0xBB, 0xAD), - INIT_DCS_CMD(0xBC, 0x36), - INIT_DCS_CMD(0xBD, 0x3A), - INIT_DCS_CMD(0xBE, 0xAE), - INIT_DCS_CMD(0xBF, 0x2A), - INIT_DCS_CMD(0xC0, 0x66), - INIT_DCS_CMD(0xC1, 0x9E), - INIT_DCS_CMD(0xC2, 0xB8), - INIT_DCS_CMD(0xC3, 0xD1), - INIT_DCS_CMD(0xC4, 0xDD), - INIT_DCS_CMD(0xC5, 0xE9), - INIT_DCS_CMD(0xC6, 0xF6), - INIT_DCS_CMD(0xC7, 0xFA), - INIT_DCS_CMD(0xC8, 0xFC), - INIT_DCS_CMD(0xC9, 0x00), - INIT_DCS_CMD(0xCA, 0x00), - INIT_DCS_CMD(0xCB, 0x16), - INIT_DCS_CMD(0xCC, 0xAF), - INIT_DCS_CMD(0xCD, 0xFF), - INIT_DCS_CMD(0xCE, 0xFF), - INIT_DCS_CMD(0xB0, 0x0A), - INIT_DCS_CMD(0xB1, 0x00), - INIT_DCS_CMD(0xB2, 0x02), - INIT_DCS_CMD(0xB3, 0x0F), - INIT_DCS_CMD(0xB4, 0x25), - INIT_DCS_CMD(0xB5, 0x39), - INIT_DCS_CMD(0xB6, 0x4E), - INIT_DCS_CMD(0xB7, 0x72), - INIT_DCS_CMD(0xB8, 0x97), - INIT_DCS_CMD(0xB9, 0xDC), - INIT_DCS_CMD(0xBA, 0x22), - INIT_DCS_CMD(0xBB, 0xA4), - INIT_DCS_CMD(0xBC, 0x2B), - INIT_DCS_CMD(0xBD, 0x2F), - INIT_DCS_CMD(0xBE, 0xA9), - INIT_DCS_CMD(0xBF, 0x25), - INIT_DCS_CMD(0xC0, 0x61), - INIT_DCS_CMD(0xC1, 0x97), - INIT_DCS_CMD(0xC2, 0xB2), - INIT_DCS_CMD(0xC3, 0xCD), - INIT_DCS_CMD(0xC4, 0xD9), - INIT_DCS_CMD(0xC5, 0xE7), - INIT_DCS_CMD(0xC6, 0xF4), - INIT_DCS_CMD(0xC7, 0xFA), - INIT_DCS_CMD(0xC8, 0xFC), - INIT_DCS_CMD(0xC9, 0x00), - INIT_DCS_CMD(0xCA, 0x00), - INIT_DCS_CMD(0xCB, 0x16), - INIT_DCS_CMD(0xCC, 0xAF), - INIT_DCS_CMD(0xCD, 0xFF), - INIT_DCS_CMD(0xCE, 0xFF), - INIT_DCS_CMD(0xB0, 0x0B), - INIT_DCS_CMD(0xB1, 0x04), - INIT_DCS_CMD(0xB2, 0x05), - INIT_DCS_CMD(0xB3, 0x11), - INIT_DCS_CMD(0xB4, 0x24), - INIT_DCS_CMD(0xB5, 0x39), - INIT_DCS_CMD(0xB6, 0x4F), - INIT_DCS_CMD(0xB7, 0x72), - INIT_DCS_CMD(0xB8, 0x98), - INIT_DCS_CMD(0xB9, 0xDC), - INIT_DCS_CMD(0xBA, 0x23), - INIT_DCS_CMD(0xBB, 0xA6), - INIT_DCS_CMD(0xBC, 0x2C), - INIT_DCS_CMD(0xBD, 0x30), - INIT_DCS_CMD(0xBE, 0xAA), - INIT_DCS_CMD(0xBF, 0x26), - INIT_DCS_CMD(0xC0, 0x62), - INIT_DCS_CMD(0xC1, 0x9B), - INIT_DCS_CMD(0xC2, 0xB5), - INIT_DCS_CMD(0xC3, 0xCF), - INIT_DCS_CMD(0xC4, 0xDB), - INIT_DCS_CMD(0xC5, 0xE8), - INIT_DCS_CMD(0xC6, 0xF5), - INIT_DCS_CMD(0xC7, 0xFA), - INIT_DCS_CMD(0xC8, 0xFC), - INIT_DCS_CMD(0xC9, 0x00), - INIT_DCS_CMD(0xCA, 0x00), - INIT_DCS_CMD(0xCB, 0x16), - INIT_DCS_CMD(0xCC, 0xAF), - INIT_DCS_CMD(0xCD, 0xFF), - INIT_DCS_CMD(0xCE, 0xFF), - INIT_DCS_CMD(0xB0, 0x0C), - INIT_DCS_CMD(0xB1, 0x04), - INIT_DCS_CMD(0xB2, 0x02), - INIT_DCS_CMD(0xB3, 0x16), - INIT_DCS_CMD(0xB4, 0x24), - INIT_DCS_CMD(0xB5, 0x3B), - INIT_DCS_CMD(0xB6, 0x4F), - INIT_DCS_CMD(0xB7, 0x73), - INIT_DCS_CMD(0xB8, 0x99), - INIT_DCS_CMD(0xB9, 0xE0), - INIT_DCS_CMD(0xBA, 0x26), - INIT_DCS_CMD(0xBB, 0xAD), - INIT_DCS_CMD(0xBC, 0x36), - INIT_DCS_CMD(0xBD, 0x3A), - INIT_DCS_CMD(0xBE, 0xAE), - INIT_DCS_CMD(0xBF, 0x2A), - INIT_DCS_CMD(0xC0, 0x66), - INIT_DCS_CMD(0xC1, 0x9E), - INIT_DCS_CMD(0xC2, 0xB8), - INIT_DCS_CMD(0xC3, 0xD1), - INIT_DCS_CMD(0xC4, 0xDD), - INIT_DCS_CMD(0xC5, 0xE9), - INIT_DCS_CMD(0xC6, 0xF6), - INIT_DCS_CMD(0xC7, 0xFA), - INIT_DCS_CMD(0xC8, 0xFC), - INIT_DCS_CMD(0xC9, 0x00), - INIT_DCS_CMD(0xCA, 0x00), - INIT_DCS_CMD(0xCB, 0x16), - INIT_DCS_CMD(0xCC, 0xAF), - INIT_DCS_CMD(0xCD, 0xFF), - INIT_DCS_CMD(0xCE, 0xFF), - INIT_DCS_CMD(0xB0, 0x00), - INIT_DCS_CMD(0xB3, 0x08), - INIT_DCS_CMD(0xB0, 0x04), - INIT_DCS_CMD(0xB8, 0x68), - INIT_DELAY_CMD(150), - INIT_END_CMD, - }, -}; - -static struct panel_description *kodama_panels[] = { - [2] = &BOE_TV101WUM_N53, +static const char * const kodama_panels[] = { + [2] = "BOE_TV101WUM_N53", }; struct panel_description *get_panel_description(int panel_id) { - if (panel_id < 0 || panel_id >= ARRAY_SIZE(kodama_panels)) - return NULL; - return kodama_panels[panel_id]; + return get_panel_from_cbfs(panel_id, kodama_panels, + ARRAY_SIZE(kodama_panels)); } diff --git a/src/mainboard/google/kukui/panel_krane.c b/src/mainboard/google/kukui/panel_krane.c index 0562820..16c1918 100644 --- a/src/mainboard/google/kukui/panel_krane.c +++ b/src/mainboard/google/kukui/panel_krane.c @@ -15,359 +15,14 @@ #include "panel.h" -static struct panel_description AUO_KD101N80_45NA = { - .edid = { - .ascii_string = "KD101N80-45NA", - .manufacturer_name = "AUO", - .panel_bits_per_color = 8, - .panel_bits_per_pixel = 24, - .mode = { - .name = "1200x1920@60Hz", - .pixel_clock = 157000, - .lvds_dual_channel = 0, - .refresh = 60, - .ha = 1200, .hbl = 140, .hso = 80, .hspw = 24, - .va = 1920, .vbl = 36, .vso = 16, .vspw = 4, - .phsync = '-', .pvsync = '-', - .x_mm = 135, .y_mm = 216, - }, - }, - .orientation = LB_FB_ORIENTATION_LEFT_UP, - .init = { - INIT_DELAY_CMD(10), - INIT_DCS_CMD(0x11), - INIT_DELAY_CMD(120), - INIT_DCS_CMD(0x29), - INIT_DELAY_CMD(20), - INIT_END_CMD, - }, -}; - -static struct panel_description BOE_TV101WUM_NL6 = { - .edid = { - .ascii_string = "TV101WUM-NL6", - .manufacturer_name = "BOE", - .panel_bits_per_color = 8, - .panel_bits_per_pixel = 24, - .mode = { - .name = "1200x1920@60Hz", - .pixel_clock = 159425, - .lvds_dual_channel = 0, - .refresh = 60, - .ha = 1200, .hbl = 164, .hso = 100, .hspw = 24, - .va = 1920, .vbl = 28, .vso = 10, .vspw = 4, - .phsync = '-', .pvsync = '-', - .x_mm = 135, .y_mm = 216, - }, - }, - .orientation = LB_FB_ORIENTATION_LEFT_UP, - .init = { - INIT_DELAY_CMD(24), - INIT_DCS_CMD(0xB0, 0x05), - INIT_DCS_CMD(0xB1, 0xE5), - INIT_DCS_CMD(0xB3, 0x52), - INIT_DCS_CMD(0xB0, 0x00), - INIT_DCS_CMD(0xB3, 0x88), - INIT_DCS_CMD(0xB0, 0x04), - INIT_DCS_CMD(0xB8, 0x00), - INIT_DCS_CMD(0xB0, 0x00), - INIT_DCS_CMD(0xB6, 0x03), - INIT_DCS_CMD(0xBA, 0x8B), - INIT_DCS_CMD(0xBF, 0x1A), - INIT_DCS_CMD(0xC0, 0x0F), - INIT_DCS_CMD(0xC2, 0x0C), - INIT_DCS_CMD(0xC3, 0x02), - INIT_DCS_CMD(0xC4, 0x0C), - INIT_DCS_CMD(0xC5, 0x02), - INIT_DCS_CMD(0xB0, 0x01), - INIT_DCS_CMD(0xE0, 0x26), - INIT_DCS_CMD(0xE1, 0x26), - INIT_DCS_CMD(0xDC, 0x00), - INIT_DCS_CMD(0xDD, 0x00), - INIT_DCS_CMD(0xCC, 0x26), - INIT_DCS_CMD(0xCD, 0x26), - INIT_DCS_CMD(0xC8, 0x00), - INIT_DCS_CMD(0xC9, 0x00), - INIT_DCS_CMD(0xD2, 0x03), - INIT_DCS_CMD(0xD3, 0x03), - INIT_DCS_CMD(0xE6, 0x04), - INIT_DCS_CMD(0xE7, 0x04), - INIT_DCS_CMD(0xC4, 0x09), - INIT_DCS_CMD(0xC5, 0x09), - INIT_DCS_CMD(0xD8, 0x0A), - INIT_DCS_CMD(0xD9, 0x0A), - INIT_DCS_CMD(0xC2, 0x0B), - INIT_DCS_CMD(0xC3, 0x0B), - INIT_DCS_CMD(0xD6, 0x0C), - INIT_DCS_CMD(0xD7, 0x0C), - INIT_DCS_CMD(0xC0, 0x05), - INIT_DCS_CMD(0xC1, 0x05), - INIT_DCS_CMD(0xD4, 0x06), - INIT_DCS_CMD(0xD5, 0x06), - INIT_DCS_CMD(0xCA, 0x07), - INIT_DCS_CMD(0xCB, 0x07), - INIT_DCS_CMD(0xDE, 0x08), - INIT_DCS_CMD(0xDF, 0x08), - INIT_DCS_CMD(0xB0, 0x02), - INIT_DCS_CMD(0xC0, 0x00), - INIT_DCS_CMD(0xC1, 0x0D), - INIT_DCS_CMD(0xC2, 0x17), - INIT_DCS_CMD(0xC3, 0x26), - INIT_DCS_CMD(0xC4, 0x31), - INIT_DCS_CMD(0xC5, 0x1C), - INIT_DCS_CMD(0xC6, 0x2C), - INIT_DCS_CMD(0xC7, 0x33), - INIT_DCS_CMD(0xC8, 0x31), - INIT_DCS_CMD(0xC9, 0x37), - INIT_DCS_CMD(0xCA, 0x37), - INIT_DCS_CMD(0xCB, 0x37), - INIT_DCS_CMD(0xCC, 0x39), - INIT_DCS_CMD(0xCD, 0x2E), - INIT_DCS_CMD(0xCE, 0x2F), - INIT_DCS_CMD(0xCF, 0x2F), - INIT_DCS_CMD(0xD0, 0x07), - INIT_DCS_CMD(0xD2, 0x00), - INIT_DCS_CMD(0xD3, 0x0D), - INIT_DCS_CMD(0xD4, 0x17), - INIT_DCS_CMD(0xD5, 0x26), - INIT_DCS_CMD(0xD6, 0x31), - INIT_DCS_CMD(0xD7, 0x3F), - INIT_DCS_CMD(0xD8, 0x3F), - INIT_DCS_CMD(0xD9, 0x3F), - INIT_DCS_CMD(0xDA, 0x3F), - INIT_DCS_CMD(0xDB, 0x37), - INIT_DCS_CMD(0xDC, 0x37), - INIT_DCS_CMD(0xDD, 0x37), - INIT_DCS_CMD(0xDE, 0x39), - INIT_DCS_CMD(0xDF, 0x2E), - INIT_DCS_CMD(0xE0, 0x2F), - INIT_DCS_CMD(0xE1, 0x2F), - INIT_DCS_CMD(0xE2, 0x07), - INIT_DCS_CMD(0xB0, 0x03), - INIT_DCS_CMD(0xC8, 0x0B), - INIT_DCS_CMD(0xC9, 0x07), - INIT_DCS_CMD(0xC3, 0x00), - INIT_DCS_CMD(0xE7, 0x00), - INIT_DCS_CMD(0xC5, 0x2A), - INIT_DCS_CMD(0xDE, 0x2A), - INIT_DCS_CMD(0xCA, 0x43), - INIT_DCS_CMD(0xC9, 0x07), - INIT_DCS_CMD(0xE4, 0xC0), - INIT_DCS_CMD(0xE5, 0x0D), - INIT_DCS_CMD(0xCB, 0x00), - INIT_DCS_CMD(0xB0, 0x06), - INIT_DCS_CMD(0xB8, 0xA5), - INIT_DCS_CMD(0xC0, 0xA5), - INIT_DCS_CMD(0xC7, 0x0F), - INIT_DCS_CMD(0xD5, 0x32), - INIT_DCS_CMD(0xB8, 0x00), - INIT_DCS_CMD(0xC0, 0x00), - INIT_DCS_CMD(0xBC, 0x00), - INIT_DCS_CMD(0xB0, 0x07), - INIT_DCS_CMD(0xB1, 0x00), - INIT_DCS_CMD(0xB2, 0x02), - INIT_DCS_CMD(0xB3, 0x0F), - INIT_DCS_CMD(0xB4, 0x25), - INIT_DCS_CMD(0xB5, 0x39), - INIT_DCS_CMD(0xB6, 0x4E), - INIT_DCS_CMD(0xB7, 0x72), - INIT_DCS_CMD(0xB8, 0x97), - INIT_DCS_CMD(0xB9, 0xDC), - INIT_DCS_CMD(0xBA, 0x22), - INIT_DCS_CMD(0xBB, 0xA4), - INIT_DCS_CMD(0xBC, 0x2B), - INIT_DCS_CMD(0xBD, 0x2F), - INIT_DCS_CMD(0xBE, 0xA9), - INIT_DCS_CMD(0xBF, 0x25), - INIT_DCS_CMD(0xC0, 0x61), - INIT_DCS_CMD(0xC1, 0x97), - INIT_DCS_CMD(0xC2, 0xB2), - INIT_DCS_CMD(0xC3, 0xCD), - INIT_DCS_CMD(0xC4, 0xD9), - INIT_DCS_CMD(0xC5, 0xE7), - INIT_DCS_CMD(0xC6, 0xF4), - INIT_DCS_CMD(0xC7, 0xFA), - INIT_DCS_CMD(0xC8, 0xFC), - INIT_DCS_CMD(0xC9, 0x00), - INIT_DCS_CMD(0xCA, 0x00), - INIT_DCS_CMD(0xCB, 0x16), - INIT_DCS_CMD(0xCC, 0xAF), - INIT_DCS_CMD(0xCD, 0xFF), - INIT_DCS_CMD(0xCE, 0xFF), - INIT_DCS_CMD(0xB0, 0x08), - INIT_DCS_CMD(0xB1, 0x04), - INIT_DCS_CMD(0xB2, 0x05), - INIT_DCS_CMD(0xB3, 0x11), - INIT_DCS_CMD(0xB4, 0x24), - INIT_DCS_CMD(0xB5, 0x39), - INIT_DCS_CMD(0xB6, 0x4F), - INIT_DCS_CMD(0xB7, 0x72), - INIT_DCS_CMD(0xB8, 0x98), - INIT_DCS_CMD(0xB9, 0xDC), - INIT_DCS_CMD(0xBA, 0x23), - INIT_DCS_CMD(0xBB, 0xA6), - INIT_DCS_CMD(0xBC, 0x2C), - INIT_DCS_CMD(0xBD, 0x30), - INIT_DCS_CMD(0xBE, 0xAA), - INIT_DCS_CMD(0xBF, 0x26), - INIT_DCS_CMD(0xC0, 0x62), - INIT_DCS_CMD(0xC1, 0x9B), - INIT_DCS_CMD(0xC2, 0xB5), - INIT_DCS_CMD(0xC3, 0xCF), - INIT_DCS_CMD(0xC4, 0xDB), - INIT_DCS_CMD(0xC5, 0xE8), - INIT_DCS_CMD(0xC6, 0xF5), - INIT_DCS_CMD(0xC7, 0xFA), - INIT_DCS_CMD(0xC8, 0xFC), - INIT_DCS_CMD(0xC9, 0x00), - INIT_DCS_CMD(0xCA, 0x00), - INIT_DCS_CMD(0xCB, 0x16), - INIT_DCS_CMD(0xCC, 0xAF), - INIT_DCS_CMD(0xCD, 0xFF), - INIT_DCS_CMD(0xCE, 0xFF), - INIT_DCS_CMD(0xB0, 0x09), - INIT_DCS_CMD(0xB1, 0x04), - INIT_DCS_CMD(0xB2, 0x02), - INIT_DCS_CMD(0xB3, 0x16), - INIT_DCS_CMD(0xB4, 0x24), - INIT_DCS_CMD(0xB5, 0x3B), - INIT_DCS_CMD(0xB6, 0x4F), - INIT_DCS_CMD(0xB7, 0x73), - INIT_DCS_CMD(0xB8, 0x99), - INIT_DCS_CMD(0xB9, 0xE0), - INIT_DCS_CMD(0xBA, 0x26), - INIT_DCS_CMD(0xBB, 0xAD), - INIT_DCS_CMD(0xBC, 0x36), - INIT_DCS_CMD(0xBD, 0x3A), - INIT_DCS_CMD(0xBE, 0xAE), - INIT_DCS_CMD(0xBF, 0x2A), - INIT_DCS_CMD(0xC0, 0x66), - INIT_DCS_CMD(0xC1, 0x9E), - INIT_DCS_CMD(0xC2, 0xB8), - INIT_DCS_CMD(0xC3, 0xD1), - INIT_DCS_CMD(0xC4, 0xDD), - INIT_DCS_CMD(0xC5, 0xE9), - INIT_DCS_CMD(0xC6, 0xF6), - INIT_DCS_CMD(0xC7, 0xFA), - INIT_DCS_CMD(0xC8, 0xFC), - INIT_DCS_CMD(0xC9, 0x00), - INIT_DCS_CMD(0xCA, 0x00), - INIT_DCS_CMD(0xCB, 0x16), - INIT_DCS_CMD(0xCC, 0xAF), - INIT_DCS_CMD(0xCD, 0xFF), - INIT_DCS_CMD(0xCE, 0xFF), - INIT_DCS_CMD(0xB0, 0x0A), - INIT_DCS_CMD(0xB1, 0x00), - INIT_DCS_CMD(0xB2, 0x02), - INIT_DCS_CMD(0xB3, 0x0F), - INIT_DCS_CMD(0xB4, 0x25), - INIT_DCS_CMD(0xB5, 0x39), - INIT_DCS_CMD(0xB6, 0x4E), - INIT_DCS_CMD(0xB7, 0x72), - INIT_DCS_CMD(0xB8, 0x97), - INIT_DCS_CMD(0xB9, 0xDC), - INIT_DCS_CMD(0xBA, 0x22), - INIT_DCS_CMD(0xBB, 0xA4), - INIT_DCS_CMD(0xBC, 0x2B), - INIT_DCS_CMD(0xBD, 0x2F), - INIT_DCS_CMD(0xBE, 0xA9), - INIT_DCS_CMD(0xBF, 0x25), - INIT_DCS_CMD(0xC0, 0x61), - INIT_DCS_CMD(0xC1, 0x97), - INIT_DCS_CMD(0xC2, 0xB2), - INIT_DCS_CMD(0xC3, 0xCD), - INIT_DCS_CMD(0xC4, 0xD9), - INIT_DCS_CMD(0xC5, 0xE7), - INIT_DCS_CMD(0xC6, 0xF4), - INIT_DCS_CMD(0xC7, 0xFA), - INIT_DCS_CMD(0xC8, 0xFC), - INIT_DCS_CMD(0xC9, 0x00), - INIT_DCS_CMD(0xCA, 0x00), - INIT_DCS_CMD(0xCB, 0x16), - INIT_DCS_CMD(0xCC, 0xAF), - INIT_DCS_CMD(0xCD, 0xFF), - INIT_DCS_CMD(0xCE, 0xFF), - INIT_DCS_CMD(0xB0, 0x0B), - INIT_DCS_CMD(0xB1, 0x04), - INIT_DCS_CMD(0xB2, 0x05), - INIT_DCS_CMD(0xB3, 0x11), - INIT_DCS_CMD(0xB4, 0x24), - INIT_DCS_CMD(0xB5, 0x39), - INIT_DCS_CMD(0xB6, 0x4F), - INIT_DCS_CMD(0xB7, 0x72), - INIT_DCS_CMD(0xB8, 0x98), - INIT_DCS_CMD(0xB9, 0xDC), - INIT_DCS_CMD(0xBA, 0x23), - INIT_DCS_CMD(0xBB, 0xA6), - INIT_DCS_CMD(0xBC, 0x2C), - INIT_DCS_CMD(0xBD, 0x30), - INIT_DCS_CMD(0xBE, 0xAA), - INIT_DCS_CMD(0xBF, 0x26), - INIT_DCS_CMD(0xC0, 0x62), - INIT_DCS_CMD(0xC1, 0x9B), - INIT_DCS_CMD(0xC2, 0xB5), - INIT_DCS_CMD(0xC3, 0xCF), - INIT_DCS_CMD(0xC4, 0xDB), - INIT_DCS_CMD(0xC5, 0xE8), - INIT_DCS_CMD(0xC6, 0xF5), - INIT_DCS_CMD(0xC7, 0xFA), - INIT_DCS_CMD(0xC8, 0xFC), - INIT_DCS_CMD(0xC9, 0x00), - INIT_DCS_CMD(0xCA, 0x00), - INIT_DCS_CMD(0xCB, 0x16), - INIT_DCS_CMD(0xCC, 0xAF), - INIT_DCS_CMD(0xCD, 0xFF), - INIT_DCS_CMD(0xCE, 0xFF), - INIT_DCS_CMD(0xB0, 0x0C), - INIT_DCS_CMD(0xB1, 0x04), - INIT_DCS_CMD(0xB2, 0x02), - INIT_DCS_CMD(0xB3, 0x16), - INIT_DCS_CMD(0xB4, 0x24), - INIT_DCS_CMD(0xB5, 0x3B), - INIT_DCS_CMD(0xB6, 0x4F), - INIT_DCS_CMD(0xB7, 0x73), - INIT_DCS_CMD(0xB8, 0x99), - INIT_DCS_CMD(0xB9, 0xE0), - INIT_DCS_CMD(0xBA, 0x26), - INIT_DCS_CMD(0xBB, 0xAD), - INIT_DCS_CMD(0xBC, 0x36), - INIT_DCS_CMD(0xBD, 0x3A), - INIT_DCS_CMD(0xBE, 0xAE), - INIT_DCS_CMD(0xBF, 0x2A), - INIT_DCS_CMD(0xC0, 0x66), - INIT_DCS_CMD(0xC1, 0x9E), - INIT_DCS_CMD(0xC2, 0xB8), - INIT_DCS_CMD(0xC3, 0xD1), - INIT_DCS_CMD(0xC4, 0xDD), - INIT_DCS_CMD(0xC5, 0xE9), - INIT_DCS_CMD(0xC6, 0xF6), - INIT_DCS_CMD(0xC7, 0xFA), - INIT_DCS_CMD(0xC8, 0xFC), - INIT_DCS_CMD(0xC9, 0x00), - INIT_DCS_CMD(0xCA, 0x00), - INIT_DCS_CMD(0xCB, 0x16), - INIT_DCS_CMD(0xCC, 0xAF), - INIT_DCS_CMD(0xCD, 0xFF), - INIT_DCS_CMD(0xCE, 0xFF), - INIT_DCS_CMD(0xB0, 0x00), - INIT_DCS_CMD(0xB3, 0x08), - INIT_DCS_CMD(0xB0, 0x04), - INIT_DCS_CMD(0xB8, 0x68), - INIT_DELAY_CMD(150), - INIT_END_CMD, - }, -}; - -static struct panel_description *krane_panels[] = { - [0] = &AUO_KD101N80_45NA, - [1] = &BOE_TV101WUM_NL6, /* Only for Rev 3 units, can be reused. */ - [11] = &BOE_TV101WUM_NL6, +static const char * const krane_panels[] = { + [0] = "AUO_KD101N80_45NA", + [1] = "BOE_TV101WUM_NL6", /* Only for Rev 3, can be reused. */ + [11] = "BOE_TV101WUM_NL6", }; struct panel_description *get_panel_description(int panel_id) { - /* TODO(hungte): Move the configs into CBFS and load dynamically. */ - if (panel_id < 0 || panel_id >= ARRAY_SIZE(krane_panels)) - return NULL; - return krane_panels[panel_id]; + return get_panel_from_cbfs(panel_id, krane_panels, + ARRAY_SIZE(krane_panels)); } diff --git a/src/mainboard/google/kukui/panel_kukui.c b/src/mainboard/google/kukui/panel_kukui.c index a154185..04c4999 100644 --- a/src/mainboard/google/kukui/panel_kukui.c +++ b/src/mainboard/google/kukui/panel_kukui.c @@ -36,82 +36,19 @@ mdelay(20); } -static struct panel_description P097PFG_SSD2858 = { - .power_on = power_on_ssd2858, - .edid = { - .ascii_string = "P097PFG", - .manufacturer_name = "CMN", - .panel_bits_per_color = 8, - .panel_bits_per_pixel = 24, - .mode = { - .name = "1536x2048@60Hz", - .pixel_clock = 211660, - .lvds_dual_channel = 0, - .refresh = 60, - .ha = 1536, .hbl = 160, .hso = 140, .hspw = 10, - .va = 2048, .vbl = 32, .vso = 20, .vspw = 2, - .phsync = '-', .pvsync = '-', - .x_mm = 147, .y_mm = 196, - }, - }, - .orientation = LB_FB_ORIENTATION_NORMAL, - .init = { - INIT_GENERIC_CMD(0xff, 0x00), - /* LOCKCNT=0x1f4, MRX=0, POSTDIV=1 (/2} }, MULT=0x49 - * 27 Mhz => 985.5 Mhz */ - INIT_GENERIC_CMD(0x00, 0x08, 0x01, 0xf4, 0x01, 0x49), - /* MTXDIV=1, SYSDIV=3 (=> 4) */ - INIT_GENERIC_CMD(0x00, 0x0c, 0x00, 0x00, 0x00, 0x03), - /* MTXVPF=24bpp, MRXLS=4 lanes, MRXVB=bypass, MRXECC=1, - * MRXEOT=1, MRXEE=1 */ - INIT_GENERIC_CMD(0x00, 0x14, 0x0c, 0x3d, 0x80, 0x0f), - INIT_GENERIC_CMD(0x00, 0x20, 0x15, 0x92, 0x56, 0x7d), - INIT_GENERIC_CMD(0x00, 0x24, 0x00, 0x00, 0x30, 0x00), - - INIT_GENERIC_CMD(0x10, 0x08, 0x01, 0x20, 0x08, 0x45), - INIT_GENERIC_CMD(0x10, 0x1c, 0x00, 0x00, 0x00, 0x00), - INIT_GENERIC_CMD(0x20, 0x0c, 0x00, 0x00, 0x00, 0x04), - /* Pixel clock 985.5 Mhz * 0x49/0x4b = 959 Mhz */ - INIT_GENERIC_CMD(0x20, 0x10, 0x00, 0x4b, 0x00, 0x49), - INIT_GENERIC_CMD(0x20, 0xa0, 0x00, 0x00, 0x00, 0x00), - /* EOT=1, LPE = 0, LSOUT=4 lanes, LPD=25 */ - INIT_GENERIC_CMD(0x60, 0x08, 0x00, 0xd9, 0x00, 0x08), - INIT_GENERIC_CMD(0x60, 0x14, 0x01, 0x00, 0x01, 0x06), - /* DSI0 enable (default: probably not needed) */ - INIT_GENERIC_CMD(0x60, 0x80, 0x00, 0x00, 0x00, 0x0f), - /* DSI1 enable */ - INIT_GENERIC_CMD(0x60, 0xa0, 0x00, 0x00, 0x00, 0x0f), - - /* HSA=0x18, VSA=0x02, HBP=0x50, VBP=0x0c */ - INIT_GENERIC_CMD(0x60, 0x0c, 0x0c, 0x50, 0x02, 0x18), - /* VACT= 0x800 (2048} }, VFP= 0x14, HFP=0x50 */ - INIT_GENERIC_CMD(0x60, 0x10, 0x08, 0x00, 0x14, 0x50), - /* HACT=0x300 (768) */ - INIT_GENERIC_CMD(0x60, 0x84, 0x00, 0x00, 0x03, 0x00), - INIT_GENERIC_CMD(0x60, 0xa4, 0x00, 0x00, 0x03, 0x00), - - /* Take panel out of sleep. */ - INIT_GENERIC_CMD(0xff, 0x01), - INIT_DCS_CMD(0x11), - INIT_DELAY_CMD(120), - INIT_DCS_CMD(0x29), - INIT_DELAY_CMD(20), - INIT_GENERIC_CMD(0xff, 0x00), - - INIT_DELAY_CMD(120), - INIT_DCS_CMD(0x11), - INIT_DELAY_CMD(120), - INIT_DCS_CMD(0x29), - INIT_DELAY_CMD(20), - INIT_END_CMD, - }, +static const char * const kukui_panels[] = { + [0] = "CMN_P097PFG_SSD2858", }; struct panel_description *get_panel_description(int panel_id) { - /* The Innolux panel before P2 is no longer supported. */ + /* The Innolux panel before Rev2 is no longer supported. */ if (board_id() < 2) return NULL; - return &P097PFG_SSD2858; + struct panel_description *desc = get_panel_from_cbfs( + panel_id, kukui_panels, ARRAY_SIZE(kukui_panels)); + if (desc) + desc->power_on = power_on_ssd2858; + return desc; } diff --git a/src/mainboard/google/kukui/panel_params/Makefile.inc b/src/mainboard/google/kukui/panel_params/Makefile.inc new file mode 100644 index 0000000..c42d143 --- /dev/null +++ b/src/mainboard/google/kukui/panel_params/Makefile.inc @@ -0,0 +1,12 @@ +panel-params-y := +panel-params-$(CONFIG_BOARD_GOOGLE_KRANE) += panel-AUO_KD101N80_45NA +panel-params-$(CONFIG_BOARD_GOOGLE_KRANE) += panel-BOE_TV101WUM_NL6 +panel-params-$(CONFIG_BOARD_GOOGLE_KODAMA) += panel-BOE_TV101WUM_N53 +panel-params-$(CONFIG_BOARD_GOOGLE_KUKUI) += panel-CMN_P097PFG_SSD2858 + +$(foreach params,$(panel-params-y), \ + $(eval cbfs-files-y += $(params)) \ + $(eval $(params)-file := $(params).c:struct) \ + $(eval $(params)-type := struct) \ + $(eval $(params)-compression := $(CBFS_COMPRESS_FLAG)) \ +) diff --git a/src/mainboard/google/kukui/panel_params/panel-AUO_KD101N80_45NA.c b/src/mainboard/google/kukui/panel_params/panel-AUO_KD101N80_45NA.c new file mode 100644 index 0000000..1aa51b8 --- /dev/null +++ b/src/mainboard/google/kukui/panel_params/panel-AUO_KD101N80_45NA.c @@ -0,0 +1,44 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Huaqin Telecom Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "../panel.h" + +struct panel_description AUO_KD101N80_45NA = { + .edid = { + .ascii_string = "KD101N80-45NA", + .manufacturer_name = "AUO", + .panel_bits_per_color = 8, + .panel_bits_per_pixel = 24, + .mode = { + .name = "1200x1920@60Hz", + .pixel_clock = 157000, + .lvds_dual_channel = 0, + .refresh = 60, + .ha = 1200, .hbl = 140, .hso = 80, .hspw = 24, + .va = 1920, .vbl = 36, .vso = 16, .vspw = 4, + .phsync = '-', .pvsync = '-', + .x_mm = 135, .y_mm = 216, + }, + }, + .orientation = LB_FB_ORIENTATION_LEFT_UP, + .init = { + INIT_DELAY_CMD(10), + INIT_DCS_CMD(0x11), + INIT_DELAY_CMD(120), + INIT_DCS_CMD(0x29), + INIT_DELAY_CMD(20), + INIT_END_CMD, + }, +}; diff --git a/src/mainboard/google/kukui/panel_params/panel-BOE_TV101WUM_N53.c b/src/mainboard/google/kukui/panel_params/panel-BOE_TV101WUM_N53.c new file mode 100644 index 0000000..091ce88 --- /dev/null +++ b/src/mainboard/google/kukui/panel_params/panel-BOE_TV101WUM_N53.c @@ -0,0 +1,331 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Bitland Tech Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "../panel.h" + +struct panel_description BOE_TV101WUM_N53 = { + .edid = { + .ascii_string = "TV101WUM-N53", + .manufacturer_name = "BOE", + .panel_bits_per_color = 8, + .panel_bits_per_pixel = 24, + .mode = { + .name = "1200x1920@60Hz", + .pixel_clock = 156297, + .lvds_dual_channel = 0, + .refresh = 60, + .ha = 1200, .hbl = 164, .hso = 60, .hspw = 24, + .va = 1920, .vbl = 26, .vso = 14, .vspw = 2, + .phsync = '-', .pvsync = '-', + .x_mm = 135, .y_mm = 216, + }, + }, + .orientation = LB_FB_ORIENTATION_LEFT_UP, + .init = { + INIT_DELAY_CMD(24), + INIT_DCS_CMD(0xB0, 0x05), + INIT_DCS_CMD(0xB1, 0xE5), + INIT_DCS_CMD(0xB3, 0x52), + INIT_DCS_CMD(0xB0, 0x00), + INIT_DCS_CMD(0xB3, 0x88), + INIT_DCS_CMD(0xB0, 0x04), + INIT_DCS_CMD(0xB8, 0x00), + INIT_DCS_CMD(0xB0, 0x00), + INIT_DCS_CMD(0xB6, 0x03), + INIT_DCS_CMD(0xBA, 0x8B), + INIT_DCS_CMD(0xBF, 0x1A), + INIT_DCS_CMD(0xC0, 0x0F), + INIT_DCS_CMD(0xC2, 0x0C), + INIT_DCS_CMD(0xC3, 0x02), + INIT_DCS_CMD(0xC4, 0x0C), + INIT_DCS_CMD(0xC5, 0x02), + INIT_DCS_CMD(0xB0, 0x01), + INIT_DCS_CMD(0xE0, 0x26), + INIT_DCS_CMD(0xE1, 0x26), + INIT_DCS_CMD(0xDC, 0x00), + INIT_DCS_CMD(0xDD, 0x00), + INIT_DCS_CMD(0xCC, 0x26), + INIT_DCS_CMD(0xCD, 0x26), + INIT_DCS_CMD(0xC8, 0x00), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xD2, 0x03), + INIT_DCS_CMD(0xD3, 0x03), + INIT_DCS_CMD(0xE6, 0x04), + INIT_DCS_CMD(0xE7, 0x04), + INIT_DCS_CMD(0xC4, 0x09), + INIT_DCS_CMD(0xC5, 0x09), + INIT_DCS_CMD(0xD8, 0x0A), + INIT_DCS_CMD(0xD9, 0x0A), + INIT_DCS_CMD(0xC2, 0x0B), + INIT_DCS_CMD(0xC3, 0x0B), + INIT_DCS_CMD(0xD6, 0x0C), + INIT_DCS_CMD(0xD7, 0x0C), + INIT_DCS_CMD(0xC0, 0x05), + INIT_DCS_CMD(0xC1, 0x05), + INIT_DCS_CMD(0xD4, 0x06), + INIT_DCS_CMD(0xD5, 0x06), + INIT_DCS_CMD(0xCA, 0x07), + INIT_DCS_CMD(0xCB, 0x07), + INIT_DCS_CMD(0xDE, 0x08), + INIT_DCS_CMD(0xDF, 0x08), + INIT_DCS_CMD(0xB0, 0x02), + INIT_DCS_CMD(0xC0, 0x00), + INIT_DCS_CMD(0xC1, 0x0D), + INIT_DCS_CMD(0xC2, 0x17), + INIT_DCS_CMD(0xC3, 0x26), + INIT_DCS_CMD(0xC4, 0x31), + INIT_DCS_CMD(0xC5, 0x1C), + INIT_DCS_CMD(0xC6, 0x2C), + INIT_DCS_CMD(0xC7, 0x33), + INIT_DCS_CMD(0xC8, 0x31), + INIT_DCS_CMD(0xC9, 0x37), + INIT_DCS_CMD(0xCA, 0x37), + INIT_DCS_CMD(0xCB, 0x37), + INIT_DCS_CMD(0xCC, 0x39), + INIT_DCS_CMD(0xCD, 0x2E), + INIT_DCS_CMD(0xCE, 0x2F), + INIT_DCS_CMD(0xCF, 0x2F), + INIT_DCS_CMD(0xD0, 0x07), + INIT_DCS_CMD(0xD2, 0x00), + INIT_DCS_CMD(0xD3, 0x0D), + INIT_DCS_CMD(0xD4, 0x17), + INIT_DCS_CMD(0xD5, 0x26), + INIT_DCS_CMD(0xD6, 0x31), + INIT_DCS_CMD(0xD7, 0x3F), + INIT_DCS_CMD(0xD8, 0x3F), + INIT_DCS_CMD(0xD9, 0x3F), + INIT_DCS_CMD(0xDA, 0x3F), + INIT_DCS_CMD(0xDB, 0x37), + INIT_DCS_CMD(0xDC, 0x37), + INIT_DCS_CMD(0xDD, 0x37), + INIT_DCS_CMD(0xDE, 0x39), + INIT_DCS_CMD(0xDF, 0x2E), + INIT_DCS_CMD(0xE0, 0x2F), + INIT_DCS_CMD(0xE1, 0x2F), + INIT_DCS_CMD(0xE2, 0x07), + INIT_DCS_CMD(0xB0, 0x03), + INIT_DCS_CMD(0xC8, 0x0B), + INIT_DCS_CMD(0xC9, 0x07), + INIT_DCS_CMD(0xC3, 0x00), + INIT_DCS_CMD(0xE7, 0x00), + INIT_DCS_CMD(0xC5, 0x2A), + INIT_DCS_CMD(0xDE, 0x2A), + INIT_DCS_CMD(0xCA, 0x43), + INIT_DCS_CMD(0xC9, 0x07), + INIT_DCS_CMD(0xE4, 0xC0), + INIT_DCS_CMD(0xE5, 0x0D), + INIT_DCS_CMD(0xCB, 0x00), + INIT_DCS_CMD(0xB0, 0x06), + INIT_DCS_CMD(0xB8, 0xA5), + INIT_DCS_CMD(0xC0, 0xA5), + INIT_DCS_CMD(0xC7, 0x0F), + INIT_DCS_CMD(0xD5, 0x32), + INIT_DCS_CMD(0xB8, 0x00), + INIT_DCS_CMD(0xC0, 0x00), + INIT_DCS_CMD(0xBC, 0x00), + INIT_DCS_CMD(0xB0, 0x07), + INIT_DCS_CMD(0xB1, 0x00), + INIT_DCS_CMD(0xB2, 0x02), + INIT_DCS_CMD(0xB3, 0x0F), + INIT_DCS_CMD(0xB4, 0x25), + INIT_DCS_CMD(0xB5, 0x39), + INIT_DCS_CMD(0xB6, 0x4E), + INIT_DCS_CMD(0xB7, 0x72), + INIT_DCS_CMD(0xB8, 0x97), + INIT_DCS_CMD(0xB9, 0xDC), + INIT_DCS_CMD(0xBA, 0x22), + INIT_DCS_CMD(0xBB, 0xA4), + INIT_DCS_CMD(0xBC, 0x2B), + INIT_DCS_CMD(0xBD, 0x2F), + INIT_DCS_CMD(0xBE, 0xA9), + INIT_DCS_CMD(0xBF, 0x25), + INIT_DCS_CMD(0xC0, 0x61), + INIT_DCS_CMD(0xC1, 0x97), + INIT_DCS_CMD(0xC2, 0xB2), + INIT_DCS_CMD(0xC3, 0xCD), + INIT_DCS_CMD(0xC4, 0xD9), + INIT_DCS_CMD(0xC5, 0xE7), + INIT_DCS_CMD(0xC6, 0xF4), + INIT_DCS_CMD(0xC7, 0xFA), + INIT_DCS_CMD(0xC8, 0xFC), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x08), + INIT_DCS_CMD(0xB1, 0x04), + INIT_DCS_CMD(0xB2, 0x05), + INIT_DCS_CMD(0xB3, 0x11), + INIT_DCS_CMD(0xB4, 0x24), + INIT_DCS_CMD(0xB5, 0x39), + INIT_DCS_CMD(0xB6, 0x4F), + INIT_DCS_CMD(0xB7, 0x72), + INIT_DCS_CMD(0xB8, 0x98), + INIT_DCS_CMD(0xB9, 0xDC), + INIT_DCS_CMD(0xBA, 0x23), + INIT_DCS_CMD(0xBB, 0xA6), + INIT_DCS_CMD(0xBC, 0x2C), + INIT_DCS_CMD(0xBD, 0x30), + INIT_DCS_CMD(0xBE, 0xAA), + INIT_DCS_CMD(0xBF, 0x26), + INIT_DCS_CMD(0xC0, 0x62), + INIT_DCS_CMD(0xC1, 0x9B), + INIT_DCS_CMD(0xC2, 0xB5), + INIT_DCS_CMD(0xC3, 0xCF), + INIT_DCS_CMD(0xC4, 0xDB), + INIT_DCS_CMD(0xC5, 0xE8), + INIT_DCS_CMD(0xC6, 0xF5), + INIT_DCS_CMD(0xC7, 0xFA), + INIT_DCS_CMD(0xC8, 0xFC), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x09), + INIT_DCS_CMD(0xB1, 0x04), + INIT_DCS_CMD(0xB2, 0x02), + INIT_DCS_CMD(0xB3, 0x16), + INIT_DCS_CMD(0xB4, 0x24), + INIT_DCS_CMD(0xB5, 0x3B), + INIT_DCS_CMD(0xB6, 0x4F), + INIT_DCS_CMD(0xB7, 0x73), + INIT_DCS_CMD(0xB8, 0x99), + INIT_DCS_CMD(0xB9, 0xE0), + INIT_DCS_CMD(0xBA, 0x26), + INIT_DCS_CMD(0xBB, 0xAD), + INIT_DCS_CMD(0xBC, 0x36), + INIT_DCS_CMD(0xBD, 0x3A), + INIT_DCS_CMD(0xBE, 0xAE), + INIT_DCS_CMD(0xBF, 0x2A), + INIT_DCS_CMD(0xC0, 0x66), + INIT_DCS_CMD(0xC1, 0x9E), + INIT_DCS_CMD(0xC2, 0xB8), + INIT_DCS_CMD(0xC3, 0xD1), + INIT_DCS_CMD(0xC4, 0xDD), + INIT_DCS_CMD(0xC5, 0xE9), + INIT_DCS_CMD(0xC6, 0xF6), + INIT_DCS_CMD(0xC7, 0xFA), + INIT_DCS_CMD(0xC8, 0xFC), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x0A), + INIT_DCS_CMD(0xB1, 0x00), + INIT_DCS_CMD(0xB2, 0x02), + INIT_DCS_CMD(0xB3, 0x0F), + INIT_DCS_CMD(0xB4, 0x25), + INIT_DCS_CMD(0xB5, 0x39), + INIT_DCS_CMD(0xB6, 0x4E), + INIT_DCS_CMD(0xB7, 0x72), + INIT_DCS_CMD(0xB8, 0x97), + INIT_DCS_CMD(0xB9, 0xDC), + INIT_DCS_CMD(0xBA, 0x22), + INIT_DCS_CMD(0xBB, 0xA4), + INIT_DCS_CMD(0xBC, 0x2B), + INIT_DCS_CMD(0xBD, 0x2F), + INIT_DCS_CMD(0xBE, 0xA9), + INIT_DCS_CMD(0xBF, 0x25), + INIT_DCS_CMD(0xC0, 0x61), + INIT_DCS_CMD(0xC1, 0x97), + INIT_DCS_CMD(0xC2, 0xB2), + INIT_DCS_CMD(0xC3, 0xCD), + INIT_DCS_CMD(0xC4, 0xD9), + INIT_DCS_CMD(0xC5, 0xE7), + INIT_DCS_CMD(0xC6, 0xF4), + INIT_DCS_CMD(0xC7, 0xFA), + INIT_DCS_CMD(0xC8, 0xFC), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x0B), + INIT_DCS_CMD(0xB1, 0x04), + INIT_DCS_CMD(0xB2, 0x05), + INIT_DCS_CMD(0xB3, 0x11), + INIT_DCS_CMD(0xB4, 0x24), + INIT_DCS_CMD(0xB5, 0x39), + INIT_DCS_CMD(0xB6, 0x4F), + INIT_DCS_CMD(0xB7, 0x72), + INIT_DCS_CMD(0xB8, 0x98), + INIT_DCS_CMD(0xB9, 0xDC), + INIT_DCS_CMD(0xBA, 0x23), + INIT_DCS_CMD(0xBB, 0xA6), + INIT_DCS_CMD(0xBC, 0x2C), + INIT_DCS_CMD(0xBD, 0x30), + INIT_DCS_CMD(0xBE, 0xAA), + INIT_DCS_CMD(0xBF, 0x26), + INIT_DCS_CMD(0xC0, 0x62), + INIT_DCS_CMD(0xC1, 0x9B), + INIT_DCS_CMD(0xC2, 0xB5), + INIT_DCS_CMD(0xC3, 0xCF), + INIT_DCS_CMD(0xC4, 0xDB), + INIT_DCS_CMD(0xC5, 0xE8), + INIT_DCS_CMD(0xC6, 0xF5), + INIT_DCS_CMD(0xC7, 0xFA), + INIT_DCS_CMD(0xC8, 0xFC), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x0C), + INIT_DCS_CMD(0xB1, 0x04), + INIT_DCS_CMD(0xB2, 0x02), + INIT_DCS_CMD(0xB3, 0x16), + INIT_DCS_CMD(0xB4, 0x24), + INIT_DCS_CMD(0xB5, 0x3B), + INIT_DCS_CMD(0xB6, 0x4F), + INIT_DCS_CMD(0xB7, 0x73), + INIT_DCS_CMD(0xB8, 0x99), + INIT_DCS_CMD(0xB9, 0xE0), + INIT_DCS_CMD(0xBA, 0x26), + INIT_DCS_CMD(0xBB, 0xAD), + INIT_DCS_CMD(0xBC, 0x36), + INIT_DCS_CMD(0xBD, 0x3A), + INIT_DCS_CMD(0xBE, 0xAE), + INIT_DCS_CMD(0xBF, 0x2A), + INIT_DCS_CMD(0xC0, 0x66), + INIT_DCS_CMD(0xC1, 0x9E), + INIT_DCS_CMD(0xC2, 0xB8), + INIT_DCS_CMD(0xC3, 0xD1), + INIT_DCS_CMD(0xC4, 0xDD), + INIT_DCS_CMD(0xC5, 0xE9), + INIT_DCS_CMD(0xC6, 0xF6), + INIT_DCS_CMD(0xC7, 0xFA), + INIT_DCS_CMD(0xC8, 0xFC), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x00), + INIT_DCS_CMD(0xB3, 0x08), + INIT_DCS_CMD(0xB0, 0x04), + INIT_DCS_CMD(0xB8, 0x68), + INIT_DELAY_CMD(150), + INIT_END_CMD, + }, +}; diff --git a/src/mainboard/google/kukui/panel_params/panel-BOE_TV101WUM_NL6.c b/src/mainboard/google/kukui/panel_params/panel-BOE_TV101WUM_NL6.c new file mode 100644 index 0000000..574f2fc --- /dev/null +++ b/src/mainboard/google/kukui/panel_params/panel-BOE_TV101WUM_NL6.c @@ -0,0 +1,331 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Huaqin Telecom Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "../panel.h" + +struct panel_description BOE_TV101WUM_NL6 = { + .edid = { + .ascii_string = "TV101WUM-NL6", + .manufacturer_name = "BOE", + .panel_bits_per_color = 8, + .panel_bits_per_pixel = 24, + .mode = { + .name = "1200x1920@60Hz", + .pixel_clock = 159425, + .lvds_dual_channel = 0, + .refresh = 60, + .ha = 1200, .hbl = 164, .hso = 100, .hspw = 24, + .va = 1920, .vbl = 28, .vso = 10, .vspw = 4, + .phsync = '-', .pvsync = '-', + .x_mm = 135, .y_mm = 216, + }, + }, + .orientation = LB_FB_ORIENTATION_LEFT_UP, + .init = { + INIT_DELAY_CMD(24), + INIT_DCS_CMD(0xB0, 0x05), + INIT_DCS_CMD(0xB1, 0xE5), + INIT_DCS_CMD(0xB3, 0x52), + INIT_DCS_CMD(0xB0, 0x00), + INIT_DCS_CMD(0xB3, 0x88), + INIT_DCS_CMD(0xB0, 0x04), + INIT_DCS_CMD(0xB8, 0x00), + INIT_DCS_CMD(0xB0, 0x00), + INIT_DCS_CMD(0xB6, 0x03), + INIT_DCS_CMD(0xBA, 0x8B), + INIT_DCS_CMD(0xBF, 0x1A), + INIT_DCS_CMD(0xC0, 0x0F), + INIT_DCS_CMD(0xC2, 0x0C), + INIT_DCS_CMD(0xC3, 0x02), + INIT_DCS_CMD(0xC4, 0x0C), + INIT_DCS_CMD(0xC5, 0x02), + INIT_DCS_CMD(0xB0, 0x01), + INIT_DCS_CMD(0xE0, 0x26), + INIT_DCS_CMD(0xE1, 0x26), + INIT_DCS_CMD(0xDC, 0x00), + INIT_DCS_CMD(0xDD, 0x00), + INIT_DCS_CMD(0xCC, 0x26), + INIT_DCS_CMD(0xCD, 0x26), + INIT_DCS_CMD(0xC8, 0x00), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xD2, 0x03), + INIT_DCS_CMD(0xD3, 0x03), + INIT_DCS_CMD(0xE6, 0x04), + INIT_DCS_CMD(0xE7, 0x04), + INIT_DCS_CMD(0xC4, 0x09), + INIT_DCS_CMD(0xC5, 0x09), + INIT_DCS_CMD(0xD8, 0x0A), + INIT_DCS_CMD(0xD9, 0x0A), + INIT_DCS_CMD(0xC2, 0x0B), + INIT_DCS_CMD(0xC3, 0x0B), + INIT_DCS_CMD(0xD6, 0x0C), + INIT_DCS_CMD(0xD7, 0x0C), + INIT_DCS_CMD(0xC0, 0x05), + INIT_DCS_CMD(0xC1, 0x05), + INIT_DCS_CMD(0xD4, 0x06), + INIT_DCS_CMD(0xD5, 0x06), + INIT_DCS_CMD(0xCA, 0x07), + INIT_DCS_CMD(0xCB, 0x07), + INIT_DCS_CMD(0xDE, 0x08), + INIT_DCS_CMD(0xDF, 0x08), + INIT_DCS_CMD(0xB0, 0x02), + INIT_DCS_CMD(0xC0, 0x00), + INIT_DCS_CMD(0xC1, 0x0D), + INIT_DCS_CMD(0xC2, 0x17), + INIT_DCS_CMD(0xC3, 0x26), + INIT_DCS_CMD(0xC4, 0x31), + INIT_DCS_CMD(0xC5, 0x1C), + INIT_DCS_CMD(0xC6, 0x2C), + INIT_DCS_CMD(0xC7, 0x33), + INIT_DCS_CMD(0xC8, 0x31), + INIT_DCS_CMD(0xC9, 0x37), + INIT_DCS_CMD(0xCA, 0x37), + INIT_DCS_CMD(0xCB, 0x37), + INIT_DCS_CMD(0xCC, 0x39), + INIT_DCS_CMD(0xCD, 0x2E), + INIT_DCS_CMD(0xCE, 0x2F), + INIT_DCS_CMD(0xCF, 0x2F), + INIT_DCS_CMD(0xD0, 0x07), + INIT_DCS_CMD(0xD2, 0x00), + INIT_DCS_CMD(0xD3, 0x0D), + INIT_DCS_CMD(0xD4, 0x17), + INIT_DCS_CMD(0xD5, 0x26), + INIT_DCS_CMD(0xD6, 0x31), + INIT_DCS_CMD(0xD7, 0x3F), + INIT_DCS_CMD(0xD8, 0x3F), + INIT_DCS_CMD(0xD9, 0x3F), + INIT_DCS_CMD(0xDA, 0x3F), + INIT_DCS_CMD(0xDB, 0x37), + INIT_DCS_CMD(0xDC, 0x37), + INIT_DCS_CMD(0xDD, 0x37), + INIT_DCS_CMD(0xDE, 0x39), + INIT_DCS_CMD(0xDF, 0x2E), + INIT_DCS_CMD(0xE0, 0x2F), + INIT_DCS_CMD(0xE1, 0x2F), + INIT_DCS_CMD(0xE2, 0x07), + INIT_DCS_CMD(0xB0, 0x03), + INIT_DCS_CMD(0xC8, 0x0B), + INIT_DCS_CMD(0xC9, 0x07), + INIT_DCS_CMD(0xC3, 0x00), + INIT_DCS_CMD(0xE7, 0x00), + INIT_DCS_CMD(0xC5, 0x2A), + INIT_DCS_CMD(0xDE, 0x2A), + INIT_DCS_CMD(0xCA, 0x43), + INIT_DCS_CMD(0xC9, 0x07), + INIT_DCS_CMD(0xE4, 0xC0), + INIT_DCS_CMD(0xE5, 0x0D), + INIT_DCS_CMD(0xCB, 0x00), + INIT_DCS_CMD(0xB0, 0x06), + INIT_DCS_CMD(0xB8, 0xA5), + INIT_DCS_CMD(0xC0, 0xA5), + INIT_DCS_CMD(0xC7, 0x0F), + INIT_DCS_CMD(0xD5, 0x32), + INIT_DCS_CMD(0xB8, 0x00), + INIT_DCS_CMD(0xC0, 0x00), + INIT_DCS_CMD(0xBC, 0x00), + INIT_DCS_CMD(0xB0, 0x07), + INIT_DCS_CMD(0xB1, 0x00), + INIT_DCS_CMD(0xB2, 0x02), + INIT_DCS_CMD(0xB3, 0x0F), + INIT_DCS_CMD(0xB4, 0x25), + INIT_DCS_CMD(0xB5, 0x39), + INIT_DCS_CMD(0xB6, 0x4E), + INIT_DCS_CMD(0xB7, 0x72), + INIT_DCS_CMD(0xB8, 0x97), + INIT_DCS_CMD(0xB9, 0xDC), + INIT_DCS_CMD(0xBA, 0x22), + INIT_DCS_CMD(0xBB, 0xA4), + INIT_DCS_CMD(0xBC, 0x2B), + INIT_DCS_CMD(0xBD, 0x2F), + INIT_DCS_CMD(0xBE, 0xA9), + INIT_DCS_CMD(0xBF, 0x25), + INIT_DCS_CMD(0xC0, 0x61), + INIT_DCS_CMD(0xC1, 0x97), + INIT_DCS_CMD(0xC2, 0xB2), + INIT_DCS_CMD(0xC3, 0xCD), + INIT_DCS_CMD(0xC4, 0xD9), + INIT_DCS_CMD(0xC5, 0xE7), + INIT_DCS_CMD(0xC6, 0xF4), + INIT_DCS_CMD(0xC7, 0xFA), + INIT_DCS_CMD(0xC8, 0xFC), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x08), + INIT_DCS_CMD(0xB1, 0x04), + INIT_DCS_CMD(0xB2, 0x05), + INIT_DCS_CMD(0xB3, 0x11), + INIT_DCS_CMD(0xB4, 0x24), + INIT_DCS_CMD(0xB5, 0x39), + INIT_DCS_CMD(0xB6, 0x4F), + INIT_DCS_CMD(0xB7, 0x72), + INIT_DCS_CMD(0xB8, 0x98), + INIT_DCS_CMD(0xB9, 0xDC), + INIT_DCS_CMD(0xBA, 0x23), + INIT_DCS_CMD(0xBB, 0xA6), + INIT_DCS_CMD(0xBC, 0x2C), + INIT_DCS_CMD(0xBD, 0x30), + INIT_DCS_CMD(0xBE, 0xAA), + INIT_DCS_CMD(0xBF, 0x26), + INIT_DCS_CMD(0xC0, 0x62), + INIT_DCS_CMD(0xC1, 0x9B), + INIT_DCS_CMD(0xC2, 0xB5), + INIT_DCS_CMD(0xC3, 0xCF), + INIT_DCS_CMD(0xC4, 0xDB), + INIT_DCS_CMD(0xC5, 0xE8), + INIT_DCS_CMD(0xC6, 0xF5), + INIT_DCS_CMD(0xC7, 0xFA), + INIT_DCS_CMD(0xC8, 0xFC), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x09), + INIT_DCS_CMD(0xB1, 0x04), + INIT_DCS_CMD(0xB2, 0x02), + INIT_DCS_CMD(0xB3, 0x16), + INIT_DCS_CMD(0xB4, 0x24), + INIT_DCS_CMD(0xB5, 0x3B), + INIT_DCS_CMD(0xB6, 0x4F), + INIT_DCS_CMD(0xB7, 0x73), + INIT_DCS_CMD(0xB8, 0x99), + INIT_DCS_CMD(0xB9, 0xE0), + INIT_DCS_CMD(0xBA, 0x26), + INIT_DCS_CMD(0xBB, 0xAD), + INIT_DCS_CMD(0xBC, 0x36), + INIT_DCS_CMD(0xBD, 0x3A), + INIT_DCS_CMD(0xBE, 0xAE), + INIT_DCS_CMD(0xBF, 0x2A), + INIT_DCS_CMD(0xC0, 0x66), + INIT_DCS_CMD(0xC1, 0x9E), + INIT_DCS_CMD(0xC2, 0xB8), + INIT_DCS_CMD(0xC3, 0xD1), + INIT_DCS_CMD(0xC4, 0xDD), + INIT_DCS_CMD(0xC5, 0xE9), + INIT_DCS_CMD(0xC6, 0xF6), + INIT_DCS_CMD(0xC7, 0xFA), + INIT_DCS_CMD(0xC8, 0xFC), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x0A), + INIT_DCS_CMD(0xB1, 0x00), + INIT_DCS_CMD(0xB2, 0x02), + INIT_DCS_CMD(0xB3, 0x0F), + INIT_DCS_CMD(0xB4, 0x25), + INIT_DCS_CMD(0xB5, 0x39), + INIT_DCS_CMD(0xB6, 0x4E), + INIT_DCS_CMD(0xB7, 0x72), + INIT_DCS_CMD(0xB8, 0x97), + INIT_DCS_CMD(0xB9, 0xDC), + INIT_DCS_CMD(0xBA, 0x22), + INIT_DCS_CMD(0xBB, 0xA4), + INIT_DCS_CMD(0xBC, 0x2B), + INIT_DCS_CMD(0xBD, 0x2F), + INIT_DCS_CMD(0xBE, 0xA9), + INIT_DCS_CMD(0xBF, 0x25), + INIT_DCS_CMD(0xC0, 0x61), + INIT_DCS_CMD(0xC1, 0x97), + INIT_DCS_CMD(0xC2, 0xB2), + INIT_DCS_CMD(0xC3, 0xCD), + INIT_DCS_CMD(0xC4, 0xD9), + INIT_DCS_CMD(0xC5, 0xE7), + INIT_DCS_CMD(0xC6, 0xF4), + INIT_DCS_CMD(0xC7, 0xFA), + INIT_DCS_CMD(0xC8, 0xFC), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x0B), + INIT_DCS_CMD(0xB1, 0x04), + INIT_DCS_CMD(0xB2, 0x05), + INIT_DCS_CMD(0xB3, 0x11), + INIT_DCS_CMD(0xB4, 0x24), + INIT_DCS_CMD(0xB5, 0x39), + INIT_DCS_CMD(0xB6, 0x4F), + INIT_DCS_CMD(0xB7, 0x72), + INIT_DCS_CMD(0xB8, 0x98), + INIT_DCS_CMD(0xB9, 0xDC), + INIT_DCS_CMD(0xBA, 0x23), + INIT_DCS_CMD(0xBB, 0xA6), + INIT_DCS_CMD(0xBC, 0x2C), + INIT_DCS_CMD(0xBD, 0x30), + INIT_DCS_CMD(0xBE, 0xAA), + INIT_DCS_CMD(0xBF, 0x26), + INIT_DCS_CMD(0xC0, 0x62), + INIT_DCS_CMD(0xC1, 0x9B), + INIT_DCS_CMD(0xC2, 0xB5), + INIT_DCS_CMD(0xC3, 0xCF), + INIT_DCS_CMD(0xC4, 0xDB), + INIT_DCS_CMD(0xC5, 0xE8), + INIT_DCS_CMD(0xC6, 0xF5), + INIT_DCS_CMD(0xC7, 0xFA), + INIT_DCS_CMD(0xC8, 0xFC), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x0C), + INIT_DCS_CMD(0xB1, 0x04), + INIT_DCS_CMD(0xB2, 0x02), + INIT_DCS_CMD(0xB3, 0x16), + INIT_DCS_CMD(0xB4, 0x24), + INIT_DCS_CMD(0xB5, 0x3B), + INIT_DCS_CMD(0xB6, 0x4F), + INIT_DCS_CMD(0xB7, 0x73), + INIT_DCS_CMD(0xB8, 0x99), + INIT_DCS_CMD(0xB9, 0xE0), + INIT_DCS_CMD(0xBA, 0x26), + INIT_DCS_CMD(0xBB, 0xAD), + INIT_DCS_CMD(0xBC, 0x36), + INIT_DCS_CMD(0xBD, 0x3A), + INIT_DCS_CMD(0xBE, 0xAE), + INIT_DCS_CMD(0xBF, 0x2A), + INIT_DCS_CMD(0xC0, 0x66), + INIT_DCS_CMD(0xC1, 0x9E), + INIT_DCS_CMD(0xC2, 0xB8), + INIT_DCS_CMD(0xC3, 0xD1), + INIT_DCS_CMD(0xC4, 0xDD), + INIT_DCS_CMD(0xC5, 0xE9), + INIT_DCS_CMD(0xC6, 0xF6), + INIT_DCS_CMD(0xC7, 0xFA), + INIT_DCS_CMD(0xC8, 0xFC), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x00), + INIT_DCS_CMD(0xB3, 0x08), + INIT_DCS_CMD(0xB0, 0x04), + INIT_DCS_CMD(0xB8, 0x68), + INIT_DELAY_CMD(150), + INIT_END_CMD, + }, +}; diff --git a/src/mainboard/google/kukui/panel_params/panel-CMN_P097PFG_SSD2858.c b/src/mainboard/google/kukui/panel_params/panel-CMN_P097PFG_SSD2858.c new file mode 100644 index 0000000..2098174 --- /dev/null +++ b/src/mainboard/google/kukui/panel_params/panel-CMN_P097PFG_SSD2858.c @@ -0,0 +1,86 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Huaqin Telecom Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "../panel.h" + +struct panel_description P097PFG_SSD2858 = { + .edid = { + .ascii_string = "P097PFG", + .manufacturer_name = "CMN", + .panel_bits_per_color = 8, + .panel_bits_per_pixel = 24, + .mode = { + .name = "1536x2048@60Hz", + .pixel_clock = 211660, + .lvds_dual_channel = 0, + .refresh = 60, + .ha = 1536, .hbl = 160, .hso = 140, .hspw = 10, + .va = 2048, .vbl = 32, .vso = 20, .vspw = 2, + .phsync = '-', .pvsync = '-', + .x_mm = 147, .y_mm = 196, + }, + }, + .orientation = LB_FB_ORIENTATION_NORMAL, + .init = { + INIT_GENERIC_CMD(0xff, 0x00), + /* LOCKCNT=0x1f4, MRX=0, POSTDIV=1 (/2} }, MULT=0x49 + * 27 Mhz => 985.5 Mhz */ + INIT_GENERIC_CMD(0x00, 0x08, 0x01, 0xf4, 0x01, 0x49), + /* MTXDIV=1, SYSDIV=3 (=> 4) */ + INIT_GENERIC_CMD(0x00, 0x0c, 0x00, 0x00, 0x00, 0x03), + /* MTXVPF=24bpp, MRXLS=4 lanes, MRXVB=bypass, MRXECC=1, + * MRXEOT=1, MRXEE=1 */ + INIT_GENERIC_CMD(0x00, 0x14, 0x0c, 0x3d, 0x80, 0x0f), + INIT_GENERIC_CMD(0x00, 0x20, 0x15, 0x92, 0x56, 0x7d), + INIT_GENERIC_CMD(0x00, 0x24, 0x00, 0x00, 0x30, 0x00), + + INIT_GENERIC_CMD(0x10, 0x08, 0x01, 0x20, 0x08, 0x45), + INIT_GENERIC_CMD(0x10, 0x1c, 0x00, 0x00, 0x00, 0x00), + INIT_GENERIC_CMD(0x20, 0x0c, 0x00, 0x00, 0x00, 0x04), + /* Pixel clock 985.5 Mhz * 0x49/0x4b = 959 Mhz */ + INIT_GENERIC_CMD(0x20, 0x10, 0x00, 0x4b, 0x00, 0x49), + INIT_GENERIC_CMD(0x20, 0xa0, 0x00, 0x00, 0x00, 0x00), + /* EOT=1, LPE = 0, LSOUT=4 lanes, LPD=25 */ + INIT_GENERIC_CMD(0x60, 0x08, 0x00, 0xd9, 0x00, 0x08), + INIT_GENERIC_CMD(0x60, 0x14, 0x01, 0x00, 0x01, 0x06), + /* DSI0 enable (default: probably not needed) */ + INIT_GENERIC_CMD(0x60, 0x80, 0x00, 0x00, 0x00, 0x0f), + /* DSI1 enable */ + INIT_GENERIC_CMD(0x60, 0xa0, 0x00, 0x00, 0x00, 0x0f), + + /* HSA=0x18, VSA=0x02, HBP=0x50, VBP=0x0c */ + INIT_GENERIC_CMD(0x60, 0x0c, 0x0c, 0x50, 0x02, 0x18), + /* VACT= 0x800 (2048} }, VFP= 0x14, HFP=0x50 */ + INIT_GENERIC_CMD(0x60, 0x10, 0x08, 0x00, 0x14, 0x50), + /* HACT=0x300 (768) */ + INIT_GENERIC_CMD(0x60, 0x84, 0x00, 0x00, 0x03, 0x00), + INIT_GENERIC_CMD(0x60, 0xa4, 0x00, 0x00, 0x03, 0x00), + + /* Take panel out of sleep. */ + INIT_GENERIC_CMD(0xff, 0x01), + INIT_DCS_CMD(0x11), + INIT_DELAY_CMD(120), + INIT_DCS_CMD(0x29), + INIT_DELAY_CMD(20), + INIT_GENERIC_CMD(0xff, 0x00), + + INIT_DELAY_CMD(120), + INIT_DCS_CMD(0x11), + INIT_DELAY_CMD(120), + INIT_DCS_CMD(0x29), + INIT_DELAY_CMD(20), + INIT_END_CMD, + }, +}; -- To view, visit https://review.coreboot.org/c/coreboot/+/34877 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2560a11ecf7badfd0605ab189d57ec9456850f75 Gerrit-Change-Number: 34877 Gerrit-PatchSet: 1 Gerrit-Owner: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newchange

4 20

Change in coreboot[master]: util/abuild: Cleanup the missing_arches check
by Raul Rangel (Code Review) 22 Aug '19

22 Aug '19

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34241 ) Change subject: util/abuild: Cleanup the missing_arches check ...................................................................... util/abuild: Cleanup the missing_arches check This change adds the following improvements: * Easier to read. * Checks to see if .xcompile is complete. I chose to abort the whole script since it would fail later anyway. * Checks the make return code. This will catch if .xcompile is missing. BUG=b:112267918 TEST=Modified my .xcompile and ran abuild and verified that missing_arches got set correctly. Also deleted .xcompile and verified there was a failure. Change-Id: I7604d431f398fc0c80a857a0c7c21e164004cc99 Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> --- M util/abuild/abuild 1 file changed, 17 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/34241/1 diff --git a/util/abuild/abuild b/util/abuild/abuild index abfedba..3a297c3 100755 --- a/util/abuild/abuild +++ b/util/abuild/abuild @@ -462,10 +462,25 @@ return fi + local required_arches + required_arches=$(grep -E "^CONFIG_ARCH_(BOOTBLOCK|R.MSTAGE|VERSTAGE)" "$TARGET/${BUILD_NAME}/config.build" | \ sed "s,^CONFIG_ARCH_[^_]*_$[^=]*$=.*$,\1," |sort -u |tr 'A-Z\n\r' 'a-z ') - # shellcheck disable=SC2016,SC2059 - missing_arches=$(printf 'include .xcompile\nall: ; @echo $(foreach arch,'"$required_arches"',$(if $(filter $(arch),$(SUBARCH_SUPPORTED)),,$(arch)))' | $MAKE --no-print-directory -f -) + + missing_arches="$($MAKE -f - REQUIRED_ARCHES="$required_arches" <<'EOF' +include .xcompile +.PHONY: missing_arches +missing_arches: + $(if $(XCOMPILE_COMPLETE),,$(error .xcompile is invalid.)) + @echo $(foreach arch,$(REQUIRED_ARCHES),$(if $(filter $(arch),$(SUBARCH_SUPPORTED)),,$(arch))) +EOF +)" + # shellcheck disable=SC2181 + if [[ $? -ne 0 ]]; then + echo "Calculating missing_arches failed" >&2 + exit 1 + fi + if [ -n "$missing_arches" ]; then printf "skipping %s because we're missing compilers for (%s)\n" "$BUILD_NAME" "$missing_arches" return -- To view, visit https://review.coreboot.org/c/coreboot/+/34241 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7604d431f398fc0c80a857a0c7c21e164004cc99 Gerrit-Change-Number: 34241 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: newchange

4 8

Change in coreboot[master]: Split MAYBE_STATIC to _BSS and _NONZERO variants
by Julius Werner (Code Review) 21 Aug '19

21 Aug '19

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35003 ) Change subject: Split MAYBE_STATIC to _BSS and _NONZERO variants ...................................................................... Patch Set 5: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/35003 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80485ebac94b88c5864a949b17ad1dccdfda6a40 Gerrit-Change-Number: 35003 Gerrit-PatchSet: 5 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 21 Aug 2019 21:58:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Add <arch/romstage.h>
by Aaron Durbin (Code Review) 21 Aug '19

21 Aug '19

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34911 ) Change subject: arch/x86: Add <arch/romstage.h> ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/34911 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9aeef07f9009e44cc08927c85fe1862edf5c70dc Gerrit-Change-Number: 34911 Gerrit-PatchSet: 7 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanny E <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 21 Aug 2019 19:02:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mediatek/mt8183: set scp voltage setting
by hsin-hsiung wang (Code Review) 21 Aug '19

21 Aug '19

hsin-hsiung wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34205 ) Change subject: mediatek/mt8183: set scp voltage setting ...................................................................... mediatek/mt8183: set scp voltage setting Add scp initial voltage setting BUG=b:80501386 BRANCH=none Test=Boots correctly on Kukui and scp can boot up normally Change-Id: I5afb60af3c14490e20f28f1c089cfca42ddf7fcf Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang(a)mediatek.com> --- M src/soc/mediatek/mt8183/mt6358.c 1 file changed, 20 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/34205/1 diff --git a/src/soc/mediatek/mt8183/mt6358.c b/src/soc/mediatek/mt8183/mt6358.c index 53d2a43..8d2375a 100644 --- a/src/soc/mediatek/mt8183/mt6358.c +++ b/src/soc/mediatek/mt8183/mt6358.c @@ -501,6 +501,26 @@ {0x13a6, 0x58, 0x7F, 0}, /* [6:0]: RG_BUCK_VPROC12_VOSEL */ {0x1426, 0x58, 0x7F, 0}, + + /* scp voltage initialization */ + /* [6:0]: RG_BUCK_VCORE_SSHUB_VOSEL */ + {0x14A6, 0x20, 0x7F, 0}, + /* [14:8]: RG_BUCK_VCORE_SSHUB_VOSEL_SLEEP */ + {0x14A6, 0x20, 0x7F, 8}, + /* [0:0]: RG_BUCK_VCORE_SSHUB_EN */ + {0x14A4, 0x1, 0x1, 0}, + /* [1:1]: RG_BUCK_VCORE_SSHUB_SLEEP_VOSEL_EN */ + {0x14A4, 0x0, 0x1, 1}, + /* [6:0]: RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL */ + {0x1BC6, 0x40, 0x7F, 0}, + /* [14:8]: RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SLEEP */ + {0x1BC6, 0x40, 0x7F, 8}, + /* [0:0]: RG_LDO_VSRAM_OTHERS_SSHUB_EN */ + {0x1BC4, 0x1, 0x1, 0}, + /* [1:1]: RG_LDO_VSRAM_OTHERS_SSHUB_SLEEP_VOSEL_EN */ + {0x1BC4, 0x0, 0x1, 1}, + /* [4:4]: RG_SRCVOLTEN_LP_EN */ + {0x134, 0x1, 0x1, 4}, }; static struct pmic_setting lp_setting[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/34205 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5afb60af3c14490e20f28f1c089cfca42ddf7fcf Gerrit-Change-Number: 34205 Gerrit-PatchSet: 1 Gerrit-Owner: hsin-hsiung wang <hsin-hsiung.wang(a)mediatek.com> Gerrit-MessageType: newchange

4 8

Change in coreboot[master]: mb/google/octopus/variants/bloog: Add G2Touch touchscreen support
by Tony Huang (Code Review) 21 Aug '19

21 Aug '19

Tony Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35013 ) Change subject: mb/google/octopus/variants/bloog: Add G2Touch touchscreen support ...................................................................... mb/google/octopus/variants/bloog: Add G2Touch touchscreen support Add G2Touch touchscreen support for blooglet. BUG=b:139725457 BRANCH=octopus TEST=emerge-octopus coreboot chromeos-bootimage, and check touchscreen by evtest. Change-Id: I6ebcc60f58857d8b28446932787742c2740fadd8 Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> --- M src/mainboard/google/octopus/variants/bloog/overridetree.cb 1 file changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/35013/1 diff --git a/src/mainboard/google/octopus/variants/bloog/overridetree.cb b/src/mainboard/google/octopus/variants/bloog/overridetree.cb index 6c64ba7..0212bea 100644 --- a/src/mainboard/google/octopus/variants/bloog/overridetree.cb +++ b/src/mainboard/google/octopus/variants/bloog/overridetree.cb @@ -138,6 +138,20 @@ register "hid_desc_reg_offset" = "0x01" device i2c 5d on end end + chip drivers/i2c/hid + register "generic.hid" = ""GTCH7503"" + register "generic.desc" = ""G2TOUCH Touchscreen"" + register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPIO_212_IRQ)" + register "generic.probed" = "1" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_105)" + register "generic.reset_delay_ms" = "50" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)" + register "generic.enable_delay_ms" = "1" + register "generic.has_power_resource" = "1" + register "generic.disable_gpio_export_in_crs" = "1" + register "hid_desc_reg_offset" = "0x01" + device i2c 40 on end + end end # - I2C 7 end -- To view, visit https://review.coreboot.org/c/coreboot/+/35013 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ebcc60f58857d8b28446932787742c2740fadd8 Gerrit-Change-Number: 35013 Gerrit-PatchSet: 1 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

4 6

Change in coreboot[master]: cpu/intel/car: Make stack guards more useful on C_ENV_BOOTBLOCK
by Arthur Heymans (Code Review) 21 Aug '19

21 Aug '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34976 ) Change subject: cpu/intel/car: Make stack guards more useful on C_ENV_BOOTBLOCK ...................................................................... cpu/intel/car: Make stack guards more useful on C_ENV_BOOTBLOCK With C_ENVIRONMENT_BOOTBLOCK, CONFIG_DCACHE_BSP_STACK_SIZE needs to be set to define a stack region that can be shared over all stages using CAR. It makes sense to use that Kconfig option's value instead of a hardcoded value. This will result in less false positives when the stack size is big, for instance with FSP using the coreboot stack. Change-Id: I2ce1dda4d1f254e6c36de4d3fea26e12c34195ff Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/intel/car/romstage.c 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/34976/1 diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c index 89052d6..1816e80 100644 --- a/src/cpu/intel/car/romstage.c +++ b/src/cpu/intel/car/romstage.c @@ -20,8 +20,6 @@ #include <program_loading.h> #include <timestamp.h> -#define DCACHE_RAM_ROMSTAGE_STACK_SIZE 0x2000 - static void romstage_main(unsigned long bist) { int i; @@ -29,11 +27,13 @@ const u32 stack_guard = 0xdeadbeef; u32 *stack_base; u32 size; + const u32 max_dcache_stack_size = CONFIG_DCACHE_BSP_STACK_SIZE ? + CONFIG_DCACHE_BSP_STACK_SIZE : 0x2000; /* Size of unallocated CAR. */ size = ALIGN_DOWN(_car_stack_size, 16); - size = MIN(size, DCACHE_RAM_ROMSTAGE_STACK_SIZE); + size = MIN(size, max_dcache_stack_size); if (size < DCACHE_RAM_ROMSTAGE_STACK_SIZE) printk(BIOS_DEBUG, "Romstage stack size limited to 0x%x!\n", size); -- To view, visit https://review.coreboot.org/c/coreboot/+/34976 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2ce1dda4d1f254e6c36de4d3fea26e12c34195ff Gerrit-Change-Number: 34976 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

4 23

Change in coreboot[master]: arch/x86: Rename some mainboard_romstage_entry()
by Kyösti Mälkki (Code Review) 21 Aug '19

21 Aug '19

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34909 ) Change subject: arch/x86: Rename some mainboard_romstage_entry() ...................................................................... arch/x86: Rename some mainboard_romstage_entry() These platforms use different signature for this function, so declare them with different name to make room in global namespace. Change-Id: I77be9099bf20e00ae6770e9ffe12301eda028819 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/google/kahlee/romstage.c M src/mainboard/google/rambi/romstage.c M src/soc/amd/picasso/include/soc/romstage.h M src/soc/amd/picasso/romstage.c M src/soc/amd/stoneyridge/include/soc/romstage.h M src/soc/amd/stoneyridge/romstage.c M src/soc/intel/baytrail/include/soc/romstage.h M src/soc/intel/baytrail/romstage/romstage.c 8 files changed, 9 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/34909/1 diff --git a/src/mainboard/google/kahlee/romstage.c b/src/mainboard/google/kahlee/romstage.c index 8bc766e..ebe59ac 100644 --- a/src/mainboard/google/kahlee/romstage.c +++ b/src/mainboard/google/kahlee/romstage.c @@ -28,7 +28,7 @@ /* By default, don't do anything */ } -void mainboard_romstage_entry(int s3_resume) +void mainboard_romstage_entry_s3(int s3_resume) { size_t num_gpios; const struct soc_amd_gpio *gpios; diff --git a/src/mainboard/google/rambi/romstage.c b/src/mainboard/google/rambi/romstage.c index 5322267..9fbe1ca 100644 --- a/src/mainboard/google/rambi/romstage.c +++ b/src/mainboard/google/rambi/romstage.c @@ -55,7 +55,7 @@ return &spd_file_content[SPD_SIZE * ram_id]; } -void mainboard_romstage_entry(struct romstage_params *rp) +void mainboard_romstage_entry_rp(struct romstage_params *rp) { void *spd_content; int dual_channel = 0; diff --git a/src/soc/amd/picasso/include/soc/romstage.h b/src/soc/amd/picasso/include/soc/romstage.h index d8b2900..c0d03d0e 100644 --- a/src/soc/amd/picasso/include/soc/romstage.h +++ b/src/soc/amd/picasso/include/soc/romstage.h @@ -16,6 +16,6 @@ #ifndef __PICASSO_ROMSTAGE_H__ #define __PICASSO_ROMSTAGE_H__ -void mainboard_romstage_entry(int s3_resume); +void mainboard_romstage_entry_s3(int s3_resume); #endif /* __PICASSO_ROMSTAGE_H__ */ diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c index 22b5ce4..7970b0e 100644 --- a/src/soc/amd/picasso/romstage.c +++ b/src/soc/amd/picasso/romstage.c @@ -34,7 +34,7 @@ #include "chip.h" -void __weak mainboard_romstage_entry(int s3_resume) +void __weak mainboard_romstage_entry_s3(int s3_resume) { /* By default, don't do anything */ } @@ -49,7 +49,7 @@ console_init(); - mainboard_romstage_entry(s3_resume); + mainboard_romstage_entry_s3(s3_resume); if (!s3_resume) { post_code(0x40); diff --git a/src/soc/amd/stoneyridge/include/soc/romstage.h b/src/soc/amd/stoneyridge/include/soc/romstage.h index 6ce79b4..598b409 100644 --- a/src/soc/amd/stoneyridge/include/soc/romstage.h +++ b/src/soc/amd/stoneyridge/include/soc/romstage.h @@ -16,6 +16,6 @@ #ifndef __STONEYRIDGE_ROMSTAGE_H__ #define __STONEYRIDGE_ROMSTAGE_H__ -void mainboard_romstage_entry(int s3_resume); +void mainboard_romstage_entry_s3(int s3_resume); #endif /* __STONEYRIDGE_ROMSTAGE_H__ */ diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index 4cadc68..2dce5b1 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -97,7 +97,7 @@ if (CONFIG(SOC_AMD_PSP_SELECTABLE_SMU_FW)) load_smu_fw1(); - mainboard_romstage_entry(s3_resume); + mainboard_romstage_entry_s3(s3_resume); bsp_agesa_call(); diff --git a/src/soc/intel/baytrail/include/soc/romstage.h b/src/soc/intel/baytrail/include/soc/romstage.h index 3dc24f0..305cf27 100644 --- a/src/soc/intel/baytrail/include/soc/romstage.h +++ b/src/soc/intel/baytrail/include/soc/romstage.h @@ -28,7 +28,7 @@ struct mrc_params *mrc_params; }; -void mainboard_romstage_entry(struct romstage_params *params); +void mainboard_romstage_entry_rp(struct romstage_params *params); void romstage_common(struct romstage_params *params); void raminit(struct mrc_params *mp, int prev_sleep_state); diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index cf6a856..b130c39 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -144,7 +144,7 @@ gfx_init(); /* Call into mainboard. */ - mainboard_romstage_entry(&rp); + mainboard_romstage_entry_rp(&rp); if (CONFIG(SMM_TSEG)) smm_list_regions(); -- To view, visit https://review.coreboot.org/c/coreboot/+/34909 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I77be9099bf20e00ae6770e9ffe12301eda028819 Gerrit-Change-Number: 34909 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: ACPI S3: Drop ACPI_HUGE_LOWMEM_BACKUP
by Angel Pons (Code Review) 21 Aug '19

21 Aug '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/15476 ) Change subject: ACPI S3: Drop ACPI_HUGE_LOWMEM_BACKUP ...................................................................... Patch Set 13: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/15476 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifae41b51b359010ec02269c674936a87bd15623b Gerrit-Change-Number: 15476 Gerrit-PatchSet: 13 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 21 Aug 2019 14:30:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: AMD fam10: Remove HAVE_ACPI_RESUME support
by Angel Pons (Code Review) 21 Aug '19

21 Aug '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/15474 ) Change subject: AMD fam10: Remove HAVE_ACPI_RESUME support ...................................................................... Patch Set 13: > Patch Set 13: > > Thanks! Although somebody on the mailing list just asked how to produce the logs, at least I can say it was not me who pulled the trigger :) I won't be able to fix the relevant code in time, so I don't have a reason to block this. Plus, my fam10 stuff uses DDR2 so S3 wasn't there to begin with. I might try to do something with a fam15 board I have: Gigabyte GA-F2A88XM-D3H + Athlon 760K CPU (socket FM2) + A88X Bolton-D4 FCH. But I don't have high hopes because of missing documentation (no board schematics, no SuperIO datasheet...) -- To view, visit https://review.coreboot.org/c/coreboot/+/15474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62bbba8cfe515b3cae413582ff8d062a20e6741b Gerrit-Change-Number: 15474 Gerrit-PatchSet: 13 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Raptor Engineering Automated Test Stand <noreply(a)raptorengineeringinc.com> Gerrit-Reviewer: Rudolf Marek <r.marek(a)assembler.cz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 21 Aug 2019 14:29:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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