coreboot-gerrit August 2019

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/kukui: Add flapjack panels
by Hung-Te Lin (Code Review) 22 Aug '19

22 Aug '19

Hung-Te Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34891 ) Change subject: mb/google/kukui: Add flapjack panels ...................................................................... mb/google/kukui: Add flapjack panels Add panels supported by flapjack. Change-Id: I547bf6f26bdbfed52a00c8cfb268d4e7c17ed889 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> --- M src/mainboard/google/kukui/Makefile.inc A src/mainboard/google/kukui/panel_flapjack.c M src/mainboard/google/kukui/panel_params/Makefile.inc A src/mainboard/google/kukui/panel_params/panel-AUO_NT51021D8P.c A src/mainboard/google/kukui/panel_params/panel-BOE_TV080WUM_NG0.c A src/mainboard/google/kukui/panel_params/panel-BOE_TV101WUM_NG0.c A src/mainboard/google/kukui/panel_params/panel-INX_OTA7290D10P.c 7 files changed, 1,071 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/34891/1 diff --git a/src/mainboard/google/kukui/Makefile.inc b/src/mainboard/google/kukui/Makefile.inc index 4f5a201..2e8a79a 100644 --- a/src/mainboard/google/kukui/Makefile.inc +++ b/src/mainboard/google/kukui/Makefile.inc @@ -25,6 +25,7 @@ ramstage-y += chromeos.c ramstage-y += mainboard.c ramstage-y += memlayout.ld +ramstage-$(CONFIG_BOARD_GOOGLE_FLAPJACK) += panel_flapjack.c ramstage-$(CONFIG_BOARD_GOOGLE_KODAMA) += panel_kodama.c ramstage-$(CONFIG_BOARD_GOOGLE_KRANE) += panel_krane.c ramstage-$(CONFIG_BOARD_GOOGLE_KUKUI) += panel_kukui.c diff --git a/src/mainboard/google/kukui/panel_flapjack.c b/src/mainboard/google/kukui/panel_flapjack.c new file mode 100644 index 0000000..b10cc70 --- /dev/null +++ b/src/mainboard/google/kukui/panel_flapjack.c @@ -0,0 +1,31 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "panel.h" + +static struct panel_description flapjack_panels[] = { + [0] = { .name = "BOE_TV101WUM_NG0", }, + [1] = { .name = "BOE_TV080WUM_NG0", }, + [2] = { .name = "INX_OTA7290D10P", }, + [3] = { .name = "AUO_NT51021D8P", }, +}; + +struct panel_description *get_panel_description(int panel_id) +{ + if (panel_id < 0 || panel_id >= ARRAY_SIZE(flapjack_panels)) + return NULL; + + return get_panel_from_cbfs(&flapjack_panels[panel_id]); +} diff --git a/src/mainboard/google/kukui/panel_params/Makefile.inc b/src/mainboard/google/kukui/panel_params/Makefile.inc index c42d143..c51992a 100644 --- a/src/mainboard/google/kukui/panel_params/Makefile.inc +++ b/src/mainboard/google/kukui/panel_params/Makefile.inc @@ -3,6 +3,10 @@ panel-params-$(CONFIG_BOARD_GOOGLE_KRANE) += panel-BOE_TV101WUM_NL6 panel-params-$(CONFIG_BOARD_GOOGLE_KODAMA) += panel-BOE_TV101WUM_N53 panel-params-$(CONFIG_BOARD_GOOGLE_KUKUI) += panel-CMN_P097PFG_SSD2858 +panel-params-$(CONFIG_BOARD_GOOGLE_FLAPJACK) += panel-AUO_NT51021D8P +panel-params-$(CONFIG_BOARD_GOOGLE_FLAPJACK) += panel-BOE_TV080WUM_NG0 +panel-params-$(CONFIG_BOARD_GOOGLE_FLAPJACK) += panel-BOE_TV101WUM_NG0 +panel-params-$(CONFIG_BOARD_GOOGLE_FLAPJACK) += panel-INX_OTA7290D10P $(foreach params,$(panel-params-y), \ $(eval cbfs-files-y += $(params)) \ diff --git a/src/mainboard/google/kukui/panel_params/panel-AUO_NT51021D8P.c b/src/mainboard/google/kukui/panel_params/panel-AUO_NT51021D8P.c new file mode 100644 index 0000000..8fca7df --- /dev/null +++ b/src/mainboard/google/kukui/panel_params/panel-AUO_NT51021D8P.c @@ -0,0 +1,41 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Huaqin Telecom Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "../panel.h" + +struct panel_serializable_data AUO_NT51021D8P = { + .edid = { + .ascii_string = "NT51021D8P", + .manufacturer_name = "AUO", + .panel_bits_per_color = 8, + .panel_bits_per_pixel = 24, + .mode = { + .pixel_clock = 159420, + .lvds_dual_channel = 0, + .refresh = 60, + .ha = 1200, .hbl = 141, .hso = 80, .hspw = 1, + .va = 1920, .vbl = 61, .vso = 35, .vspw = 1, + .phsync = '-', .pvsync = '-', + .x_mm = 107, .y_mm = 132, + }, + }, + .init = { + INIT_DCS_CMD(0x11), + INIT_DELAY_CMD(0x78), + INIT_DCS_CMD(0x29), + INIT_DELAY_CMD(0x14), + INIT_END_CMD, + }, +}; diff --git a/src/mainboard/google/kukui/panel_params/panel-BOE_TV080WUM_NG0.c b/src/mainboard/google/kukui/panel_params/panel-BOE_TV080WUM_NG0.c new file mode 100644 index 0000000..5e56eb9 --- /dev/null +++ b/src/mainboard/google/kukui/panel_params/panel-BOE_TV080WUM_NG0.c @@ -0,0 +1,350 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Huaqin Telecom Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "../panel.h" + +struct panel_serializable_data BOE_TV080WUM_NG0 = { + .edid = { + .ascii_string = "TV080WUM-NG0", + .manufacturer_name = "BOE", + .panel_bits_per_color = 8, + .panel_bits_per_pixel = 24, + .mode = { + .pixel_clock = 159420, + .lvds_dual_channel = 0, + .refresh = 60, + .ha = 1200, .hbl = 164, .hso = 80, .hspw = 24, + .va = 1920, .vbl = 28, .vso = 10, .vspw = 4, + .phsync = '-', .pvsync = '-', + .x_mm = 107, .y_mm = 132, + }, + }, + .init = { + INIT_DCS_CMD(0x10), + INIT_DELAY_CMD(0x22), + INIT_DCS_CMD(0xB0, 0x05), + INIT_DCS_CMD(0xB1, 0xE5), + INIT_DCS_CMD(0xB3, 0x52), + INIT_DCS_CMD(0xB0, 0x00), + INIT_DCS_CMD(0xB3, 0x88), + INIT_DCS_CMD(0xB0, 0x04), + INIT_DCS_CMD(0xB8, 0x00), + INIT_DCS_CMD(0xB0, 0x00), + INIT_DCS_CMD(0xB2, 0x50), + INIT_DCS_CMD(0xB6, 0x03), + INIT_DCS_CMD(0xBA, 0x8B), + INIT_DCS_CMD(0xBF, 0x15), + INIT_DCS_CMD(0xC0, 0x0F), + INIT_DCS_CMD(0xC2, 0x0C), + INIT_DCS_CMD(0xC3, 0x02), + INIT_DCS_CMD(0xC4, 0x0C), + INIT_DCS_CMD(0xC5, 0x02), + INIT_DCS_CMD(0xB0, 0x01), + INIT_DCS_CMD(0xE0, 0x26), + INIT_DCS_CMD(0xE1, 0x26), + INIT_DCS_CMD(0xDC, 0x00), + INIT_DCS_CMD(0xDD, 0x00), + INIT_DCS_CMD(0xCC, 0x26), + INIT_DCS_CMD(0xCD, 0x26), + INIT_DCS_CMD(0xC8, 0x00), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xD2, 0x04), + INIT_DCS_CMD(0xD3, 0x04), + INIT_DCS_CMD(0xE6, 0x03), + INIT_DCS_CMD(0xE7, 0x03), + INIT_DCS_CMD(0xC4, 0x08), + INIT_DCS_CMD(0xC5, 0x08), + INIT_DCS_CMD(0xD8, 0x07), + INIT_DCS_CMD(0xD9, 0x07), + INIT_DCS_CMD(0xC2, 0x06), + INIT_DCS_CMD(0xC3, 0x06), + INIT_DCS_CMD(0xD6, 0x05), + INIT_DCS_CMD(0xD7, 0x05), + INIT_DCS_CMD(0xC0, 0x0C), + INIT_DCS_CMD(0xC1, 0x0C), + INIT_DCS_CMD(0xD4, 0x0B), + INIT_DCS_CMD(0xD5, 0x0B), + INIT_DCS_CMD(0xCA, 0x0A), + INIT_DCS_CMD(0xCB, 0x0A), + INIT_DCS_CMD(0xDE, 0x09), + INIT_DCS_CMD(0xDF, 0x09), + INIT_DCS_CMD(0xC6, 0x26), + INIT_DCS_CMD(0xC7, 0x26), + INIT_DCS_CMD(0xCE, 0x00), + INIT_DCS_CMD(0xCF, 0x00), + INIT_DCS_CMD(0xDA, 0x26), + INIT_DCS_CMD(0xDB, 0x26), + INIT_DCS_CMD(0xE2, 0x00), + INIT_DCS_CMD(0xE3, 0x00), + INIT_DCS_CMD(0xB0, 0x02), + INIT_DCS_CMD(0xC0, 0x00), + INIT_DCS_CMD(0xC1, 0x07), + INIT_DCS_CMD(0xC2, 0x0D), + INIT_DCS_CMD(0xC3, 0x18), + INIT_DCS_CMD(0xC4, 0x27), + INIT_DCS_CMD(0xC5, 0x28), + INIT_DCS_CMD(0xC6, 0x30), + INIT_DCS_CMD(0xC7, 0x2E), + INIT_DCS_CMD(0xC8, 0x2F), + INIT_DCS_CMD(0xC9, 0x1A), + INIT_DCS_CMD(0xCA, 0x20), + INIT_DCS_CMD(0xCB, 0x29), + INIT_DCS_CMD(0xCC, 0x26), + INIT_DCS_CMD(0xCD, 0x32), + INIT_DCS_CMD(0xCE, 0x33), + INIT_DCS_CMD(0xCF, 0x31), + INIT_DCS_CMD(0xD0, 0x06), + INIT_DCS_CMD(0xD2, 0x00), + INIT_DCS_CMD(0xD3, 0x07), + INIT_DCS_CMD(0xD4, 0x12), + INIT_DCS_CMD(0xD5, 0x26), + INIT_DCS_CMD(0xD6, 0x3D), + INIT_DCS_CMD(0xD7, 0x3F), + INIT_DCS_CMD(0xD8, 0x3F), + INIT_DCS_CMD(0xD9, 0x3F), + INIT_DCS_CMD(0xDA, 0x3F), + INIT_DCS_CMD(0xDB, 0x3F), + INIT_DCS_CMD(0xDC, 0x3F), + INIT_DCS_CMD(0xDD, 0x3F), + INIT_DCS_CMD(0xDE, 0x3F), + INIT_DCS_CMD(0xDF, 0x3A), + INIT_DCS_CMD(0xE0, 0x37), + INIT_DCS_CMD(0xE1, 0x35), + INIT_DCS_CMD(0xE2, 0x07), + INIT_DCS_CMD(0xB0, 0x03), + INIT_DCS_CMD(0xC8, 0x0B), + INIT_DCS_CMD(0xC9, 0x07), + INIT_DCS_CMD(0xC3, 0x00), + INIT_DCS_CMD(0xE7, 0x00), + INIT_DCS_CMD(0xC5, 0x2A), + INIT_DCS_CMD(0xDE, 0x2A), + INIT_DCS_CMD(0xCA, 0x43), + INIT_DCS_CMD(0xC9, 0x07), + INIT_DCS_CMD(0xE4, 0xC0), + INIT_DCS_CMD(0xE5, 0x0D), + INIT_DCS_CMD(0xCB, 0x00), + INIT_DCS_CMD(0xB0, 0x06), + INIT_DCS_CMD(0xB8, 0xA5), + INIT_DCS_CMD(0xC0, 0xA5), + INIT_DCS_CMD(0xC7, 0x0F), + INIT_DCS_CMD(0xD5, 0x32), + INIT_DCS_CMD(0xB8, 0x00), + INIT_DCS_CMD(0xC0, 0x00), + INIT_DCS_CMD(0xBC, 0x00), + INIT_DCS_CMD(0xB0, 0x07), + INIT_DCS_CMD(0xB1, 0x00), + INIT_DCS_CMD(0xB2, 0x09), + INIT_DCS_CMD(0xB3, 0x19), + INIT_DCS_CMD(0xB4, 0x2F), + INIT_DCS_CMD(0xB5, 0x44), + INIT_DCS_CMD(0xB6, 0x52), + INIT_DCS_CMD(0xB7, 0x6A), + INIT_DCS_CMD(0xB8, 0x8A), + INIT_DCS_CMD(0xB9, 0xCA), + INIT_DCS_CMD(0xBA, 0x0C), + INIT_DCS_CMD(0xBB, 0x87), + INIT_DELAY_CMD(0x05), + INIT_DCS_CMD(0xBC, 0x06), + INIT_DCS_CMD(0xBD, 0x0A), + INIT_DCS_CMD(0xBE, 0x9B), + INIT_DCS_CMD(0xBF, 0x0C), + INIT_DCS_CMD(0xC0, 0x3D), + INIT_DCS_CMD(0xC1, 0x71), + INIT_DCS_CMD(0xC2, 0x90), + INIT_DCS_CMD(0xC3, 0xA0), + INIT_DCS_CMD(0xC4, 0xA8), + INIT_DCS_CMD(0xC5, 0xB1), + INIT_DCS_CMD(0xC6, 0xBB), + INIT_DCS_CMD(0xC7, 0xC0), + INIT_DCS_CMD(0xC8, 0xC4), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x08), + INIT_DCS_CMD(0xB1, 0x04), + INIT_DCS_CMD(0xB2, 0x08), + INIT_DCS_CMD(0xB3, 0x19), + INIT_DCS_CMD(0xB4, 0x31), + INIT_DCS_CMD(0xB5, 0x46), + INIT_DCS_CMD(0xB6, 0x55), + INIT_DCS_CMD(0xB7, 0x6E), + INIT_DCS_CMD(0xB8, 0x92), + INIT_DCS_CMD(0xB9, 0xD4), + INIT_DCS_CMD(0xBA, 0x1B), + INIT_DCS_CMD(0xBB, 0x9B), + INIT_DELAY_CMD(0x05), + INIT_DCS_CMD(0xBC, 0x28), + INIT_DCS_CMD(0xBD, 0x2D), + INIT_DCS_CMD(0xBE, 0xC3), + INIT_DCS_CMD(0xBF, 0x2F), + INIT_DCS_CMD(0xC0, 0x62), + INIT_DCS_CMD(0xC1, 0x99), + INIT_DCS_CMD(0xC2, 0xAB), + INIT_DCS_CMD(0xC3, 0xBF), + INIT_DCS_CMD(0xC4, 0xCF), + INIT_DCS_CMD(0xC5, 0xDF), + INIT_DCS_CMD(0xC6, 0xF0), + INIT_DCS_CMD(0xC7, 0xF9), + INIT_DCS_CMD(0xC8, 0xFC), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x09), + INIT_DCS_CMD(0xB1, 0x04), + INIT_DCS_CMD(0xB2, 0x05), + INIT_DCS_CMD(0xB3, 0x17), + INIT_DCS_CMD(0xB4, 0x2E), + INIT_DCS_CMD(0xB5, 0x42), + INIT_DCS_CMD(0xB6, 0x51), + INIT_DCS_CMD(0xB7, 0x69), + INIT_DCS_CMD(0xB8, 0x88), + INIT_DCS_CMD(0xB9, 0xC9), + INIT_DCS_CMD(0xBA, 0x0C), + INIT_DCS_CMD(0xBB, 0x86), + INIT_DELAY_CMD(0x05), + INIT_DCS_CMD(0xBC, 0x03), + INIT_DCS_CMD(0xBD, 0x08), + INIT_DCS_CMD(0xBE, 0x95), + INIT_DCS_CMD(0xBF, 0x05), + INIT_DCS_CMD(0xC0, 0x35), + INIT_DCS_CMD(0xC1, 0x62), + INIT_DCS_CMD(0xC2, 0x81), + INIT_DCS_CMD(0xC3, 0x96), + INIT_DCS_CMD(0xC4, 0x9E), + INIT_DCS_CMD(0xC5, 0xA5), + INIT_DCS_CMD(0xC6, 0xAD), + INIT_DCS_CMD(0xC7, 0xB1), + INIT_DCS_CMD(0xC8, 0xB4), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x0A), + INIT_DCS_CMD(0xB1, 0x00), + INIT_DCS_CMD(0xB2, 0x09), + INIT_DCS_CMD(0xB3, 0x19), + INIT_DCS_CMD(0xB4, 0x2F), + INIT_DCS_CMD(0xB5, 0x44), + INIT_DCS_CMD(0xB6, 0x52), + INIT_DCS_CMD(0xB7, 0x6A), + INIT_DCS_CMD(0xB8, 0x8A), + INIT_DCS_CMD(0xB9, 0xCA), + INIT_DCS_CMD(0xBA, 0x0C), + INIT_DCS_CMD(0xBB, 0x87), + INIT_DELAY_CMD(0x05), + INIT_DCS_CMD(0xBC, 0x06), + INIT_DCS_CMD(0xBD, 0x0A), + INIT_DCS_CMD(0xBE, 0x9B), + INIT_DCS_CMD(0xBF, 0x0C), + INIT_DCS_CMD(0xC0, 0x3D), + INIT_DCS_CMD(0xC1, 0x71), + INIT_DCS_CMD(0xC2, 0x90), + INIT_DCS_CMD(0xC3, 0xA0), + INIT_DCS_CMD(0xC4, 0xA8), + INIT_DCS_CMD(0xC5, 0xB1), + INIT_DCS_CMD(0xC6, 0xBB), + INIT_DCS_CMD(0xC7, 0xC0), + INIT_DCS_CMD(0xC8, 0xC4), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x0B), + INIT_DCS_CMD(0xB1, 0x04), + INIT_DCS_CMD(0xB2, 0x08), + INIT_DCS_CMD(0xB3, 0x19), + INIT_DCS_CMD(0xB4, 0x31), + INIT_DCS_CMD(0xB5, 0x46), + INIT_DCS_CMD(0xB6, 0x55), + INIT_DCS_CMD(0xB7, 0x6E), + INIT_DCS_CMD(0xB8, 0x92), + INIT_DCS_CMD(0xB9, 0xD4), + INIT_DCS_CMD(0xBA, 0x1B), + INIT_DCS_CMD(0xBB, 0x9B), + INIT_DELAY_CMD(0x05), + INIT_DCS_CMD(0xBC, 0x28), + INIT_DCS_CMD(0xBD, 0x2D), + INIT_DCS_CMD(0xBE, 0xC3), + INIT_DCS_CMD(0xBF, 0x2F), + INIT_DCS_CMD(0xC0, 0x62), + INIT_DCS_CMD(0xC1, 0x99), + INIT_DCS_CMD(0xC2, 0xAB), + INIT_DCS_CMD(0xC3, 0xBF), + INIT_DCS_CMD(0xC4, 0xCF), + INIT_DCS_CMD(0xC5, 0xDF), + INIT_DCS_CMD(0xC6, 0xF0), + INIT_DCS_CMD(0xC7, 0xF9), + INIT_DCS_CMD(0xC8, 0xFC), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x0C), + INIT_DCS_CMD(0xB1, 0x04), + INIT_DCS_CMD(0xB2, 0x05), + INIT_DCS_CMD(0xB3, 0x17), + INIT_DCS_CMD(0xB4, 0x2E), + INIT_DCS_CMD(0xB5, 0x42), + INIT_DCS_CMD(0xB6, 0x51), + INIT_DCS_CMD(0xB7, 0x69), + INIT_DCS_CMD(0xB8, 0x88), + INIT_DCS_CMD(0xB9, 0xC9), + INIT_DCS_CMD(0xBA, 0x0C), + INIT_DCS_CMD(0xBB, 0x86), + INIT_DELAY_CMD(0x05), + INIT_DCS_CMD(0xBC, 0x03), + INIT_DCS_CMD(0xBD, 0x08), + INIT_DCS_CMD(0xBE, 0x95), + INIT_DCS_CMD(0xBF, 0x05), + INIT_DCS_CMD(0xC0, 0x35), + INIT_DCS_CMD(0xC1, 0x62), + INIT_DCS_CMD(0xC2, 0x81), + INIT_DCS_CMD(0xC3, 0x96), + INIT_DCS_CMD(0xC4, 0x9E), + INIT_DCS_CMD(0xC5, 0xA5), + INIT_DCS_CMD(0xC6, 0xAD), + INIT_DCS_CMD(0xC7, 0xB1), + INIT_DCS_CMD(0xC8, 0xB4), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DELAY_CMD(0x64), + INIT_DCS_CMD(0xB0, 0x00), + INIT_DCS_CMD(0xB3, 0x08), + INIT_DCS_CMD(0xB0, 0x04), + INIT_DCS_CMD(0xB8, 0x68), + INIT_DELAY_CMD(0x0A), + INIT_DCS_CMD(0x11), + INIT_DELAY_CMD(0x78), + INIT_DCS_CMD(0x29), + INIT_DELAY_CMD(0x14), + INIT_END_CMD, + }, +}; diff --git a/src/mainboard/google/kukui/panel_params/panel-BOE_TV101WUM_NG0.c b/src/mainboard/google/kukui/panel_params/panel-BOE_TV101WUM_NG0.c new file mode 100644 index 0000000..bb4452e --- /dev/null +++ b/src/mainboard/google/kukui/panel_params/panel-BOE_TV101WUM_NG0.c @@ -0,0 +1,350 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Huaqin Telecom Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "../panel.h" + +struct panel_serializable_data BOE_TV101WUM_NG0 = { + .edid = { + .ascii_string = "TV101WUM-NG0", + .manufacturer_name = "BOE", + .panel_bits_per_color = 8, + .panel_bits_per_pixel = 24, + .mode = { + .pixel_clock = 159420, + .lvds_dual_channel = 0, + .refresh = 60, + .ha = 1200, .hbl = 164, .hso = 80, .hspw = 24, + .va = 1920, .vbl = 28, .vso = 10, .vspw = 4, + .phsync = '-', .pvsync = '-', + .x_mm = 135, .y_mm = 216, + }, + }, + .init = { + INIT_DCS_CMD(0x10), + INIT_DELAY_CMD(0x22), + INIT_DCS_CMD(0xB0, 0x05), + INIT_DCS_CMD(0xB1, 0xE5), + INIT_DCS_CMD(0xB3, 0x52), + INIT_DCS_CMD(0xB0, 0x00), + INIT_DCS_CMD(0xB3, 0x88), + INIT_DCS_CMD(0xB0, 0x04), + INIT_DCS_CMD(0xB8, 0x00), + INIT_DCS_CMD(0xB0, 0x00), + INIT_DCS_CMD(0xB2, 0x50), + INIT_DCS_CMD(0xB6, 0x03), + INIT_DCS_CMD(0xBA, 0x8B), + INIT_DCS_CMD(0xBF, 0x15), + INIT_DCS_CMD(0xC0, 0x0F), + INIT_DCS_CMD(0xC2, 0x0C), + INIT_DCS_CMD(0xC3, 0x02), + INIT_DCS_CMD(0xC4, 0x0C), + INIT_DCS_CMD(0xC5, 0x02), + INIT_DCS_CMD(0xB0, 0x01), + INIT_DCS_CMD(0xE0, 0x26), + INIT_DCS_CMD(0xE1, 0x26), + INIT_DCS_CMD(0xDC, 0x00), + INIT_DCS_CMD(0xDD, 0x00), + INIT_DCS_CMD(0xCC, 0x26), + INIT_DCS_CMD(0xCD, 0x26), + INIT_DCS_CMD(0xC8, 0x00), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xD2, 0x04), + INIT_DCS_CMD(0xD3, 0x04), + INIT_DCS_CMD(0xE6, 0x03), + INIT_DCS_CMD(0xE7, 0x03), + INIT_DCS_CMD(0xC4, 0x08), + INIT_DCS_CMD(0xC5, 0x08), + INIT_DCS_CMD(0xD8, 0x07), + INIT_DCS_CMD(0xD9, 0x07), + INIT_DCS_CMD(0xC2, 0x06), + INIT_DCS_CMD(0xC3, 0x06), + INIT_DCS_CMD(0xD6, 0x05), + INIT_DCS_CMD(0xD7, 0x05), + INIT_DCS_CMD(0xC0, 0x0C), + INIT_DCS_CMD(0xC1, 0x0C), + INIT_DCS_CMD(0xD4, 0x0B), + INIT_DCS_CMD(0xD5, 0x0B), + INIT_DCS_CMD(0xCA, 0x0A), + INIT_DCS_CMD(0xCB, 0x0A), + INIT_DCS_CMD(0xDE, 0x09), + INIT_DCS_CMD(0xDF, 0x09), + INIT_DCS_CMD(0xC6, 0x26), + INIT_DCS_CMD(0xC7, 0x26), + INIT_DCS_CMD(0xCE, 0x00), + INIT_DCS_CMD(0xCF, 0x00), + INIT_DCS_CMD(0xDA, 0x26), + INIT_DCS_CMD(0xDB, 0x26), + INIT_DCS_CMD(0xE2, 0x00), + INIT_DCS_CMD(0xE3, 0x00), + INIT_DCS_CMD(0xB0, 0x02), + INIT_DCS_CMD(0xC0, 0x00), + INIT_DCS_CMD(0xC1, 0x07), + INIT_DCS_CMD(0xC2, 0x0D), + INIT_DCS_CMD(0xC3, 0x18), + INIT_DCS_CMD(0xC4, 0x27), + INIT_DCS_CMD(0xC5, 0x28), + INIT_DCS_CMD(0xC6, 0x30), + INIT_DCS_CMD(0xC7, 0x2E), + INIT_DCS_CMD(0xC8, 0x2F), + INIT_DCS_CMD(0xC9, 0x1A), + INIT_DCS_CMD(0xCA, 0x20), + INIT_DCS_CMD(0xCB, 0x29), + INIT_DCS_CMD(0xCC, 0x26), + INIT_DCS_CMD(0xCD, 0x32), + INIT_DCS_CMD(0xCE, 0x33), + INIT_DCS_CMD(0xCF, 0x31), + INIT_DCS_CMD(0xD0, 0x06), + INIT_DCS_CMD(0xD2, 0x00), + INIT_DCS_CMD(0xD3, 0x07), + INIT_DCS_CMD(0xD4, 0x12), + INIT_DCS_CMD(0xD5, 0x26), + INIT_DCS_CMD(0xD6, 0x3D), + INIT_DCS_CMD(0xD7, 0x3F), + INIT_DCS_CMD(0xD8, 0x3F), + INIT_DCS_CMD(0xD9, 0x3F), + INIT_DCS_CMD(0xDA, 0x3F), + INIT_DCS_CMD(0xDB, 0x3F), + INIT_DCS_CMD(0xDC, 0x3F), + INIT_DCS_CMD(0xDD, 0x3F), + INIT_DCS_CMD(0xDE, 0x3F), + INIT_DCS_CMD(0xDF, 0x3A), + INIT_DCS_CMD(0xE0, 0x37), + INIT_DCS_CMD(0xE1, 0x35), + INIT_DCS_CMD(0xE2, 0x07), + INIT_DCS_CMD(0xB0, 0x03), + INIT_DCS_CMD(0xC8, 0x0B), + INIT_DCS_CMD(0xC9, 0x07), + INIT_DCS_CMD(0xC3, 0x00), + INIT_DCS_CMD(0xE7, 0x00), + INIT_DCS_CMD(0xC5, 0x2A), + INIT_DCS_CMD(0xDE, 0x2A), + INIT_DCS_CMD(0xCA, 0x43), + INIT_DCS_CMD(0xC9, 0x07), + INIT_DCS_CMD(0xE4, 0xC0), + INIT_DCS_CMD(0xE5, 0x0D), + INIT_DCS_CMD(0xCB, 0x00), + INIT_DCS_CMD(0xB0, 0x06), + INIT_DCS_CMD(0xB8, 0xA5), + INIT_DCS_CMD(0xC0, 0xA5), + INIT_DCS_CMD(0xC7, 0x0F), + INIT_DCS_CMD(0xD5, 0x32), + INIT_DCS_CMD(0xB8, 0x00), + INIT_DCS_CMD(0xC0, 0x00), + INIT_DCS_CMD(0xBC, 0x00), + INIT_DCS_CMD(0xB0, 0x07), + INIT_DCS_CMD(0xB1, 0x00), + INIT_DCS_CMD(0xB2, 0x09), + INIT_DCS_CMD(0xB3, 0x19), + INIT_DCS_CMD(0xB4, 0x2F), + INIT_DCS_CMD(0xB5, 0x44), + INIT_DCS_CMD(0xB6, 0x52), + INIT_DCS_CMD(0xB7, 0x6A), + INIT_DCS_CMD(0xB8, 0x8A), + INIT_DCS_CMD(0xB9, 0xCA), + INIT_DCS_CMD(0xBA, 0x0C), + INIT_DCS_CMD(0xBB, 0x87), + INIT_DELAY_CMD(0x05), + INIT_DCS_CMD(0xBC, 0x06), + INIT_DCS_CMD(0xBD, 0x0A), + INIT_DCS_CMD(0xBE, 0x9B), + INIT_DCS_CMD(0xBF, 0x0C), + INIT_DCS_CMD(0xC0, 0x3D), + INIT_DCS_CMD(0xC1, 0x71), + INIT_DCS_CMD(0xC2, 0x90), + INIT_DCS_CMD(0xC3, 0xA0), + INIT_DCS_CMD(0xC4, 0xA8), + INIT_DCS_CMD(0xC5, 0xB1), + INIT_DCS_CMD(0xC6, 0xBB), + INIT_DCS_CMD(0xC7, 0xC0), + INIT_DCS_CMD(0xC8, 0xC4), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x08), + INIT_DCS_CMD(0xB1, 0x04), + INIT_DCS_CMD(0xB2, 0x08), + INIT_DCS_CMD(0xB3, 0x19), + INIT_DCS_CMD(0xB4, 0x31), + INIT_DCS_CMD(0xB5, 0x46), + INIT_DCS_CMD(0xB6, 0x55), + INIT_DCS_CMD(0xB7, 0x6E), + INIT_DCS_CMD(0xB8, 0x92), + INIT_DCS_CMD(0xB9, 0xD4), + INIT_DCS_CMD(0xBA, 0x1B), + INIT_DCS_CMD(0xBB, 0x9B), + INIT_DELAY_CMD(0x05), + INIT_DCS_CMD(0xBC, 0x28), + INIT_DCS_CMD(0xBD, 0x2D), + INIT_DCS_CMD(0xBE, 0xC3), + INIT_DCS_CMD(0xBF, 0x2F), + INIT_DCS_CMD(0xC0, 0x62), + INIT_DCS_CMD(0xC1, 0x99), + INIT_DCS_CMD(0xC2, 0xAB), + INIT_DCS_CMD(0xC3, 0xBF), + INIT_DCS_CMD(0xC4, 0xCF), + INIT_DCS_CMD(0xC5, 0xDF), + INIT_DCS_CMD(0xC6, 0xF0), + INIT_DCS_CMD(0xC7, 0xF9), + INIT_DCS_CMD(0xC8, 0xFC), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x09), + INIT_DCS_CMD(0xB1, 0x04), + INIT_DCS_CMD(0xB2, 0x05), + INIT_DCS_CMD(0xB3, 0x17), + INIT_DCS_CMD(0xB4, 0x2E), + INIT_DCS_CMD(0xB5, 0x42), + INIT_DCS_CMD(0xB6, 0x51), + INIT_DCS_CMD(0xB7, 0x69), + INIT_DCS_CMD(0xB8, 0x88), + INIT_DCS_CMD(0xB9, 0xC9), + INIT_DCS_CMD(0xBA, 0x0C), + INIT_DCS_CMD(0xBB, 0x86), + INIT_DELAY_CMD(0x05), + INIT_DCS_CMD(0xBC, 0x03), + INIT_DCS_CMD(0xBD, 0x08), + INIT_DCS_CMD(0xBE, 0x95), + INIT_DCS_CMD(0xBF, 0x05), + INIT_DCS_CMD(0xC0, 0x35), + INIT_DCS_CMD(0xC1, 0x62), + INIT_DCS_CMD(0xC2, 0x81), + INIT_DCS_CMD(0xC3, 0x96), + INIT_DCS_CMD(0xC4, 0x9E), + INIT_DCS_CMD(0xC5, 0xA5), + INIT_DCS_CMD(0xC6, 0xAD), + INIT_DCS_CMD(0xC7, 0xB1), + INIT_DCS_CMD(0xC8, 0xB4), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x0A), + INIT_DCS_CMD(0xB1, 0x00), + INIT_DCS_CMD(0xB2, 0x09), + INIT_DCS_CMD(0xB3, 0x19), + INIT_DCS_CMD(0xB4, 0x2F), + INIT_DCS_CMD(0xB5, 0x44), + INIT_DCS_CMD(0xB6, 0x52), + INIT_DCS_CMD(0xB7, 0x6A), + INIT_DCS_CMD(0xB8, 0x8A), + INIT_DCS_CMD(0xB9, 0xCA), + INIT_DCS_CMD(0xBA, 0x0C), + INIT_DCS_CMD(0xBB, 0x87), + INIT_DELAY_CMD(0x05), + INIT_DCS_CMD(0xBC, 0x06), + INIT_DCS_CMD(0xBD, 0x0A), + INIT_DCS_CMD(0xBE, 0x9B), + INIT_DCS_CMD(0xBF, 0x0C), + INIT_DCS_CMD(0xC0, 0x3D), + INIT_DCS_CMD(0xC1, 0x71), + INIT_DCS_CMD(0xC2, 0x90), + INIT_DCS_CMD(0xC3, 0xA0), + INIT_DCS_CMD(0xC4, 0xA8), + INIT_DCS_CMD(0xC5, 0xB1), + INIT_DCS_CMD(0xC6, 0xBB), + INIT_DCS_CMD(0xC7, 0xC0), + INIT_DCS_CMD(0xC8, 0xC4), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x0B), + INIT_DCS_CMD(0xB1, 0x04), + INIT_DCS_CMD(0xB2, 0x08), + INIT_DCS_CMD(0xB3, 0x19), + INIT_DCS_CMD(0xB4, 0x31), + INIT_DCS_CMD(0xB5, 0x46), + INIT_DCS_CMD(0xB6, 0x55), + INIT_DCS_CMD(0xB7, 0x6E), + INIT_DCS_CMD(0xB8, 0x92), + INIT_DCS_CMD(0xB9, 0xD4), + INIT_DCS_CMD(0xBA, 0x1B), + INIT_DCS_CMD(0xBB, 0x9B), + INIT_DELAY_CMD(0x05), + INIT_DCS_CMD(0xBC, 0x28), + INIT_DCS_CMD(0xBD, 0x2D), + INIT_DCS_CMD(0xBE, 0xC3), + INIT_DCS_CMD(0xBF, 0x2F), + INIT_DCS_CMD(0xC0, 0x62), + INIT_DCS_CMD(0xC1, 0x99), + INIT_DCS_CMD(0xC2, 0xAB), + INIT_DCS_CMD(0xC3, 0xBF), + INIT_DCS_CMD(0xC4, 0xCF), + INIT_DCS_CMD(0xC5, 0xDF), + INIT_DCS_CMD(0xC6, 0xF0), + INIT_DCS_CMD(0xC7, 0xF9), + INIT_DCS_CMD(0xC8, 0xFC), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DCS_CMD(0xB0, 0x0C), + INIT_DCS_CMD(0xB1, 0x04), + INIT_DCS_CMD(0xB2, 0x05), + INIT_DCS_CMD(0xB3, 0x17), + INIT_DCS_CMD(0xB4, 0x2E), + INIT_DCS_CMD(0xB5, 0x42), + INIT_DCS_CMD(0xB6, 0x51), + INIT_DCS_CMD(0xB7, 0x69), + INIT_DCS_CMD(0xB8, 0x88), + INIT_DCS_CMD(0xB9, 0xC9), + INIT_DCS_CMD(0xBA, 0x0C), + INIT_DCS_CMD(0xBB, 0x86), + INIT_DELAY_CMD(0x05), + INIT_DCS_CMD(0xBC, 0x03), + INIT_DCS_CMD(0xBD, 0x08), + INIT_DCS_CMD(0xBE, 0x95), + INIT_DCS_CMD(0xBF, 0x05), + INIT_DCS_CMD(0xC0, 0x35), + INIT_DCS_CMD(0xC1, 0x62), + INIT_DCS_CMD(0xC2, 0x81), + INIT_DCS_CMD(0xC3, 0x96), + INIT_DCS_CMD(0xC4, 0x9E), + INIT_DCS_CMD(0xC5, 0xA5), + INIT_DCS_CMD(0xC6, 0xAD), + INIT_DCS_CMD(0xC7, 0xB1), + INIT_DCS_CMD(0xC8, 0xB4), + INIT_DCS_CMD(0xC9, 0x00), + INIT_DCS_CMD(0xCA, 0x00), + INIT_DCS_CMD(0xCB, 0x16), + INIT_DCS_CMD(0xCC, 0xAF), + INIT_DCS_CMD(0xCD, 0xFF), + INIT_DCS_CMD(0xCE, 0xFF), + INIT_DELAY_CMD(0x64), + INIT_DCS_CMD(0xB0, 0x00), + INIT_DCS_CMD(0xB3, 0x08), + INIT_DCS_CMD(0xB0, 0x04), + INIT_DCS_CMD(0xB8, 0x68), + INIT_DELAY_CMD(0x0A), + INIT_DCS_CMD(0x11), + INIT_DELAY_CMD(0x78), + INIT_DCS_CMD(0x29), + INIT_DELAY_CMD(0x14), + INIT_END_CMD, + }, +}; diff --git a/src/mainboard/google/kukui/panel_params/panel-INX_OTA7290D10P.c b/src/mainboard/google/kukui/panel_params/panel-INX_OTA7290D10P.c new file mode 100644 index 0000000..069fb63 --- /dev/null +++ b/src/mainboard/google/kukui/panel_params/panel-INX_OTA7290D10P.c @@ -0,0 +1,294 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Huaqin Telecom Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "../panel.h" + +struct panel_serializable_data INX_OTA7290D10P = { + .edid = { + .ascii_string = "OTA7290D10P", + .manufacturer_name = "INX", + .panel_bits_per_color = 8, + .panel_bits_per_pixel = 24, + .mode = { + .pixel_clock = 159420, + .lvds_dual_channel = 0, + .refresh = 60, + .ha = 1200, .hbl = 141, .hso = 80, .hspw = 1, + .va = 1920, .vbl = 61, .vso = 35, .vspw = 1, + .phsync = '-', .pvsync = '-', + .x_mm = 135, .y_mm = 216, + }, + }, + .init = { + INIT_DCS_CMD(0xB0, 0x5A), + INIT_DCS_CMD(0xB1, 0x00), + INIT_DCS_CMD(0x89, 0x01), + INIT_DCS_CMD(0x91, 0x17), + INIT_DCS_CMD(0xB1, 0x03), + INIT_DCS_CMD(0x2C, 0x28), + INIT_DCS_CMD(0x00, 0xF1), + INIT_DCS_CMD(0x01, 0x78), + INIT_DCS_CMD(0x02, 0x3C), + INIT_DCS_CMD(0x03, 0x1E), + INIT_DCS_CMD(0x04, 0x8F), + INIT_DCS_CMD(0x05, 0x01), + INIT_DCS_CMD(0x06, 0x00), + INIT_DCS_CMD(0x07, 0x00), + INIT_DCS_CMD(0x08, 0x00), + INIT_DCS_CMD(0x09, 0x00), + INIT_DCS_CMD(0x0A, 0x01), + INIT_DCS_CMD(0x0B, 0x3C), + INIT_DCS_CMD(0x0C, 0x00), + INIT_DCS_CMD(0x0D, 0x00), + INIT_DCS_CMD(0x0E, 0x24), + INIT_DCS_CMD(0x0F, 0x1C), + INIT_DCS_CMD(0x10, 0xC8), + INIT_DCS_CMD(0x11, 0x60), + INIT_DCS_CMD(0x12, 0x70), + INIT_DCS_CMD(0x13, 0x01), + INIT_DCS_CMD(0x14, 0xE3), + INIT_DCS_CMD(0x15, 0xFF), + INIT_DCS_CMD(0x16, 0x3D), + INIT_DCS_CMD(0x17, 0x0E), + INIT_DCS_CMD(0x18, 0x01), + INIT_DCS_CMD(0x19, 0x00), + INIT_DCS_CMD(0x1A, 0x00), + INIT_DCS_CMD(0x1B, 0xFC), + INIT_DCS_CMD(0x1C, 0x0B), + INIT_DCS_CMD(0x1D, 0xA0), + INIT_DCS_CMD(0x1E, 0x03), + INIT_DCS_CMD(0x1F, 0x04), + INIT_DCS_CMD(0x20, 0x0C), + INIT_DCS_CMD(0x21, 0x00), + INIT_DCS_CMD(0x22, 0x04), + INIT_DCS_CMD(0x23, 0x81), + INIT_DCS_CMD(0x24, 0x1F), + INIT_DCS_CMD(0x25, 0x10), + INIT_DCS_CMD(0x26, 0x9B), + INIT_DCS_CMD(0x2D, 0x01), + INIT_DCS_CMD(0x2E, 0x84), + INIT_DCS_CMD(0x2F, 0x00), + INIT_DCS_CMD(0x30, 0x02), + INIT_DCS_CMD(0x31, 0x08), + INIT_DCS_CMD(0x32, 0x01), + INIT_DCS_CMD(0x33, 0x1C), + INIT_DCS_CMD(0x34, 0x70), + INIT_DCS_CMD(0x35, 0xFF), + INIT_DCS_CMD(0x36, 0xFF), + INIT_DCS_CMD(0x37, 0xFF), + INIT_DCS_CMD(0x38, 0xFF), + INIT_DCS_CMD(0x39, 0xFF), + INIT_DCS_CMD(0x3A, 0x05), + INIT_DCS_CMD(0x3B, 0x00), + INIT_DCS_CMD(0x3C, 0x00), + INIT_DCS_CMD(0x3D, 0x00), + INIT_DCS_CMD(0x3E, 0x0F), + INIT_DCS_CMD(0x3F, 0xA4), + INIT_DCS_CMD(0x40, 0x28), + INIT_DCS_CMD(0x41, 0xFC), + INIT_DCS_CMD(0x42, 0x01), + INIT_DCS_CMD(0x43, 0x08), + INIT_DCS_CMD(0x44, 0x05), + INIT_DCS_CMD(0x45, 0xF0), + INIT_DCS_CMD(0x46, 0x01), + INIT_DCS_CMD(0x47, 0x02), + INIT_DCS_CMD(0x48, 0x00), + INIT_DCS_CMD(0x49, 0x58), + INIT_DCS_CMD(0x4A, 0x00), + INIT_DCS_CMD(0x4B, 0x05), + INIT_DCS_CMD(0x4C, 0x03), + INIT_DCS_CMD(0x4D, 0xD0), + INIT_DCS_CMD(0x4E, 0x13), + INIT_DCS_CMD(0x4F, 0xFF), + INIT_DCS_CMD(0x50, 0x0A), + INIT_DCS_CMD(0x51, 0x53), + INIT_DCS_CMD(0x52, 0x26), + INIT_DCS_CMD(0x53, 0x22), + INIT_DCS_CMD(0x54, 0x09), + INIT_DCS_CMD(0x55, 0x22), + INIT_DCS_CMD(0x56, 0x00), + INIT_DCS_CMD(0x57, 0x1C), + INIT_DCS_CMD(0x58, 0x03), + INIT_DCS_CMD(0x59, 0x3F), + INIT_DCS_CMD(0x5A, 0x28), + INIT_DCS_CMD(0x5B, 0x01), + INIT_DCS_CMD(0x5C, 0xCC), + INIT_DCS_CMD(0x5D, 0x21), + INIT_DCS_CMD(0x5E, 0x04), + INIT_DCS_CMD(0x5F, 0x13), + INIT_DCS_CMD(0x60, 0x42), + INIT_DCS_CMD(0x61, 0x08), + INIT_DCS_CMD(0x62, 0x64), + INIT_DCS_CMD(0x63, 0xEB), + INIT_DCS_CMD(0x64, 0x10), + INIT_DCS_CMD(0x65, 0xA8), + INIT_DCS_CMD(0x66, 0x84), + INIT_DCS_CMD(0x67, 0x8E), + INIT_DCS_CMD(0x68, 0x29), + INIT_DCS_CMD(0x69, 0x11), + INIT_DCS_CMD(0x6A, 0x42), + INIT_DCS_CMD(0x6B, 0x38), + INIT_DCS_CMD(0x6C, 0x21), + INIT_DCS_CMD(0x6D, 0x84), + INIT_DCS_CMD(0x6E, 0x50), + INIT_DCS_CMD(0x6F, 0xB6), + INIT_DCS_CMD(0x70, 0x0E), + INIT_DCS_CMD(0x71, 0xA1), + INIT_DCS_CMD(0x72, 0xCE), + INIT_DCS_CMD(0x73, 0xF8), + INIT_DCS_CMD(0x74, 0xDA), + INIT_DCS_CMD(0x75, 0x1A), + INIT_DCS_CMD(0x76, 0x00), + INIT_DCS_CMD(0x77, 0x00), + INIT_DCS_CMD(0x78, 0x5F), + INIT_DCS_CMD(0x79, 0xE0), + INIT_DCS_CMD(0x7A, 0x01), + INIT_DCS_CMD(0x7B, 0xFF), + INIT_DCS_CMD(0x7C, 0xFF), + INIT_DCS_CMD(0x7D, 0xFF), + INIT_DCS_CMD(0x7E, 0xFF), + INIT_DCS_CMD(0x7F, 0xFE), + INIT_DCS_CMD(0xB1, 0x02), + INIT_DCS_CMD(0x00, 0xFF), + INIT_DCS_CMD(0x01, 0x01), + INIT_DCS_CMD(0x02, 0x00), + INIT_DCS_CMD(0x03, 0x00), + INIT_DCS_CMD(0x04, 0x00), + INIT_DCS_CMD(0x05, 0x00), + INIT_DCS_CMD(0x06, 0x00), + INIT_DCS_CMD(0x07, 0x00), + INIT_DCS_CMD(0x08, 0xC0), + INIT_DCS_CMD(0x09, 0x00), + INIT_DCS_CMD(0x0A, 0x00), + INIT_DCS_CMD(0x0B, 0x04), + INIT_DCS_CMD(0x0C, 0xE6), + INIT_DCS_CMD(0x0D, 0x0D), + INIT_DCS_CMD(0x0F, 0x08), + INIT_DCS_CMD(0x10, 0xE5), + INIT_DCS_CMD(0x11, 0xA8), + INIT_DCS_CMD(0x12, 0xEC), + INIT_DCS_CMD(0x13, 0x54), + INIT_DCS_CMD(0x14, 0x5A), + INIT_DCS_CMD(0x15, 0xD5), + INIT_DCS_CMD(0x16, 0x23), + INIT_DCS_CMD(0x17, 0x11), + INIT_DCS_CMD(0x18, 0x2F), + INIT_DCS_CMD(0x19, 0x93), + INIT_DCS_CMD(0x1A, 0xA6), + INIT_DCS_CMD(0x1B, 0x0F), + INIT_DCS_CMD(0x1C, 0xFF), + INIT_DCS_CMD(0x1D, 0xFF), + INIT_DCS_CMD(0x1E, 0xFF), + INIT_DCS_CMD(0x1F, 0xFF), + INIT_DCS_CMD(0x20, 0xFF), + INIT_DCS_CMD(0x21, 0xFF), + INIT_DCS_CMD(0x22, 0xFF), + INIT_DCS_CMD(0x23, 0xFF), + INIT_DCS_CMD(0x24, 0xFF), + INIT_DCS_CMD(0x25, 0xFF), + INIT_DCS_CMD(0x26, 0xFF), + INIT_DCS_CMD(0x27, 0x1F), + INIT_DCS_CMD(0x28, 0xC8), + INIT_DCS_CMD(0x29, 0xFF), + INIT_DCS_CMD(0x2A, 0xFF), + INIT_DCS_CMD(0x2B, 0xFF), + INIT_DCS_CMD(0x2C, 0x07), + INIT_DCS_CMD(0x2D, 0x03), + INIT_DCS_CMD(0x33, 0x09), + INIT_DCS_CMD(0x35, 0x7F), + INIT_DCS_CMD(0x36, 0x0C), + INIT_DCS_CMD(0x38, 0x7F), + INIT_DCS_CMD(0x3A, 0x80), + INIT_DCS_CMD(0x3B, 0x55), + INIT_DCS_CMD(0x3C, 0xE2), + INIT_DCS_CMD(0x3D, 0x32), + INIT_DCS_CMD(0x3E, 0x00), + INIT_DCS_CMD(0x3F, 0x58), + INIT_DCS_CMD(0x40, 0x06), + INIT_DCS_CMD(0x41, 0x80), + INIT_DCS_CMD(0x42, 0xCB), + INIT_DCS_CMD(0x43, 0x2C), + INIT_DCS_CMD(0x44, 0x61), + INIT_DCS_CMD(0x45, 0x39), + INIT_DCS_CMD(0x46, 0x00), + INIT_DCS_CMD(0x47, 0x00), + INIT_DCS_CMD(0x48, 0x8B), + INIT_DCS_CMD(0x49, 0xD2), + INIT_DCS_CMD(0x4A, 0x01), + INIT_DCS_CMD(0x4B, 0x00), + INIT_DCS_CMD(0x4C, 0x10), + INIT_DCS_CMD(0x4D, 0xC0), + INIT_DCS_CMD(0x4E, 0x0F), + INIT_DCS_CMD(0x4F, 0xF1), + INIT_DCS_CMD(0x50, 0x78), + INIT_DCS_CMD(0x51, 0x7A), + INIT_DCS_CMD(0x52, 0x34), + INIT_DCS_CMD(0x53, 0x99), + INIT_DCS_CMD(0x54, 0xA2), + INIT_DCS_CMD(0x55, 0x03), + INIT_DCS_CMD(0x56, 0x6C), + INIT_DCS_CMD(0x57, 0x1A), + INIT_DCS_CMD(0x58, 0x05), + INIT_DCS_CMD(0x59, 0x30), + INIT_DCS_CMD(0x5A, 0x1E), + INIT_DCS_CMD(0x5B, 0x8F), + INIT_DCS_CMD(0x5C, 0xC7), + INIT_DCS_CMD(0x5D, 0xE3), + INIT_DCS_CMD(0x5E, 0xF1), + INIT_DCS_CMD(0x5F, 0x78), + INIT_DCS_CMD(0x60, 0x3C), + INIT_DCS_CMD(0x61, 0x36), + INIT_DCS_CMD(0x62, 0x1E), + INIT_DCS_CMD(0x63, 0x1B), + INIT_DCS_CMD(0x64, 0x8F), + INIT_DCS_CMD(0x65, 0xC7), + INIT_DCS_CMD(0x66, 0xE3), + INIT_DCS_CMD(0x67, 0x31), + INIT_DCS_CMD(0x68, 0x14), + INIT_DCS_CMD(0x69, 0x89), + INIT_DCS_CMD(0x6A, 0x70), + INIT_DCS_CMD(0x6B, 0x8C), + INIT_DCS_CMD(0x6C, 0x8D), + INIT_DCS_CMD(0x6D, 0x8D), + INIT_DCS_CMD(0x6E, 0x8D), + INIT_DCS_CMD(0x6F, 0x8D), + INIT_DCS_CMD(0x70, 0xC7), + INIT_DCS_CMD(0x71, 0xE3), + INIT_DCS_CMD(0x72, 0xF1), + INIT_DCS_CMD(0x73, 0xD8), + INIT_DCS_CMD(0x74, 0xD8), + INIT_DCS_CMD(0x75, 0xD8), + INIT_DCS_CMD(0x76, 0x18), + INIT_DCS_CMD(0x77, 0x00), + INIT_DCS_CMD(0x78, 0x00), + INIT_DCS_CMD(0x79, 0x00), + INIT_DCS_CMD(0x7A, 0xC6), + INIT_DCS_CMD(0x7B, 0xC6), + INIT_DCS_CMD(0x7C, 0xC6), + INIT_DCS_CMD(0x7D, 0xC6), + INIT_DCS_CMD(0x7E, 0xC6), + INIT_DCS_CMD(0x7F, 0xE3), + INIT_DCS_CMD(0x0B, 0x04), + INIT_DCS_CMD(0xB1, 0x03), + INIT_DCS_CMD(0x2C, 0x2C), + INIT_DCS_CMD(0xB1, 0x00), + INIT_DCS_CMD(0x89, 0x03), + INIT_DCS_CMD(0x11), + INIT_DELAY_CMD(0x78), + INIT_DCS_CMD(0x29), + INIT_DELAY_CMD(0x14), + INIT_END_CMD, + }, +}; -- To view, visit https://review.coreboot.org/c/coreboot/+/34891 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I547bf6f26bdbfed52a00c8cfb268d4e7c17ed889 Gerrit-Change-Number: 34891 Gerrit-PatchSet: 1 Gerrit-Owner: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

3 2

Change in coreboot[master]: vendorcode/cavium: Replace use of __PRE_RAM__
by Kyösti Mälkki (Code Review) 22 Aug '19

22 Aug '19

Hello Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/34998 to look at the new patch set (#11). Change subject: vendorcode/cavium: Replace use of __PRE_RAM__ ...................................................................... vendorcode/cavium: Replace use of __PRE_RAM__ Change-Id: I7c93031c8c0e3a86261988edc956e8cd5a8dd961 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/vendorcode/cavium/bdk/libbdk-hal/bdk-config.c 1 file changed, 9 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/34998/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/34998 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c93031c8c0e3a86261988edc956e8cd5a8dd961 Gerrit-Change-Number: 34998 Gerrit-PatchSet: 11 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: x86: Introduce RESET_VECTOR_IN_RAM option
by Kyösti Mälkki (Code Review) 22 Aug '19

22 Aug '19

Kyösti Mälkki has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/35004 ) Change subject: x86: Introduce RESET_VECTOR_IN_RAM option ...................................................................... Removed Code-Review-2 by Kyösti Mälkki <kyosti.malkki(a)gmail.com> -- To view, visit https://review.coreboot.org/c/coreboot/+/35004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I098ecf8bf200550db1e15f178f7661c1ac516dc5 Gerrit-Change-Number: 35004 Gerrit-PatchSet: 10 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: deleteVote

1 0

Change in coreboot[master]: x86: Introduce RESET_VECTOR_IN_RAM option
by Kyösti Mälkki (Code Review) 22 Aug '19

22 Aug '19

Hello Aaron Durbin, Julius Werner, Marshall Dawson, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/35004 to look at the new patch set (#10). Change subject: x86: Introduce RESET_VECTOR_IN_RAM option ...................................................................... x86: Introduce RESET_VECTOR_IN_RAM option Create a new Kconfig symbol that allows an x86 device to begin execution when its reset vector is in DRAM and not at the traditional 0xfffffff0. The implementation will follow later, this is just to setup various ENV_xxx definitions correctly for the build environment. Change-Id: I098ecf8bf200550db1e15f178f7661c1ac516dc5 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/Kconfig M src/arch/x86/memlayout.ld M src/include/rules.h M src/include/symbols.h 4 files changed, 21 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/35004/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/35004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I098ecf8bf200550db1e15f178f7661c1ac516dc5 Gerrit-Change-Number: 35004 Gerrit-PatchSet: 10 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: x86: Introduce RESET_VECTOR_IN_RAM option
by Kyösti Mälkki (Code Review) 22 Aug '19

22 Aug '19

Hello Aaron Durbin, Julius Werner, Marshall Dawson, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/35004 to look at the new patch set (#9). Change subject: x86: Introduce RESET_VECTOR_IN_RAM option ...................................................................... x86: Introduce RESET_VECTOR_IN_RAM option Create a new Kconfig symbol that allows an x86 device to begin execution when its reset vector is in DRAM and not at the traditional 0xfffffff0. The implementation will follow later, this is just to setup various ENV_xxx definitions correctly for the build environment. Change-Id: I098ecf8bf200550db1e15f178f7661c1ac516dc5 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/Kconfig M src/arch/x86/include/arch/early_variables.h M src/arch/x86/memlayout.ld M src/include/rules.h 4 files changed, 21 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/35004/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/35004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I098ecf8bf200550db1e15f178f7661c1ac516dc5 Gerrit-Change-Number: 35004 Gerrit-PatchSet: 9 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: x86: Introduce RESET_VECTOR_IN_RAM option
by Kyösti Mälkki (Code Review) 22 Aug '19

22 Aug '19

Hello Aaron Durbin, Julius Werner, Marshall Dawson, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/35004 to look at the new patch set (#8). Change subject: x86: Introduce RESET_VECTOR_IN_RAM option ...................................................................... x86: Introduce RESET_VECTOR_IN_RAM option Create a new Kconfig symbol that allows an x86 device to begin execution when its reset vector is in DRAM and not at the traditional 0xfffffff0. The implementation will follow later, this is just to setup various ENV_xxx definitions correctly for the build environment. Change-Id: I098ecf8bf200550db1e15f178f7661c1ac516dc5 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/Kconfig M src/arch/x86/memlayout.ld M src/include/rules.h 3 files changed, 20 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/35004/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/35004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I098ecf8bf200550db1e15f178f7661c1ac516dc5 Gerrit-Change-Number: 35004 Gerrit-PatchSet: 8 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: Split MAYBE_STATIC to _BSS and _NONZERO variants
by Kyösti Mälkki (Code Review) 22 Aug '19

22 Aug '19

Kyösti Mälkki has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/35003 ) Change subject: Split MAYBE_STATIC to _BSS and _NONZERO variants ...................................................................... Removed Code-Review-2 by Kyösti Mälkki <kyosti.malkki(a)gmail.com> -- To view, visit https://review.coreboot.org/c/coreboot/+/35003 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80485ebac94b88c5864a949b17ad1dccdfda6a40 Gerrit-Change-Number: 35003 Gerrit-PatchSet: 7 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: deleteVote

1 0

Change in coreboot[master]: soc/intel/fsp_broadwell_de: Implement sa_get_tseg_base()
by Kyösti Mälkki (Code Review) 22 Aug '19

22 Aug '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33418 ) Change subject: soc/intel/fsp_broadwell_de: Implement sa_get_tseg_base() ...................................................................... Patch Set 4: > Patch Set 4: > > > Patch Set 4: Code-Review-1 > > > > CB:34745 > > > > I have request to always define this in memmap.c to make it available in all stages. > > Denied. There's no point in having this in all stages. > There's no postcar stage and the function isn't usable before RAM as FSP1.0 haven't been run yet. Right.. all stages really meant "not just in ramstage". It just helps a lot to have uniform locations for certain functions. Even if you don't have HAVE_ACPI_RESUME and you would not have TSEG_STAGE_CACHE, I want smm_region() to be defined in memmap.c and available late in romstage. So just define sa_get_tseg_base() in memmap.c and we can define smm_region() with it. No reason to have two copies of the same pci_read_config32(). -- To view, visit https://review.coreboot.org/c/coreboot/+/33418 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22123cbf8d65b25a77fbf72ae8411b23b10c13b4 Gerrit-Change-Number: 33418 Gerrit-PatchSet: 4 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 22 Aug 2019 07:52:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/fsp_broadwell_de: Implement sa_get_tseg_base()
by Patrick Rudolph (Code Review) 22 Aug '19

22 Aug '19

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33418 ) Change subject: soc/intel/fsp_broadwell_de: Implement sa_get_tseg_base() ...................................................................... Patch Set 4: > Patch Set 4: Code-Review-1 > > CB:34745 > > I have request to always define this in memmap.c to make it available in all stages. Denied. There's no point in having this in all stages. There's no postcar stage and the function isn't usable before RAM as FSP1.0 haven't been run yet. -- To view, visit https://review.coreboot.org/c/coreboot/+/33418 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22123cbf8d65b25a77fbf72ae8411b23b10c13b4 Gerrit-Change-Number: 33418 Gerrit-PatchSet: 4 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 22 Aug 2019 07:23:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel: Add function to set DPR
by Subrata Banik (Code Review) 22 Aug '19

22 Aug '19

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33417 ) Change subject: soc/intel: Add function to set DPR ...................................................................... Patch Set 7: (1 comment) https://review.coreboot.org/c/coreboot/+/33417/7/src/soc/intel/fsp_broadwel… File src/soc/intel/fsp_broadwell_de/ramstage.c: https://review.coreboot.org/c/coreboot/+/33417/7/src/soc/intel/fsp_broadwel… PS7, Line 31: #include <soc/broadwell_de.h> > Feel free to address those conflicts, but keep in mind that BroadwellDE is a server platform, while intel/common is for consumer/desktop platforms. It's not easy to unify those and out of scope of this commit. intel common code practice started with SKL hence BDW might not into the same scope, hence intelblock might not fit the requirement here. -- To view, visit https://review.coreboot.org/c/coreboot/+/33417 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I43d2b50a7a6bb41146be99e645cd2ac6a6c9f703 Gerrit-Change-Number: 33417 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 22 Aug 2019 07:18:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: comment

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coreboot-gerrit August 2019