coreboot-gerrit August 2019

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: utils/inteltool: Do more refactoring
by Angel Pons (Code Review) 23 Aug '19

23 Aug '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33422 ) Change subject: utils/inteltool: Do more refactoring ...................................................................... Patch Set 8: (2 comments) https://review.coreboot.org/c/coreboot/+/33422/6/util/inteltool/inteltool.c File util/inteltool/inteltool.c: https://review.coreboot.org/c/coreboot/+/33422/6/util/inteltool/inteltool.c… PS6, Line 660: > As I understand it, this affects only the southbridge. […] Maybe. You would want to be future-proof, just in case. https://review.coreboot.org/c/coreboot/+/33422/6/util/inteltool/inteltool.c… PS6, Line 703: > Why is this necessary? I just don't identify the AHCI controller by the southbridge ID but the devic […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/33422 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idb0c6953aee1ace275206fa4a2c16fa477bad5ec Gerrit-Change-Number: 33422 Gerrit-PatchSet: 8 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Christoph Pomaska <github(a)aufmachen.jetzt> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Marius Genheimer <mail(a)f0wl.cc> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 23 Aug 2019 19:01:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/supermicro/x11ssh: Add Supermicro X11SSH-TF
by Angel Pons (Code Review) 23 Aug '19

23 Aug '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32734 ) Change subject: mb/supermicro/x11ssh: Add Supermicro X11SSH-TF ...................................................................... Patch Set 74: > Patch Set 74: > > > Patch Set 74: > > > > I had a look on Supermicro's products list, especially on the X11 series, when I bought my X11SSM-F some days ago (I am currently working on porting coreboot to that board, too). I just realized that X11SSM-F and X11SSH-TF are basically the same board with just some minor differences (SSH has an m.2 slot and 10GBase-T). > > > > I am wondering if it may be sensible to group those boards in a different scheme than suggested here (mainboards/x11ssh/tf), because we can support more boards this way more simple. > > > > Many X11SS* boards share the same chipset and are more or less the same boards but have only minimal differences in internal/external interfaces. > > > > My suggestion would be to group all these mainboards by chipset and make the rest configurable by selecting the specific board in Kconfig. > > > > This could result in the following tree: *snip* > Is this structure used somewhere else as well in the coreboot tree? I dont think we should reinvent something new and mix up chipsets with vendors and board variants. I believe that renaming this board's folder to "x11ss" would be good enough to add both the X11SSH-TF and the X11SSM-F as variants, as well as any future variants. Looks like the 'X11' in the board names defines the generation (in this case, Intel Skylake), and the 'SS' part means "Single Socket", so all X11SS* board ports could be grouped together. However, I'd prefer if the "variants without baseboard" Kconfig mechanism (e.g., what gigabyte/ga-h61m-s2pv does) would be used instead. I don't think we have a way of knowing what the baseboard for these supermicro boards would be. I don't think splitting by chipset makes sense if all the boards were to run the same code, especially considering the additional nesting this would result in. However, I believe the X10 series is an older Intel platform than the X11 series, so code reuse between those series isn't worth implementing. The resulting paths would be: src/mainboard/supermicro/x11ss/variants/x11ssh-tf/ src/mainboard/supermicro/x11ss/variants/x11ssm-f/ -- To view, visit https://review.coreboot.org/c/coreboot/+/32734 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2edaa4a928de3a065e517c0f20e3302b4b702323 Gerrit-Change-Number: 32734 Gerrit-PatchSet: 74 Gerrit-Owner: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Keno Fischer <keno(a)alumni.harvard.edu> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Name of user not set #1002358 Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: T. Hudson <trammell.hudson(a)gmail.com> Gerrit-Reviewer: Trammell Hudson <hudson(a)trmm.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Christoph Pomaska <github(a)aufmachen.jetzt> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-CC: Michael Niewöhner Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 23 Aug 2019 18:55:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/supermicro/x11ssh: Add Supermicro X11SSH-TF
by Michael Niewöhner (Code Review) 23 Aug '19

23 Aug '19

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32734 ) Change subject: mb/supermicro/x11ssh: Add Supermicro X11SSH-TF ...................................................................... Patch Set 74: > Patch Set 74: > > (2 comments) > > > Patch Set 74: > > > > > Patch Set 74: > > > > > > I had a look on Supermicro's products list, especially on the X11 series, when I bought my X11SSM-F some days ago (I am currently working on porting coreboot to that board, too). I just realized that X11SSM-F and X11SSH-TF are basically the same board with just some minor differences (SSH has an m.2 slot and 10GBase-T). > > > > > > I am wondering if it may be sensible to group those boards in a different scheme than suggested here (mainboards/x11ssh/tf), because we can support more boards this way more simple. > > > > > > Many X11SS* boards share the same chipset and are more or less the same boards but have only minimal differences in internal/external interfaces. > > > > > > My suggestion would be to group all these mainboards by chipset and make the rest configurable by selecting the specific board in Kconfig. > > > > > > This could result in the following tree: > > > > > > src/mainboard/supermicro/ > > > src/mainboard/supermicro/c236/variants/x11ssh-f/ > > > src/mainboard/supermicro/c236/variants/x11ssh-tf/ > > > src/mainboard/supermicro/c236/variants/x11ssm-f/ > > > src/mainboard/supermicro/c232/variants/... > > > ... > > > > > > As one chipset does only appear in one series but a series has multiple chipsets, this could also look like this one: > > > > > > src/mainboard/supermicro/ > > > src/mainboard/supermicro/x10/c222/variants/... > > > src/mainboard/supermicro/x10/c224/variants/... > > > src/mainboard/supermicro/x11/c236/variants/ssh-f/ > > > src/mainboard/supermicro/x11/c236/variants/ssh-tf/ > > > src/mainboard/supermicro/x11/c236/variants/ssm-f/ > > > src/mainboard/supermicro/x11/c232/variants/... > > > ... > > > > > > These boards have C236 and I would not be surprised if those boards work with mostly identical coreboot code/config: > > > X11SSH > > > X11SSH-F > > > X11SSH-TF > > > X11SSH-CTF > > > X11SSi-LN4F > > > X11SSM > > > X11SSM-F > > > X11SSM-TF > > > X11SSM-CTF > > > X11SSZ-F > > > X11SSZ-TLN4F > > > X11SSW-F > > > X11SSW-TF > > > X11SSW-4TF > > > X11SSH-GTF-1585L (soldered CPU, but no SoC) > > > X11SSH-GTF-1585 (soldered CPU, but no SoC) > > > X11SSH-GF-1585L (soldered CPU, but no SoC) > > > X11SSH-GF-1585 (soldered CPU, but no SoC) > > > X11SSA-F > > > X11SSD-F > > > X11SSE-F > > > > Is this structure used somewhere else as well in the coreboot tree? I dont think we should reinvent something new and mix up chipsets with vendors and board variants. > > No, currently not but we will be reimplementing stuff over and over again for these boards otherwise Well, another idea, ignoring the fact that there are x11ss boards that would not fit in there. This also would become very confusing... src/mainboard/supermicro/ src/mainboard/supermicro/x11ss/variants/x11ssh-f/ src/mainboard/supermicro/x11ss/variants/x11ssh-tf/ src/mainboard/supermicro/x11ss/variants/x11ssm-f/ src/mainboard/supermicro/x11ss/variants/... -- To view, visit https://review.coreboot.org/c/coreboot/+/32734 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2edaa4a928de3a065e517c0f20e3302b4b702323 Gerrit-Change-Number: 32734 Gerrit-PatchSet: 74 Gerrit-Owner: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Keno Fischer <keno(a)alumni.harvard.edu> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Name of user not set #1002358 Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: T. Hudson <trammell.hudson(a)gmail.com> Gerrit-Reviewer: Trammell Hudson <hudson(a)trmm.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Christoph Pomaska <github(a)aufmachen.jetzt> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-CC: Michael Niewöhner Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 23 Aug 2019 18:46:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/supermicro/x11ssh: Add Supermicro X11SSH-TF
by Michael Niewöhner (Code Review) 23 Aug '19

23 Aug '19

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32734 ) Change subject: mb/supermicro/x11ssh: Add Supermicro X11SSH-TF ...................................................................... Patch Set 74: (2 comments) > Patch Set 74: > > > Patch Set 74: > > > > I had a look on Supermicro's products list, especially on the X11 series, when I bought my X11SSM-F some days ago (I am currently working on porting coreboot to that board, too). I just realized that X11SSM-F and X11SSH-TF are basically the same board with just some minor differences (SSH has an m.2 slot and 10GBase-T). > > > > I am wondering if it may be sensible to group those boards in a different scheme than suggested here (mainboards/x11ssh/tf), because we can support more boards this way more simple. > > > > Many X11SS* boards share the same chipset and are more or less the same boards but have only minimal differences in internal/external interfaces. > > > > My suggestion would be to group all these mainboards by chipset and make the rest configurable by selecting the specific board in Kconfig. > > > > This could result in the following tree: > > > > src/mainboard/supermicro/ > > src/mainboard/supermicro/c236/variants/x11ssh-f/ > > src/mainboard/supermicro/c236/variants/x11ssh-tf/ > > src/mainboard/supermicro/c236/variants/x11ssm-f/ > > src/mainboard/supermicro/c232/variants/... > > ... > > > > As one chipset does only appear in one series but a series has multiple chipsets, this could also look like this one: > > > > src/mainboard/supermicro/ > > src/mainboard/supermicro/x10/c222/variants/... > > src/mainboard/supermicro/x10/c224/variants/... > > src/mainboard/supermicro/x11/c236/variants/ssh-f/ > > src/mainboard/supermicro/x11/c236/variants/ssh-tf/ > > src/mainboard/supermicro/x11/c236/variants/ssm-f/ > > src/mainboard/supermicro/x11/c232/variants/... > > ... > > > > These boards have C236 and I would not be surprised if those boards work with mostly identical coreboot code/config: > > X11SSH > > X11SSH-F > > X11SSH-TF > > X11SSH-CTF > > X11SSi-LN4F > > X11SSM > > X11SSM-F > > X11SSM-TF > > X11SSM-CTF > > X11SSZ-F > > X11SSZ-TLN4F > > X11SSW-F > > X11SSW-TF > > X11SSW-4TF > > X11SSH-GTF-1585L (soldered CPU, but no SoC) > > X11SSH-GTF-1585 (soldered CPU, but no SoC) > > X11SSH-GF-1585L (soldered CPU, but no SoC) > > X11SSH-GF-1585 (soldered CPU, but no SoC) > > X11SSA-F > > X11SSD-F > > X11SSE-F > > Is this structure used somewhere else as well in the coreboot tree? I dont think we should reinvent something new and mix up chipsets with vendors and board variants. No, currently not but we will be reimplementing stuff over and over again for these boards otherwise https://review.coreboot.org/c/coreboot/+/32734/74/src/mainboard/supermicro/… File src/mainboard/supermicro/x11ssh/board_info.txt: https://review.coreboot.org/c/coreboot/+/32734/74/src/mainboard/supermicro/… PS74, Line 5: ROM socketed: n both, UEFI and BMC rom are socketed https://review.coreboot.org/c/coreboot/+/32734/74/src/mainboard/supermicro/… File src/mainboard/supermicro/x11ssh/variants/tf/board_info.txt: https://review.coreboot.org/c/coreboot/+/32734/74/src/mainboard/supermicro/… PS74, Line 5: ROM socketed: n both, UEFI and BMC rom are socketed -- To view, visit https://review.coreboot.org/c/coreboot/+/32734 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2edaa4a928de3a065e517c0f20e3302b4b702323 Gerrit-Change-Number: 32734 Gerrit-PatchSet: 74 Gerrit-Owner: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Keno Fischer <keno(a)alumni.harvard.edu> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Name of user not set #1002358 Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: T. Hudson <trammell.hudson(a)gmail.com> Gerrit-Reviewer: Trammell Hudson <hudson(a)trmm.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Christoph Pomaska <github(a)aufmachen.jetzt> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-CC: Michael Niewöhner Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 23 Aug 2019 18:39:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/hatch/var/kindred:: Add enable signal for touch screen
by Philip Chen (Code Review) 23 Aug '19

23 Aug '19

Philip Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35039 ) Change subject: mb/google/hatch/var/kindred:: Add enable signal for touch screen ...................................................................... mb/google/hatch/var/kindred:: Add enable signal for touch screen In the next board version, we will use GPP_D9 as enable control for touch screen. BUG=b:137133946 TEST=build Change-Id: I213d0878bfca1ce4059ec0393f59d8e79e1b274c Signed-off-by: Philip Chen <philipchen(a)google.com> --- M src/mainboard/google/hatch/variants/kindred/overridetree.cb 1 file changed, 6 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/35039/1 diff --git a/src/mainboard/google/hatch/variants/kindred/overridetree.cb b/src/mainboard/google/hatch/variants/kindred/overridetree.cb index de633e3..a4ca176 100644 --- a/src/mainboard/google/hatch/variants/kindred/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kindred/overridetree.cb @@ -78,9 +78,10 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)" register "reset_delay_ms" = "100" register "reset_off_delay_ms" = "5" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D9)" + register "enable_delay_ms" = "10" + register "enable_off_delay_ms" = "1" register "has_power_resource" = "1" - register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C4)" - register "stop_off_delay_ms" = "5" device i2c 49 on end end chip drivers/i2c/generic @@ -91,22 +92,12 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)" register "reset_delay_ms" = "1" register "reset_off_delay_ms" = "2" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D9)" + register "enable_delay_ms" = "10" + register "enable_off_delay_ms" = "1" register "has_power_resource" = "1" device i2c 39 on end end - chip drivers/i2c/hid - register "generic.hid" = ""GDIX0000"" - register "generic.desc" = ""Goodix Touchscreen"" - register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_D16_IRQ)" - register "generic.probed" = "1" - register "generic.reset_gpio" = - "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)" - register "generic.reset_delay_ms" = "10" - register "generic.reset_off_delay_ms" = "1" - register "generic.has_power_resource" = "1" - register "hid_desc_reg_offset" = "0x01" - device i2c 5d on end - end chip drivers/generic/gpio_keys register "name" = ""PENH"" register "gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A8)" -- To view, visit https://review.coreboot.org/c/coreboot/+/35039 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I213d0878bfca1ce4059ec0393f59d8e79e1b274c Gerrit-Change-Number: 35039 Gerrit-PatchSet: 1 Gerrit-Owner: Philip Chen <philipchen(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/hatch/variants/kindred: Remove unused devices
by Philip Chen (Code Review) 23 Aug '19

23 Aug '19

Philip Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35038 ) Change subject: mb/google/hatch/variants/kindred: Remove unused devices ...................................................................... mb/google/hatch/variants/kindred: Remove unused devices sx9310 and FPMCU are not used in Kindred. BUG=none TEST=build Change-Id: Ied09d4bdb899d991131a75d7c848ff8637022f53 Signed-off-by: Philip Chen <philipchen(a)google.com> --- M src/mainboard/google/hatch/variants/kindred/overridetree.cb 1 file changed, 3 insertions(+), 44 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/35038/1 diff --git a/src/mainboard/google/hatch/variants/kindred/overridetree.cb b/src/mainboard/google/hatch/variants/kindred/overridetree.cb index becfc49..de633e3 100644 --- a/src/mainboard/google/hatch/variants/kindred/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kindred/overridetree.cb @@ -23,7 +23,6 @@ #| | required to set up a BAR | #| | for TPM communication | #| | before memory is up | - #| GSPI1 | FP MCU | #| I2C0 | Touchpad | #| I2C1 | Touch screen | #| I2C4 | Audio | @@ -120,39 +119,8 @@ device generic 0 on end end end # I2C #1 - device pci 15.2 off end # I2C #2 - device pci 15.3 on - chip drivers/i2c/sx9310 - register "desc" = ""SAR Proximity Sensor"" - register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A0)" - register "speed" = "I2C_SPEED_FAST" - register "uid" = "1" - register "reg_prox_ctrl0" = "0x10" - register "reg_prox_ctrl1" = "0x00" - register "reg_prox_ctrl2" = "0x84" - register "reg_prox_ctrl3" = "0x0e" - register "reg_prox_ctrl4" = "0x07" - register "reg_prox_ctrl5" = "0xc6" - register "reg_prox_ctrl6" = "0x20" - register "reg_prox_ctrl7" = "0x0d" - register "reg_prox_ctrl8" = "0x8d" - register "reg_prox_ctrl9" = "0x43" - register "reg_prox_ctrl10" = "0x1f" - register "reg_prox_ctrl11" = "0x00" - register "reg_prox_ctrl12" = "0x00" - register "reg_prox_ctrl13" = "0x00" - register "reg_prox_ctrl14" = "0x00" - register "reg_prox_ctrl15" = "0x00" - register "reg_prox_ctrl16" = "0x00" - register "reg_prox_ctrl17" = "0x00" - register "reg_prox_ctrl18" = "0x00" - register "reg_prox_ctrl19" = "0x00" - register "reg_sar_ctrl0" = "0x50" - register "reg_sar_ctrl1" = "0x8a" - register "reg_sar_ctrl2" = "0x3c" - device i2c 28 on end - end - end # I2C #3 + device pci 15.2 off end # I2C #2 unused + device pci 15.3 off end # I2C #3 unused device pci 19.0 on chip drivers/i2c/generic register "hid" = ""10EC5682"" @@ -168,16 +136,7 @@ end end #I2C #4 device pci 1a.0 on end # eMMC - device pci 1e.3 on - chip drivers/spi/acpi - register "name" = ""CRFP"" - register "hid" = "ACPI_DT_NAMESPACE_HID" - register "uid" = "1" - register "compat_string" = ""google,cros-ec-spi"" - register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)" - device spi 1 on end - end # FPMCU - end # GSPI #1 + device pci 1e.3 off end # GSPI #1 unused end end -- To view, visit https://review.coreboot.org/c/coreboot/+/35038 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ied09d4bdb899d991131a75d7c848ff8637022f53 Gerrit-Change-Number: 35038 Gerrit-PatchSet: 1 Gerrit-Owner: Philip Chen <philipchen(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/fsp_broadwell_de: Implement SystemAgent TSEG functions
by Kyösti Mälkki (Code Review) 23 Aug '19

23 Aug '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33418 ) Change subject: soc/intel/fsp_broadwell_de: Implement SystemAgent TSEG functions ...................................................................... Patch Set 7: (4 comments) https://review.coreboot.org/c/coreboot/+/33418/7/src/soc/intel/fsp_broadwel… File src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h: https://review.coreboot.org/c/coreboot/+/33418/7/src/soc/intel/fsp_broadwel… PS7, Line 21: uintptr_t sa_get_tseg_base(void); <types.h> for uintptr_t https://review.coreboot.org/c/coreboot/+/33418/7/src/soc/intel/fsp_broadwel… File src/soc/intel/fsp_broadwell_de/memmap.c: https://review.coreboot.org/c/coreboot/+/33418/7/src/soc/intel/fsp_broadwel… PS7, Line 33: uintptr_t sa_get_tseg_base(void) <types.h> for uintptr_t https://review.coreboot.org/c/coreboot/+/33418/7/src/soc/intel/fsp_broadwel… PS7, Line 39: } <commonlib/helpers.h> for ALIGN() and possibly MiB too https://review.coreboot.org/c/coreboot/+/33418/7/src/soc/intel/fsp_broadwel… PS7, Line 48: /* Lower 20bit of TSEG_LIMIT are don't care, need to add 1MiB */ That could have been ALIGN_UP(limit, 1 * MiB) for the same result? -- To view, visit https://review.coreboot.org/c/coreboot/+/33418 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22123cbf8d65b25a77fbf72ae8411b23b10c13b4 Gerrit-Change-Number: 33418 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 23 Aug 2019 14:35:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/fsp_broadwell_de: Implement SystemAgent TSEG functions
by Patrick Rudolph (Code Review) 23 Aug '19

23 Aug '19

Hello Kyösti Mälkki, Patrick Rudolph, Roy Wen, Subrata Banik, David Hendricks, Paul Menzel, Christian Walter, Philipp Deppenwiese, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/33418 to look at the new patch set (#7). Change subject: soc/intel/fsp_broadwell_de: Implement SystemAgent TSEG functions ...................................................................... soc/intel/fsp_broadwell_de: Implement SystemAgent TSEG functions Implement sa_get_tseg_base and sa_get_tseg_size. Used by Intel TXT and the new SMM API. Tested on OCP/Wedge100S. Change-Id: I22123cbf8d65b25a77fbf72ae8411b23b10c13b4 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h M src/soc/intel/fsp_broadwell_de/memmap.c 2 files changed, 33 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/33418/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/33418 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22123cbf8d65b25a77fbf72ae8411b23b10c13b4 Gerrit-Change-Number: 33418 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/fsp_broadwell_de: Implement SystemAgent TSEG functions
by Patrick Rudolph (Code Review) 23 Aug '19

23 Aug '19

Hello Kyösti Mälkki, Patrick Rudolph, Roy Wen, Subrata Banik, David Hendricks, Paul Menzel, Christian Walter, Philipp Deppenwiese, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/33418 to look at the new patch set (#6). Change subject: soc/intel/fsp_broadwell_de: Implement SystemAgent TSEG functions ...................................................................... soc/intel/fsp_broadwell_de: Implement SystemAgent TSEG functions Implement sa_get_tseg_base and sa_get_tseg_size. Used by Intel TXT and the new SMM API. Tested on OCP/Wedge100S. Change-Id: I22123cbf8d65b25a77fbf72ae8411b23b10c13b4 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h M src/soc/intel/fsp_broadwell_de/memmap.c 2 files changed, 31 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/33418/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/33418 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22123cbf8d65b25a77fbf72ae8411b23b10c13b4 Gerrit-Change-Number: 33418 Gerrit-PatchSet: 6 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/fsp_broadwell_de: Implement SystemAgent TSEG functions
by Patrick Rudolph (Code Review) 23 Aug '19

23 Aug '19

Hello Kyösti Mälkki, Patrick Rudolph, Roy Wen, Subrata Banik, David Hendricks, Paul Menzel, Christian Walter, Philipp Deppenwiese, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/33418 to look at the new patch set (#5). Change subject: soc/intel/fsp_broadwell_de: Implement SystemAgent TSEG functions ...................................................................... soc/intel/fsp_broadwell_de: Implement SystemAgent TSEG functions Implement sa_get_tseg_base and sa_get_tseg_size. Used by Intel TXT and the new SMM API. Tested on OCP/Wedge100S. Change-Id: I22123cbf8d65b25a77fbf72ae8411b23b10c13b4 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h M src/soc/intel/fsp_broadwell_de/memmap.c 2 files changed, 30 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/33418/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/33418 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22123cbf8d65b25a77fbf72ae8411b23b10c13b4 Gerrit-Change-Number: 33418 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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