coreboot-gerrit June 2019

coreboot-gerrit@coreboot.org

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Change in ...coreboot[master]: cbfstool: Drop update-fit option
by Patrick Rudolph (Code Review) 21 Jun '19

21 Jun '19

Hello Patrick Rudolph, Aaron Durbin, Julius Werner, Subrata Banik, Duncan Laurie, build bot (Jenkins), Kai Michaelis, Patrick Georgi, Furquan Shaikh, Amol N Sukerkar, Roy Wen, Christian Walter, David Hendricks, Philipp Deppenwiese, Martin Roth, Jens Drenhaus, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/31496 to look at the new patch set (#12). Change subject: cbfstool: Drop update-fit option ...................................................................... cbfstool: Drop update-fit option The ifittool is used instead. Drop old code. Change-Id: I70fec5fef9ffd1ba3049badb398783f31aefb02f Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/soc/intel/Kconfig M util/cbfstool/Makefile.inc M util/cbfstool/cbfstool.c M util/cbfstool/fit.c M util/cbfstool/fit.h 5 files changed, 1 insertion(+), 171 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/31496/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/31496 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70fec5fef9ffd1ba3049badb398783f31aefb02f Gerrit-Change-Number: 31496 Gerrit-PatchSet: 12 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Amol N Sukerkar <amol.n.sukerkar(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jens Drenhaus <jens.drenhaus(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kai Michaelis <kai.michaelis(a)9elements.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: cbfstool: Add ifittool
by Patrick Rudolph (Code Review) 21 Jun '19

21 Jun '19

Hello Aaron Durbin, Julius Werner, Subrata Banik, Duncan Laurie, build bot (Jenkins), Kai Michaelis, Patrick Georgi, Furquan Shaikh, Amol N Sukerkar, Roy Wen, David Hendricks, Philipp Deppenwiese, Nico Huber, Martin Roth, Jens Drenhaus, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/31493 to look at the new patch set (#13). Change subject: cbfstool: Add ifittool ...................................................................... cbfstool: Add ifittool Add the IntelFirmwareInterfaceTable-tool to modify the FIT. As cbfstool is overloaded with arguments, introduce a new tool to only modify FIT, which brings it's own command line syntax. Provide clean interface to: * Clear FIT * Add entry to CBFS file * Add entry to REGION * Delete entries * Add support for types other than 1 * Add support to dump current table * Add support for top-swap * Sort entries by type Most code is reused from existing cbfstool and functionality of cbfstool is kept. It will be removed once the make system uses only ifittool. Based on "Intel Trusted Execution Technology (Intel TXT) LAB Handout" and https://github.com/slimbootloader/slimbootloader . Change-Id: I0fe8cd70611d58823aca1147d5b830722ed72bd5 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M util/cbfstool/Makefile M util/cbfstool/Makefile.inc M util/cbfstool/fit.c M util/cbfstool/fit.h A util/cbfstool/ifittool.c 5 files changed, 1,120 insertions(+), 142 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/31493/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/31493 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0fe8cd70611d58823aca1147d5b830722ed72bd5 Gerrit-Change-Number: 31493 Gerrit-PatchSet: 13 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Amol N Sukerkar <amol.n.sukerkar(a)intel.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jens Drenhaus <jens.drenhaus(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kai Michaelis <kai.michaelis(a)9elements.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Christian Walter <christian.walter(a)9elements.com> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support
by Frans Hendriks (Code Review) 21 Jun '19

21 Jun '19

Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29662 ) Change subject: {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support ...................................................................... Patch Set 47: > Patch Set 47: > > > I assume you used the downstream FSP binary for this test? Please also > > mention your post-code findings here for reference. > > yes, using the Google BSW FSP binary. > last post codes seen were 20 90 42 43 The sequence 20-90-42-43 is related to incorrect/missing CPU microcode. (Noticed this sequence on Intel CherryHill CRB when using wrong (CPUID) ucode.) -- To view, visit https://review.coreboot.org/c/coreboot/+/29662 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab48ad72f1514c93f20d70db5ef4fd8fa2383e8c Gerrit-Change-Number: 29662 Gerrit-PatchSet: 47 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: York Yang <yyang024(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 21 Jun 2019 05:44:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: sdm845: Add UART support
by Julius Werner (Code Review) 21 Jun '19

21 Jun '19

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25373 ) Change subject: sdm845: Add UART support ...................................................................... Patch Set 74: (13 comments) Hi T.mike, It would be great if you could update the issue with using CONFIG_UART_FOR_CONSOLE (instead of 0) in uart_fill_lb() quickly (without waiting to circle back to the driver owner), since it's a trivial fix and it currently breaks runtime firmware console output (making things very annoying for the kernel folks when they run into random qtiseclib/hardware panics). https://review.coreboot.org/#/c/25373/74/src/soc/qualcomm/sdm845/Kconfig File src/soc/qualcomm/sdm845/Kconfig: https://review.coreboot.org/#/c/25373/74/src/soc/qualcomm/sdm845/Kconfig@13 PS74, Line 13: <<<<<<< HEAD Something went wrong here https://review.coreboot.org/#/c/25373/74/src/soc/qualcomm/sdm845/Kconfig@17 PS74, Line 17: select BOOTBLOCK_CONSOLE This is default y, there should be no need to select it explicitly. https://review.coreboot.org/#/c/25373/74/src/soc/qualcomm/sdm845/Kconfig@40 PS74, Line 40: default 9 Not sure if this should have a default here, it's really completely dependent on each board... right? Or is 9 the standard QUP that Qualcomm recommends for all SDM845 boards? In that case this is fine, but then we should remove the override from the mainboard Kconfig because this default is already correct. https://review.coreboot.org/#/c/25373/74/src/soc/qualcomm/sdm845/Kconfig@42 PS74, Line 42: QUP SE instance is 9. This should explain what the config does, not why you're choosing this default. It is what menuconfig will display when the user tries to configure this manually. So something like "Select the QUP instance to be used for UART console output." https://review.coreboot.org/#/c/25373/74/src/soc/qualcomm/sdm845/include/so… File src/soc/qualcomm/sdm845/include/soc/qcom_qup_se.h: https://review.coreboot.org/#/c/25373/74/src/soc/qualcomm/sdm845/include/so… PS74, Line 462: uintptr_t base_addr; No, don't store the same thing twice. If you need to access the raw address, you can cast regs to uintptr_t. https://review.coreboot.org/#/c/25373/74/src/soc/qualcomm/sdm845/uart.c File src/soc/qualcomm/sdm845/uart.c: https://review.coreboot.org/#/c/25373/74/src/soc/qualcomm/sdm845/uart.c@81 PS74, Line 81: div = (unsigned int)(19.2 * MHz) / uart_freq; This looks like it should use QUP_WRAP_CORE_2X_19_2_MHZ Also, should this maybe use DIV_ROUND_CLOSEST() instead? https://review.coreboot.org/#/c/25373/74/src/soc/qualcomm/sdm845/uart.c@120 PS74, Line 120: 0x8000000 This should probably be a named constant? https://review.coreboot.org/#/c/25373/74/src/soc/qualcomm/sdm845/uart.c@126 PS74, Line 126: unsigned char data = 0x0; nit: Don't really need this variable. You can just do return read32(...); } return 0; https://review.coreboot.org/#/c/25373/74/src/soc/qualcomm/sdm845/uart.c@141 PS74, Line 141: while (read32(&regs->geni_status) & GENI_STATUS_M_GENI_CMD_ACTIVE_MASK) nit: Just call uart_tx_flush(idx) https://review.coreboot.org/#/c/25373/74/src/soc/qualcomm/sdm845/uart.c@146 PS74, Line 146: write32(&regs->geni_m_cmd0, 0x08000000); Same named constant? https://review.coreboot.org/#/c/25373/74/src/soc/qualcomm/sdm845/uart.c@161 PS74, Line 161: 0 This needs to be CONFIG_UART_FOR_CONSOLE https://review.coreboot.org/#/c/25373/74/src/soc/qualcomm/sdm845/uart.c@162 PS74, Line 162: 115200 Shouldn't this be get_uart_baudrate()? https://review.coreboot.org/#/c/25373/74/src/soc/qualcomm/sdm845/uart.c@166 PS74, Line 166: lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); Not sure if you should be setting this tbh. This is not an 8250 console. Looks like nothing is really using this coreboot table entry. Probably better to just leave it out. -- To view, visit https://review.coreboot.org/c/coreboot/+/25373 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I827906e820bc15b7f60fdd7876a54c9ed36a48a1 Gerrit-Change-Number: 25373 Gerrit-PatchSet: 74 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mukesh Savaliya <msavaliy(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Fri, 21 Jun 2019 03:06:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: superio/nuvoton/nct6791d: Add symbol to select COM port
by Angel Pons (Code Review) 21 Jun '19

21 Jun '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33640 ) Change subject: superio/nuvoton/nct6791d: Add symbol to select COM port ...................................................................... Patch Set 1: (2 comments) https://review.coreboot.org/#/c/33640/1/src/superio/nuvoton/common/early_se… File src/superio/nuvoton/common/early_serial.c: https://review.coreboot.org/#/c/33640/1/src/superio/nuvoton/common/early_se… PS1, Line 73: Route GPIO8 pin group to COM A > isn't it the other way around? COM A gets routed to the pins of that GPIO group I understand this as "Route the pins which correspond to the GPIO8 group to the COM A function." Sure, the wording in that comment might be imprecise. https://review.coreboot.org/#/c/33640/1/src/superio/nuvoton/common/early_se… PS1, Line 74: pnp_write_config(dev, 0x2a, 0x00); > hmm, would it be better to only modify the bits corresponding to the serial port pinmux? I thought so, but has anybody initialized the superio at such an early stage? the other bits aren't changed from the reset default so it doesn't matter much I think. -- To view, visit https://review.coreboot.org/c/coreboot/+/33640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62dc18810026f9b1550da19950f66af605600ec8 Gerrit-Change-Number: 33640 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Maxim Polyakov <m.poliakov(a)yahoo.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 21 Jun 2019 01:11:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in ...coreboot[master]: vboot: relocate code to log and clear recovery mode switch
by Joel Kitching (Code Review) 21 Jun '19

21 Jun '19

Joel Kitching has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33534 Change subject: vboot: relocate code to log and clear recovery mode switch ...................................................................... vboot: relocate code to log and clear recovery mode switch Logging and clearing the recovery mode switch doesn't have anything to do with vboot_handoff. Move it to the main verstage logic file. BUG=b:124141368, b:124192753 TEST=make clean && make test-abuild BRANCH=none Change-Id: I2e74f3893463e43fe5fad4a8df8036560f34e0db Signed-off-by: Joel Kitching <kitching(a)google.com> --- M src/security/vboot/Makefile.inc M src/security/vboot/vboot_handoff.c M src/security/vboot/vboot_logic.c 3 files changed, 27 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/33534/1 diff --git a/src/security/vboot/Makefile.inc b/src/security/vboot/Makefile.inc index 9ce724e..3306f41 100644 --- a/src/security/vboot/Makefile.inc +++ b/src/security/vboot/Makefile.inc @@ -88,6 +88,7 @@ verstage-y += secdata_tpm.c romstage-$(CONFIG_VBOOT_SEPARATE_VERSTAGE) += secdata_tpm.c endif +romstage-y += vboot_logic.c romstage-y += vboot_handoff.c common.c ramstage-y += common.c diff --git a/src/security/vboot/vboot_handoff.c b/src/security/vboot/vboot_handoff.c index 8a6b3d6..19773c54 100644 --- a/src/security/vboot/vboot_handoff.c +++ b/src/security/vboot/vboot_handoff.c @@ -122,21 +122,6 @@ /* needed until we finish transtion to vboot2 for kernel verification */ fill_vboot_handoff(vh, sd); - - - /* Log the recovery mode switches if required, before clearing them. */ - log_recovery_mode_switch(); - - /* - * The recovery mode switch is cleared (typically backed by EC) here - * to allow multiple queries to get_recovery_mode_switch() and have - * them return consistent results during the verified boot path as well - * as dram initialization. x86 systems ignore the saved dram settings - * in the recovery path in order to start from a clean slate. Therefore - * clear the state here since this function is called when memory - * is known to be up. - */ - clear_recovery_mode_switch(); } /* diff --git a/src/security/vboot/vboot_logic.c b/src/security/vboot/vboot_logic.c index 7b98be2..62e033a 100644 --- a/src/security/vboot/vboot_logic.c +++ b/src/security/vboot/vboot_logic.c @@ -16,6 +16,7 @@ #include <arch/exception.h> #include <assert.h> #include <bootmode.h> +#include <cbmem.h> #include <console/console.h> #include <console/vtxprintf.h> #include <string.h> @@ -281,6 +282,26 @@ vboot_extend_pcr(ctx, 1, HWID_DIGEST_PCR); } +static void vboot_log_and_clear_recovery_mode_switch(int unused) +{ + /* Log the recovery mode switches if required, before clearing them. */ + log_recovery_mode_switch(); + + /* + * The recovery mode switch is cleared (typically backed by EC) here + * to allow multiple queries to get_recovery_mode_switch() and have + * them return consistent results during the verified boot path as well + * as dram initialization. x86 systems ignore the saved dram settings + * in the recovery path in order to start from a clean slate. Therefore + * clear the state here since this function is called when memory + * is known to be up. + */ + clear_recovery_mode_switch(); +} +#if !CONFIG(VBOOT_STARTS_IN_ROMSTAGE) +ROMSTAGE_CBMEM_INIT_HOOK(vboot_log_and_clear_recovery_mode_switch) +#endif + /** * Verify and select the firmware in the RW image * @@ -448,6 +469,11 @@ vboot_set_selected_region(region_device_region(&fw_main)); verstage_main_exit: + /* If CBMEM is not up yet, let the ROMSTAGE_CBMEM_INIT_HOOK take care + of running this function. */ + if (ENV_ROMSTAGE && CONFIG(VBOOT_STARTS_IN_ROMSTAGE)) + vboot_log_and_clear_recovery_mode_switch(0); + vboot_finalize_work_context(&ctx); timestamp_add_now(TS_END_VBOOT); } -- To view, visit https://review.coreboot.org/c/coreboot/+/33534 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2e74f3893463e43fe5fad4a8df8036560f34e0db Gerrit-Change-Number: 33534 Gerrit-PatchSet: 1 Gerrit-Owner: Joel Kitching <kitching(a)google.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: vboot: remove functions which read vboot_handoff.out_flags
by Joel Kitching (Code Review) 21 Jun '19

21 Jun '19

Joel Kitching has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33533 Change subject: vboot: remove functions which read vboot_handoff.out_flags ...................................................................... vboot: remove functions which read vboot_handoff.out_flags These functions are no longer used and may be removed: * vboot_handoff_check_recovery_flag * vboot_get_handoff_flag BUG=b:124141368, b:124192753 TEST=make clean && make test-abuild BRANCH=none Change-Id: Ie05652ef1288eef74bd2e7e8bea79fd29d523859 Signed-off-by: Joel Kitching <kitching(a)google.com> --- M src/security/vboot/vboot_common.c M src/security/vboot/vboot_common.h 2 files changed, 0 insertions(+), 27 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/33533/1 diff --git a/src/security/vboot/vboot_common.c b/src/security/vboot/vboot_common.c index a18bf23..8456dcf 100644 --- a/src/security/vboot/vboot_common.c +++ b/src/security/vboot/vboot_common.c @@ -75,24 +75,6 @@ return 0; } -static int vboot_get_handoff_flag(uint32_t flag) -{ - struct vboot_handoff *vbho; - - /* - * If vboot_handoff cannot be found, return default value of flag as 0. - */ - if (vboot_get_handoff_info((void **)&vbho, NULL)) - return 0; - - return !!(vbho->out_flags & flag); -} - -int vboot_handoff_check_recovery_flag(void) -{ - return vboot_get_handoff_flag(VB_INIT_OUT_ENABLE_RECOVERY); -} - /* ============================ VBOOT REBOOT ============================== */ void __weak vboot_platform_prepare_reboot(void) { diff --git a/src/security/vboot/vboot_common.h b/src/security/vboot/vboot_common.h index a3180c1d..241dc90 100644 --- a/src/security/vboot/vboot_common.h +++ b/src/security/vboot/vboot_common.h @@ -53,15 +53,6 @@ */ int vboot_get_handoff_info(void **addr, uint32_t *size); -/* - * The following functions read vboot_handoff structure to obtain requested - * information. If vboot handoff is not available, 0 is returned by default. - * If vboot handoff is available: - * Returns 1 for flag if true - * Returns 0 for flag if false - */ -int vboot_handoff_check_recovery_flag(void); - /* ============================ VBOOT REBOOT ============================== */ /* * vboot_reboot handles the reboot requests made by vboot_reference library. It -- To view, visit https://review.coreboot.org/c/coreboot/+/33533 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie05652ef1288eef74bd2e7e8bea79fd29d523859 Gerrit-Change-Number: 33533 Gerrit-PatchSet: 1 Gerrit-Owner: Joel Kitching <kitching(a)google.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: vboot: remove vboot_handoff_get_recovery_reason
by Joel Kitching (Code Review) 21 Jun '19

21 Jun '19

Joel Kitching has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33532 Change subject: vboot: remove vboot_handoff_get_recovery_reason ...................................................................... vboot: remove vboot_handoff_get_recovery_reason Two functions retrieve vboot recovery_reason: * vboot_handoff_get_recovery_reason * vboot_get_recovery_reason_shared_data Previously, when CBMEM comes online, a vboot_handoff data structure is created, and depending on the architecture, coreboot may eventually lose access to vboot_working_data. After implementing vboot_working_data CBMEM migration, vboot_working_data is always guaranteed to be accessible. vboot_get_recovery_reason_shared_data is corrected to also allow accessing vboot_working_data in ramstage and postcar. Now, vboot_handoff_get_recovery reason returning a valid recovery reason implies that vboot_get_recovery_reason_shared_data should *also* return a valid recovery reason. Thus we may remove the former. BUG=b:124141368, b:124192753 TEST=make clean && make test-abuild BRANCH=none Change-Id: Iac216dc968dd155d9d4f8bd0f2dfd5034762f9a0 Signed-off-by: Joel Kitching <kitching(a)google.com> --- M src/security/vboot/bootmode.c M src/security/vboot/vboot_common.c M src/security/vboot/vboot_common.h 3 files changed, 0 insertions(+), 29 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/33532/1 diff --git a/src/security/vboot/bootmode.c b/src/security/vboot/bootmode.c index 68749f0..0d9721b 100644 --- a/src/security/vboot/bootmode.c +++ b/src/security/vboot/bootmode.c @@ -26,10 +26,6 @@ static int vboot_get_recovery_reason_shared_data(void) { - /* Shared data does not exist for Ramstage and Post-CAR stage. */ - if (ENV_RAMSTAGE || ENV_POSTCAR) - return 0; - struct vb2_shared_data *sd = vboot_get_shared_data(); assert(sd); return sd->recovery_reason; @@ -115,16 +111,6 @@ return reason; /* - * Check recovery flag in vboot_handoff for stages post CBMEM coming - * online. Since for some stages there is no way to know if cbmem has - * already come online, try looking up handoff anyways. If it fails, - * flow will fallback to looking up shared data. - */ - if (cbmem_possibly_online() && - ((reason = vboot_handoff_get_recovery_reason()) != 0)) - return reason; - - /* * For stages where CBMEM might not be online, identify if vboot * verification is already complete and no slot was selected * i.e. recovery path was requested. diff --git a/src/security/vboot/vboot_common.c b/src/security/vboot/vboot_common.c index ff8e6c8..a18bf23 100644 --- a/src/security/vboot/vboot_common.c +++ b/src/security/vboot/vboot_common.c @@ -93,19 +93,6 @@ return vboot_get_handoff_flag(VB_INIT_OUT_ENABLE_RECOVERY); } -int vboot_handoff_get_recovery_reason(void) -{ - struct vboot_handoff *vbho; - VbSharedDataHeader *sd; - - if (vboot_get_handoff_info((void **)&vbho, NULL)) - return 0; - - sd = (VbSharedDataHeader *)vbho->shared_data; - - return sd->recovery_reason; -} - /* ============================ VBOOT REBOOT ============================== */ void __weak vboot_platform_prepare_reboot(void) { diff --git a/src/security/vboot/vboot_common.h b/src/security/vboot/vboot_common.h index a785a8b..a3180c1d 100644 --- a/src/security/vboot/vboot_common.h +++ b/src/security/vboot/vboot_common.h @@ -59,10 +59,8 @@ * If vboot handoff is available: * Returns 1 for flag if true * Returns 0 for flag if false - * Returns value read for other fields */ int vboot_handoff_check_recovery_flag(void); -int vboot_handoff_get_recovery_reason(void); /* ============================ VBOOT REBOOT ============================== */ /* -- To view, visit https://review.coreboot.org/c/coreboot/+/33532 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac216dc968dd155d9d4f8bd0f2dfd5034762f9a0 Gerrit-Change-Number: 33532 Gerrit-PatchSet: 1 Gerrit-Owner: Joel Kitching <kitching(a)google.com> Gerrit-MessageType: newchange

3 9

Change in ...coreboot[master]: mediatek/mt8183: modify vsim2 calibration
by hsin-hsiung wang (Code Review) 21 Jun '19

21 Jun '19

hsin-hsiung wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32057 Change subject: mediatek/mt8183: modify vsim2 calibration ...................................................................... mediatek/mt8183: modify vsim2 calibration This patch modifies vsim2 calibration to meet 2.7V BUG=b:126139364 BRANCH=none TEST=measure vsim2 voltage with multimeter Change-Id: I4dffdde89cbde91286d92e6c2b445f0b3d0ad2fe Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang(a)mediatek.com> --- M src/soc/mediatek/mt8183/include/soc/mt6358.h M src/soc/mediatek/mt8183/mt6358.c 2 files changed, 33 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/32057/1 diff --git a/src/soc/mediatek/mt8183/include/soc/mt6358.h b/src/soc/mediatek/mt8183/include/soc/mt6358.h index 02937ba..157f6be 100644 --- a/src/soc/mediatek/mt8183/include/soc/mt6358.h +++ b/src/soc/mediatek/mt8183/include/soc/mt6358.h @@ -27,6 +27,21 @@ PMIC_CPSDSA4 = 0x0a2e, PMIC_VDRAM1_VOSEL_SLEEP = 0x160a, PMIC_SMPS_ANA_CON0 = 0x1808, + PMIC_VSIM2_ANA_CON0 = 0x1c34, +}; + +enum { + VSIM2_CALI_POS_0_MV = 0, + VSIM2_CALI_POS_10_MV, + VSIM2_CALI_POS_20_MV, + VSIM2_CALI_POS_30_MV, + VSIM2_CALI_POS_40_MV, + VSIM2_CALI_POS_50_MV, + VSIM2_CALI_POS_60_MV, + VSIM2_CALI_POS_70_MV, + VSIM2_CALI_POS_80_MV, + VSIM2_CALI_POS_90_MV, + VSIM2_CALI_POS_100_MV, }; struct pmic_setting { diff --git a/src/soc/mediatek/mt8183/mt6358.c b/src/soc/mediatek/mt8183/mt6358.c index 3dc9fe2..bcddb783 100644 --- a/src/soc/mediatek/mt8183/mt6358.c +++ b/src/soc/mediatek/mt8183/mt6358.c @@ -769,6 +769,23 @@ lp_setting[i].mask, lp_setting[i].shift); } +static void pmic_set_vsim2_cali(void) +{ + u16 vsim2_cali; + + /* [11:8]=0x8, RG_VSIM2_VOSEL = 2.7V */ + pwrap_write_field(PMIC_VSIM2_ANA_CON0, 0x8, 0xF, 8); + + /* [3:0], RG_VSIM2_VOCAL */ + vsim2_cali = pwrap_read_field(PMIC_VSIM2_ANA_CON0, 0xF, 0); + if (vsim2_cali > VSIM2_CALI_POS_60_MV) + vsim2_cali -= VSIM2_CALI_POS_60_MV; + else + vsim2_cali = VSIM2_CALI_POS_0_MV; + + pwrap_write_field(PMIC_VSIM2_ANA_CON0, vsim2_cali, 0xF, 0); +} + void mt6358_init(void) { if (pwrap_init()) @@ -780,4 +797,5 @@ wk_sleep_voltage_by_ddr(); wk_power_down_seq(); mt6358_lp_setting(); + pmic_set_vsim2_cali(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/32057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4dffdde89cbde91286d92e6c2b445f0b3d0ad2fe Gerrit-Change-Number: 32057 Gerrit-PatchSet: 1 Gerrit-Owner: hsin-hsiung wang <hsin-hsiung.wang(a)mediatek.com> Gerrit-MessageType: newchange

6 32

Change in ...coreboot[master]: superio/nuvoton/nct6776: Make Kconfig symbol dependent
by Felix Held (Code Review) 21 Jun '19

21 Jun '19

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33440 ) Change subject: superio/nuvoton/nct6776: Make Kconfig symbol dependent ...................................................................... Patch Set 2: looks good to me, but the first patch in this series needs to be ready before I'll +2 this one -- To view, visit https://review.coreboot.org/c/coreboot/+/33440 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9c52d596080360bf3fc25265749ced66ec44f5dc Gerrit-Change-Number: 33440 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 20 Jun 2019 22:48:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit June 2019