Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32682
Change subject: mb/samsung/lumpy: Fix MRC raminit
......................................................................
mb/samsung/lumpy: Fix MRC raminit
Fix onboard SPD config placement for mrc.bin and remove outdated
comment.
ChangeId dedcc78ff44f4eb7c227ade84ee35e007f183a89 removed support for
0xf0 SPD address, but the spd_data index wasn't adjusted.
ChangeId If1b94e050d7e8d0dbd349c0415a182730aa5fa90 missed that too while
fixing the channel order for native raminit.
Change-Id: If1910e82a4bd178c2a6c2991c91e09782122888e
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M src/mainboard/samsung/lumpy/romstage.c
1 file changed, 1 insertion(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/32682/1
diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c
index 1080689..a77149d 100644
--- a/src/mainboard/samsung/lumpy/romstage.c
+++ b/src/mainboard/samsung/lumpy/romstage.c
@@ -148,7 +148,6 @@
die("SPD data not found.");
if (spd_file_len < (spd_index + 1) * 256)
die("Missing SPD data.");
- // leave onboard dimm address at f0, and copy spd data there.
return spd_data[spd_index];
}
@@ -198,8 +197,7 @@
},
};
*pei_data = pei_data_template;
- // leave onboard dimm address at f0, and copy spd data there.
- memcpy(pei_data->spd_data[0], locate_spd(), 256);
+ memcpy(pei_data->spd_data[2], locate_spd(), 256);
}
const struct southbridge_usb_port mainboard_usb_ports[] = {
--
To view, visit https://review.coreboot.org/c/coreboot/+/32682
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If1910e82a4bd178c2a6c2991c91e09782122888e
Gerrit-Change-Number: 32682
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-MessageType: newchange
Joel Kitching has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33386
Change subject: vboot: use vboot2 API to set initial secdatak value
......................................................................
vboot: use vboot2 API to set initial secdatak value
Previously, the initial value for secdatak was embedded
in secdata_tpm.c as a uint8_t array. Switch to using
vb2api_secdatak_create instead, and write the value in
ctx->secdatak.
Remove an unnecessary call to vb2api_secdata_create in
_factory_initialize_tpm.
BUG=b:124141368
TEST=make clean && make test-abuild
BRANCH=none
Change-Id: I74261453df6cc55ef3f38d8fb922bcc604084c0a
Signed-off-by: Joel Kitching <kitching(a)google.com>
---
M src/security/vboot/secdata_tpm.c
1 file changed, 9 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/33386/1
diff --git a/src/security/vboot/secdata_tpm.c b/src/security/vboot/secdata_tpm.c
index 39cd614..ff62185 100644
--- a/src/security/vboot/secdata_tpm.c
+++ b/src/security/vboot/secdata_tpm.c
@@ -149,18 +149,6 @@
}
/*
- * This is derived from rollback_index.h of vboot_reference. see struct
- * RollbackSpaceKernel for details.
- */
-static const uint8_t secdata_kernel[] = {
- 0x02,
- 0x4C, 0x57, 0x52, 0x47,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00,
- 0xE8,
-};
-
-/*
* This is used to initialize the TPM space for recovery hash after defining
* it. Since there is no data available to calculate hash at the point where TPM
* space is defined, initialize it to all 0s.
@@ -241,7 +229,7 @@
static uint32_t set_kernel_space(const void *kernel_blob)
{
return set_space("kernel", KERNEL_NV_INDEX, kernel_blob,
- sizeof(secdata_kernel), rw_space_attributes, NULL, 0);
+ VB2_SECDATAK_SIZE, rw_space_attributes, NULL, 0);
}
static uint32_t set_rec_hash_space(const uint8_t *data)
@@ -262,7 +250,7 @@
* indication that TPM factory initialization was successfully
* completed.
*/
- RETURN_ON_FAILURE(set_kernel_space(secdata_kernel));
+ RETURN_ON_FAILURE(set_kernel_space(ctx->secdatak));
if (CONFIG(VBOOT_HAS_REC_HASH_SPACE))
RETURN_ON_FAILURE(set_rec_hash_space(rec_hash_data));
@@ -366,16 +354,15 @@
VBDEBUG("TPM: Clearing owner\n");
RETURN_ON_FAILURE(tpm_clear_and_reenable());
- /* Define and initialize the kernel space */
+ /* Define and write secdatak kernel space. */
RETURN_ON_FAILURE(safe_define_space(KERNEL_NV_INDEX,
TPM_NV_PER_PPWRITE,
- sizeof(secdata_kernel)));
+ VB2_SECDATAK_SIZE));
RETURN_ON_FAILURE(write_secdata(KERNEL_NV_INDEX,
- secdata_kernel,
- sizeof(secdata_kernel)));
+ ctx->secdatak,
+ VB2_SECDATAK_SIZE));
- /* Defines and sets vb2 secdata space */
- vb2api_secdata_create(ctx);
+ /* Define and write secdata firmware space. */
RETURN_ON_FAILURE(safe_define_space(FIRMWARE_NV_INDEX,
TPM_NV_PER_GLOBALLOCK |
TPM_NV_PER_PPWRITE,
@@ -417,8 +404,9 @@
{
uint32_t result;
- /* Defines and sets vb2 secdata space */
+ /* Set initial values of secdata and secdatak spaces. */
vb2api_secdata_create(ctx);
+ vb2api_secdatak_create(ctx);
VBDEBUG("TPM: factory initialization\n");
--
To view, visit https://review.coreboot.org/c/coreboot/+/33386
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I74261453df6cc55ef3f38d8fb922bcc604084c0a
Gerrit-Change-Number: 33386
Gerrit-PatchSet: 1
Gerrit-Owner: Joel Kitching <kitching(a)google.com>
Gerrit-MessageType: newchange
Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32291
Change subject: nb/via/vx900: Use 64 bits to prevent overflow
......................................................................
nb/via/vx900: Use 64 bits to prevent overflow
The bit operations are currently done using 32 bit math.
Cast the first argument to 64 bits to prevent possible
overflow.
Found-by: Coverity Scan, CID 1229665, 1229666
Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca>
Change-Id: Idd180f31e8cff797a6499b12bc685daa993aae05
---
M src/northbridge/via/vx900/northbridge.c
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/32291/1
diff --git a/src/northbridge/via/vx900/northbridge.c b/src/northbridge/via/vx900/northbridge.c
index d865f38..dcb7fd5 100644
--- a/src/northbridge/via/vx900/northbridge.c
+++ b/src/northbridge/via/vx900/northbridge.c
@@ -266,8 +266,8 @@
* to be always mapped to the top of 1M, but this can be overcome with
* some smart positive/subtractive resource decoding */
ram_resource(dev, idx++, 768, (tolmk - 768));
- uma_memory_size = fbufk << 10;
- uma_memory_base = tolmk << 10;
+ uma_memory_size = (uint64_t)fbufk << 10;
+ uma_memory_base = (uint64_t)tolmk << 10;
//uma_resource(dev, idx++, uma_memory_base>>10, uma_memory_size>>10);
--
To view, visit https://review.coreboot.org/c/coreboot/+/32291
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Idd180f31e8cff797a6499b12bc685daa993aae05
Gerrit-Change-Number: 32291
Gerrit-PatchSet: 1
Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca>
Gerrit-MessageType: newchange