coreboot-gerrit May 2019

coreboot-gerrit@coreboot.org

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Change in ...coreboot[master]: Makefile: Turn off SSE instructions for x86_32 architecture
by Alan Green (Code Review) 22 May '19

22 May '19

Alan Green has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32887 ) Change subject: Makefile: Turn off SSE instructions for x86_32 architecture ...................................................................... Patch Set 5: (4 comments) > Patch Set 2: Code-Review+1 > > (3 comments) https://review.coreboot.org/#/c/32887/2//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/32887/2//COMMIT_MSG@14 PS2, Line 14: it's code generation appears unaffected. > GCC has CFLAGS -march=i686 for coreboot proper and this simply keeps both SSE/SSE2 disabled. […] I see. That sounds more like the reason that no SSE instructions are being emitted by GCC. I found these lines in util/xcompile/xcompile ifneq (\$(CONFIG_USE_MARCH_586)\$(CONFIG_LP_USE_MARCH_586),) GCC_CFLAGS_${TARCH} += -march=i586 else GCC_CFLAGS_${TARCH} += -march=i686 endif Given that, probably a better fix than this adding a -mno-sse is to add the same -march flag for Clang compiles as we do for GCC compiles. I'll get that changeset ready in the next few days.. https://review.coreboot.org/#/c/32887/2//COMMIT_MSG@18 PS2, Line 18: code : code > Failing QEMU command line? If the emulated CPU is without SSE support, invalid opcode is the expecte […] Clang compiled coreboot fails at this point with both qemu-system-x86_64 and qemu-system-i386. I have checked in the QEMU console and I can see that the bits in CR4 have not been set to enable SSE. Therefore failing on an SSE instruction is correct behaviour for the emulator. https://review.coreboot.org/#/c/32887/2//COMMIT_MSG@26 PS2, Line 26: B. "Fix" Clang so that no-mmx implies no-sse (Will take a long time) > Why would you want no-mmx imply no-sse? Separate sets of registers (mmx vs xmm, afair). Looking into this further, for GCC no-mmx does not imply no-sse. As Kyösti wrote, they are independent. See https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/x86-Options.html#index-mmmx I have dropped this as a suggested solution. https://review.coreboot.org/#/c/32887/2//COMMIT_MSG@28 PS2, Line 28: > One blank line should be enough. Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/32887 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia9e86900004a285e9a21a300894624b128e6b4d0 Gerrit-Change-Number: 32887 Gerrit-PatchSet: 5 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-Reviewer: Alan Green <avg(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Wed, 22 May 2019 01:06:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in ...coreboot[master]: Makefile: Turn off SSE instructions for x86_32 architecture
by Alan Green (Code Review) 22 May '19

22 May '19

Hello Edward O'Callaghan, Paul Menzel, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/32887 to look at the new patch set (#5). Change subject: Makefile: Turn off SSE instructions for x86_32 architecture ...................................................................... Makefile: Turn off SSE instructions for x86_32 architecture Passes -no-sse to cause Clang to not generate SSE instructions when building x86_32 code. This flag is also passed to GCC, although it appears that GCC does not generate SSE instructions. Using GDB and QEMU, I have verified that without this patch, Clang-compiled code is failing on an SSE instruction. When the machine executes that instruction, the machine restarts. When running code compiled using -no-sse, there is no SSE instruction and booting completes. Some other possible solutions to this problem are: A. Drop support for x86 CPUs without SSE. (Seems unnecessary) B. Target an older architecture - for example -march=i686. Signed-off-by: Alan Green <avg(a)google.com> Change-Id: Ia9e86900004a285e9a21a300894624b128e6b4d0 --- M Makefile 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/32887/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/32887 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia9e86900004a285e9a21a300894624b128e6b4d0 Gerrit-Change-Number: 32887 Gerrit-PatchSet: 5 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-Reviewer: Alan Green <avg(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: Makefile: Turn off SSE instructions for x86_32 architecture
by Alan Green (Code Review) 22 May '19

22 May '19

Hello Edward O'Callaghan, Paul Menzel, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/32887 to look at the new patch set (#4). Change subject: Makefile: Turn off SSE instructions for x86_32 architecture ...................................................................... Makefile: Turn off SSE instructions for x86_32 architecture Passes -no-sse to cause Clang to not generate SSE instructions when building x86_32 code. This flag is also passed to GCC, although it appears that GCC does not generate SSE instructions. Using GDB and QEMU, I have verified that without this patch, Clang-compiled code is failing on an SSE instruction. When the machine executes that instruction, the machine restarts. When running code compiled using -no-sse, there is no SSE instruction and booting completes. Some other possible solutions to this problem are: A. Drop support for x86 CPUs without SSE. (Seems unnecessary) Signed-off-by: Alan Green <avg(a)google.com> Change-Id: Ia9e86900004a285e9a21a300894624b128e6b4d0 --- M Makefile 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/32887/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/32887 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia9e86900004a285e9a21a300894624b128e6b4d0 Gerrit-Change-Number: 32887 Gerrit-PatchSet: 4 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-Reviewer: Alan Green <avg(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: Makefile: Turn off SSE instructions for x86_32 architecture
by Alan Green (Code Review) 22 May '19

22 May '19

Hello Edward O'Callaghan, Paul Menzel, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/32887 to look at the new patch set (#3). Change subject: Makefile: Turn off SSE instructions for x86_32 architecture ...................................................................... Makefile: Turn off SSE instructions for x86_32 architecture Passes -no-sse to cause Clang to not generate SSE instructions when building x86_32 code. This flag is also passed to GCC, although it appears that GCC does not generate SSE instructions. GCC is probably respecting the no-mmx and it's code generation appears unaffected. Using GDB and QEMU, I have verified that without this patch, Clang-compiled code is failing on an SSE instruction. When the machine executes that instruction, the machine restarts. When running code compiled using -no-sse, there is no SSE instruction and booting completes. Some other possible solutions to this problem are: A. Drop support for x86 CPUs without SSE. (Seems unnecessary) B. "Fix" Clang so that no-mmx implies no-sse (Will take a long time) Signed-off-by: Alan Green <avg(a)google.com> Change-Id: Ia9e86900004a285e9a21a300894624b128e6b4d0 --- M Makefile 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/32887/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/32887 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia9e86900004a285e9a21a300894624b128e6b4d0 Gerrit-Change-Number: 32887 Gerrit-PatchSet: 3 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-Reviewer: Alan Green <avg(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mainboard/facebook/fbg1701: Do initial mainboard commit
by Patrick Rudolph (Code Review) 21 May '19

21 May '19

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30414 ) Change subject: mainboard/facebook/fbg1701: Do initial mainboard commit ...................................................................... Patch Set 24: Code-Review+1 The whole superio configuration is missing. -- To view, visit https://review.coreboot.org/c/coreboot/+/30414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Gerrit-Change-Number: 30414 Gerrit-PatchSet: 24 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Alex Thiessen <alex.thiessen.de+coreboot(a)gmail.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: David Hendricks <david.hendricks(a)gmail.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Comment-Date: Tue, 21 May 2019 19:42:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: mainboard/facebook/fbg1701: Do initial mainboard commit
by Alex Thiessen (Code Review) 21 May '19

21 May '19

Alex Thiessen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30414 ) Change subject: mainboard/facebook/fbg1701: Do initial mainboard commit ...................................................................... Patch Set 24: Code-Review+1 (4 comments) https://review.coreboot.org/#/c/30414/23//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/30414/23//COMMIT_MSG@12 PS23, Line 12: manufacture > manufacturer Done https://review.coreboot.org/#/c/30414/23/src/mainboard/facebook/fbg1701/cmo… File src/mainboard/facebook/fbg1701/cmos.layout: https://review.coreboot.org/#/c/30414/23/src/mainboard/facebook/fbg1701/cmo… PS23, Line 69: 4 > Use by core, not by platform. Expect that 'h' is covering this. […] Done https://review.coreboot.org/#/c/30414/23/src/mainboard/facebook/fbg1701/cmo… PS23, Line 91: 896 32 r 0 mrc_scrambler_seed : 928 32 r 0 mrc_scrambler_seed_s3 > Result of copy/paste from Intel Stago. […] Done https://review.coreboot.org/#/c/30414/23/src/mainboard/facebook/fbg1701/rom… File src/mainboard/facebook/fbg1701/romstage.c: https://review.coreboot.org/#/c/30414/23/src/mainboard/facebook/fbg1701/rom… PS23, Line 45: uintptr_t > possibly missing direct include Done -- To view, visit https://review.coreboot.org/c/coreboot/+/30414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Gerrit-Change-Number: 30414 Gerrit-PatchSet: 24 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Alex Thiessen <alex.thiessen.de+coreboot(a)gmail.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: David Hendricks <david.hendricks(a)gmail.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Comment-Date: Tue, 21 May 2019 19:33:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Alex Thiessen <alex.thiessen.de+coreboot(a)gmail.com> Comment-In-Reply-To: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-MessageType: comment

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Change in ...coreboot[master]: post_code: add post code for video initialization failure
by Patrick Rudolph (Code Review) 21 May '19

21 May '19

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32775 ) Change subject: post_code: add post code for video initialization failure ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/32775 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc7f7defbed34038f445949010a37c8e368aae20 Gerrit-Change-Number: 32775 Gerrit-PatchSet: 6 Gerrit-Owner: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Jett Rink <jettrink(a)chromium.org> Gerrit-Reviewer: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 21 May 2019 19:17:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: post_code: add post code for hardware initialization failure
by Patrick Rudolph (Code Review) 21 May '19

21 May '19

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32774 ) Change subject: post_code: add post code for hardware initialization failure ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/32774 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73820d24b3e1c269d9d446a78ef4f97e167e3552 Gerrit-Change-Number: 32774 Gerrit-PatchSet: 5 Gerrit-Owner: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Jett Rink <jettrink(a)chromium.org> Gerrit-Reviewer: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 21 May 2019 19:16:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: post_code: add post code for video initialization failure
by Jett Rink (Code Review) 21 May '19

21 May '19

Jett Rink has uploaded a new patch set (#6) to the change originally created by Keith Short. ( https://review.coreboot.org/c/coreboot/+/32775 ) Change subject: post_code: add post code for video initialization failure ...................................................................... post_code: add post code for video initialization failure Add a new post code POST_VIDEO_FAILURE used when the Intel FSP silicon initialization returns an error when graphics was also initialized. BUG=b:124401932 BRANCH=sarien TEST=build coreboot for sarien and arcada platforms Change-Id: Ibc7f7defbed34038f445949010a37c8e368aae20 Signed-off-by: Keith Short <keithshort(a)chromium.org> --- M Documentation/POSTCODES M src/drivers/intel/fsp2_0/silicon_init.c M src/include/console/post_codes.h 3 files changed, 21 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/32775/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/32775 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc7f7defbed34038f445949010a37c8e368aae20 Gerrit-Change-Number: 32775 Gerrit-PatchSet: 6 Gerrit-Owner: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Jett Rink <jettrink(a)chromium.org> Gerrit-Reviewer: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: post_code: add post code for hardware initialization failure
by Jett Rink (Code Review) 21 May '19

21 May '19

Jett Rink has uploaded a new patch set (#5) to the change originally created by Keith Short. ( https://review.coreboot.org/c/coreboot/+/32774 ) Change subject: post_code: add post code for hardware initialization failure ...................................................................... post_code: add post code for hardware initialization failure Add a new post code POST_HW_INIT_FAILURE, used when coreboot fails to detect or initialize a required hardware component. BUG=b:124401932 BRANCH=sarien TEST=build coreboot for sarien and arcada platforms Change-Id: I73820d24b3e1c269d9d446a78ef4f97e167e3552 Signed-off-by: Keith Short <keithshort(a)chromium.org> --- M Documentation/POSTCODES M src/console/Makefile.inc M src/include/console/post_codes.h M src/soc/intel/apollolake/memmap.c M src/soc/intel/cannonlake/bootblock/pch.c M src/soc/intel/cannonlake/memmap.c M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/common/block/p2sb/p2sb.c M src/soc/intel/common/block/pmc/pmc.c M src/soc/intel/fsp_baytrail/southcluster.c M src/soc/intel/icelake/memmap.c M src/soc/intel/quark/i2c.c 12 files changed, 34 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/32774/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/32774 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73820d24b3e1c269d9d446a78ef4f97e167e3552 Gerrit-Change-Number: 32774 Gerrit-PatchSet: 5 Gerrit-Owner: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Jett Rink <jettrink(a)chromium.org> Gerrit-Reviewer: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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coreboot-gerrit May 2019