coreboot-gerrit May 2019

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Change in ...coreboot[master]: util/romcc: Prevent out-of-bounds read
by Jacob Garber (Code Review) 22 May '19

22 May '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32902 Change subject: util/romcc: Prevent out-of-bounds read ...................................................................... util/romcc: Prevent out-of-bounds read If 'class > LAST_REGC', then there will be an out-of-bounds read when accessing 'regcm_bound'. Prevent this by skipping to the next iteration of the loop. Note that this should not generally happen anyway, since 'result' represents a bitset for the indices of 'regcm_bound', and so iterations where 'class > LAST_REGC' should already be skipped by the previous continue statement (since those bits of 'result' should all be zero). Found-by: Covericy CID 1129122 Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> Change-Id: Id5f5adb0a292763251054aeecf2a5b87a11297b1 --- M util/romcc/romcc.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/32902/1 diff --git a/util/romcc/romcc.c b/util/romcc/romcc.c index c6507dc..aefd7c5 100644 --- a/util/romcc/romcc.c +++ b/util/romcc/romcc.c @@ -22150,6 +22150,7 @@ } if (class > LAST_REGC) { result &= ~mask; + continue; } for(class2 = 0; class2 <= LAST_REGC; class2++) { if ((regcm_bound[class2].first >= regcm_bound[class].first) && -- To view, visit https://review.coreboot.org/c/coreboot/+/32902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5f5adb0a292763251054aeecf2a5b87a11297b1 Gerrit-Change-Number: 32902 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: util/xcompile/xcompile: apply -march to clang as well as gcc
by Patrick Georgi (Code Review) 22 May '19

22 May '19

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32923 ) Change subject: util/xcompile/xcompile: apply -march to clang as well as gcc ...................................................................... Patch Set 1: Code-Review+2 (1 comment) https://review.coreboot.org/#/c/32923/1/util/xcompile/xcompile File util/xcompile/xcompile: https://review.coreboot.org/#/c/32923/1/util/xcompile/xcompile@241 PS1, Line 241: GCC/Clang Common the section directly beneath it specifically isn't "common", but not sure how to phrase it better myself. -- To view, visit https://review.coreboot.org/c/coreboot/+/32923 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6a6a6136b01a64d46f730ed19ebbeaadaf2183df Gerrit-Change-Number: 32923 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-Reviewer: Alan Green <avg(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 22 May 2019 10:02:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: util/xcompile/xcompile: apply -march to clang as well as gcc
by Paul Menzel (Code Review) 22 May '19

22 May '19

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32923 ) Change subject: util/xcompile/xcompile: apply -march to clang as well as gcc ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/32923 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6a6a6136b01a64d46f730ed19ebbeaadaf2183df Gerrit-Change-Number: 32923 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-Reviewer: Alan Green <avg(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 22 May 2019 09:55:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: {drivers,soc/intel/braswell}: Add C_ENVIRONMENT_BOOTBLOCK support
by Arthur Heymans (Code Review) 22 May '19

22 May '19

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29662 ) Change subject: {drivers,soc/intel/braswell}: Add C_ENVIRONMENT_BOOTBLOCK support ...................................................................... Patch Set 27: (5 comments) https://review.coreboot.org/#/c/29662/27//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/29662/27//COMMIT_MSG@9 PS27, Line 9: No C_ENVIRONMENT_BOOTBLOCK support for Braswell is available. Nit: somewhat trivial from the commit title. https://review.coreboot.org/#/c/29662/27//COMMIT_MSG@13 PS27, Line 13: romstage_c_entry you have hooks to do this in the bootblock. https://review.coreboot.org/#/c/29662/27/src/drivers/intel/fsp1_1/car.c File src/drivers/intel/fsp1_1/car.c: https://review.coreboot.org/#/c/29662/27/src/drivers/intel/fsp1_1/car.c@105 PS27, Line 105: car_soc_pre_console_init(); : car_mainboard_pre_console_init(); You generally want the console set up in the bootblock, not in the romstage with C_ENVIRONMENT_BOOTBLOCK. See bootblock_soc_early_init() and bootblock_mainboard_early_init() https://review.coreboot.org/#/c/29662/27/src/drivers/intel/fsp1_1/car.c@110 PS27, Line 110: car_soc_post_console_init(); : car_mainboard_post_console_init(); Similarly you have bootblock_soc_init() and bootblock_mainboard_init(). https://review.coreboot.org/#/c/29662/27/src/soc/intel/braswell/bootblock/b… File src/soc/intel/braswell/bootblock/bootblock.c: https://review.coreboot.org/#/c/29662/27/src/soc/intel/braswell/bootblock/b… PS27, Line 50: Where is this done now? -- To view, visit https://review.coreboot.org/c/coreboot/+/29662 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab48ad72f1514c93f20d70db5ef4fd8fa2383e8c Gerrit-Change-Number: 29662 Gerrit-PatchSet: 27 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: York Yang <yyang024(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 22 May 2019 09:17:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: {drivers,soc/intel/braswell}: Add C_ENVIRONMENT_BOOTBLOCK support
by Frans Hendriks (Code Review) 22 May '19

22 May '19

Hello Patrick Rudolph, Huang Jin, Arthur Heymans, York Yang, Lee Leahy, Matt DeVillier, build bot (Jenkins), Hannah Williams, Michał Żygowski, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29662 to look at the new patch set (#27). Change subject: {drivers,soc/intel/braswell}: Add C_ENVIRONMENT_BOOTBLOCK support ...................................................................... {drivers,soc/intel/braswell}: Add C_ENVIRONMENT_BOOTBLOCK support No C_ENVIRONMENT_BOOTBLOCK support for Braswell is available. Enable support and add required files for the Braswell Bootblock in C. The next changes are made support C_ENVIRONMENT_BOOTBLOCK: - Add post init console functions romstage_c_entry() . - Add car_stage_entry() function bootblock-c_entry() functions. - Specify config DCACHE_BSP_STACK_SIZE and C_ENV_BOOTBLOCK_SIZE. - Add bootblock_c_entry(). Removed the unused cache_as_ram_main(). BUG=NA TEST=Booting Embedded Linux on Facebook FBG-1701 Building Google Banos Change-Id: Iab48ad72f1514c93f20d70db5ef4fd8fa2383e8c Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- M src/drivers/intel/fsp1_1/Makefile.inc M src/drivers/intel/fsp1_1/car.c M src/drivers/intel/fsp1_1/include/fsp/car.h M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/Makefile.inc M src/soc/intel/braswell/bootblock/bootblock.c R src/soc/intel/braswell/bootblock/cache_as_ram.S M src/soc/intel/braswell/romstage/Makefile.inc A src/soc/intel/braswell/romstage/car_stage_entry.S 9 files changed, 83 insertions(+), 160 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/29662/27 -- To view, visit https://review.coreboot.org/c/coreboot/+/29662 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab48ad72f1514c93f20d70db5ef4fd8fa2383e8c Gerrit-Change-Number: 29662 Gerrit-PatchSet: 27 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: York Yang <yyang024(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/google/kohaku: add internal pull-up GPP_H0 for kohaku
by Kane Chen (Code Review) 22 May '19

22 May '19

Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32925 ) Change subject: mb/google/kohaku: add internal pull-up GPP_H0 for kohaku ...................................................................... Patch Set 1: Instead of internal PU, can you check w/ OEM and see if external PU is required? -- To view, visit https://review.coreboot.org/c/coreboot/+/32925 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29b2392151d989da5e3a475d3da5cfde9f912bb8 Gerrit-Change-Number: 32925 Gerrit-PatchSet: 1 Gerrit-Owner: Ben Kao <ben.kao(a)intel.com> Gerrit-Reviewer: Ben Kao <ben.kao(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 22 May 2019 05:42:04 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/kohaku: add internal pull-up GPP_H0 for kohaku
by Ben Kao (Code Review) 22 May '19

22 May '19

Ben Kao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32925 ) Change subject: mb/google/kohaku: add internal pull-up GPP_H0 for kohaku ...................................................................... Patch Set 1: kane.chen(a)intel.com -- To view, visit https://review.coreboot.org/c/coreboot/+/32925 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29b2392151d989da5e3a475d3da5cfde9f912bb8 Gerrit-Change-Number: 32925 Gerrit-PatchSet: 1 Gerrit-Owner: Ben Kao <ben.kao(a)intel.com> Gerrit-Reviewer: Ben Kao <ben.kao(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 22 May 2019 04:46:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: Makefile: Turn off SSE instructions for x86_32 architecture
by Kyösti Mälkki (Code Review) 22 May '19

22 May '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32887 ) Change subject: Makefile: Turn off SSE instructions for x86_32 architecture ...................................................................... Patch Set 5: (1 comment) https://review.coreboot.org/#/c/32887/2//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/32887/2//COMMIT_MSG@18 PS2, Line 18: code : code > Clang compiled coreboot fails at this point with both qemu-system-x86_64 and qemu-system-i386. […] Please try that Clang build with SSE=y in .config. (Modify Kconfig as suggested above and do a clean build). Certain SSE opcodes requires C stack aligned to 16 bytes, and qemu-x86/cache_as_ram_bootblock.S call to bootblock_c_entry_bist() does not look right to me. -- To view, visit https://review.coreboot.org/c/coreboot/+/32887 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia9e86900004a285e9a21a300894624b128e6b4d0 Gerrit-Change-Number: 32887 Gerrit-PatchSet: 5 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-Reviewer: Alan Green <avg(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Wed, 22 May 2019 04:12:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Comment-In-Reply-To: Alan Green <avg(a)google.com> Gerrit-MessageType: comment

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Change in ...coreboot[master]: vboot: init dispaly when recovery request
by EricR Lai (Code Review) 22 May '19

22 May '19

EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32906 Change subject: vboot: init dispaly when recovery request ...................................................................... vboot: init dispaly when recovery request Dispaly is required by recovery mode. Do init when recovery request by user. BUG=b:133197727,b:133175864 TEST= enter recovery mode, checked the display shows up Signed-off-by: Eric Lai <ericr_lai(a)compal.corp-partner.google.com> Change-Id: Id6ac611f51241373bca3e2b394a94dcd52d3fde7 --- M src/security/vboot/vboot_logic.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/32906/1 diff --git a/src/security/vboot/vboot_logic.c b/src/security/vboot/vboot_logic.c index 00347c3..68215fd 100644 --- a/src/security/vboot/vboot_logic.c +++ b/src/security/vboot/vboot_logic.c @@ -344,6 +344,10 @@ printk(BIOS_INFO, "Phase 1\n"); rv = vb2api_fw_phase1(&ctx); + /* If recovery mode, do initialize display */ + if (ctx.flags & VB2_CONTEXT_RECOVERY_MODE) + vboot_get_working_data()->flags |= VBOOT_WD_FLAG_DISPLAY_INIT; + if (rv) { /* * If vb2api_fw_phase1 fails, check for return value. -- To view, visit https://review.coreboot.org/c/coreboot/+/32906 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id6ac611f51241373bca3e2b394a94dcd52d3fde7 Gerrit-Change-Number: 32906 Gerrit-PatchSet: 1 Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: Makefile: Turn off SSE instructions for x86_32 architecture
by Alan Green (Code Review) 22 May '19

22 May '19

Alan Green has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32887 ) Change subject: Makefile: Turn off SSE instructions for x86_32 architecture ...................................................................... Patch Set 5: (1 comment) > Patch Set 5: > > (4 comments) > > > Patch Set 2: Code-Review+1 > > > > (3 comments) https://review.coreboot.org/#/c/32887/2//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/32887/2//COMMIT_MSG@14 PS2, Line 14: it's code generation appears unaffected. > I see. That sounds more like the reason that no SSE instructions are being emitted by GCC. […] Changeset uploaded as CB:32923. -- To view, visit https://review.coreboot.org/c/coreboot/+/32887 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia9e86900004a285e9a21a300894624b128e6b4d0 Gerrit-Change-Number: 32887 Gerrit-PatchSet: 5 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-Reviewer: Alan Green <avg(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Wed, 22 May 2019 01:32:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: Alan Green <avg(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit May 2019