Alexander Couzens has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29204 )
Change subject: ec/lenovo/h8: Add function to query sense state
......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/#/c/29204/2/src/ec/lenovo/h8/sense.c
File src/ec/lenovo/h8/sense.c:
https://review.coreboot.org/#/c/29204/2/src/ec/lenovo/h8/sense.c@25
PS2, Line 25: * Unlikely that all register will be zero after booting has
: * finished.
> What is "booting has finished" here? coreboot ready to jump to the […]
So far I understood, the EC reboots when powering the laptop on.
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Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30012 )
Change subject: sb/intel/common/smihandler: Hook up smmstore
......................................................................
Patch Set 14:
(1 comment)
https://review.coreboot.org/#/c/30012/14/src/southbridge/intel/common/smiha…
File src/southbridge/intel/common/smihandler.c:
https://review.coreboot.org/#/c/30012/14/src/southbridge/intel/common/smiha…
PS14, Line 346: if (IS_ENABLED(CONFIG_SMMSTORE))
CONFIG(
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Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31660
Change subject: inteltool: Skylake GPIOs #2
......................................................................
inteltool: Skylake GPIOs #2
Used Intel documents:
- 332995-001EN
- 332996-002EN
Change-Id: Ic006d9c094f9fe1ad419cb0168ada45b7dd81732
Signed-off-by: Felix Singer <migy(a)darmstadt.ccc.de>
---
M util/inteltool/gpio.c
M util/inteltool/gpio_groups.c
2 files changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/31660/1
diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c
index a87ae35..52eae09 100644
--- a/util/inteltool/gpio.c
+++ b/util/inteltool/gpio.c
@@ -1027,6 +1027,9 @@
case PCI_DEVICE_ID_INTEL_B150:
case PCI_DEVICE_ID_INTEL_CM236:
case PCI_DEVICE_ID_INTEL_DNV_LPC:
+ case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_1:
+ case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_1:
+ case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_1:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_2:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_2:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_2:
diff --git a/util/inteltool/gpio_groups.c b/util/inteltool/gpio_groups.c
index d61438b..5abb570 100644
--- a/util/inteltool/gpio_groups.c
+++ b/util/inteltool/gpio_groups.c
@@ -908,6 +908,9 @@
communities = sunrise_communities;
pcr_init(sb);
break;
+ case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_1:
+ case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_1:
+ case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_1:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_2:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_2:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_2:
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Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25660 )
Change subject: sb/intel/bd82x6x: re-init SPI after lockdown if flashconsole is enabled
......................................................................
Patch Set 4:
Are the comments for this patch going to be addressed?
As an alternative, if the author don't mind, I'll push the updates to the patch.
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Patrick Rudolph has uploaded a new patch set (#3) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/29204 )
Change subject: ec/lenovo/h8: Add function to query sense state
......................................................................
ec/lenovo/h8: Add function to query sense state
* Add function to wait for sense registers to become valid.
* Add function to retrieve Fn-Key state.
Tested on Lenovo T500:
* It takes about 700msec for the registers to become valid.
Tested on Lenovo T520:
* It takes less than 150msec for the registers to become valid.
Change-Id: Ie27e2881a256c4efb3def11f05070c446db6e5fc
Signed-off-by: Patrick Rudolph <siro(a)das-labor.org>
---
M src/ec/lenovo/h8/Makefile.inc
M src/ec/lenovo/h8/h8.c
M src/ec/lenovo/h8/h8.h
A src/ec/lenovo/h8/sense.c
4 files changed, 66 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/29204/3
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/26346 )
Change subject: soc/intel/common/block/cpu: Use core apic id to get cpu_index()
......................................................................
Patch Set 10:
> > Patch Set 10:
> >
> > (1 comment)
> >
> > > Why is it needed? As far as I understand FSP 2.1, that
> introduced
> > > MP_SERVICES_PPI, also introduced shared stack when selecting
> > > FSP_USES_CB_STACK.
> > > Simply select FSP_USES_CB_STACK when using MP_SERVICES_PPI
> should
> > > fix the issue.
> >
> > The reason is that, on FSP2.0 platform also we might need to
> enable MP PPI feature but same stack sharing concept might not
> applied on FSP 2.0 enabled platform, hence we are looking for some
> solution to bypass stack dependencies.
>
> Reading the commit message of https://review.coreboot.org/c/coreboot/+/30310
> it sounds like MP PPI feature is only available on FSP2.1. Is it
> available on all FSP2.0 platforms as well?
yes Patrick, we are getting push to enable this feature on few latest FSP 2.0 platform like WHL and CML as well.
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Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32591 )
Change subject: mb/intel/saddlebrook: Refactor to get rid of `pei_data`
......................................................................
Patch Set 2: Code-Review+1
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Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32565
Change subject: src/Kconfig: remove duplicate entry for drivers/fsp1_0/Kconfig
......................................................................
src/Kconfig: remove duplicate entry for drivers/fsp1_0/Kconfig
The entry for drivers/intel/fsp1_0/Kconfig was added under the
chipset menu before addtional FSP versions were added, and the
drivers/*/*/Kconfig entry added to support them. This results
in the fsp1_0 Kconfig items being duplicated in the Chipset and
Generic Drivers menus.
Remove the chipset entry since it's no longer needed.
Test: select FSP 1.0 mainboard (e.g. intel/minnowmax) in menuconfig,
observe FSP 1.0 Kconfig entries listed only under Generic Drivers menu.
Signed-off-by: Matt DeVillier <matt.devillier(a)puri.sm>
Change-Id: If1e78fb9259b1a46d308db829881eb3b3d17cf40
---
M src/Kconfig
1 file changed, 0 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/32565/1
diff --git a/src/Kconfig b/src/Kconfig
index 90c724e..05875b6 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -370,8 +370,6 @@
comment "Embedded Controllers"
source "src/ec/acpi/Kconfig"
source "src/ec/*/*/Kconfig"
-# FIXME move to vendorcode
-source "src/drivers/intel/fsp1_0/Kconfig"
source "src/southbridge/intel/common/firmware/Kconfig"
source "src/vendorcode/*/Kconfig"
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