coreboot-gerrit May 2019

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Change in ...coreboot[master]: mb/google/poppy/variants/rammus: Support new onboard Hynix memory
by Ken Lu (Code Review) 13 May '19

13 May '19

Ken Lu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32674 ) Change subject: mb/google/poppy/variants/rammus: Support new onboard Hynix memory ...................................................................... Patch Set 3: > Patch Set 3: > > File src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNCLGALAR-NVD.spd.hex has one or more executable bits set in the file permissions. Is it cause by we submit CL by A user but modify file by B user ? -- To view, visit https://review.coreboot.org/c/coreboot/+/32674 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd02953d0c6ac62fa4d7751fd8b103b74433aa73 Gerrit-Change-Number: 32674 Gerrit-PatchSet: 3 Gerrit-Owner: YanRu Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: YanRu Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Comment-Date: Mon, 13 May 2019 03:48:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/poppy/variants/rammus: Support new onboard Hynix memory
by Furquan Shaikh (Code Review) 13 May '19

13 May '19

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32674 ) Change subject: mb/google/poppy/variants/rammus: Support new onboard Hynix memory ...................................................................... Patch Set 3: File src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNCLGALAR-NVD.spd.hex has one or more executable bits set in the file permissions. -- To view, visit https://review.coreboot.org/c/coreboot/+/32674 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd02953d0c6ac62fa4d7751fd8b103b74433aa73 Gerrit-Change-Number: 32674 Gerrit-PatchSet: 3 Gerrit-Owner: YanRu Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: YanRu Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Comment-Date: Mon, 13 May 2019 03:45:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/poppy/variants/rammus: Support new onboard Hynix memory
by Ken Lu (Code Review) 13 May '19

13 May '19

Ken Lu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32674 ) Change subject: mb/google/poppy/variants/rammus: Support new onboard Hynix memory ...................................................................... Patch Set 3: > Patch Set 2: > > (1 comment) I add an empty line at end of file -- To view, visit https://review.coreboot.org/c/coreboot/+/32674 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd02953d0c6ac62fa4d7751fd8b103b74433aa73 Gerrit-Change-Number: 32674 Gerrit-PatchSet: 3 Gerrit-Owner: YanRu Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: YanRu Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Comment-Date: Mon, 13 May 2019 02:46:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/poppy/variants/rammus: Support new onboard Hynix memory
by Ken Lu (Code Review) 13 May '19

13 May '19

Ken Lu has uploaded a new patch set (#3) to the change originally created by YanRu Chen. ( https://review.coreboot.org/c/coreboot/+/32674 ) Change subject: mb/google/poppy/variants/rammus: Support new onboard Hynix memory ...................................................................... mb/google/poppy/variants/rammus: Support new onboard Hynix memory Add hynix_dimm_H9CCNNNCLGALAR-NVD for new onboard memory support. BUG=b:130337306 BRANCH=firmware-rammus-11275.B TEST=emerge-rammus coreboot chromeos-ec chromeos-bootimage Flash FW to DUT, and make sure system boots up. Signed-off-by: YanRu Chen <kane_chen(a)pegatron.corp-partner.google.com> Change-Id: Ibd02953d0c6ac62fa4d7751fd8b103b74433aa73 --- A src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNCLGALAR-NVD.spd.hex M src/mainboard/google/poppy/variants/rammus/Makefile.inc 2 files changed, 17 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/32674/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/32674 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd02953d0c6ac62fa4d7751fd8b103b74433aa73 Gerrit-Change-Number: 32674 Gerrit-PatchSet: 3 Gerrit-Owner: YanRu Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: YanRu Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: lapic/lapic_cpu_init: Add cpu_add_map_entry() to store default_apic_id
by Subrata Banik (Code Review) 13 May '19

13 May '19

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32722 Change subject: lapic/lapic_cpu_init: Add cpu_add_map_entry() to store default_apic_id ...................................................................... lapic/lapic_cpu_init: Add cpu_add_map_entry() to store default_apic_id This patch ensures start_cpu() function to store default_apic_id using common cpu_add_map_entry() function to make cpu_index() implementation generic. BRANCH=none BUG=b:79562868 Change-Id: Iac4d6e9e6e6f9ba644335b4b70da8689c405f638 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/cpu/x86/lapic/lapic_cpu_init.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/32722/1 diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c index 3ad1f0a..ab45142 100644 --- a/src/cpu/x86/lapic/lapic_cpu_init.c +++ b/src/cpu/x86/lapic/lapic_cpu_init.c @@ -291,6 +291,7 @@ info = (struct cpu_info *)stack_top; info->index = index; info->cpu = cpu; + cpu_add_map_entry(info); thread_init_cpu_info_non_bsp(info); /* Advertise the new stack and index to start_cpu */ -- To view, visit https://review.coreboot.org/c/coreboot/+/32722 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac4d6e9e6e6f9ba644335b4b70da8689c405f638 Gerrit-Change-Number: 32722 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: src/arch/x86: Use core apic id to get cpu_index()
by Subrata Banik (Code Review) 13 May '19

13 May '19

Subrata Banik has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/26346 ) Change subject: src/arch/x86: Use core apic id to get cpu_index() ...................................................................... src/arch/x86: Use core apic id to get cpu_index() This cpu_index() implementation assumes that cpu_index() function might always getting called from coreboot context (ESP stack pointer will always refer to coreboot). This might not be true in case of proposed PI spec MP_SERVICES_PPI implementation, where FSP context (stack pointer refers to fsp) will request to get cpu_index(), natural alignment logic will use ESP and retrieve struct cpu_info *ci from (stack_top - 8 byte). This is not the place where cpu_index is actually stored by ramstage c_start.S Hence this patch tries to remove those dependencies while retrieving cpu_index(), rather it uses cpuid to fetch lapic id and matches with cpus_default_apic_id[] variable to return correct cpu_index(). BRANCH=none BUG=b:79562868 TEST=Ensures functions can be run on APs without any failure and cpu_index() also provides correct index number. Change-Id: I55023a3e0cf42f0496d45bc6af8ead447f402350 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/26346 Reviewed-by: Nico Huber <nico.h(a)gmx.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/arch/x86/cpu.c M src/arch/x86/include/arch/cpu.h 2 files changed, 38 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c index f19b389..fb4c7b6 100644 --- a/src/arch/x86/cpu.c +++ b/src/arch/x86/cpu.c @@ -337,3 +337,27 @@ /* APs are waiting for work. Last thing to do is park them. */ mp_park_aps(); } + +/* + * Previously cpu_index() implementation assumes that cpu_index() + * function will always getting called from coreboot context + * (ESP stack pointer will always refer to coreboot). + * + * But with FSP_USES_MP_SERVICES_PPI implementation in coreboot this + * assumption might not be true, where FSP context (stack pointer refers + * to FSP) will request to get cpu_index(). + * + * Hence new logic to use cpuid to fetch lapic id and matches with + * cpus_default_apic_id[] variable to return correct cpu_index(). + */ +unsigned long cpu_index(void) +{ + int i; + int lapic_id = initial_lapicid(); + + for (i = 0; i < CONFIG_MAX_CPUS; i++) { + if (cpu_get_apic_id(i) == lapic_id) + return i; + } + return -1; +} diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index 61b17a6..481ee9d 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -261,13 +261,6 @@ ); return ci; } - -static inline unsigned long cpu_index(void) -{ - struct cpu_info *ci; - ci = cpu_info(); - return ci->index; -} #endif #ifndef __ROMCC__ // romcc is segfaulting in some cases @@ -374,4 +367,18 @@ */ uint32_t cpu_get_feature_flags_edx(void); +/* + * Previously cpu_index() implementation assumes that cpu_index() + * function will always getting called from coreboot context + * (ESP stack pointer will always refer to coreboot). + * + * But with FSP_USES_MP_SERVICES_PPI implementation in coreboot this + * assumption might not be true, where FSP context (stack pointer refers + * to FSP) will request to get cpu_index(). + * + * Hence new logic to use cpuid to fetch lapic id and matches with + * cpus_default_apic_id[] variable to return correct cpu_index(). + */ +unsigned long cpu_index(void); + #endif /* ARCH_CPU_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/26346 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I55023a3e0cf42f0496d45bc6af8ead447f402350 Gerrit-Change-Number: 26346 Gerrit-PatchSet: 18 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: merged

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Change in ...coreboot[master]: soc/intel/broadwell: Use C_ENVIRONMENT_BOOTBLOCK
by Matt DeVillier (Code Review) 12 May '19

12 May '19

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30383 ) Change subject: soc/intel/broadwell: Use C_ENVIRONMENT_BOOTBLOCK ...................................................................... Patch Set 48: fails to boot on google/lulu -- To view, visit https://review.coreboot.org/c/coreboot/+/30383 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I44eb6d380dea5b82e3f009a46381a0f611bb7935 Gerrit-Change-Number: 30383 Gerrit-PatchSet: 48 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sun, 12 May 2019 21:44:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: ====
by Marshall Dawson (Code Review) 12 May '19

12 May '19

Marshall Dawson has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/32710 ) Change subject: ==== ...................................................................... Abandoned Richard's comment is correct - change was intended for fixup. -- To view, visit https://review.coreboot.org/c/coreboot/+/32710 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b588c23b793a10b4301064bbeffab51737cca4b Gerrit-Change-Number: 32710 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-MessageType: abandon

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Change in ...coreboot[master]: superio/ite: Add IT8786E-I
by Felix Held (Code Review) 12 May '19

12 May '19

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30335 ) Change subject: superio/ite: Add IT8786E-I ...................................................................... Patch Set 6: Code-Review-1 since it was already +2ed, i'll throw in a -1 so it won't get merged without a second look -- To view, visit https://review.coreboot.org/c/coreboot/+/30335 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7317da6a72db64f95f9a790ef96ed7a5f93b3aea Gerrit-Change-Number: 30335 Gerrit-PatchSet: 6 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Sun, 12 May 2019 16:25:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: superio/ite: Add IT8786E-I
by Felix Held (Code Review) 12 May '19

12 May '19

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30335 ) Change subject: superio/ite: Add IT8786E-I ...................................................................... Patch Set 6: (2 comments) https://review.coreboot.org/#/c/30335/6/src/superio/ite/it8786e/superio.c File src/superio/ite/it8786e/superio.c: https://review.coreboot.org/#/c/30335/6/src/superio/ite/it8786e/superio.c@62 PS6, Line 62: &ops these should be all NULL, since no LDN-specific override is needed here. &ops needs to be passed to pnp_enable_devices though; see below https://review.coreboot.org/#/c/30335/6/src/superio/ite/it8786e/superio.c@1… PS6, Line 112: &pnp_ops this needs to be &ops -- To view, visit https://review.coreboot.org/c/coreboot/+/30335 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7317da6a72db64f95f9a790ef96ed7a5f93b3aea Gerrit-Change-Number: 30335 Gerrit-PatchSet: 6 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Sun, 12 May 2019 16:24:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit May 2019