coreboot-gerrit May 2019

coreboot-gerrit@coreboot.org

1 participants
1485 discussions

Change in ...coreboot[master]: soc/intel: Geminilake Refresh feature request support
by John Zhao (Code Review) 13 May '19

13 May '19

John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32744 Change subject: soc/intel: Geminilake Refresh feature request support ...................................................................... soc/intel: Geminilake Refresh feature request support Add 0x706a8 for GLK Refresh CPU stepping ID. BUG=b:132414963 BRANCH=None TEST=Image built successfully. Signed-off-by: John Zhao <john.zhao(a)intel.com> Change-Id: I4641d9bd4c82211e7200f617cae9043b0f2f38d1 --- M src/soc/intel/apollolake/cpu.c M src/soc/intel/common/block/cpu/mp_init.c M src/soc/intel/common/block/include/intelblocks/mp_init.h 3 files changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/32744/1 diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c index 11d15e4..651c20e 100644 --- a/src/soc/intel/apollolake/cpu.c +++ b/src/soc/intel/apollolake/cpu.c @@ -119,6 +119,7 @@ { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_E0 }, { X86_VENDOR_INTEL, CPUID_GLK_A0 }, { X86_VENDOR_INTEL, CPUID_GLK_B0 }, + { X86_VENDOR_INTEL, CPUID_GLK_R0 }, { 0, 0 }, }; diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 0a59c56..e98b5dd 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -70,6 +70,7 @@ { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_E0 }, { X86_VENDOR_INTEL, CPUID_GLK_A0 }, { X86_VENDOR_INTEL, CPUID_GLK_B0 }, + { X86_VENDOR_INTEL, CPUID_GLK_R0 }, { X86_VENDOR_INTEL, CPUID_WHISKEYLAKE_V0 }, { X86_VENDOR_INTEL, CPUID_WHISKEYLAKE_W0 }, { X86_VENDOR_INTEL, CPUID_COFFEELAKE_U0 }, diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h index 3c7467d..0f37a643 100644 --- a/src/soc/intel/common/block/include/intelblocks/mp_init.h +++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h @@ -37,6 +37,7 @@ #define CPUID_APOLLOLAKE_E0 0x506ca #define CPUID_GLK_A0 0x706a0 #define CPUID_GLK_B0 0x706a1 +#define CPUID_GLK_R0 0x706a8 #define CPUID_WHISKEYLAKE_V0 0x806ec #define CPUID_WHISKEYLAKE_W0 0x806eb #define CPUID_COFFEELAKE_D0 0x806ea -- To view, visit https://review.coreboot.org/c/coreboot/+/32744 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4641d9bd4c82211e7200f617cae9043b0f2f38d1 Gerrit-Change-Number: 32744 Gerrit-PatchSet: 1 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-MessageType: newchange

3 3

Change in ...coreboot[master]: mainboard: remove "recovery" gpio, selectively add "presence" gpio.
by Matt Delco (Code Review) 13 May '19

13 May '19

Matt Delco has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32718 Change subject: mainboard: remove "recovery" gpio, selectively add "presence" gpio. ...................................................................... mainboard: remove "recovery" gpio, selectively add "presence" gpio. The gpio table is only used by depthcharge, and depthcharge rarely has a need for the "recovery" gpio. On a few boards it does use the gpio as a signal for confirming physical presence, so on that boards we'll advertise the board as "presence". All these strings probably should have been #defines to help avoid typos (e.g., the "ec_in_rw" in stout seems questionable since everybody else uses "EC in RW"). Cq-Depend: chromium:1580454 BUG=b:129471321 BRANCH=None TEST=Local compile and flash (with corresponding changes to depthcharge) to 2 systems, one with a "presence" gpio and another without. Confirmed that both systems could enter dev mode. Change-Id: Id6d62d9e48d3e6646cbc1277ea53f0ca95dd849e Signed-off-by: Matt Delco <delco(a)chromium.org> --- M src/mainboard/google/auron/chromeos.c M src/mainboard/google/beltino/chromeos.c M src/mainboard/google/butterfly/chromeos.c M src/mainboard/google/cyan/chromeos.c M src/mainboard/google/daisy/chromeos.c M src/mainboard/google/dragonegg/chromeos.c M src/mainboard/google/eve/chromeos.c M src/mainboard/google/fizz/chromeos.c M src/mainboard/google/foster/chromeos.c M src/mainboard/google/gale/chromeos.c M src/mainboard/google/glados/chromeos.c M src/mainboard/google/gru/chromeos.c M src/mainboard/google/hatch/chromeos.c M src/mainboard/google/jecht/chromeos.c M src/mainboard/google/kahlee/chromeos.c M src/mainboard/google/kukui/chromeos.c M src/mainboard/google/link/chromeos.c M src/mainboard/google/nyan/chromeos.c M src/mainboard/google/nyan_big/chromeos.c M src/mainboard/google/nyan_blaze/chromeos.c M src/mainboard/google/oak/chromeos.c M src/mainboard/google/octopus/chromeos.c M src/mainboard/google/parrot/chromeos.c M src/mainboard/google/peach_pit/chromeos.c M src/mainboard/google/poppy/chromeos.c M src/mainboard/google/rambi/chromeos.c M src/mainboard/google/reef/chromeos.c M src/mainboard/google/sarien/chromeos.c M src/mainboard/google/slippy/chromeos.c M src/mainboard/google/smaug/chromeos.c M src/mainboard/google/storm/chromeos.c M src/mainboard/google/stout/chromeos.c M src/mainboard/google/veyron/chromeos.c M src/mainboard/google/veyron_mickey/chromeos.c M src/mainboard/google/veyron_rialto/chromeos.c M src/mainboard/intel/baskingridge/chromeos.c M src/mainboard/intel/cannonlake_rvp/chromeos.c M src/mainboard/intel/coffeelake_rvp/chromeos.c M src/mainboard/intel/emeraldlake2/chromeos.c M src/mainboard/intel/glkrvp/chromeos.c M src/mainboard/intel/icelake_rvp/chromeos.c M src/mainboard/intel/kblrvp/chromeos.c M src/mainboard/intel/kunimitsu/chromeos.c M src/mainboard/intel/strago/chromeos.c M src/mainboard/intel/wtm2/chromeos.c M src/mainboard/samsung/lumpy/chromeos.c M src/mainboard/samsung/stumpy/chromeos.c 47 files changed, 10 insertions(+), 64 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/32718/1 diff --git a/src/mainboard/google/auron/chromeos.c b/src/mainboard/google/auron/chromeos.c index 942e9dd..0147a31 100644 --- a/src/mainboard/google/auron/chromeos.c +++ b/src/mainboard/google/auron/chromeos.c @@ -27,7 +27,6 @@ struct lb_gpio chromeos_gpios[] = { {CROS_WP_GPIO, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/beltino/chromeos.c b/src/mainboard/google/beltino/chromeos.c index 92bb7b4..e695ab5 100644 --- a/src/mainboard/google/beltino/chromeos.c +++ b/src/mainboard/google/beltino/chromeos.c @@ -36,7 +36,7 @@ {GPIO_SPI_WP, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, {GPIO_REC_MODE, ACTIVE_LOW, - !get_recovery_mode_switch(), "recovery"}, + !get_recovery_mode_switch(), "presence"}, {-1, ACTIVE_HIGH, 1, "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/butterfly/chromeos.c b/src/mainboard/google/butterfly/chromeos.c index 2301d3e..7f72ad2 100644 --- a/src/mainboard/google/butterfly/chromeos.c +++ b/src/mainboard/google/butterfly/chromeos.c @@ -40,9 +40,6 @@ {WP_GPIO, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, - /* Recovery: virtual GPIO active high */ - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, - /* lid switch value from EC */ {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, diff --git a/src/mainboard/google/cyan/chromeos.c b/src/mainboard/google/cyan/chromeos.c index 44101e3..5d5bc55 100644 --- a/src/mainboard/google/cyan/chromeos.c +++ b/src/mainboard/google/cyan/chromeos.c @@ -35,7 +35,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, vboot_recovery_mode_enabled(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/daisy/chromeos.c b/src/mainboard/google/daisy/chromeos.c index 968f1f9..974cd49 100644 --- a/src/mainboard/google/daisy/chromeos.c +++ b/src/mainboard/google/daisy/chromeos.c @@ -29,9 +29,6 @@ {EXYNOS5_GPD1, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, - /* Recovery: active low */ - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, - /* Lid: active high (LID_GPIO) */ {EXYNOS5_GPX3, ACTIVE_HIGH, gpio_get_value(GPIO_X35), "lid"}, diff --git a/src/mainboard/google/dragonegg/chromeos.c b/src/mainboard/google/dragonegg/chromeos.c index 657320c..7132b04 100644 --- a/src/mainboard/google/dragonegg/chromeos.c +++ b/src/mainboard/google/dragonegg/chromeos.c @@ -28,7 +28,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/eve/chromeos.c b/src/mainboard/google/eve/chromeos.c index 06a4de9..8c276e9 100644 --- a/src/mainboard/google/eve/chromeos.c +++ b/src/mainboard/google/eve/chromeos.c @@ -27,7 +27,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/fizz/chromeos.c b/src/mainboard/google/fizz/chromeos.c index 3bd5b64..31887c5 100644 --- a/src/mainboard/google/fizz/chromeos.c +++ b/src/mainboard/google/fizz/chromeos.c @@ -27,7 +27,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, 1, "lid"}, /* Lid switch always open */ {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/foster/chromeos.c b/src/mainboard/google/foster/chromeos.c index 591cfd0..7ce1300 100644 --- a/src/mainboard/google/foster/chromeos.c +++ b/src/mainboard/google/foster/chromeos.c @@ -28,9 +28,6 @@ /* Write Protect: active low */ {-1, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, - /* Recovery: active high */ - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, - /* TODO: Power: active low / high depending on board id */ {GPIO(X5), ACTIVE_LOW, -1, "power"}, diff --git a/src/mainboard/google/gale/chromeos.c b/src/mainboard/google/gale/chromeos.c index 69c3a7a..d0bdbb0 100644 --- a/src/mainboard/google/gale/chromeos.c +++ b/src/mainboard/google/gale/chromeos.c @@ -68,8 +68,6 @@ { struct lb_gpio chromeos_gpios[] = { {PP_SW, ACTIVE_LOW, read_gpio(PP_SW), "presence"}, - {get_rec_sw_gpio_pin(), ACTIVE_LOW, - read_gpio(get_rec_sw_gpio_pin()), "recovery"}, {get_wp_status_gpio_pin(), ACTIVE_LOW, !get_write_protect_state(), "write protect"}, {-1, ACTIVE_LOW, 1, "power"}, diff --git a/src/mainboard/google/glados/chromeos.c b/src/mainboard/google/glados/chromeos.c index f826b55..b6029dd 100644 --- a/src/mainboard/google/glados/chromeos.c +++ b/src/mainboard/google/glados/chromeos.c @@ -26,7 +26,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/gru/chromeos.c b/src/mainboard/google/gru/chromeos.c index 53d00fb..c92a492 100644 --- a/src/mainboard/google/gru/chromeos.c +++ b/src/mainboard/google/gru/chromeos.c @@ -34,7 +34,6 @@ struct lb_gpio chromeos_gpios[] = { {GPIO_WP.raw, wp_polarity, get_write_protect_state() ^ !wp_polarity, "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, #if CONFIG(GRU_BASEBOARD_SCARLET) {GPIO_BACKLIGHT.raw, ACTIVE_HIGH, -1, "backlight"}, #endif diff --git a/src/mainboard/google/hatch/chromeos.c b/src/mainboard/google/hatch/chromeos.c index fa54148..4119670 100644 --- a/src/mainboard/google/hatch/chromeos.c +++ b/src/mainboard/google/hatch/chromeos.c @@ -25,7 +25,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/jecht/chromeos.c b/src/mainboard/google/jecht/chromeos.c index b3215a0..2b72cae 100644 --- a/src/mainboard/google/jecht/chromeos.c +++ b/src/mainboard/google/jecht/chromeos.c @@ -37,7 +37,7 @@ {GPIO_SPI_WP, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, {GPIO_REC_MODE, ACTIVE_LOW, - !get_recovery_mode_switch(), "recovery"}, + !get_recovery_mode_switch(), "presence"}, {-1, ACTIVE_HIGH, 1, "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/kahlee/chromeos.c b/src/mainboard/google/kahlee/chromeos.c index 3bce66b..195eb94 100644 --- a/src/mainboard/google/kahlee/chromeos.c +++ b/src/mainboard/google/kahlee/chromeos.c @@ -24,7 +24,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW), diff --git a/src/mainboard/google/kukui/chromeos.c b/src/mainboard/google/kukui/chromeos.c index 3539501..2cef10e 100644 --- a/src/mainboard/google/kukui/chromeos.c +++ b/src/mainboard/google/kukui/chromeos.c @@ -35,7 +35,6 @@ struct lb_gpio chromeos_gpios[] = { {GPIO_WP.id, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {EC_IN_RW.id, ACTIVE_HIGH, -1, "EC in RW"}, {EC_IRQ.id, ACTIVE_LOW, -1, "EC interrupt"}, {CR50_IRQ.id, ACTIVE_HIGH, -1, "TPM interrupt"}, diff --git a/src/mainboard/google/link/chromeos.c b/src/mainboard/google/link/chromeos.c index 5156404..ecd7592 100644 --- a/src/mainboard/google/link/chromeos.c +++ b/src/mainboard/google/link/chromeos.c @@ -28,10 +28,6 @@ /* Write Protect: GPIO57 = PCH_SPI_WP_D */ {57, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - /* Recovery: the "switch" comes from the EC */ - /* -1 indicates that this is a pseudo GPIO */ - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, - /* Lid: the "switch" comes from the EC */ {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, diff --git a/src/mainboard/google/nyan/chromeos.c b/src/mainboard/google/nyan/chromeos.c index ba851c7..e3e09e6 100644 --- a/src/mainboard/google/nyan/chromeos.c +++ b/src/mainboard/google/nyan/chromeos.c @@ -22,7 +22,6 @@ struct lb_gpio chromeos_gpios[] = { {GPIO(R1), ACTIVE_LOW, !get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {GPIO(R4), ACTIVE_HIGH, -1, "lid"}, {GPIO(Q0), ACTIVE_LOW, -1, "power"}, {GPIO(U4), ACTIVE_HIGH, -1, "EC in RW"}, diff --git a/src/mainboard/google/nyan_big/chromeos.c b/src/mainboard/google/nyan_big/chromeos.c index f297998..1fbaac7 100644 --- a/src/mainboard/google/nyan_big/chromeos.c +++ b/src/mainboard/google/nyan_big/chromeos.c @@ -22,7 +22,6 @@ struct lb_gpio chromeos_gpios[] = { {GPIO(R1), ACTIVE_LOW, !get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {GPIO(R4), ACTIVE_HIGH, -1, "lid"}, {GPIO(Q0), ACTIVE_LOW, -1, "power"}, {GPIO(U4), ACTIVE_HIGH, -1, "EC in RW"}, diff --git a/src/mainboard/google/nyan_blaze/chromeos.c b/src/mainboard/google/nyan_blaze/chromeos.c index dbbd91f..bbb274f 100644 --- a/src/mainboard/google/nyan_blaze/chromeos.c +++ b/src/mainboard/google/nyan_blaze/chromeos.c @@ -22,7 +22,6 @@ struct lb_gpio chromeos_gpios[] = { {GPIO(R1), ACTIVE_LOW, !get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {GPIO(R4), ACTIVE_HIGH, -1, "lid"}, {GPIO(Q0), ACTIVE_LOW, -1, "power"}, {GPIO(U4), ACTIVE_HIGH, -1, "EC in RW"}, diff --git a/src/mainboard/google/oak/chromeos.c b/src/mainboard/google/oak/chromeos.c index 4e07236..b613cc3 100644 --- a/src/mainboard/google/oak/chromeos.c +++ b/src/mainboard/google/oak/chromeos.c @@ -36,7 +36,6 @@ struct lb_gpio chromeos_gpios[] = { {WRITE_PROTECT.id, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {LID.id, ACTIVE_HIGH, -1, "lid"}, {POWER_BUTTON.id, ACTIVE_HIGH, -1, "power"}, {EC_IN_RW.id, ACTIVE_HIGH, -1, "EC in RW"}, diff --git a/src/mainboard/google/octopus/chromeos.c b/src/mainboard/google/octopus/chromeos.c index 5eb3990..ca9f6fb 100644 --- a/src/mainboard/google/octopus/chromeos.c +++ b/src/mainboard/google/octopus/chromeos.c @@ -25,7 +25,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/parrot/chromeos.c b/src/mainboard/google/parrot/chromeos.c index f17b6a6..095d504 100644 --- a/src/mainboard/google/parrot/chromeos.c +++ b/src/mainboard/google/parrot/chromeos.c @@ -39,9 +39,6 @@ /* Write Protect: GPIO70 active high */ {70, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, - /* Recovery: Virtual GPIO in the EC (Servo GPIO68 active low) */ - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, - /* Lid switch GPIO active high (open). */ {15, ACTIVE_HIGH, get_lid_switch(), "lid"}, diff --git a/src/mainboard/google/peach_pit/chromeos.c b/src/mainboard/google/peach_pit/chromeos.c index b2d90d9..8bd35be 100644 --- a/src/mainboard/google/peach_pit/chromeos.c +++ b/src/mainboard/google/peach_pit/chromeos.c @@ -29,9 +29,6 @@ {EXYNOS5_GPX3, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, - /* Recovery: active low */ - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, - /* Lid: active high (LID_GPIO) */ {EXYNOS5_GPX3, ACTIVE_HIGH, gpio_get_value(GPIO_X34), "lid"}, diff --git a/src/mainboard/google/poppy/chromeos.c b/src/mainboard/google/poppy/chromeos.c index 83b8aa0..3879732 100644 --- a/src/mainboard/google/poppy/chromeos.c +++ b/src/mainboard/google/poppy/chromeos.c @@ -28,7 +28,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/rambi/chromeos.c b/src/mainboard/google/rambi/chromeos.c index d47a323..7880154 100644 --- a/src/mainboard/google/rambi/chromeos.c +++ b/src/mainboard/google/rambi/chromeos.c @@ -27,7 +27,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, vboot_recovery_mode_enabled(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/reef/chromeos.c b/src/mainboard/google/reef/chromeos.c index 7b7f2b8..4dbbe6d 100644 --- a/src/mainboard/google/reef/chromeos.c +++ b/src/mainboard/google/reef/chromeos.c @@ -24,7 +24,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/sarien/chromeos.c b/src/mainboard/google/sarien/chromeos.c index 15670d0..fafc469 100644 --- a/src/mainboard/google/sarien/chromeos.c +++ b/src/mainboard/google/sarien/chromeos.c @@ -36,8 +36,6 @@ struct lb_gpio chromeos_gpios[] = { {GPIO_PCH_WP, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {GPIO_REC_MODE, ACTIVE_LOW, !get_recovery_mode_switch(), - "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/slippy/chromeos.c b/src/mainboard/google/slippy/chromeos.c index 15779ee..f52bace 100644 --- a/src/mainboard/google/slippy/chromeos.c +++ b/src/mainboard/google/slippy/chromeos.c @@ -25,7 +25,6 @@ { struct lb_gpio chromeos_gpios[] = { {58, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/smaug/chromeos.c b/src/mainboard/google/smaug/chromeos.c index 567a3ae..3d36cd9 100644 --- a/src/mainboard/google/smaug/chromeos.c +++ b/src/mainboard/google/smaug/chromeos.c @@ -23,7 +23,6 @@ struct lb_gpio chromeos_gpios[] = { {WRITE_PROTECT_L, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {POWER_BUTTON, ACTIVE_LOW, -1, "power"}, {EC_IN_RW, ACTIVE_HIGH, -1, "EC in RW"}, {AP_SYS_RESET_L, ACTIVE_LOW, -1, "reset"}, diff --git a/src/mainboard/google/storm/chromeos.c b/src/mainboard/google/storm/chromeos.c index ccc0b53..9587c3c 100644 --- a/src/mainboard/google/storm/chromeos.c +++ b/src/mainboard/google/storm/chromeos.c @@ -39,7 +39,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {REC_SW, ACTIVE_LOW, read_gpio(REC_SW), "recovery"}, + {DEV_SW, ACTIVE_LOW, read_gpio(REC_SW), "presence"}, {WP_SW, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, {-1, ACTIVE_LOW, 1, "power"}, diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c index 015e0aa..60c7a09 100644 --- a/src/mainboard/google/stout/chromeos.c +++ b/src/mainboard/google/stout/chromeos.c @@ -35,9 +35,6 @@ /* Write Protect: GPIO7 */ {7, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, - /* Recovery: Virtual switch */ - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, - /* Lid Switch: Virtual switch */ {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, diff --git a/src/mainboard/google/veyron/chromeos.c b/src/mainboard/google/veyron/chromeos.c index 357a7fc..d27b4dd 100644 --- a/src/mainboard/google/veyron/chromeos.c +++ b/src/mainboard/google/veyron/chromeos.c @@ -43,7 +43,7 @@ {GPIO_WP.raw, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, {GPIO_RECOVERY.raw, ACTIVE_LOW, - !get_recovery_mode_switch(), "recovery"}, + !get_recovery_mode_switch(), "presence"}, {GPIO_LID.raw, ACTIVE_HIGH, -1, "lid"}, {GPIO_POWER.raw, ACTIVE_LOW, -1, "power"}, {GPIO_ECINRW.raw, ACTIVE_HIGH, -1, "EC in RW"}, diff --git a/src/mainboard/google/veyron_mickey/chromeos.c b/src/mainboard/google/veyron_mickey/chromeos.c index 46a6738..c549e70 100644 --- a/src/mainboard/google/veyron_mickey/chromeos.c +++ b/src/mainboard/google/veyron_mickey/chromeos.c @@ -34,7 +34,7 @@ {GPIO_WP.raw, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, {GPIO_RECOVERY.raw, ACTIVE_LOW, - !get_recovery_mode_switch(), "recovery"}, + !get_recovery_mode_switch(), "presence"}, {GPIO_RESET.raw, ACTIVE_HIGH, -1, "reset"}, }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); diff --git a/src/mainboard/google/veyron_rialto/chromeos.c b/src/mainboard/google/veyron_rialto/chromeos.c index e86d863..65866f3 100644 --- a/src/mainboard/google/veyron_rialto/chromeos.c +++ b/src/mainboard/google/veyron_rialto/chromeos.c @@ -41,7 +41,7 @@ /* Note for early development, we want to support both servo * and pushkey recovery buttons in firmware boot stages. */ {GPIO_RECOVERY_PUSHKEY.raw, ACTIVE_LOW, - !get_recovery_mode_switch(), "recovery"}, + !get_recovery_mode_switch(), "presence"}, {GPIO_POWER.raw, ACTIVE_LOW, -1, "power"}, {GPIO_RESET.raw, ACTIVE_HIGH, -1, "reset"}, }; diff --git a/src/mainboard/intel/baskingridge/chromeos.c b/src/mainboard/intel/baskingridge/chromeos.c index f1fd3ed..1673622 100644 --- a/src/mainboard/intel/baskingridge/chromeos.c +++ b/src/mainboard/intel/baskingridge/chromeos.c @@ -33,7 +33,7 @@ {0, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, /* Recovery: GPIO69 - SV_DETECT - J8E3 (silkscreen: J8E2) */ - {69, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, + {69, ACTIVE_HIGH, get_recovery_mode_switch(), "presence"}, /* Hard code the lid switch GPIO to open. */ {-1, ACTIVE_HIGH, 1, "lid"}, diff --git a/src/mainboard/intel/cannonlake_rvp/chromeos.c b/src/mainboard/intel/cannonlake_rvp/chromeos.c index 296a3a5..44254bc 100644 --- a/src/mainboard/intel/cannonlake_rvp/chromeos.c +++ b/src/mainboard/intel/cannonlake_rvp/chromeos.c @@ -27,7 +27,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/intel/coffeelake_rvp/chromeos.c b/src/mainboard/intel/coffeelake_rvp/chromeos.c index 84f5f27..a581217 100644 --- a/src/mainboard/intel/coffeelake_rvp/chromeos.c +++ b/src/mainboard/intel/coffeelake_rvp/chromeos.c @@ -26,7 +26,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/intel/emeraldlake2/chromeos.c b/src/mainboard/intel/emeraldlake2/chromeos.c index 78610d3..219eefb 100644 --- a/src/mainboard/intel/emeraldlake2/chromeos.c +++ b/src/mainboard/intel/emeraldlake2/chromeos.c @@ -33,7 +33,7 @@ {48, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, /* Recovery: GPIO22 */ - {22, ACTIVE_LOW, !get_recovery_mode_switch(), "recovery"}, + {22, ACTIVE_LOW, !get_recovery_mode_switch(), "presence"}, /* Hard code the lid switch GPIO to open. */ {-1, ACTIVE_HIGH, 1, "lid"}, diff --git a/src/mainboard/intel/glkrvp/chromeos.c b/src/mainboard/intel/glkrvp/chromeos.c index 07d92e9..4edd4a0 100644 --- a/src/mainboard/intel/glkrvp/chromeos.c +++ b/src/mainboard/intel/glkrvp/chromeos.c @@ -25,7 +25,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/intel/icelake_rvp/chromeos.c b/src/mainboard/intel/icelake_rvp/chromeos.c index 5965d95..ce8e548 100644 --- a/src/mainboard/intel/icelake_rvp/chromeos.c +++ b/src/mainboard/intel/icelake_rvp/chromeos.c @@ -27,7 +27,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/intel/kblrvp/chromeos.c b/src/mainboard/intel/kblrvp/chromeos.c index 5168074..ff93d27 100644 --- a/src/mainboard/intel/kblrvp/chromeos.c +++ b/src/mainboard/intel/kblrvp/chromeos.c @@ -31,7 +31,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/intel/kunimitsu/chromeos.c b/src/mainboard/intel/kunimitsu/chromeos.c index f7a9d52..6422488 100644 --- a/src/mainboard/intel/kunimitsu/chromeos.c +++ b/src/mainboard/intel/kunimitsu/chromeos.c @@ -27,7 +27,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/intel/strago/chromeos.c b/src/mainboard/intel/strago/chromeos.c index 03eff1b..df36b38 100644 --- a/src/mainboard/intel/strago/chromeos.c +++ b/src/mainboard/intel/strago/chromeos.c @@ -29,7 +29,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, vboot_recovery_mode_enabled(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/intel/wtm2/chromeos.c b/src/mainboard/intel/wtm2/chromeos.c index 0f5cfbb..8022214 100644 --- a/src/mainboard/intel/wtm2/chromeos.c +++ b/src/mainboard/intel/wtm2/chromeos.c @@ -29,7 +29,6 @@ { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, 1, "lid"}, // force open {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c index 2d4fb61..6760f03 100644 --- a/src/mainboard/samsung/lumpy/chromeos.c +++ b/src/mainboard/samsung/lumpy/chromeos.c @@ -47,7 +47,7 @@ /* Recovery: GPIO42 = CHP3_REC_MODE# */ {GPIO_REC_MODE, ACTIVE_LOW, !get_recovery_mode_switch(), - "recovery"}, + "presence"}, {100, ACTIVE_HIGH, lid & 1, "lid"}, diff --git a/src/mainboard/samsung/stumpy/chromeos.c b/src/mainboard/samsung/stumpy/chromeos.c index b1ad137..9ec4218 100644 --- a/src/mainboard/samsung/stumpy/chromeos.c +++ b/src/mainboard/samsung/stumpy/chromeos.c @@ -43,7 +43,7 @@ /* Recovery: GPIO42 = CHP3_REC_MODE# */ {GPIO_REC_MODE, ACTIVE_LOW, !get_recovery_mode_switch(), - "recovery"}, + "presence"}, /* Hard code the lid switch GPIO to open. */ {100, ACTIVE_HIGH, 1, "lid"}, -- To view, visit https://review.coreboot.org/c/coreboot/+/32718 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id6d62d9e48d3e6646cbc1277ea53f0ca95dd849e Gerrit-Change-Number: 32718 Gerrit-PatchSet: 1 Gerrit-Owner: Matt Delco <delco(a)chromium.org> Gerrit-MessageType: newchange

4 5

Change in ...coreboot[master]: libpayload: classify all keyboards
by Matt Delco (Code Review) 13 May '19

13 May '19

Matt Delco has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32717 Change subject: libpayload: classify all keyboards ...................................................................... libpayload: classify all keyboards Gets rid of 'unknown' and classifies all keyboards. Depthcharge uses the keyboard type to help determine whether it can trust the keyboard for security-sensitive confirmations. Currently it trusts anything except usb, but now there's a need to distrust ps/2 keyboards that are associated with untrusted ECs. To help facilitate this, coreboot needs to report more details about non-usb keyboards, so this change replaces unknown with enum values that distinguish uart from ps/2. After this change there are no unknown keyboards left, so I've removed the enum. BUG=b:129471321 BRANCH=None TEST=Local compile and flash to systems with trusted and non-trusted ECs. Confirmed that security confirmation can't be performed via keyboard on a system with an untrusted EC but can still be performed on a system with a trusted EC. Change-Id: Iee6295dafadf7cb3da98b62f43b0e184b2b69b1e Signed-off-by: Matt Delco <delco(a)chromium.org> --- M payloads/libpayload/drivers/i8042/keyboard.c M payloads/libpayload/drivers/serial/8250.c M payloads/libpayload/drivers/serial/ipq40xx.c M payloads/libpayload/drivers/serial/ipq806x.c M payloads/libpayload/drivers/serial/s5p.c M payloads/libpayload/include/libpayload.h 6 files changed, 11 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/32717/1 diff --git a/payloads/libpayload/drivers/i8042/keyboard.c b/payloads/libpayload/drivers/i8042/keyboard.c index 1035bf2..92a4146 100644 --- a/payloads/libpayload/drivers/i8042/keyboard.c +++ b/payloads/libpayload/drivers/i8042/keyboard.c @@ -296,7 +296,8 @@ static struct console_input_driver cons = { .havekey = keyboard_havechar, - .getchar = keyboard_getchar + .getchar = keyboard_getchar, + .input_type = CONSOLE_INPUT_TYPE_I8042, }; void keyboard_init(void) diff --git a/payloads/libpayload/drivers/serial/8250.c b/payloads/libpayload/drivers/serial/8250.c index f503bdb..9502d4b 100644 --- a/payloads/libpayload/drivers/serial/8250.c +++ b/payloads/libpayload/drivers/serial/8250.c @@ -98,7 +98,8 @@ static struct console_input_driver consin = { .havekey = &serial_havechar, - .getchar = &serial_getchar + .getchar = &serial_getchar, + .input_type = CONSOLE_INPUT_TYPE_UART, }; static struct console_output_driver consout = { diff --git a/payloads/libpayload/drivers/serial/ipq40xx.c b/payloads/libpayload/drivers/serial/ipq40xx.c index 52d71b8..7656ad7 100644 --- a/payloads/libpayload/drivers/serial/ipq40xx.c +++ b/payloads/libpayload/drivers/serial/ipq40xx.c @@ -560,6 +560,7 @@ consin.havekey = serial_havechar; consin.getchar = serial_getchar; + consin.input_type = CONSOLE_INPUT_TYPE_UART; consout.putchar = serial_putchar; diff --git a/payloads/libpayload/drivers/serial/ipq806x.c b/payloads/libpayload/drivers/serial/ipq806x.c index 912893d..183ada6 100644 --- a/payloads/libpayload/drivers/serial/ipq806x.c +++ b/payloads/libpayload/drivers/serial/ipq806x.c @@ -352,6 +352,7 @@ consin.havekey = serial_havechar; consin.getchar = serial_getchar; + consin.input_type = CONSOLE_INPUT_TYPE_UART; consout.putchar = serial_putchar; diff --git a/payloads/libpayload/drivers/serial/s5p.c b/payloads/libpayload/drivers/serial/s5p.c index 1d23352..6ca5dc4 100644 --- a/payloads/libpayload/drivers/serial/s5p.c +++ b/payloads/libpayload/drivers/serial/s5p.c @@ -84,7 +84,8 @@ static struct console_input_driver s5p_serial_input = { .havekey = &serial_havechar, - .getchar = &serial_getchar + .getchar = &serial_getchar, + .input_type = CONSOLE_INPUT_TYPE_UART, }; void serial_init(void) diff --git a/payloads/libpayload/include/libpayload.h b/payloads/libpayload/include/libpayload.h index 3a84b3b..3fdb096 100644 --- a/payloads/libpayload/include/libpayload.h +++ b/payloads/libpayload/include/libpayload.h @@ -348,8 +348,10 @@ * @{ */ typedef enum { - CONSOLE_INPUT_TYPE_UNKNOWN = 0, + /* UNKNOWN was zero, but currently all are known */ CONSOLE_INPUT_TYPE_USB, + CONSOLE_INPUT_TYPE_I8042, + CONSOLE_INPUT_TYPE_UART, } console_input_type; void console_init(void); -- To view, visit https://review.coreboot.org/c/coreboot/+/32717 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iee6295dafadf7cb3da98b62f43b0e184b2b69b1e Gerrit-Change-Number: 32717 Gerrit-PatchSet: 1 Gerrit-Owner: Matt Delco <delco(a)chromium.org> Gerrit-MessageType: newchange

5 11

Change in ...coreboot[master]: mb/google/sarien: config ISH_GP6 with NF2
by Jett Rink (Code Review) 13 May '19

13 May '19

Jett Rink has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32738 Change subject: mb/google/sarien: config ISH_GP6 with NF2 ...................................................................... mb/google/sarien: config ISH_GP6 with NF2 A12 is not current set for ISH_GP6 so the ISH_LID_CL#_TAB signal is not making it to the ISH properly. Enable the second native function instead of the first. BRANCH=none BUG=b:131785573 TEST=gpioget on ISH now shows the correct gpio level Change-Id: Ib3a654ae659037263aa9aa29d45b42ca67b7955b Signed-off-by: Jett Rink <jettrink(a)chromium.org> --- M src/mainboard/google/sarien/variants/arcada/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/32738/1 diff --git a/src/mainboard/google/sarien/variants/arcada/gpio.c b/src/mainboard/google/sarien/variants/arcada/gpio.c index da95497..ea0601b 100644 --- a/src/mainboard/google/sarien/variants/arcada/gpio.c +++ b/src/mainboard/google/sarien/variants/arcada/gpio.c @@ -31,7 +31,7 @@ /* CLKOUT_LPC1 */ PAD_NC(GPP_A10, NONE), /* PME# */ PAD_NC(GPP_A11, NONE), /* ISH_LID_CL#_TAB */ -/* BM_BUSY# */ PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1), +/* ISH_GP6 */ PAD_CFG_NF(GPP_A12, NONE, DEEP, NF2), /* SUSWARN# */ PAD_NC(GPP_A13, NONE), /* ESPI_RESET# */ /* SUSACK# */ PAD_NC(GPP_A15, NONE), -- To view, visit https://review.coreboot.org/c/coreboot/+/32738 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib3a654ae659037263aa9aa29d45b42ca67b7955b Gerrit-Change-Number: 32738 Gerrit-PatchSet: 1 Gerrit-Owner: Jett Rink <jettrink(a)chromium.org> Gerrit-MessageType: newchange

4 4

Change in ...coreboot[master]: lib/hexdump: Drop redundant isprint() implementation
by Nico Huber (Code Review) 13 May '19

13 May '19

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32739 Change subject: lib/hexdump: Drop redundant isprint() implementation ...................................................................... lib/hexdump: Drop redundant isprint() implementation Change-Id: I23e2d89274553cbc75e42f0420a1a84d4cec4340 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/lib/hexdump.c 1 file changed, 1 insertion(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/32739/1 diff --git a/src/lib/hexdump.c b/src/lib/hexdump.c index 2861d63..ca36dde 100644 --- a/src/lib/hexdump.c +++ b/src/lib/hexdump.c @@ -14,11 +14,7 @@ #include <console/console.h> #include <lib.h> - -static int isprint(int c) -{ - return (c >= 32 && c <= 126); -} +#include <string.h> void hexdump(const void *memory, size_t length) { -- To view, visit https://review.coreboot.org/c/coreboot/+/32739 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I23e2d89274553cbc75e42f0420a1a84d4cec4340 Gerrit-Change-Number: 32739 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

3 2

Change in ...coreboot[master]: util/kconfig: Use snprintf to avoid buffer overflow
by Jacob Garber (Code Review) 13 May '19

13 May '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32686 Change subject: util/kconfig: Use snprintf to avoid buffer overflow ...................................................................... util/kconfig: Use snprintf to avoid buffer overflow 'name' and 'env' are supposed to be file system paths, but could overflow the buffer if configured incorrectly. Let's avoid that entirely. Found-by: Coverity Scan #1362515 Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> Change-Id: I1aef36819d49ebcbde1c51995dc0961c85e74150 --- M util/kconfig/zconf.l M util/kconfig/zconf.lex.c_shipped 2 files changed, 4 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/32686/1 diff --git a/util/kconfig/zconf.l b/util/kconfig/zconf.l index 0b45c19..f2636d2 100644 --- a/util/kconfig/zconf.l +++ b/util/kconfig/zconf.l @@ -273,7 +273,8 @@ if (!f && name != NULL && name[0] != '/') { env = getenv(SRCTREE); if (env) { - sprintf(fullname, "%s/%s", env, name); + snprintf(fullname, sizeof(fullname), + "%s/%s", env, name); f = fopen(fullname, "r"); } } diff --git a/util/kconfig/zconf.lex.c_shipped b/util/kconfig/zconf.lex.c_shipped index 72e3a5f..4133f71 100644 --- a/util/kconfig/zconf.lex.c_shipped +++ b/util/kconfig/zconf.lex.c_shipped @@ -2351,7 +2351,8 @@ if (!f && name != NULL && name[0] != '/') { env = getenv(SRCTREE); if (env) { - sprintf(fullname, "%s/%s", env, name); + snprintf(fullname, sizeof(fullname), + "%s/%s", env, name); f = fopen(fullname, "r"); } } -- To view, visit https://review.coreboot.org/c/coreboot/+/32686 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1aef36819d49ebcbde1c51995dc0961c85e74150 Gerrit-Change-Number: 32686 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

4 5

Change in ...coreboot[master]: soc/intel/braswell: Remove unused include <timestamp.h>
by HAOUAS Elyes (Code Review) 13 May '19

13 May '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32711 Change subject: soc/intel/braswell: Remove unused include <timestamp.h> ...................................................................... soc/intel/braswell: Remove unused include <timestamp.h> Change-Id: Ied645a583f78bc47c8358240acd639132fd499db Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/braswell/romstage/romstage.c 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/32711/1 diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c index 342b05c..22b0df2 100644 --- a/src/soc/intel/braswell/romstage/romstage.c +++ b/src/soc/intel/braswell/romstage/romstage.c @@ -29,7 +29,6 @@ #include <elog.h> #include <mrc_cache.h> #include <string.h> -#include <timestamp.h> #include <vendorcode/google/chromeos/chromeos.h> #include <fsp/util.h> #include <soc/gpio.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/32711 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ied645a583f78bc47c8358240acd639132fd499db Gerrit-Change-Number: 32711 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

4 3

Change in ...coreboot[master]: src: Remove unused include <timestamp.h>
by HAOUAS Elyes (Code Review) 13 May '19

13 May '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32676 Change subject: src: Remove unused include <timestamp.h> ...................................................................... src: Remove unused include <timestamp.h> Change-Id: Id05fc39c0c0d0560e34e55f793060d29df82d026 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/google/cheza/mainboard.c M src/mainboard/google/mistral/bootblock.c M src/mainboard/google/mistral/mainboard.c M src/soc/intel/braswell/romstage/romstage.c 4 files changed, 0 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/32676/1 diff --git a/src/mainboard/google/cheza/mainboard.c b/src/mainboard/google/cheza/mainboard.c index 42adf56..7a19d32 100644 --- a/src/mainboard/google/cheza/mainboard.c +++ b/src/mainboard/google/cheza/mainboard.c @@ -16,7 +16,6 @@ #include <device/device.h> #include <bootblock_common.h> #include <gpio.h> -#include <timestamp.h> #include <soc/usb.h> static struct usb_board_data usb1_board_data = { diff --git a/src/mainboard/google/mistral/bootblock.c b/src/mainboard/google/mistral/bootblock.c index 6718d52..4ef8fec 100644 --- a/src/mainboard/google/mistral/bootblock.c +++ b/src/mainboard/google/mistral/bootblock.c @@ -14,7 +14,6 @@ */ #include <bootblock_common.h> -#include <timestamp.h> void bootblock_mainboard_init(void) { diff --git a/src/mainboard/google/mistral/mainboard.c b/src/mainboard/google/mistral/mainboard.c index 1d62adb..d50758c 100644 --- a/src/mainboard/google/mistral/mainboard.c +++ b/src/mainboard/google/mistral/mainboard.c @@ -15,7 +15,6 @@ #include <device/device.h> #include <bootblock_common.h> -#include <timestamp.h> #include <vendorcode/google/chromeos/chromeos.h> #include <soc/usb.h> diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c index 342b05c..22b0df2 100644 --- a/src/soc/intel/braswell/romstage/romstage.c +++ b/src/soc/intel/braswell/romstage/romstage.c @@ -29,7 +29,6 @@ #include <elog.h> #include <mrc_cache.h> #include <string.h> -#include <timestamp.h> #include <vendorcode/google/chromeos/chromeos.h> #include <fsp/util.h> #include <soc/gpio.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/32676 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id05fc39c0c0d0560e34e55f793060d29df82d026 Gerrit-Change-Number: 32676 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

4 5

Change in ...coreboot[master]: soc/intel/braswell/pmutil.c: Add tsc_freq.c and pmutil.c in verstage
by Frans Hendriks (Code Review) 13 May '19

13 May '19

Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32733 Change subject: soc/intel/braswell/pmutil.c: Add tsc_freq.c and pmutil.c in verstage ...................................................................... soc/intel/braswell/pmutil.c: Add tsc_freq.c and pmutil.c in verstage Systems with C_EVIRONMENT_BOOTBLOCK and VBOOT enabled requires functions tsc_freq_mhz(), vbnv_cmos_failed() and vboot_platform_is_resuming() in verstage. Add tsc_freq.c and pmutil.c to verstage. BUG=NA TEST=Booting Embedded Linux on Facebook FBG-1701 + Building Google Banon Change-Id: Ia509eda6bf415aaa63be71013249493aa472289d Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- M src/soc/intel/braswell/Makefile.inc 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/32733/1 diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index a2b7ee5..fe3bf0c 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -52,6 +52,9 @@ smm-y += spi.c smm-y += tsc_freq.c +verstage-y += pmutil.c +verstage-y += tsc_freq.c + CPPFLAGS_common += -I$(src)/soc/intel/braswell/ CPPFLAGS_common += -I$(src)/soc/intel/braswell/include CPPFLAGS_common += -I$(call strip_quotes,$(CONFIG_FSP_HEADER_PATH)) -- To view, visit https://review.coreboot.org/c/coreboot/+/32733 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia509eda6bf415aaa63be71013249493aa472289d Gerrit-Change-Number: 32733 Gerrit-PatchSet: 1 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-MessageType: newchange

3 3

Change in ...coreboot[master]: util/intelvbttool: Add error checking for memory allocation
by Jacob Garber (Code Review) 13 May '19

13 May '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32696 Change subject: util/intelvbttool: Add error checking for memory allocation ...................................................................... util/intelvbttool: Add error checking for memory allocation It is possible that 'malloc_fo_sub' and 'remalloc_fo' can fail, so add appropriate error checks for those cases. This incidentally fixes a possible memory leak when 'malloc_fo_sub' succeeds but 'remalloc_fo' does not. Found-by: Coverity Scan #1396050 Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> Change-Id: I944b67f5cdcfd7a687e81d8bb01a209c9dc9b0b8 --- M util/intelvbttool/intelvbttool.c 1 file changed, 14 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/32696/1 diff --git a/util/intelvbttool/intelvbttool.c b/util/intelvbttool/intelvbttool.c index f8e4bda..467e5bd 100644 --- a/util/intelvbttool/intelvbttool.c +++ b/util/intelvbttool/intelvbttool.c @@ -788,7 +788,20 @@ } /* Duplicate fo as caller is owner and remalloc frees the object */ - *vbt = remalloc_fo(malloc_fo_sub(fo, 0), head->vbt_size); + struct fileobject *dupfo = malloc_fo_sub(fo, 0); + if (!dupfo) { + printerr("malloc failed\n"); + return; + } + + struct fileobject *newfo = remalloc_fo(dupfo, head->vbt_size); + if (!newfo) { + printerr("remalloc failed\n"); + free_fo(dupfo); + return; + } + + *vbt = newfo; } /* Option ROM checksum */ -- To view, visit https://review.coreboot.org/c/coreboot/+/32696 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I944b67f5cdcfd7a687e81d8bb01a209c9dc9b0b8 Gerrit-Change-Number: 32696 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

3 2

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit May 2019