coreboot-gerrit March 2019

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Change in ...coreboot[master]: northbridge/amd/pi: Fix null pointer check
by Jacob Garber (Code Review) 08 Apr '19

08 Apr '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32022 Change subject: northbridge/amd/pi: Fix null pointer check ...................................................................... northbridge/amd/pi: Fix null pointer check - The `dev` pointer was being dereferenced before the null check. This fixes Coverity CID 1241851 (REVERSE_INULL) - Apply clang-format whitespace cleanups Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> Change-Id: Ie578787c3c26a1f3acb4567c135486667e88a888 --- M src/northbridge/amd/pi/00730F01/dimmSpd.c 1 file changed, 9 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/32022/1 diff --git a/src/northbridge/amd/pi/00730F01/dimmSpd.c b/src/northbridge/amd/pi/00730F01/dimmSpd.c index 79e046e..bdfb074 100644 --- a/src/northbridge/amd/pi/00730F01/dimmSpd.c +++ b/src/northbridge/amd/pi/00730F01/dimmSpd.c @@ -24,13 +24,16 @@ #include <northbridge/amd/pi/dimmSpd.h> -AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINTN unused2, AGESA_READ_SPD_PARAMS *info) +AGESA_STATUS AmdMemoryReadSPD(UINT32 unused1, UINTN unused2, AGESA_READ_SPD_PARAMS *info) { - int spdAddress; DEVTREE_CONST struct device *dev = pcidev_on_root(0x18, 2); + + if (dev == 0) + return AGESA_ERROR; + DEVTREE_CONST struct northbridge_amd_pi_00730F01_config *config = dev->chip_info; - if ((dev == 0) || (config == 0)) + if (config == 0) return AGESA_ERROR; if (info->SocketId >= ARRAY_SIZE(config->spdAddrLookup)) @@ -40,13 +43,13 @@ if (info->DimmId >= ARRAY_SIZE(config->spdAddrLookup[0][0])) return AGESA_ERROR; - spdAddress = config->spdAddrLookup - [info->SocketId] [info->MemChannelId] [info->DimmId]; + int spdAddress = config->spdAddrLookup + [info->SocketId][info->MemChannelId][info->DimmId]; if (spdAddress == 0) return AGESA_ERROR; - int err = hudson_readSpd(spdAddress, (void *) info->Buffer, 128); + int err = hudson_readSpd(spdAddress, (void *)info->Buffer, 128); if (err) return AGESA_ERROR; return AGESA_SUCCESS; -- To view, visit https://review.coreboot.org/c/coreboot/+/32022 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie578787c3c26a1f3acb4567c135486667e88a888 Gerrit-Change-Number: 32022 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

6 15

Change in ...coreboot[master]: src: Use include <delay.h> when appropriate
by HAOUAS Elyes (Code Review) 06 Apr '19

06 Apr '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32012 Change subject: src: Use include <delay.h> when appropriate ...................................................................... src: Use include <delay.h> when appropriate Change-Id: I23bc0191ca8fcd88364e5c08be7c90195019e399 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/arch/riscv/misc.c M src/cpu/ti/am335x/monotonic_timer.c M src/drivers/aspeed/ast2050/ast2050.c M src/drivers/aspeed/common/ast_dp501.c M src/drivers/aspeed/common/ast_main.c M src/drivers/aspeed/common/ast_post.c M src/drivers/emulation/qemu/bochs.c M src/drivers/emulation/qemu/cirrus.c M src/drivers/intel/gma/intel_ddi.c M src/drivers/intel/gma/vbt.c M src/drivers/net/ne2k.c M src/drivers/siemens/nc_fpga/nc_fpga.c M src/drivers/sil/3114/sil_sata.c M src/drivers/spi/spi_flash.c M src/drivers/xgi/common/vb_init.c M src/drivers/xgi/common/vb_setmode.c M src/drivers/xgi/common/xgi_coreboot.c M src/drivers/xgi/common/xgi_coreboot.h M src/drivers/xgi/z9s/z9s.c M src/ec/google/chromeec/crosec_proto.c M src/ec/google/chromeec/ec_i2c.c M src/include/cpu/x86/lapic.h M src/lib/bootblock.c M src/lib/decompressor.c M src/lib/hardwaremain.c M src/mainboard/apple/macbook21/mainboard.c M src/mainboard/apple/macbook21/smihandler.c M src/mainboard/asus/kfsn4-dre/romstage.c M src/mainboard/cubietech/cubieboard/bootblock.c M src/mainboard/gizmosphere/gizmo/mainboard.c M src/mainboard/google/foster/mainboard.c M src/mainboard/google/gale/mainboard.c M src/mainboard/google/oak/bootblock.c M src/mainboard/google/slippy/variants/peppy/romstage.c M src/mainboard/google/slippy/variants/wolf/romstage.c M src/mainboard/google/smaug/romstage.c M src/mainboard/google/veyron/romstage.c M src/mainboard/google/veyron_mickey/mainboard.c M src/mainboard/google/veyron_mickey/romstage.c M src/mainboard/google/veyron_rialto/mainboard.c M src/mainboard/google/veyron_rialto/romstage.c M src/mainboard/hp/dl165_g6_fam10/romstage.c M src/mainboard/hp/pavilion_m6_1035dx/mainboard_smi.c M src/mainboard/intel/galileo/vboot.c M src/mainboard/kontron/986lcd-m/romstage.c M src/mainboard/lenovo/g505s/mainboard_smi.c M src/mainboard/lenovo/s230u/smihandler.c M src/mainboard/lenovo/t60/romstage.c M src/mainboard/lenovo/x200/dock.c M src/mainboard/lenovo/x60/romstage.c M src/mainboard/lenovo/z61t/romstage.c M src/mainboard/msi/ms9652_fam10/romstage.c M src/mainboard/opencellular/elgon/mainboard.c M src/mainboard/packardbell/ms2290/mainboard.c M src/mainboard/packardbell/ms2290/romstage.c M src/mainboard/packardbell/ms2290/smihandler.c M src/mainboard/roda/rk886ex/mainboard.c M src/mainboard/roda/rk886ex/romstage.c M src/mainboard/siemens/mc_tcu3/ptn3460.c M src/mainboard/siemens/mc_tcu3/ptn3460.h M src/mainboard/supermicro/h8dmr_fam10/romstage.c M src/mainboard/supermicro/h8qme_fam10/romstage.c M src/mainboard/tyan/s2912_fam10/romstage.c M src/northbridge/amd/amdmct/wrappers/mcti_d.c M src/northbridge/amd/pi/agesawrapper.c M src/northbridge/intel/fsp_rangeley/northbridge.c M src/northbridge/intel/gm45/gma.c M src/northbridge/intel/haswell/minihd.c M src/northbridge/intel/sandybridge/raminit.c M src/northbridge/intel/x4x/gma.c M src/northbridge/intel/x4x/raminit.c M src/security/vboot/vboot_logic.c M src/soc/amd/common/block/pi/agesawrapper.c M src/soc/amd/stoneyridge/hda.c M src/soc/amd/stoneyridge/sata.c M src/soc/amd/stoneyridge/smihandler.c M src/soc/cavium/cn81xx/include/soc/timer.h M src/soc/cavium/cn81xx/spi.c M src/soc/cavium/common/bdk-coreboot.c M src/soc/cavium/common/bootblock.c M src/soc/intel/baytrail/gfx.c M src/soc/intel/braswell/sata.c M src/soc/intel/broadwell/adsp.c M src/soc/intel/broadwell/ehci.c M src/soc/intel/broadwell/hda.c M src/soc/intel/broadwell/lpc.c M src/soc/intel/broadwell/minihd.c M src/soc/intel/broadwell/pch.c M src/soc/intel/broadwell/romstage/uart.c M src/soc/intel/cannonlake/lpc.c M src/soc/intel/common/block/cpu/cpulib.c M src/soc/intel/common/block/systemagent/systemagent_early.c M src/soc/intel/fsp_baytrail/gfx.c M src/soc/intel/fsp_broadwell_de/smihandler.c M src/soc/intel/icelake/lpc.c M src/soc/intel/quark/gpio_i2c.c M src/soc/intel/quark/include/soc/reg_access.h M src/soc/intel/quark/reg_access.c M src/soc/intel/quark/romstage/pcie.c M src/soc/intel/skylake/cpu.c M src/soc/intel/skylake/lpc.c M src/soc/mediatek/common/include/soc/rtc_common.h M src/soc/mediatek/common/rtc.c M src/soc/mediatek/common/timer.c M src/soc/mediatek/common/usb.c M src/soc/mediatek/mt8173/ddp.c M src/soc/mediatek/mt8173/dramc_pi_calibration_api.c M src/soc/mediatek/mt8173/emi.c M src/soc/mediatek/mt8173/rtc.c M src/soc/nvidia/tegra/gpio.c M src/soc/nvidia/tegra210/mipi_dsi.c M src/soc/qualcomm/ipq40xx/i2c.c M src/soc/qualcomm/ipq806x/i2c.c M src/soc/qualcomm/qcs405/timer.c M src/soc/qualcomm/sdm845/clock.c M src/soc/qualcomm/sdm845/gpio.c M src/soc/qualcomm/sdm845/timer.c M src/soc/rockchip/common/pwm.c M src/soc/rockchip/common/vop.c M src/soc/rockchip/rk3288/soc.c M src/soc/rockchip/rk3288/timer.c M src/soc/rockchip/rk3288/tsadc.c M src/soc/rockchip/rk3399/timer.c M src/soc/rockchip/rk3399/usb.c M src/soc/samsung/exynos5250/clock_init.c M src/soc/samsung/exynos5250/cpu.c M src/soc/samsung/exynos5250/timer.c M src/soc/samsung/exynos5420/clock_init.c M src/soc/samsung/exynos5420/cpu.c M src/soc/samsung/exynos5420/fimd.c M src/soc/samsung/exynos5420/timer.c M src/southbridge/amd/agesa/hudson/hda.c M src/southbridge/amd/agesa/hudson/imc.c M src/southbridge/amd/agesa/hudson/sata.c M src/southbridge/amd/agesa/hudson/sd.c M src/southbridge/amd/agesa/hudson/smihandler.c M src/southbridge/amd/pi/hudson/hda.c M src/southbridge/amd/pi/hudson/imc.c M src/southbridge/amd/pi/hudson/sata.c M src/southbridge/amd/pi/hudson/sd.c M src/southbridge/amd/pi/hudson/smihandler.c M src/southbridge/intel/bd82x6x/early_pch.c M src/southbridge/intel/fsp_rangeley/soc.c M src/southbridge/intel/lynxpoint/azalia.c M src/southbridge/intel/lynxpoint/smihandler.c M src/southbridge/nvidia/mcp55/early_setup_car.c M src/southbridge/nvidia/mcp55/sata.c 147 files changed, 94 insertions(+), 195 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/32012/1 diff --git a/src/arch/riscv/misc.c b/src/arch/riscv/misc.c index 1909dbc..bebaa70 100644 --- a/src/arch/riscv/misc.c +++ b/src/arch/riscv/misc.c @@ -11,8 +11,6 @@ * GNU General Public License for more details. */ -#include <delay.h> - void init_timer(void) { } diff --git a/src/cpu/ti/am335x/monotonic_timer.c b/src/cpu/ti/am335x/monotonic_timer.c index 94db418..0599417 100644 --- a/src/cpu/ti/am335x/monotonic_timer.c +++ b/src/cpu/ti/am335x/monotonic_timer.c @@ -14,7 +14,6 @@ */ #include <stdint.h> -#include <delay.h> #include <timer.h> #include "dmtimer.h" diff --git a/src/drivers/aspeed/ast2050/ast2050.c b/src/drivers/aspeed/ast2050/ast2050.c index 035d5c6..631372d 100644 --- a/src/drivers/aspeed/ast2050/ast2050.c +++ b/src/drivers/aspeed/ast2050/ast2050.c @@ -12,17 +12,15 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -#include <delay.h> + #include <stdlib.h> #include <arch/io.h> #include <edid.h> - #include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> - #include <pc80/vga.h> #include "../common/aspeed_coreboot.h" diff --git a/src/drivers/aspeed/common/ast_dp501.c b/src/drivers/aspeed/common/ast_dp501.c index 46b76f5..2e8b897 100644 --- a/src/drivers/aspeed/common/ast_dp501.c +++ b/src/drivers/aspeed/common/ast_dp501.c @@ -15,6 +15,8 @@ * GNU General Public License for more details. */ +#include <delay.h> + #include "ast_drv.h" static void send_ack(struct ast_private *ast) diff --git a/src/drivers/aspeed/common/ast_main.c b/src/drivers/aspeed/common/ast_main.c index 3a0cf20..086b0a4 100644 --- a/src/drivers/aspeed/common/ast_main.c +++ b/src/drivers/aspeed/common/ast_main.c @@ -26,8 +26,10 @@ /* * Authors: Dave Airlie <airlied(a)redhat.com> */ -#include "ast_drv.h" +#include <delay.h> + +#include "ast_drv.h" #include "ast_dram_tables.h" void ast_set_index_reg_mask(struct ast_private *ast, diff --git a/src/drivers/aspeed/common/ast_post.c b/src/drivers/aspeed/common/ast_post.c index 0727443..5f935b9 100644 --- a/src/drivers/aspeed/common/ast_post.c +++ b/src/drivers/aspeed/common/ast_post.c @@ -29,8 +29,9 @@ #define COREBOOT_AST_FAILOVER_TIMEOUT 10000000 -#include "ast_drv.h" +#include <delay.h> +#include "ast_drv.h" #include "ast_dram_tables.h" static void ast_init_dram_2300(struct drm_device *dev); diff --git a/src/drivers/emulation/qemu/bochs.c b/src/drivers/emulation/qemu/bochs.c index 2310c9e..22095ef 100644 --- a/src/drivers/emulation/qemu/bochs.c +++ b/src/drivers/emulation/qemu/bochs.c @@ -12,11 +12,9 @@ */ #include <stdint.h> -#include <delay.h> #include <edid.h> #include <stdlib.h> #include <arch/io.h> - #include <boot/coreboot_tables.h> #include <console/console.h> #include <device/device.h> diff --git a/src/drivers/emulation/qemu/cirrus.c b/src/drivers/emulation/qemu/cirrus.c index 04edef4..ed5a4f4 100644 --- a/src/drivers/emulation/qemu/cirrus.c +++ b/src/drivers/emulation/qemu/cirrus.c @@ -15,17 +15,14 @@ */ #include <stdint.h> -#include <delay.h> #include <edid.h> #include <stdlib.h> - #include <boot/coreboot_tables.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> - #include <pc80/vga.h> #include <pc80/vga_io.h> diff --git a/src/drivers/intel/gma/intel_ddi.c b/src/drivers/intel/gma/intel_ddi.c index 58134db..471a5d2 100644 --- a/src/drivers/intel/gma/intel_ddi.c +++ b/src/drivers/intel/gma/intel_ddi.c @@ -25,20 +25,19 @@ * Eugeni Dodonov <eugeni.dodonov(a)intel.com> * */ + #include <types.h> #include <stdlib.h> #include <device/device.h> #include <device/pci_def.h> #include <device/pci_ops.h> #include <console/console.h> -#include <delay.h> #include <arch/acpi.h> #include <arch/interrupt.h> #include <boot/coreboot_tables.h> #include <smbios.h> #include <device/pci.h> #include <ec/google/chromeec/ec.h> - #include <cpu/x86/tsc.h> #include <cpu/x86/cache.h> #include <cpu/x86/mtrr.h> diff --git a/src/drivers/intel/gma/vbt.c b/src/drivers/intel/gma/vbt.c index 7455704..fa50ae9 100644 --- a/src/drivers/intel/gma/vbt.c +++ b/src/drivers/intel/gma/vbt.c @@ -16,7 +16,6 @@ */ #include <device/pci_ops.h> -#include <delay.h> #include <device/device.h> #include <string.h> #include <device/pci.h> diff --git a/src/drivers/net/ne2k.c b/src/drivers/net/ne2k.c index 6f8aca2..e3dd948 100644 --- a/src/drivers/net/ne2k.c +++ b/src/drivers/net/ne2k.c @@ -29,7 +29,6 @@ #include <arch/io.h> #include <console/ne2k.h> -#include <delay.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/drivers/siemens/nc_fpga/nc_fpga.c b/src/drivers/siemens/nc_fpga/nc_fpga.c index ef1f2f2..fb681ad 100644 --- a/src/drivers/siemens/nc_fpga/nc_fpga.c +++ b/src/drivers/siemens/nc_fpga/nc_fpga.c @@ -19,9 +19,9 @@ #include <device/pci_ops.h> #include <device/pci_def.h> #include <device/mmio.h> -#include <delay.h> #include <hwilib.h> #include <bootstate.h> + #include "nc_fpga.h" static void *nc_fpga_bar0; diff --git a/src/drivers/sil/3114/sil_sata.c b/src/drivers/sil/3114/sil_sata.c index 4908413f..dd6481a 100644 --- a/src/drivers/sil/3114/sil_sata.c +++ b/src/drivers/sil/3114/sil_sata.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <delay.h> #include <stdlib.h> #include <console/console.h> #include <device/device.h> diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c index 71dc660..82398dd 100644 --- a/src/drivers/spi/spi_flash.c +++ b/src/drivers/spi/spi_flash.c @@ -11,14 +11,13 @@ #include <assert.h> #include <boot_device.h> #include <cpu/x86/smm.h> -#include <delay.h> #include <stdlib.h> #include <string.h> #include <spi-generic.h> #include <spi_flash.h> +#include <timer.h> #include "spi_flash_internal.h" -#include <timer.h> static void spi_flash_addr(u32 addr, u8 *cmd) { diff --git a/src/drivers/xgi/common/vb_init.c b/src/drivers/xgi/common/vb_init.c index 0d25e25..a20c068 100644 --- a/src/drivers/xgi/common/vb_init.c +++ b/src/drivers/xgi/common/vb_init.c @@ -17,14 +17,16 @@ * GNU General Public License for more details. */ +#include <delay.h> + #include "xgi_coreboot.h" #include "vstruct.h" - #include "XGIfb.h" #include "vb_def.h" #include "vb_util.h" #include "vb_setmode.h" #include "vb_init.h" + static const unsigned short XGINew_DDRDRAM_TYPE340[4][2] = { { 16, 0x45}, { 8, 0x35}, diff --git a/src/drivers/xgi/common/vb_setmode.c b/src/drivers/xgi/common/vb_setmode.c index e80bc35..162d00c 100644 --- a/src/drivers/xgi/common/vb_setmode.c +++ b/src/drivers/xgi/common/vb_setmode.c @@ -14,11 +14,11 @@ * GNU General Public License for more details. */ +#include <delay.h> + #include "xgi_coreboot.h" #include "vstruct.h" - #include "XGIfb.h" - #include "vb_def.h" #include "vb_init.h" #include "vb_util.h" diff --git a/src/drivers/xgi/common/xgi_coreboot.c b/src/drivers/xgi/common/xgi_coreboot.c index 745baa2..5aba472 100644 --- a/src/drivers/xgi/common/xgi_coreboot.c +++ b/src/drivers/xgi/common/xgi_coreboot.c @@ -15,27 +15,23 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -#include <delay.h> + #include <stdlib.h> #include <vbe.h> - #include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> - #include <pc80/vga.h> #include "xgi_coreboot.h" #include "vstruct.h" - #include "XGIfb.h" #include "XGI_main.h" #include "vb_init.h" #include "vb_util.h" #include "vb_setmode.h" - #include "XGI_main.c" static int xgi_vbe_valid; diff --git a/src/drivers/xgi/common/xgi_coreboot.h b/src/drivers/xgi/common/xgi_coreboot.h index dc8f49e..41952d6 100644 --- a/src/drivers/xgi/common/xgi_coreboot.h +++ b/src/drivers/xgi/common/xgi_coreboot.h @@ -19,12 +19,10 @@ #ifndef _XGI_COREBOOT_ #define _XGI_COREBOOT_ -#include <delay.h> #include <stdlib.h> #include <stdint.h> #include <arch/io.h> #include <device/mmio.h> - #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/drivers/xgi/z9s/z9s.c b/src/drivers/xgi/z9s/z9s.c index 3b46811..1925514 100644 --- a/src/drivers/xgi/z9s/z9s.c +++ b/src/drivers/xgi/z9s/z9s.c @@ -12,9 +12,8 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -#include <delay.h> -#include <stdlib.h> +#include <stdlib.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/ec/google/chromeec/crosec_proto.c b/src/ec/google/chromeec/crosec_proto.c index 928cc6c..e2fa3dd 100644 --- a/src/ec/google/chromeec/crosec_proto.c +++ b/src/ec/google/chromeec/crosec_proto.c @@ -14,9 +14,9 @@ */ #include <console/console.h> -#include <delay.h> #include <stdint.h> #include <string.h> + #include "ec.h" #include "ec_commands.h" #include "ec_message.h" diff --git a/src/ec/google/chromeec/ec_i2c.c b/src/ec/google/chromeec/ec_i2c.c index 2eecced..c3e1968 100644 --- a/src/ec/google/chromeec/ec_i2c.c +++ b/src/ec/google/chromeec/ec_i2c.c @@ -14,7 +14,6 @@ */ #include <console/console.h> -#include <delay.h> #include <device/i2c_simple.h> #include <stdint.h> #include <string.h> diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h index 8108174..3d94b83 100644 --- a/src/include/cpu/x86/lapic.h +++ b/src/include/cpu/x86/lapic.h @@ -3,6 +3,7 @@ #include <cpu/x86/lapic_def.h> #include <cpu/x86/msr.h> +#include <delay.h> #include <halt.h> #include <smp/node.h> diff --git a/src/lib/bootblock.c b/src/lib/bootblock.c index 43674ef..19d6d67 100644 --- a/src/lib/bootblock.c +++ b/src/lib/bootblock.c @@ -17,7 +17,6 @@ #include <arch/exception.h> #include <bootblock_common.h> #include <console/console.h> -#include <delay.h> #include <pc80/mc146818rtc.h> #include <program_loading.h> #include <symbols.h> diff --git a/src/lib/decompressor.c b/src/lib/decompressor.c index 0529d113..5a2055b 100644 --- a/src/lib/decompressor.c +++ b/src/lib/decompressor.c @@ -16,7 +16,6 @@ #include <bootblock_common.h> #include <commonlib/compression.h> -#include <delay.h> #include <program_loading.h> #include <symbols.h> diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index 2881162..9b23408 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -27,7 +27,6 @@ #include <version.h> #include <device/device.h> #include <device/pci.h> -#include <delay.h> #include <stdlib.h> #include <boot/tables.h> #include <program_loading.h> diff --git a/src/mainboard/apple/macbook21/mainboard.c b/src/mainboard/apple/macbook21/mainboard.c index 25c4660..798fc12 100644 --- a/src/mainboard/apple/macbook21/mainboard.c +++ b/src/mainboard/apple/macbook21/mainboard.c @@ -16,7 +16,6 @@ */ #include <device/device.h> -#include <delay.h> #include <device/pci_def.h> #include <device/pci_ops.h> #include <arch/interrupt.h> @@ -24,6 +23,7 @@ #include <arch/acpigen.h> #include <drivers/intel/gma/int15.h> #include <ec/acpi/ec.h> + #define PANEL INT15_5F35_CL_DISPLAY_DEFAULT static acpi_cstate_t cst_entries[] = { diff --git a/src/mainboard/apple/macbook21/smihandler.c b/src/mainboard/apple/macbook21/smihandler.c index baff7c1..88cc4c0 100644 --- a/src/mainboard/apple/macbook21/smihandler.c +++ b/src/mainboard/apple/macbook21/smihandler.c @@ -18,7 +18,6 @@ #include <cpu/x86/smm.h> #include <southbridge/intel/i82801gx/nvs.h> #include <southbridge/intel/common/pmutil.h> -#include <delay.h> #define GPE_EC_SCI 12 diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c index dbf704b..91ec5f9 100644 --- a/src/mainboard/asus/kfsn4-dre/romstage.c +++ b/src/mainboard/asus/kfsn4-dre/romstage.c @@ -33,7 +33,6 @@ #include <cpu/amd/msr.h> #include <southbridge/amd/common/reset.h> #include <southbridge/nvidia/ck804/early_smbus.h> -#include <delay.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627thg/w83627thg.h> #include <cpu/x86/bist.h> diff --git a/src/mainboard/cubietech/cubieboard/bootblock.c b/src/mainboard/cubietech/cubieboard/bootblock.c index e1eb820..4002e56 100644 --- a/src/mainboard/cubietech/cubieboard/bootblock.c +++ b/src/mainboard/cubietech/cubieboard/bootblock.c @@ -23,7 +23,6 @@ #include <bootblock_common.h> #include <console/uart.h> #include <console/console.h> -#include <delay.h> #include <cpu/allwinner/a10/gpio.h> #include <cpu/allwinner/a10/clock.h> #include <cpu/allwinner/a10/dramc.h> diff --git a/src/mainboard/gizmosphere/gizmo/mainboard.c b/src/mainboard/gizmosphere/gizmo/mainboard.c index 5d4fbd7..ac6dad1 100644 --- a/src/mainboard/gizmosphere/gizmo/mainboard.c +++ b/src/mainboard/gizmosphere/gizmo/mainboard.c @@ -16,7 +16,6 @@ #include <device/mmio.h> #include <console/console.h> -#include <delay.h> #include <device/device.h> #include <device/pci_def.h> #include <device/pci_ops.h> diff --git a/src/mainboard/google/foster/mainboard.c b/src/mainboard/google/foster/mainboard.c index d3091ad..daddf5c 100644 --- a/src/mainboard/google/foster/mainboard.c +++ b/src/mainboard/google/foster/mainboard.c @@ -16,7 +16,6 @@ #include <arch/mmu.h> #include <boot/coreboot_tables.h> -#include <delay.h> #include <device/device.h> #include <memrange.h> #include <soc/addressmap.h> diff --git a/src/mainboard/google/gale/mainboard.c b/src/mainboard/google/gale/mainboard.c index 5684f8f..c8ab88a 100644 --- a/src/mainboard/google/gale/mainboard.c +++ b/src/mainboard/google/gale/mainboard.c @@ -16,7 +16,6 @@ #include <boardid.h> #include <boot/coreboot_tables.h> -#include <delay.h> #include <device/device.h> #include <gpio.h> #include <soc/clock.h> diff --git a/src/mainboard/google/oak/bootblock.c b/src/mainboard/google/oak/bootblock.c index 4df7eeb..3c50389 100644 --- a/src/mainboard/google/oak/bootblock.c +++ b/src/mainboard/google/oak/bootblock.c @@ -15,7 +15,6 @@ #include <boardid.h> #include <bootblock_common.h> -#include <delay.h> #include <gpio.h> #include <device/mmio.h> #include <soc/gpio.h> diff --git a/src/mainboard/google/slippy/variants/peppy/romstage.c b/src/mainboard/google/slippy/variants/peppy/romstage.c index e47edc7..37c7853 100644 --- a/src/mainboard/google/slippy/variants/peppy/romstage.c +++ b/src/mainboard/google/slippy/variants/peppy/romstage.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <delay.h> #include <stdint.h> #include <stdlib.h> #include <string.h> diff --git a/src/mainboard/google/slippy/variants/wolf/romstage.c b/src/mainboard/google/slippy/variants/wolf/romstage.c index 3125efe..731b357 100644 --- a/src/mainboard/google/slippy/variants/wolf/romstage.c +++ b/src/mainboard/google/slippy/variants/wolf/romstage.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <delay.h> #include <stdint.h> #include <stdlib.h> #include <string.h> diff --git a/src/mainboard/google/smaug/romstage.c b/src/mainboard/google/smaug/romstage.c index fd7c07f..1d10d0e 100644 --- a/src/mainboard/google/smaug/romstage.c +++ b/src/mainboard/google/smaug/romstage.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <delay.h> #include <soc/addressmap.h> #include <device/i2c_simple.h> #include <soc/clock.h> diff --git a/src/mainboard/google/veyron/romstage.c b/src/mainboard/google/veyron/romstage.c index 9407528..3870b63 100644 --- a/src/mainboard/google/veyron/romstage.c +++ b/src/mainboard/google/veyron/romstage.c @@ -20,7 +20,6 @@ #include <cbmem.h> #include <console/console.h> #include <device/mmio.h> -#include <delay.h> #include <program_loading.h> #include <soc/sdram.h> #include <soc/clock.h> diff --git a/src/mainboard/google/veyron_mickey/mainboard.c b/src/mainboard/google/veyron_mickey/mainboard.c index f29c9d0..bb23973 100644 --- a/src/mainboard/google/veyron_mickey/mainboard.c +++ b/src/mainboard/google/veyron_mickey/mainboard.c @@ -16,7 +16,6 @@ #include <arch/cache.h> #include <device/mmio.h> #include <boot/coreboot_tables.h> -#include <delay.h> #include <device/device.h> #include <device/i2c_simple.h> #include <edid.h> diff --git a/src/mainboard/google/veyron_mickey/romstage.c b/src/mainboard/google/veyron_mickey/romstage.c index a2e8b36..c8a9842 100644 --- a/src/mainboard/google/veyron_mickey/romstage.c +++ b/src/mainboard/google/veyron_mickey/romstage.c @@ -20,7 +20,6 @@ #include <cbmem.h> #include <console/console.h> #include <device/mmio.h> -#include <delay.h> #include <program_loading.h> #include <soc/sdram.h> #include <soc/clock.h> diff --git a/src/mainboard/google/veyron_rialto/mainboard.c b/src/mainboard/google/veyron_rialto/mainboard.c index 0597305..074e6a4 100644 --- a/src/mainboard/google/veyron_rialto/mainboard.c +++ b/src/mainboard/google/veyron_rialto/mainboard.c @@ -17,7 +17,6 @@ #include <device/mmio.h> #include <boot/coreboot_tables.h> #include <console/console.h> -#include <delay.h> #include <device/device.h> #include <device/i2c_simple.h> #include <edid.h> diff --git a/src/mainboard/google/veyron_rialto/romstage.c b/src/mainboard/google/veyron_rialto/romstage.c index 64119c1..d9fc42b 100644 --- a/src/mainboard/google/veyron_rialto/romstage.c +++ b/src/mainboard/google/veyron_rialto/romstage.c @@ -20,7 +20,6 @@ #include <assert.h> #include <cbmem.h> #include <console/console.h> -#include <delay.h> #include <program_loading.h> #include <soc/sdram.h> #include <soc/clock.h> diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c index 0d6d99c..a1288db 100644 --- a/src/mainboard/hp/dl165_g6_fam10/romstage.c +++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c @@ -27,12 +27,10 @@ #include <device/pci_ops.h> #include <arch/cpu.h> #include <cpu/x86/lapic.h> -#include "option_table.h" #include <console/console.h> #include <timestamp.h> #include <cpu/amd/model_10xxx_rev.h> #include <spd.h> -#include <delay.h> #include <superio/serverengines/pilot/pilot.h> #include <superio/nsc/pc87417/pc87417.h> #include <cpu/x86/bist.h> @@ -43,12 +41,13 @@ #include <cpu/amd/family_10h-family_15h/init_cpus.h> #include <arch/early_variables.h> #include <cbmem.h> +#include <reset.h> #include <southbridge/amd/common/reset.h> + +#include "option_table.h" +#include "cpu/amd/quadcore/quadcore.c" #include "southbridge/broadcom/bcm5785/early_smbus.c" #include "southbridge/broadcom/bcm5785/early_setup.c" -#include <reset.h> - -#include "cpu/amd/quadcore/quadcore.c" #define SERIAL_DEV PNP_DEV(0x2e, PILOT_SP1) #define RTC_DEV PNP_DEV(0x4e, PC87417_RTC) diff --git a/src/mainboard/hp/pavilion_m6_1035dx/mainboard_smi.c b/src/mainboard/hp/pavilion_m6_1035dx/mainboard_smi.c index e1527d8..27b1ac2 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/mainboard_smi.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/mainboard_smi.c @@ -18,16 +18,15 @@ * SMI handler -- mostly takes care of SMIs from the EC */ -#include "ec.h" - #include <arch/io.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include <delay.h> #include <ec/compal/ene932/ec.h> #include <southbridge/amd/agesa/hudson/hudson.h> #include <southbridge/amd/agesa/hudson/smi.h> +#include "ec.h" + #define ACPI_PM1_CNT_SLEEP(state) ((1 << 13) | (state & 0x7) << 10) enum sleep_states { diff --git a/src/mainboard/intel/galileo/vboot.c b/src/mainboard/intel/galileo/vboot.c index b78ed1b..4b1f09f 100644 --- a/src/mainboard/intel/galileo/vboot.c +++ b/src/mainboard/intel/galileo/vboot.c @@ -14,17 +14,17 @@ #include <assert.h> #include <bootmode.h> -#include <delay.h> #include <device/i2c_simple.h> #include <soc/i2c.h> #include <soc/reg_access.h> -#include "reg_access.h" -#include "gen1.h" -#include "gen2.h" #include <spi_flash.h> #include <security/vboot/vboot_common.h> #include <security/vboot/vbnv.h> +#include "reg_access.h" +#include "gen1.h" +#include "gen2.h" + int clear_recovery_mode_switch(void) { /* Nothing to do */ diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c index 52432a0..bb4a1db 100644 --- a/src/mainboard/kontron/986lcd-m/romstage.c +++ b/src/mainboard/kontron/986lcd-m/romstage.c @@ -22,6 +22,7 @@ #include <cpu/intel/romstage.h> #include <cpu/x86/bist.h> #include <cpu/x86/lapic.h> +#include <delay.h> #include <device/pci_def.h> #include <device/pci_ops.h> #include <device/pnp_ops.h> diff --git a/src/mainboard/lenovo/g505s/mainboard_smi.c b/src/mainboard/lenovo/g505s/mainboard_smi.c index 2eaf7ca..27b1ac2 100644 --- a/src/mainboard/lenovo/g505s/mainboard_smi.c +++ b/src/mainboard/lenovo/g505s/mainboard_smi.c @@ -17,16 +17,16 @@ /* * SMI handler -- mostly takes care of SMIs from the EC */ -#include "ec.h" #include <arch/io.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include <delay.h> #include <ec/compal/ene932/ec.h> #include <southbridge/amd/agesa/hudson/hudson.h> #include <southbridge/amd/agesa/hudson/smi.h> +#include "ec.h" + #define ACPI_PM1_CNT_SLEEP(state) ((1 << 13) | (state & 0x7) << 10) enum sleep_states { diff --git a/src/mainboard/lenovo/s230u/smihandler.c b/src/mainboard/lenovo/s230u/smihandler.c index 2f79243..3c4df31 100644 --- a/src/mainboard/lenovo/s230u/smihandler.c +++ b/src/mainboard/lenovo/s230u/smihandler.c @@ -16,16 +16,15 @@ * GNU General Public License for more details. */ -#include "ec.h" - #include <console/console.h> #include <cpu/x86/smm.h> -#include <delay.h> #include <ec/acpi/ec.h> #include <ec/compal/ene932/ec.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/pmutil.h> +#include "ec.h" + #define GPE_PALMDET1 2 #define GPE_PALMDET2 4 #define GPE_EC_SCI 7 diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index 070ee59..74cd5692 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -19,6 +19,7 @@ #include <stdint.h> #include <arch/io.h> +#include <delay.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> @@ -32,6 +33,7 @@ #include <northbridge/intel/i945/raminit.h> #include <southbridge/intel/i82801gx/i82801gx.h> #include <southbridge/intel/common/gpio.h> + #include "dock.h" static void ich7_enable_lpc(void) diff --git a/src/mainboard/lenovo/x200/dock.c b/src/mainboard/lenovo/x200/dock.c index 6e87644..d5f774b 100644 --- a/src/mainboard/lenovo/x200/dock.c +++ b/src/mainboard/lenovo/x200/dock.c @@ -16,17 +16,18 @@ */ #define __SIMPLE_DEVICE__ + #include <console/console.h> #include <arch/io.h> #include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> -#include <delay.h> -#include "dock.h" #include <southbridge/intel/i82801ix/i82801ix.h> #include <ec/lenovo/h8/h8.h> #include <ec/acpi/ec.h> +#include "dock.h" + #define LPC_DEV PCI_DEV(0, 0x1f, 0) void h8_mainboard_init_dock (void) diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index 39e0ed5..a9dffed 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -19,6 +19,7 @@ #include <stdint.h> #include <arch/io.h> +#include <delay.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> @@ -33,6 +34,7 @@ #include <northbridge/intel/i945/raminit.h> #include <southbridge/intel/i82801gx/i82801gx.h> #include <southbridge/intel/common/gpio.h> + #include "dock.h" static void ich7_enable_lpc(void) diff --git a/src/mainboard/lenovo/z61t/romstage.c b/src/mainboard/lenovo/z61t/romstage.c index 45cd9ec..6755763 100644 --- a/src/mainboard/lenovo/z61t/romstage.c +++ b/src/mainboard/lenovo/z61t/romstage.c @@ -19,6 +19,7 @@ #include <stdint.h> #include <arch/io.h> +#include <delay.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> @@ -33,6 +34,7 @@ #include <northbridge/intel/i945/raminit.h> #include <southbridge/intel/i82801gx/i82801gx.h> #include <southbridge/intel/common/gpio.h> + #include "dock.h" static void ich7_enable_lpc(void) diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index 9ba90a8..53464e9 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -26,7 +26,6 @@ #include <timestamp.h> #include <spd.h> #include <cpu/amd/model_10xxx_rev.h> -#include <delay.h> #include <cpu/amd/car.h> #include <cpu/amd/msr.h> #include <superio/winbond/common/winbond.h> diff --git a/src/mainboard/opencellular/elgon/mainboard.c b/src/mainboard/opencellular/elgon/mainboard.c index d140bc1..74e31e1 100644 --- a/src/mainboard/opencellular/elgon/mainboard.c +++ b/src/mainboard/opencellular/elgon/mainboard.c @@ -20,7 +20,6 @@ #include <libbdk-hal/bdk-config.h> #include <libbdk-hal/bdk-twsi.h> #include <soc/gpio.h> -#include <delay.h> #include <soc/uart.h> #include <console/console.h> #include <soc/clock.h> diff --git a/src/mainboard/packardbell/ms2290/mainboard.c b/src/mainboard/packardbell/ms2290/mainboard.c index 8e4293b..09310ae 100644 --- a/src/mainboard/packardbell/ms2290/mainboard.c +++ b/src/mainboard/packardbell/ms2290/mainboard.c @@ -19,7 +19,6 @@ #include <console/console.h> #include <device/device.h> #include <arch/io.h> -#include <delay.h> #include <device/pci_def.h> #include <device/pci_ops.h> #include <northbridge/intel/nehalem/nehalem.h> diff --git a/src/mainboard/packardbell/ms2290/romstage.c b/src/mainboard/packardbell/ms2290/romstage.c index b20c445..df26862 100644 --- a/src/mainboard/packardbell/ms2290/romstage.c +++ b/src/mainboard/packardbell/ms2290/romstage.c @@ -29,7 +29,6 @@ #include <cpu/x86/bist.h> #include <cpu/intel/romstage.h> #include <ec/acpi/ec.h> -#include <delay.h> #include <timestamp.h> #include <arch/acpi.h> diff --git a/src/mainboard/packardbell/ms2290/smihandler.c b/src/mainboard/packardbell/ms2290/smihandler.c index e4c29b1d..ff13543 100644 --- a/src/mainboard/packardbell/ms2290/smihandler.c +++ b/src/mainboard/packardbell/ms2290/smihandler.c @@ -24,7 +24,6 @@ #include <northbridge/intel/nehalem/nehalem.h> #include <cpu/intel/model_2065x/model_2065x.h> #include <ec/acpi/ec.h> -#include <delay.h> static void mainboard_smm_init(void) { diff --git a/src/mainboard/roda/rk886ex/mainboard.c b/src/mainboard/roda/rk886ex/mainboard.c index 843ca60..91c11d5 100644 --- a/src/mainboard/roda/rk886ex/mainboard.c +++ b/src/mainboard/roda/rk886ex/mainboard.c @@ -18,10 +18,9 @@ #include <device/device.h> #include <arch/io.h> #include <arch/interrupt.h> -#include <delay.h> #include <drivers/intel/gma/int15.h> - #include <ec/acpi/ec.h> + #include "m3885.h" #define DUMP_RUNTIME_REGISTERS 0 diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c index dbc4b6c..b3a55a9 100644 --- a/src/mainboard/roda/rk886ex/romstage.c +++ b/src/mainboard/roda/rk886ex/romstage.c @@ -19,6 +19,7 @@ #include <stdint.h> #include <arch/io.h> #include <device/pnp_ops.h> +#include <delay.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <cpu/x86/lapic.h> @@ -30,6 +31,7 @@ #include <northbridge/intel/i945/i945.h> #include <northbridge/intel/i945/raminit.h> #include <southbridge/intel/i82801gx/i82801gx.h> + #include "option_table.h" static void ich7_enable_lpc(void) diff --git a/src/mainboard/siemens/mc_tcu3/ptn3460.c b/src/mainboard/siemens/mc_tcu3/ptn3460.c index 8143a16..9acc60a 100644 --- a/src/mainboard/siemens/mc_tcu3/ptn3460.c +++ b/src/mainboard/siemens/mc_tcu3/ptn3460.c @@ -16,6 +16,8 @@ #include <console/console.h> #include <hwilib.h> #include <string.h> +#include <delay.h> + #include "soc/i2c.h" #include "ptn3460.h" diff --git a/src/mainboard/siemens/mc_tcu3/ptn3460.h b/src/mainboard/siemens/mc_tcu3/ptn3460.h index 217c68a..8dc002d 100644 --- a/src/mainboard/siemens/mc_tcu3/ptn3460.h +++ b/src/mainboard/siemens/mc_tcu3/ptn3460.h @@ -16,7 +16,6 @@ #ifndef PTN3460_H_ #define PTN3460_H_ -#include <delay.h> #include "lcd_panel.h" #define PTN_SLAVE_ADR 0x20 diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c index 699808f..b8168c4 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c +++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c @@ -25,7 +25,6 @@ #include <timestamp.h> #include <spd.h> #include <cpu/amd/model_10xxx_rev.h> -#include <delay.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> #include <cpu/x86/bist.h> @@ -37,12 +36,11 @@ #include <cpu/amd/family_10h-family_15h/init_cpus.h> #include <arch/early_variables.h> #include <cbmem.h> - -#include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN #include <reset.h> +#include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN +#include <southbridge/nvidia/mcp55/early_setup_ss.h> #include "cpu/amd/quadcore/quadcore.c" -#include <southbridge/nvidia/mcp55/early_setup_ss.h> #include "southbridge/nvidia/mcp55/early_setup_car.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c index ef6dee9..6d22447 100644 --- a/src/mainboard/supermicro/h8qme_fam10/romstage.c +++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c @@ -26,7 +26,6 @@ #include <timestamp.h> #include <spd.h> #include <cpu/amd/model_10xxx_rev.h> -#include <delay.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> #include <cpu/x86/bist.h> @@ -38,11 +37,11 @@ #include <cpu/amd/family_10h-family_15h/init_cpus.h> #include <arch/early_variables.h> #include <cbmem.h> -#include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN #include <reset.h> +#include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN +#include <southbridge/nvidia/mcp55/early_setup_ss.h> #include "cpu/amd/quadcore/quadcore.c" -#include <southbridge/nvidia/mcp55/early_setup_ss.h> #include "southbridge/nvidia/mcp55/early_setup_car.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index 7fca06b..29c71d8 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -25,7 +25,6 @@ #include <timestamp.h> #include <spd.h> #include <cpu/amd/model_10xxx_rev.h> -#include <delay.h> #include <cpu/amd/car.h> #include <cpu/amd/msr.h> #include <superio/winbond/common/winbond.h> diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c index e42085d..7aaf016 100644 --- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c +++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c @@ -17,9 +17,9 @@ /* Call-backs */ #include <arch/cpu.h> -#include <delay.h> #include <cpu/amd/msr.h> #include <console/console.h> + #include "mcti.h" #define NVRAM_DDR2_800 0 diff --git a/src/northbridge/amd/pi/agesawrapper.c b/src/northbridge/amd/pi/agesawrapper.c index 28f2876..cfa64c4 100644 --- a/src/northbridge/amd/pi/agesawrapper.c +++ b/src/northbridge/amd/pi/agesawrapper.c @@ -16,7 +16,6 @@ #include <AGESA.h> #include <cbfs.h> #include <cbmem.h> -#include <delay.h> #include <cpu/x86/mtrr.h> #include <FchPlatform.h> #include <heapManager.h> diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.c b/src/northbridge/intel/fsp_rangeley/northbridge.c index 7663b26..0c08197 100644 --- a/src/northbridge/intel/fsp_rangeley/northbridge.c +++ b/src/northbridge/intel/fsp_rangeley/northbridge.c @@ -19,7 +19,6 @@ #include <arch/acpi.h> #include <device/pci_ops.h> #include <stdint.h> -#include <delay.h> #include <cpu/intel/fsp_model_406dx/model_406dx.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c index 648aa48..23fca16 100644 --- a/src/northbridge/intel/gm45/gma.c +++ b/src/northbridge/intel/gm45/gma.c @@ -16,10 +16,12 @@ #include <device/mmio.h> #include <console/console.h> -#include <delay.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <drivers/intel/gma/edid.h> +#include <drivers/intel/gma/opregion.h> +#include <drivers/intel/gma/libgfxinit.h> #include <string.h> #include <device/pci_ops.h> #include <commonlib/helpers.h> @@ -29,9 +31,6 @@ #include "drivers/intel/gma/i915_reg.h" #include "chip.h" #include "gm45.h" -#include <drivers/intel/gma/edid.h> -#include <drivers/intel/gma/opregion.h> -#include <drivers/intel/gma/libgfxinit.h> static struct resource *gtt_res = NULL; diff --git a/src/northbridge/intel/haswell/minihd.c b/src/northbridge/intel/haswell/minihd.c index 9a1df0f..a646071 100644 --- a/src/northbridge/intel/haswell/minihd.c +++ b/src/northbridge/intel/haswell/minihd.c @@ -21,7 +21,6 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/mmio.h> -#include <delay.h> #include <stdlib.h> #include <southbridge/intel/lynxpoint/hda_verb.h> diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 3f62d10..107be5f 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -30,8 +30,8 @@ #include <southbridge/intel/bd82x6x/me.h> #include <southbridge/intel/common/smbus.h> #include <cpu/x86/msr.h> -#include <delay.h> #include <lib.h> + #include "raminit_native.h" #include "raminit_common.h" #include "sandybridge.h" diff --git a/src/northbridge/intel/x4x/gma.c b/src/northbridge/intel/x4x/gma.c index 2c045e6..261ff16 100644 --- a/src/northbridge/intel/x4x/gma.c +++ b/src/northbridge/intel/x4x/gma.c @@ -16,17 +16,12 @@ */ #include <console/console.h> -#include <delay.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> #include <commonlib/helpers.h> #include <cbmem.h> - -#include "drivers/intel/gma/i915_reg.h" -#include "chip.h" -#include "x4x.h" #include <drivers/intel/gma/intel_bios.h> #include <drivers/intel/gma/edid.h> #include <drivers/intel/gma/i915.h> @@ -35,6 +30,10 @@ #include <pc80/vga.h> #include <pc80/vga_io.h> +#include "chip.h" +#include "drivers/intel/gma/i915_reg.h" +#include "x4x.h" + #if CONFIG(SOUTHBRIDGE_INTEL_I82801JX) #include <southbridge/intel/i82801jx/nvs.h> #elif CONFIG(SOUTHBRIDGE_INTEL_I82801GX) diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c index 72ef1a9..f284ff1 100644 --- a/src/northbridge/intel/x4x/raminit.c +++ b/src/northbridge/intel/x4x/raminit.c @@ -21,16 +21,13 @@ #include <cpu/x86/cache.h> #include <cpu/x86/mtrr.h> #include <arch/cpu.h> -#include <delay.h> #include <halt.h> #include <lib.h> -#include "iomap.h" #if CONFIG(SOUTHBRIDGE_INTEL_I82801GX) #include <southbridge/intel/i82801gx/i82801gx.h> /* smbus_read_byte */ #else #include <southbridge/intel/i82801jx/i82801jx.h> /* smbus_read_byte */ #endif -#include "x4x.h" #include <spd.h> #include <string.h> #include <device/dram/ddr2.h> @@ -38,6 +35,9 @@ #include <mrc_cache.h> #include <timestamp.h> +#include "iomap.h" +#include "x4x.h" + #define MRC_CACHE_VERSION 0 static inline int spd_read_byte(unsigned int device, unsigned int address) diff --git a/src/security/vboot/vboot_logic.c b/src/security/vboot/vboot_logic.c index 0b5763b..2a6f7a6 100644 --- a/src/security/vboot/vboot_logic.c +++ b/src/security/vboot/vboot_logic.c @@ -18,7 +18,6 @@ #include <bootmode.h> #include <console/console.h> #include <console/vtxprintf.h> -#include <delay.h> #include <string.h> #include <timestamp.h> #include <vb2_api.h> diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c index 485dfd7..4ff6e1a 100644 --- a/src/soc/amd/common/block/pi/agesawrapper.c +++ b/src/soc/amd/common/block/pi/agesawrapper.c @@ -16,7 +16,6 @@ #include <arch/acpi.h> #include <cbmem.h> -#include <delay.h> #include <timestamp.h> #include <amdblocks/s3_resume.h> #include <amdblocks/agesawrapper.h> diff --git a/src/soc/amd/stoneyridge/hda.c b/src/soc/amd/stoneyridge/hda.c index 475fc55..0ab2f91 100644 --- a/src/soc/amd/stoneyridge/hda.c +++ b/src/soc/amd/stoneyridge/hda.c @@ -17,7 +17,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> -#include <delay.h> #include <soc/southbridge.h> static const unsigned short pci_device_ids[] = { diff --git a/src/soc/amd/stoneyridge/sata.c b/src/soc/amd/stoneyridge/sata.c index fc6cdce..52932e2 100644 --- a/src/soc/amd/stoneyridge/sata.c +++ b/src/soc/amd/stoneyridge/sata.c @@ -14,7 +14,6 @@ */ #include <device/device.h> -#include <delay.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> diff --git a/src/soc/amd/stoneyridge/smihandler.c b/src/soc/amd/stoneyridge/smihandler.c index c053d90..c3f4b67 100644 --- a/src/soc/amd/stoneyridge/smihandler.c +++ b/src/soc/amd/stoneyridge/smihandler.c @@ -21,7 +21,6 @@ #include <cpu/x86/cache.h> #include <arch/acpi.h> #include <arch/hlt.h> -#include <delay.h> #include <device/pci_def.h> #include <soc/smi.h> #include <soc/southbridge.h> diff --git a/src/soc/cavium/cn81xx/include/soc/timer.h b/src/soc/cavium/cn81xx/include/soc/timer.h index 5c4cbd2..4e41311 100644 --- a/src/soc/cavium/cn81xx/include/soc/timer.h +++ b/src/soc/cavium/cn81xx/include/soc/timer.h @@ -18,7 +18,6 @@ #include <inttypes.h> #include <types.h> -#include <delay.h> /* Watchdog functions */ void watchdog_set(const size_t index, unsigned int timeout_ms); diff --git a/src/soc/cavium/cn81xx/spi.c b/src/soc/cavium/cn81xx/spi.c index dd0baf6..2ba25a2 100644 --- a/src/soc/cavium/cn81xx/spi.c +++ b/src/soc/cavium/cn81xx/spi.c @@ -19,7 +19,6 @@ #include <device/mmio.h> #include <assert.h> #include <console/console.h> -#include <delay.h> #include <endian.h> #include <soc/addressmap.h> #include <soc/spi.h> diff --git a/src/soc/cavium/common/bdk-coreboot.c b/src/soc/cavium/common/bdk-coreboot.c index f8fa8d4..740f8e4 100644 --- a/src/soc/cavium/common/bdk-coreboot.c +++ b/src/soc/cavium/common/bdk-coreboot.c @@ -15,13 +15,13 @@ * * This file consists of data imported from bdk-config.c */ + // coreboot #include <string.h> #include <assert.h> #include <device/i2c.h> #include <device/i2c_simple.h> #include <endian.h> -#include <delay.h> #include <soc/timer.h> // BDK diff --git a/src/soc/cavium/common/bootblock.c b/src/soc/cavium/common/bootblock.c index c3f0866..89dc71f 100644 --- a/src/soc/cavium/common/bootblock.c +++ b/src/soc/cavium/common/bootblock.c @@ -16,7 +16,6 @@ #include <arch/exception.h> #include <console/console.h> -#include <delay.h> #include <program_loading.h> #include <symbols.h> #include <timestamp.h> diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c index 73c0d15..5d6d504 100644 --- a/src/soc/intel/baytrail/gfx.c +++ b/src/soc/intel/baytrail/gfx.c @@ -16,14 +16,12 @@ #include <device/mmio.h> #include <device/pci_ops.h> #include <console/console.h> -#include <delay.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <drivers/intel/gma/opregion.h> #include <reg_script.h> #include <stdlib.h> - #include <soc/gfx.h> #include <soc/iosf.h> #include <soc/nvs.h> diff --git a/src/soc/intel/braswell/sata.c b/src/soc/intel/braswell/sata.c index ab16745..80031e6 100644 --- a/src/soc/intel/braswell/sata.c +++ b/src/soc/intel/braswell/sata.c @@ -18,7 +18,6 @@ #include <soc/ramstage.h> #include <soc/sata.h> #include <console/console.h> -#include <delay.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/soc/intel/broadwell/adsp.c b/src/soc/intel/broadwell/adsp.c index d0296e0..7658515 100644 --- a/src/soc/intel/broadwell/adsp.c +++ b/src/soc/intel/broadwell/adsp.c @@ -20,7 +20,6 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/mmio.h> -#include <delay.h> #include <soc/adsp.h> #include <soc/device_nvs.h> #include <soc/iobp.h> diff --git a/src/soc/intel/broadwell/ehci.c b/src/soc/intel/broadwell/ehci.c index 53af617..6e4a767 100644 --- a/src/soc/intel/broadwell/ehci.c +++ b/src/soc/intel/broadwell/ehci.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <delay.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/soc/intel/broadwell/hda.c b/src/soc/intel/broadwell/hda.c index 9ef51c6..d1aee92 100644 --- a/src/soc/intel/broadwell/hda.c +++ b/src/soc/intel/broadwell/hda.c @@ -22,7 +22,6 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/mmio.h> -#include <delay.h> #include <soc/intel/common/hda_verb.h> #include <soc/pch.h> #include <soc/ramstage.h> diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index c831c2c..8438ab4 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -15,7 +15,6 @@ */ #include <console/console.h> -#include <delay.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/soc/intel/broadwell/minihd.c b/src/soc/intel/broadwell/minihd.c index 1b2489c..d44e153 100644 --- a/src/soc/intel/broadwell/minihd.c +++ b/src/soc/intel/broadwell/minihd.c @@ -21,7 +21,6 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/mmio.h> -#include <delay.h> #include <stdlib.h> #include <soc/intel/common/hda_verb.h> #include <soc/ramstage.h> diff --git a/src/soc/intel/broadwell/pch.c b/src/soc/intel/broadwell/pch.c index 06c05c0..e555588 100644 --- a/src/soc/intel/broadwell/pch.c +++ b/src/soc/intel/broadwell/pch.c @@ -15,7 +15,6 @@ */ #include <console/console.h> -#include <delay.h> #include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/soc/intel/broadwell/romstage/uart.c b/src/soc/intel/broadwell/romstage/uart.c index a3c4c61..58450dd 100644 --- a/src/soc/intel/broadwell/romstage/uart.c +++ b/src/soc/intel/broadwell/romstage/uart.c @@ -14,7 +14,6 @@ */ #include <arch/early_variables.h> -#include <delay.h> #include <device/pci_def.h> #include <reg_script.h> #include <stdint.h> diff --git a/src/soc/intel/cannonlake/lpc.c b/src/soc/intel/cannonlake/lpc.c index 7c6025c..56fefa5 100644 --- a/src/soc/intel/cannonlake/lpc.c +++ b/src/soc/intel/cannonlake/lpc.c @@ -15,8 +15,6 @@ * GNU General Public License for more details. */ -#include "chip.h" -#include <delay.h> #include <device/device.h> #include <device/pci.h> #include <pc80/isa-dma.h> @@ -34,6 +32,8 @@ #include <soc/pci_devs.h> #include <soc/pcr_ids.h> +#include "chip.h" + /* * As per the BWG, Chapter 5.9.1. "PCH BIOS component will reserve * certain memory range as reserved range for BIOS usage. diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index 9dbfbd4..c847390 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -21,7 +21,6 @@ #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> #include <arch/cpu.h> -#include <delay.h> #include <intelblocks/cpulib.h> #include <intelblocks/fast_spi.h> #include <soc/cpu.h> diff --git a/src/soc/intel/common/block/systemagent/systemagent_early.c b/src/soc/intel/common/block/systemagent/systemagent_early.c index a3e278f..61f14a9 100644 --- a/src/soc/intel/common/block/systemagent/systemagent_early.c +++ b/src/soc/intel/common/block/systemagent/systemagent_early.c @@ -15,7 +15,6 @@ #include <device/mmio.h> #include <device/pci_ops.h> -#include <delay.h> #include <device/device.h> #include <device/pci.h> #include <intelblocks/systemagent.h> diff --git a/src/soc/intel/fsp_baytrail/gfx.c b/src/soc/intel/fsp_baytrail/gfx.c index 6bde32e..dab9972 100644 --- a/src/soc/intel/fsp_baytrail/gfx.c +++ b/src/soc/intel/fsp_baytrail/gfx.c @@ -15,13 +15,11 @@ */ #include <console/console.h> -#include <delay.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <reg_script.h> #include <stdlib.h> - #include <soc/gfx.h> #include <soc/iosf.h> #include <soc/pci_devs.h> diff --git a/src/soc/intel/fsp_broadwell_de/smihandler.c b/src/soc/intel/fsp_broadwell_de/smihandler.c index 36a01c6..854bd76 100644 --- a/src/soc/intel/fsp_broadwell_de/smihandler.c +++ b/src/soc/intel/fsp_broadwell_de/smihandler.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */ -#include <delay.h> #include <types.h> #include <console/console.h> #include <cpu/x86/cache.h> diff --git a/src/soc/intel/icelake/lpc.c b/src/soc/intel/icelake/lpc.c index a3bce93..8fe0507 100644 --- a/src/soc/intel/icelake/lpc.c +++ b/src/soc/intel/icelake/lpc.c @@ -13,9 +13,7 @@ * GNU General Public License for more details. */ -#include "chip.h" #include <console/console.h> -#include <delay.h> #include <device/device.h> #include <device/pci.h> #include <pc80/isa-dma.h> @@ -33,6 +31,8 @@ #include <soc/pci_devs.h> #include <soc/pcr_ids.h> +#include "chip.h" + /* * As per the BWG, Chapter 5.9.1. "PCH BIOS component will reserve * certain memory range as reserved range for BIOS usage. diff --git a/src/soc/intel/quark/gpio_i2c.c b/src/soc/intel/quark/gpio_i2c.c index b2bb572..02b5892 100644 --- a/src/soc/intel/quark/gpio_i2c.c +++ b/src/soc/intel/quark/gpio_i2c.c @@ -14,7 +14,6 @@ */ #include <console/console.h> -#include <delay.h> #include <device/device.h> #include <device/i2c_simple.h> #include <device/pci.h> diff --git a/src/soc/intel/quark/include/soc/reg_access.h b/src/soc/intel/quark/include/soc/reg_access.h index d06ed82..27231f9 100644 --- a/src/soc/intel/quark/include/soc/reg_access.h +++ b/src/soc/intel/quark/include/soc/reg_access.h @@ -19,7 +19,6 @@ #include <cpu/x86/cr.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> -#include <delay.h> #include <fsp/util.h> #include <reg_script.h> #include <soc/IntelQNCConfig.h> diff --git a/src/soc/intel/quark/reg_access.c b/src/soc/intel/quark/reg_access.c index df171f5..1063525 100644 --- a/src/soc/intel/quark/reg_access.c +++ b/src/soc/intel/quark/reg_access.c @@ -19,6 +19,7 @@ #include <assert.h> #include <cpu/x86/mtrr.h> #include <console/console.h> +#include <delay.h> #include <device/pci_ops.h> #include <soc/pci_devs.h> #include <soc/ramstage.h> diff --git a/src/soc/intel/quark/romstage/pcie.c b/src/soc/intel/quark/romstage/pcie.c index dc54a32..747ac2b 100644 --- a/src/soc/intel/quark/romstage/pcie.c +++ b/src/soc/intel/quark/romstage/pcie.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <delay.h> #include <device/device.h> #include <soc/pci_devs.h> #include <soc/reg_access.h> diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index 0343a23..3e77b03 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -33,7 +33,6 @@ #include <cpu/x86/cache.h> #include <cpu/x86/name.h> #include <cpu/x86/smm.h> -#include <delay.h> #include <intelblocks/cpulib.h> #include <intelblocks/fast_spi.h> #include <intelblocks/mp_init.h> diff --git a/src/soc/intel/skylake/lpc.c b/src/soc/intel/skylake/lpc.c index 0110022..8d6228c 100644 --- a/src/soc/intel/skylake/lpc.c +++ b/src/soc/intel/skylake/lpc.c @@ -15,8 +15,6 @@ * GNU General Public License for more details. */ -#include "chip.h" -#include <delay.h> #include <device/device.h> #include <device/pci.h> #include <pc80/isa-dma.h> @@ -30,6 +28,8 @@ #include <soc/pcr_ids.h> #include <soc/intel/common/block/lpc/lpc_def.h> +#include "chip.h" + /** PCH preserved MMIO range, 24 MB, from 0xFD000000 to 0xFE7FFFFF **/ diff --git a/src/soc/mediatek/common/include/soc/rtc_common.h b/src/soc/mediatek/common/include/soc/rtc_common.h index 24bad00..d92868d 100644 --- a/src/soc/mediatek/common/include/soc/rtc_common.h +++ b/src/soc/mediatek/common/include/soc/rtc_common.h @@ -19,7 +19,6 @@ #include <assert.h> #include <bcd.h> #include <console/console.h> -#include <delay.h> #include <rtc.h> /* diff --git a/src/soc/mediatek/common/rtc.c b/src/soc/mediatek/common/rtc.c index 6e95f5b..b810819 100644 --- a/src/soc/mediatek/common/rtc.c +++ b/src/soc/mediatek/common/rtc.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <delay.h> #include <soc/rtc_common.h> #include <soc/rtc.h> #include <soc/pmic_wrap.h> diff --git a/src/soc/mediatek/common/timer.c b/src/soc/mediatek/common/timer.c index 0762c2b..1857f984 100644 --- a/src/soc/mediatek/common/timer.c +++ b/src/soc/mediatek/common/timer.c @@ -15,9 +15,7 @@ #include <device/mmio.h> #include <timer.h> -#include <delay.h> #include <thread.h> - #include <soc/addressmap.h> #include <soc/timer.h> diff --git a/src/soc/mediatek/common/usb.c b/src/soc/mediatek/common/usb.c index 116e5db..dcb9307 100644 --- a/src/soc/mediatek/common/usb.c +++ b/src/soc/mediatek/common/usb.c @@ -15,7 +15,6 @@ #include <device/mmio.h> #include <console/console.h> -#include <delay.h> #include <soc/addressmap.h> #include <soc/usb.h> #include <timer.h> diff --git a/src/soc/mediatek/mt8173/ddp.c b/src/soc/mediatek/mt8173/ddp.c index 09ea200..0b78c3e 100644 --- a/src/soc/mediatek/mt8173/ddp.c +++ b/src/soc/mediatek/mt8173/ddp.c @@ -14,7 +14,6 @@ */ #include <device/mmio.h> -#include <delay.h> #include <edid.h> #include <stdlib.h> #include <stddef.h> diff --git a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c index 9e4cb11..529ebde 100644 --- a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c +++ b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c @@ -15,7 +15,6 @@ #include <device/mmio.h> #include <assert.h> -#include <delay.h> #include <stdlib.h> #include <soc/addressmap.h> #include <soc/dramc_common.h> diff --git a/src/soc/mediatek/mt8173/emi.c b/src/soc/mediatek/mt8173/emi.c index 68b178f..d4cd02a 100644 --- a/src/soc/mediatek/mt8173/emi.c +++ b/src/soc/mediatek/mt8173/emi.c @@ -17,7 +17,6 @@ #include <assert.h> #include <boardid.h> #include <console/console.h> -#include <delay.h> #include <soc/addressmap.h> #include <soc/dramc_common.h> #include <soc/dramc_register.h> diff --git a/src/soc/mediatek/mt8173/rtc.c b/src/soc/mediatek/mt8173/rtc.c index 5b7d486..3b2df8a 100644 --- a/src/soc/mediatek/mt8173/rtc.c +++ b/src/soc/mediatek/mt8173/rtc.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <delay.h> #include <soc/rtc_common.h> #include <soc/rtc.h> #include <soc/mt6391.h> diff --git a/src/soc/nvidia/tegra/gpio.c b/src/soc/nvidia/tegra/gpio.c index 4964967..6800c5d 100644 --- a/src/soc/nvidia/tegra/gpio.c +++ b/src/soc/nvidia/tegra/gpio.c @@ -18,7 +18,6 @@ #include <soc/addressmap.h> #include <stddef.h> #include <stdint.h> -#include <delay.h> #include "pinmux.h" diff --git a/src/soc/nvidia/tegra210/mipi_dsi.c b/src/soc/nvidia/tegra210/mipi_dsi.c index 6b5319a..23d9274 100644 --- a/src/soc/nvidia/tegra210/mipi_dsi.c +++ b/src/soc/nvidia/tegra210/mipi_dsi.c @@ -38,10 +38,10 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + #include <console/console.h> #include <stdint.h> #include <stdlib.h> -#include <delay.h> #include <string.h> #include <soc/addressmap.h> #include <soc/clock.h> diff --git a/src/soc/qualcomm/ipq40xx/i2c.c b/src/soc/qualcomm/ipq40xx/i2c.c index b727f6d..f5c9943 100644 --- a/src/soc/qualcomm/ipq40xx/i2c.c +++ b/src/soc/qualcomm/ipq40xx/i2c.c @@ -31,7 +31,6 @@ #include <assert.h> #include <console/console.h> -#include <delay.h> #include <device/i2c_simple.h> #include <stdlib.h> #include <string.h> diff --git a/src/soc/qualcomm/ipq806x/i2c.c b/src/soc/qualcomm/ipq806x/i2c.c index 4898d9b..cd57591 100644 --- a/src/soc/qualcomm/ipq806x/i2c.c +++ b/src/soc/qualcomm/ipq806x/i2c.c @@ -29,7 +29,6 @@ #include <assert.h> #include <console/console.h> -#include <delay.h> #include <device/i2c_simple.h> #include <stdlib.h> #include <string.h> diff --git a/src/soc/qualcomm/qcs405/timer.c b/src/soc/qualcomm/qcs405/timer.c index 5df2430..6b0d0ed 100644 --- a/src/soc/qualcomm/qcs405/timer.c +++ b/src/soc/qualcomm/qcs405/timer.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <delay.h> #include <arch/lib_helpers.h> #include <commonlib/helpers.h> diff --git a/src/soc/qualcomm/sdm845/clock.c b/src/soc/qualcomm/sdm845/clock.c index 5f0c305..382e5a6 100644 --- a/src/soc/qualcomm/sdm845/clock.c +++ b/src/soc/qualcomm/sdm845/clock.c @@ -16,7 +16,6 @@ #include <device/mmio.h> #include <types.h> #include <console/console.h> -#include <delay.h> #include <commonlib/helpers.h> #include <assert.h> #include <soc/clock.h> diff --git a/src/soc/qualcomm/sdm845/gpio.c b/src/soc/qualcomm/sdm845/gpio.c index afa461d..faa0133 100644 --- a/src/soc/qualcomm/sdm845/gpio.c +++ b/src/soc/qualcomm/sdm845/gpio.c @@ -15,7 +15,6 @@ #include <device/mmio.h> #include <types.h> -#include <delay.h> #include <gpio.h> void gpio_configure(gpio_t gpio, uint32_t func, uint32_t pull, diff --git a/src/soc/qualcomm/sdm845/timer.c b/src/soc/qualcomm/sdm845/timer.c index 5df2430..6b0d0ed 100644 --- a/src/soc/qualcomm/sdm845/timer.c +++ b/src/soc/qualcomm/sdm845/timer.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <delay.h> #include <arch/lib_helpers.h> #include <commonlib/helpers.h> diff --git a/src/soc/rockchip/common/pwm.c b/src/soc/rockchip/common/pwm.c index e4045a8..ad0453b 100644 --- a/src/soc/rockchip/common/pwm.c +++ b/src/soc/rockchip/common/pwm.c @@ -15,7 +15,6 @@ #include <device/mmio.h> #include <assert.h> -#include <delay.h> #include <soc/addressmap.h> #include <soc/grf.h> #include <soc/soc.h> diff --git a/src/soc/rockchip/common/vop.c b/src/soc/rockchip/common/vop.c index 1ee861c..9c70b78 100644 --- a/src/soc/rockchip/common/vop.c +++ b/src/soc/rockchip/common/vop.c @@ -14,7 +14,6 @@ */ #include <device/mmio.h> -#include <delay.h> #include <stdlib.h> #include <stddef.h> #include <soc/addressmap.h> diff --git a/src/soc/rockchip/rk3288/soc.c b/src/soc/rockchip/rk3288/soc.c index 19ad0eb..bda9553 100644 --- a/src/soc/rockchip/rk3288/soc.c +++ b/src/soc/rockchip/rk3288/soc.c @@ -16,7 +16,6 @@ #include <arch/cache.h> #include <bootmode.h> #include <console/console.h> -#include <delay.h> #include <device/device.h> #include <gpio.h> #include <soc/display.h> diff --git a/src/soc/rockchip/rk3288/timer.c b/src/soc/rockchip/rk3288/timer.c index ea235b3..f16af91 100644 --- a/src/soc/rockchip/rk3288/timer.c +++ b/src/soc/rockchip/rk3288/timer.c @@ -14,7 +14,6 @@ */ #include <device/mmio.h> -#include <delay.h> #include <soc/timer.h> #include <stdint.h> #include <timer.h> diff --git a/src/soc/rockchip/rk3288/tsadc.c b/src/soc/rockchip/rk3288/tsadc.c index 8104361..a34105d 100644 --- a/src/soc/rockchip/rk3288/tsadc.c +++ b/src/soc/rockchip/rk3288/tsadc.c @@ -15,7 +15,6 @@ #include <device/mmio.h> #include <assert.h> -#include <delay.h> #include <soc/clock.h> #include <soc/grf.h> #include <soc/pmu.h> diff --git a/src/soc/rockchip/rk3399/timer.c b/src/soc/rockchip/rk3399/timer.c index be5f20f..ba032e2 100644 --- a/src/soc/rockchip/rk3399/timer.c +++ b/src/soc/rockchip/rk3399/timer.c @@ -14,7 +14,6 @@ */ #include <device/mmio.h> -#include <delay.h> #include <soc/timer.h> #include <stdint.h> #include <timer.h> diff --git a/src/soc/rockchip/rk3399/usb.c b/src/soc/rockchip/rk3399/usb.c index 78facb5..e016fbf 100644 --- a/src/soc/rockchip/rk3399/usb.c +++ b/src/soc/rockchip/rk3399/usb.c @@ -16,7 +16,6 @@ #include <device/mmio.h> #include <assert.h> #include <console/console.h> -#include <delay.h> #include <soc/clock.h> #include <soc/grf.h> #include <soc/soc.h> diff --git a/src/soc/samsung/exynos5250/clock_init.c b/src/soc/samsung/exynos5250/clock_init.c index d67b596..fa19eb1 100644 --- a/src/soc/samsung/exynos5250/clock_init.c +++ b/src/soc/samsung/exynos5250/clock_init.c @@ -16,7 +16,6 @@ /* Clock setup for SMDK5250 board based on EXYNOS5 */ #include <device/mmio.h> -#include <delay.h> #include <soc/clk.h> #include <soc/dp.h> #include <soc/setup.h> diff --git a/src/soc/samsung/exynos5250/cpu.c b/src/soc/samsung/exynos5250/cpu.c index 81f6f38..f00351e 100644 --- a/src/soc/samsung/exynos5250/cpu.c +++ b/src/soc/samsung/exynos5250/cpu.c @@ -17,7 +17,6 @@ #include <arch/cache.h> #include <console/console.h> #include <device/mmio.h> -#include <delay.h> #include <device/device.h> #include <soc/clk.h> #include <soc/cpu.h> diff --git a/src/soc/samsung/exynos5250/timer.c b/src/soc/samsung/exynos5250/timer.c index 47a6f37..609ca6a 100644 --- a/src/soc/samsung/exynos5250/timer.c +++ b/src/soc/samsung/exynos5250/timer.c @@ -14,7 +14,6 @@ */ #include <device/mmio.h> -#include <delay.h> #include <soc/clk.h> #include <stdint.h> #include <timer.h> diff --git a/src/soc/samsung/exynos5420/clock_init.c b/src/soc/samsung/exynos5420/clock_init.c index 806de6e..eae08a8 100644 --- a/src/soc/samsung/exynos5420/clock_init.c +++ b/src/soc/samsung/exynos5420/clock_init.c @@ -16,7 +16,6 @@ /* Clock setup for SMDK5420 board based on EXYNOS5 */ #include <device/mmio.h> -#include <delay.h> #include <soc/clk.h> #include <soc/cpu.h> #include <soc/dp.h> diff --git a/src/soc/samsung/exynos5420/cpu.c b/src/soc/samsung/exynos5420/cpu.c index 1c354e6..55b0512 100644 --- a/src/soc/samsung/exynos5420/cpu.c +++ b/src/soc/samsung/exynos5420/cpu.c @@ -17,7 +17,6 @@ #include <arch/cache.h> #include <console/console.h> #include <device/mmio.h> -#include <delay.h> #include <device/device.h> #include <ec/google/chromeec/ec.h> #include <soc/dp.h> diff --git a/src/soc/samsung/exynos5420/fimd.c b/src/soc/samsung/exynos5420/fimd.c index 6b69f18..756d2fb 100644 --- a/src/soc/samsung/exynos5420/fimd.c +++ b/src/soc/samsung/exynos5420/fimd.c @@ -18,7 +18,6 @@ #include <device/mmio.h> #include <console/console.h> -#include <delay.h> #include <soc/clk.h> #include <soc/dp.h> #include <soc/fimd.h> diff --git a/src/soc/samsung/exynos5420/timer.c b/src/soc/samsung/exynos5420/timer.c index 47a6f37..609ca6a 100644 --- a/src/soc/samsung/exynos5420/timer.c +++ b/src/soc/samsung/exynos5420/timer.c @@ -14,7 +14,6 @@ */ #include <device/mmio.h> -#include <delay.h> #include <soc/clk.h> #include <stdint.h> #include <timer.h> diff --git a/src/southbridge/amd/agesa/hudson/hda.c b/src/southbridge/amd/agesa/hudson/hda.c index 1cd8953..2368bb2 100644 --- a/src/southbridge/amd/agesa/hudson/hda.c +++ b/src/southbridge/amd/agesa/hudson/hda.c @@ -17,9 +17,8 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> -#include <delay.h> -#include "hudson.h" +#include "hudson.h" static void hda_init(struct device *dev) { diff --git a/src/southbridge/amd/agesa/hudson/imc.c b/src/southbridge/amd/agesa/hudson/imc.c index 68ff7fb..9ba0731 100644 --- a/src/southbridge/amd/agesa/hudson/imc.c +++ b/src/southbridge/amd/agesa/hudson/imc.c @@ -15,7 +15,6 @@ #include "imc.h" #include <device/mmio.h> -#include <delay.h> #include <Porting.h> #include <AGESA.h> #include <amdlib.h> diff --git a/src/southbridge/amd/agesa/hudson/sata.c b/src/southbridge/amd/agesa/hudson/sata.c index 75ec439..f6d3689 100644 --- a/src/southbridge/amd/agesa/hudson/sata.c +++ b/src/southbridge/amd/agesa/hudson/sata.c @@ -14,12 +14,11 @@ */ #include <device/device.h> -#include <delay.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> -#include "hudson.h" +#include "hudson.h" static void sata_init(struct device *dev) { diff --git a/src/southbridge/amd/agesa/hudson/sd.c b/src/southbridge/amd/agesa/hudson/sd.c index ec447ef..cc9470e 100644 --- a/src/southbridge/amd/agesa/hudson/sd.c +++ b/src/southbridge/amd/agesa/hudson/sd.c @@ -14,10 +14,10 @@ */ #include <device/device.h> -#include <delay.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> + #include "hudson.h" static void sd_init(struct device *dev) diff --git a/src/southbridge/amd/agesa/hudson/smihandler.c b/src/southbridge/amd/agesa/hudson/smihandler.c index a87b75d..1b9442b 100644 --- a/src/southbridge/amd/agesa/hudson/smihandler.c +++ b/src/southbridge/amd/agesa/hudson/smihandler.c @@ -19,12 +19,11 @@ */ #include <arch/io.h> +#include <cpu/x86/smm.h> + #include "hudson.h" #include "smi.h" -#include <cpu/x86/smm.h> -#include <delay.h> - #define SMI_0x88_ACPI_COMMAND (1 << 11) enum smi_source { diff --git a/src/southbridge/amd/pi/hudson/hda.c b/src/southbridge/amd/pi/hudson/hda.c index d5c92b4..9cdc1b4 100644 --- a/src/southbridge/amd/pi/hudson/hda.c +++ b/src/southbridge/amd/pi/hudson/hda.c @@ -17,7 +17,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> -#include <delay.h> + #include "hudson.h" static const unsigned short pci_device_ids[] = { diff --git a/src/southbridge/amd/pi/hudson/imc.c b/src/southbridge/amd/pi/hudson/imc.c index 461d7b4..9ea8172 100644 --- a/src/southbridge/amd/pi/hudson/imc.c +++ b/src/southbridge/amd/pi/hudson/imc.c @@ -19,7 +19,6 @@ #include <device/mmio.h> #include <device/pci_ops.h> #include <device/device.h> -#include <delay.h> #include <Porting.h> #include <AGESA.h> #include <Lib/amdlib.h> diff --git a/src/southbridge/amd/pi/hudson/sata.c b/src/southbridge/amd/pi/hudson/sata.c index 153fe6d..08e967d 100644 --- a/src/southbridge/amd/pi/hudson/sata.c +++ b/src/southbridge/amd/pi/hudson/sata.c @@ -14,12 +14,11 @@ */ #include <device/device.h> -#include <delay.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> -#include "hudson.h" +#include "hudson.h" static void sata_init(struct device *dev) { diff --git a/src/southbridge/amd/pi/hudson/sd.c b/src/southbridge/amd/pi/hudson/sd.c index c419378..e4ace38 100644 --- a/src/southbridge/amd/pi/hudson/sd.c +++ b/src/southbridge/amd/pi/hudson/sd.c @@ -14,10 +14,10 @@ */ #include <device/device.h> -#include <delay.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> + #include "hudson.h" static void sd_init(struct device *dev) diff --git a/src/southbridge/amd/pi/hudson/smihandler.c b/src/southbridge/amd/pi/hudson/smihandler.c index a87b75d..1b9442b 100644 --- a/src/southbridge/amd/pi/hudson/smihandler.c +++ b/src/southbridge/amd/pi/hudson/smihandler.c @@ -19,12 +19,11 @@ */ #include <arch/io.h> +#include <cpu/x86/smm.h> + #include "hudson.h" #include "smi.h" -#include <cpu/x86/smm.h> -#include <delay.h> - #define SMI_0x88_ACPI_COMMAND (1 << 11) enum smi_source { diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c index 23942fe..8843621 100644 --- a/src/southbridge/intel/bd82x6x/early_pch.c +++ b/src/southbridge/intel/bd82x6x/early_pch.c @@ -18,12 +18,11 @@ #include <arch/cbfs.h> #include <ip_checksum.h> #include <device/pci_def.h> -#include <delay.h> - -#include "pch.h" /* For DMI bar. */ #include <northbridge/intel/sandybridge/sandybridge.h> +#include "pch.h" + #define SOUTHBRIDGE PCI_DEV(0, 0x1f, 0) static void diff --git a/src/southbridge/intel/fsp_rangeley/soc.c b/src/southbridge/intel/fsp_rangeley/soc.c index ec5cd07..ec66c43 100644 --- a/src/southbridge/intel/fsp_rangeley/soc.c +++ b/src/southbridge/intel/fsp_rangeley/soc.c @@ -17,10 +17,10 @@ */ #include <console/console.h> -#include <delay.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> + #include "soc.h" static int soc_revision_id = -1; diff --git a/src/southbridge/intel/lynxpoint/azalia.c b/src/southbridge/intel/lynxpoint/azalia.c index 5dd46b2..e088f81 100644 --- a/src/southbridge/intel/lynxpoint/azalia.c +++ b/src/southbridge/intel/lynxpoint/azalia.c @@ -21,8 +21,8 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/mmio.h> -#include <delay.h> #include <device/azalia_device.h> + #include "pch.h" #include "hda_verb.h" diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c index bfa112a..88c599f 100644 --- a/src/southbridge/intel/lynxpoint/smihandler.c +++ b/src/southbridge/intel/lynxpoint/smihandler.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */ -#include <delay.h> #include <types.h> #include <arch/io.h> #include <device/pci_ops.h> @@ -29,12 +28,11 @@ #include <southbridge/intel/common/finalize.h> #include <northbridge/intel/haswell/haswell.h> #include <cpu/intel/haswell/haswell.h> + #include "me.h" #include "pch.h" - #include "nvs.h" - static u8 smm_initialized = 0; /* GNVS needs to be updated by an 0xEA PM Trap (B2) after it has been located diff --git a/src/southbridge/nvidia/mcp55/early_setup_car.c b/src/southbridge/nvidia/mcp55/early_setup_car.c index 3099a09..09414af 100644 --- a/src/southbridge/nvidia/mcp55/early_setup_car.c +++ b/src/southbridge/nvidia/mcp55/early_setup_car.c @@ -16,6 +16,7 @@ */ #include <arch/io.h> +#include <delay.h> #ifdef UNUSED_CODE int set_ht_link_buffer_counts_chain(u8 ht_c_num, unsigned vendorid, unsigned val); diff --git a/src/southbridge/nvidia/mcp55/sata.c b/src/southbridge/nvidia/mcp55/sata.c index 4c2830e..27f6073 100644 --- a/src/southbridge/nvidia/mcp55/sata.c +++ b/src/southbridge/nvidia/mcp55/sata.c @@ -19,10 +19,10 @@ #include <console/console.h> #include <device/device.h> -#include <delay.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> + #include "mcp55.h" static void sata_init(struct device *dev) -- To view, visit https://review.coreboot.org/c/coreboot/+/32012 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I23bc0191ca8fcd88364e5c08be7c90195019e399 Gerrit-Change-Number: 32012 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

4 10

Change in ...coreboot[master]: mb/amd/bettong/mainboard: Drop unused include <agesawrapper.h>
by HAOUAS Elyes (Code Review) 06 Apr '19

06 Apr '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32013 Change subject: mb/amd/bettong/mainboard: Drop unused include <agesawrapper.h> ...................................................................... mb/amd/bettong/mainboard: Drop unused include <agesawrapper.h> Change-Id: I020c1b9558f6aec47b048fa575c64c619b8c592a Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/amd/bettong/mainboard.c 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/32013/1 diff --git a/src/mainboard/amd/bettong/mainboard.c b/src/mainboard/amd/bettong/mainboard.c index 80b888e..5b93751 100644 --- a/src/mainboard/amd/bettong/mainboard.c +++ b/src/mainboard/amd/bettong/mainboard.c @@ -15,7 +15,6 @@ #include <console/console.h> #include <device/device.h> -#include <agesawrapper.h> #include <southbridge/amd/common/amd_pci_util.h> /*********************************************************** -- To view, visit https://review.coreboot.org/c/coreboot/+/32013 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I020c1b9558f6aec47b048fa575c64c619b8c592a Gerrit-Change-Number: 32013 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

2 2

Change in ...coreboot[master]: src: Use #include <timer.h> when appropriate
by HAOUAS Elyes (Code Review) 06 Apr '19

06 Apr '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32009 Change subject: src: Use #include <timer.h> when appropriate ...................................................................... src: Use #include <timer.h> when appropriate Change-Id: I5e739233f3742fd68d537f671642bb04886e3009 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/commonlib/storage/sd.c M src/commonlib/storage/sd_mmc.c M src/commonlib/storage/sdhci_adma.c M src/cpu/allwinner/a10/timer.c M src/cpu/x86/mp_init.c M src/drivers/i2c/tpm/tis.c M src/lib/thread.c M src/soc/cavium/cn81xx/include/soc/timer.h M src/soc/intel/apollolake/pmutil.c M src/soc/intel/cannonlake/pmutil.c M src/soc/intel/cannonlake/reset.c M src/soc/intel/common/block/systemagent/systemagent_early.c M src/soc/intel/icelake/pmutil.c M src/soc/intel/icelake/reset.c M src/soc/intel/quark/storage_test.c M src/soc/intel/skylake/pmutil.c M src/soc/intel/skylake/reset.c M src/soc/mediatek/common/include/soc/pmic_wrap_common.h M src/soc/mediatek/common/include/soc/rtc_common.h M src/soc/mediatek/common/pmic_wrap.c M src/soc/mediatek/common/rtc.c M src/soc/mediatek/mt8183/pmic_wrap.c M src/soc/nvidia/tegra210/romstage.c M src/soc/nvidia/tegra210/soc.c M src/soc/nvidia/tegra210/spi.c M src/soc/qualcomm/ipq40xx/blobs_init.c M src/soc/qualcomm/sdm845/clock.c M src/soc/qualcomm/sdm845/gpio.c M src/soc/samsung/exynos5420/dp.c M src/soc/samsung/exynos5420/dp_lowlevel.c M src/soc/samsung/exynos5420/fimd.c 31 files changed, 21 insertions(+), 35 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/32009/1 diff --git a/src/commonlib/storage/sd.c b/src/commonlib/storage/sd.c index 1389ffb..2e1ae85 100644 --- a/src/commonlib/storage/sd.c +++ b/src/commonlib/storage/sd.c @@ -24,9 +24,9 @@ #include <commonlib/storage.h> #include <delay.h> #include <endian.h> + #include "sd_mmc.h" #include "storage.h" -#include <timer.h> int sd_send_if_cond(struct storage_media *media) { diff --git a/src/commonlib/storage/sd_mmc.c b/src/commonlib/storage/sd_mmc.c index bda8d74..fd59bd0 100644 --- a/src/commonlib/storage/sd_mmc.c +++ b/src/commonlib/storage/sd_mmc.c @@ -24,11 +24,11 @@ #include <commonlib/storage.h> #include <delay.h> #include <endian.h> +#include <string.h> + #include "mmc.h" #include "sd_mmc.h" #include "storage.h" -#include <string.h> -#include <timer.h> uint64_t sd_mmc_extract_uint32_bits(const uint32_t *array, int start, int count) { diff --git a/src/commonlib/storage/sdhci_adma.c b/src/commonlib/storage/sdhci_adma.c index e95742b..1bae3fb 100644 --- a/src/commonlib/storage/sdhci_adma.c +++ b/src/commonlib/storage/sdhci_adma.c @@ -22,11 +22,11 @@ #include <commonlib/storage.h> #include <delay.h> #include <endian.h> +#include <string.h> + #include "sdhci.h" #include "sd_mmc.h" #include "storage.h" -#include <string.h> -#include <timer.h> static void sdhci_alloc_adma_descs(struct sdhci_ctrlr *sdhci_ctrlr, u32 need_descriptors) diff --git a/src/cpu/allwinner/a10/timer.c b/src/cpu/allwinner/a10/timer.c index c91d492..87228a0 100644 --- a/src/cpu/allwinner/a10/timer.c +++ b/src/cpu/allwinner/a10/timer.c @@ -17,11 +17,10 @@ * */ -#include "timer.h" - #include <device/mmio.h> #include <delay.h> -#include <timer.h> + +#include "timer.h" struct a1x_timer_module *const timer_module = (void *)A1X_TIMER_BASE; struct a1x_timer *const tmr0 = diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 138f194..9d51b3e 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -36,6 +36,7 @@ #include <smp/atomic.h> #include <smp/spinlock.h> #include <symbols.h> +#include <timer.h> #include <thread.h> #define MAX_APIC_IDS 256 diff --git a/src/drivers/i2c/tpm/tis.c b/src/drivers/i2c/tpm/tis.c index 92c8921..fd56ade 100644 --- a/src/drivers/i2c/tpm/tis.c +++ b/src/drivers/i2c/tpm/tis.c @@ -18,15 +18,14 @@ #include <string.h> #include <assert.h> #include <commonlib/endian.h> +#include <console/console.h> #include <delay.h> #include <device/i2c_simple.h> #include <endian.h> #include <lib.h> #include <security/tpm/tis.h> -#include "tpm.h" -#include <timer.h> -#include <console/console.h> +#include "tpm.h" /* global structure for tpm chip data */ static struct tpm_chip g_chip CAR_GLOBAL; diff --git a/src/lib/thread.c b/src/lib/thread.c index 57a0f8c..281885f 100644 --- a/src/lib/thread.c +++ b/src/lib/thread.c @@ -12,6 +12,7 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + #include <stddef.h> #include <stdint.h> #include <stdlib.h> @@ -19,6 +20,7 @@ #include <bootstate.h> #include <console/console.h> #include <thread.h> +#include <timer.h> static void idle_thread_init(void); diff --git a/src/soc/cavium/cn81xx/include/soc/timer.h b/src/soc/cavium/cn81xx/include/soc/timer.h index 4507b0b..5c4cbd2 100644 --- a/src/soc/cavium/cn81xx/include/soc/timer.h +++ b/src/soc/cavium/cn81xx/include/soc/timer.h @@ -18,7 +18,6 @@ #include <inttypes.h> #include <types.h> -#include <timer.h> #include <delay.h> /* Watchdog functions */ diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c index e766c77..22f5309 100644 --- a/src/soc/intel/apollolake/pmutil.c +++ b/src/soc/intel/apollolake/pmutil.c @@ -35,8 +35,8 @@ #include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/smbus.h> -#include <timer.h> #include <security/vboot/vbnv.h> + #include "chip.h" static uintptr_t read_pmc_mmio_bar(void) diff --git a/src/soc/intel/cannonlake/pmutil.c b/src/soc/intel/cannonlake/pmutil.c index 37d1365..fadd35d 100644 --- a/src/soc/intel/cannonlake/pmutil.c +++ b/src/soc/intel/cannonlake/pmutil.c @@ -38,8 +38,8 @@ #include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/smbus.h> -#include <timer.h> #include <security/vboot/vbnv.h> + #include "chip.h" /* diff --git a/src/soc/intel/cannonlake/reset.c b/src/soc/intel/cannonlake/reset.c index a6f8092..e92396f 100644 --- a/src/soc/intel/cannonlake/reset.c +++ b/src/soc/intel/cannonlake/reset.c @@ -20,7 +20,6 @@ #include <fsp/util.h> #include <soc/intel/common/reset.h> #include <string.h> -#include <timer.h> #include <soc/pci_devs.h> /* Reset Request */ diff --git a/src/soc/intel/common/block/systemagent/systemagent_early.c b/src/soc/intel/common/block/systemagent/systemagent_early.c index 93fa5df..a3e278f 100644 --- a/src/soc/intel/common/block/systemagent/systemagent_early.c +++ b/src/soc/intel/common/block/systemagent/systemagent_early.c @@ -22,8 +22,8 @@ #include <soc/iomap.h> #include <soc/pci_devs.h> #include <soc/systemagent.h> + #include "systemagent_def.h" -#include <timer.h> #if !ENV_RAMSTAGE void bootblock_systemagent_early_init(void) diff --git a/src/soc/intel/icelake/pmutil.c b/src/soc/intel/icelake/pmutil.c index fa2411d..96ff52d 100644 --- a/src/soc/intel/icelake/pmutil.c +++ b/src/soc/intel/icelake/pmutil.c @@ -37,8 +37,8 @@ #include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/smbus.h> -#include <timer.h> #include <security/vboot/vbnv.h> + #include "chip.h" /* diff --git a/src/soc/intel/icelake/reset.c b/src/soc/intel/icelake/reset.c index 854723c..470b5f4 100644 --- a/src/soc/intel/icelake/reset.c +++ b/src/soc/intel/icelake/reset.c @@ -20,7 +20,6 @@ #include <fsp/util.h> #include <soc/intel/common/reset.h> #include <string.h> -#include <timer.h> #include <soc/pci_devs.h> /* Reset Request */ diff --git a/src/soc/intel/quark/storage_test.c b/src/soc/intel/quark/storage_test.c index 79901f2..bdf86b1 100644 --- a/src/soc/intel/quark/storage_test.c +++ b/src/soc/intel/quark/storage_test.c @@ -25,6 +25,7 @@ #include <soc/iomap.h> #include <soc/pci_devs.h> #include <soc/storage_test.h> +#include <timer.h> #include <string.h> #if CONFIG(STORAGE_LOG) diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c index b517e6d..7d0dc0a 100644 --- a/src/soc/intel/skylake/pmutil.c +++ b/src/soc/intel/skylake/pmutil.c @@ -37,8 +37,8 @@ #include <soc/pm.h> #include <soc/pmc.h> #include <soc/smbus.h> -#include <timer.h> #include <security/vboot/vbnv.h> + #include "chip.h" /* diff --git a/src/soc/intel/skylake/reset.c b/src/soc/intel/skylake/reset.c index f73563e..ff1a959 100644 --- a/src/soc/intel/skylake/reset.c +++ b/src/soc/intel/skylake/reset.c @@ -20,7 +20,6 @@ #include <soc/intel/common/reset.h> #include <soc/me.h> #include <soc/pm.h> -#include <timer.h> static void do_force_global_reset(void) { diff --git a/src/soc/mediatek/common/include/soc/pmic_wrap_common.h b/src/soc/mediatek/common/include/soc/pmic_wrap_common.h index bf0b752..0b9f2d3 100644 --- a/src/soc/mediatek/common/include/soc/pmic_wrap_common.h +++ b/src/soc/mediatek/common/include/soc/pmic_wrap_common.h @@ -17,7 +17,6 @@ #define SOC_MEDIATEK_PMIC_WRAP_COMMON_H #include <console/console.h> -#include <timer.h> #define PWRAPTAG "[PWRAP] " #define pwrap_err(fmt, arg ...) printk(BIOS_ERR, PWRAPTAG "ERROR,line=%d" fmt, \ diff --git a/src/soc/mediatek/common/include/soc/rtc_common.h b/src/soc/mediatek/common/include/soc/rtc_common.h index 41e772e..24bad00 100644 --- a/src/soc/mediatek/common/include/soc/rtc_common.h +++ b/src/soc/mediatek/common/include/soc/rtc_common.h @@ -21,7 +21,6 @@ #include <console/console.h> #include <delay.h> #include <rtc.h> -#include <timer.h> /* * Default values for RTC initialization diff --git a/src/soc/mediatek/common/pmic_wrap.c b/src/soc/mediatek/common/pmic_wrap.c index 9e1163b..1b8bc5d 100644 --- a/src/soc/mediatek/common/pmic_wrap.c +++ b/src/soc/mediatek/common/pmic_wrap.c @@ -16,6 +16,7 @@ #include <device/mmio.h> #include <assert.h> #include <soc/pmic_wrap.h> +#include <timer.h> u32 wait_for_state_idle(u32 timeout_us, void *wacs_register, void *wacs_vldclr_register, u32 *read_reg) diff --git a/src/soc/mediatek/common/rtc.c b/src/soc/mediatek/common/rtc.c index fd40cb5..6e95f5b 100644 --- a/src/soc/mediatek/common/rtc.c +++ b/src/soc/mediatek/common/rtc.c @@ -16,6 +16,7 @@ #include <soc/rtc_common.h> #include <soc/rtc.h> #include <soc/pmic_wrap.h> +#include <timer.h> /* ensure rtc write success */ int rtc_busy_wait(void) diff --git a/src/soc/mediatek/mt8183/pmic_wrap.c b/src/soc/mediatek/mt8183/pmic_wrap.c index 2593b7a..65584ab 100644 --- a/src/soc/mediatek/mt8183/pmic_wrap.c +++ b/src/soc/mediatek/mt8183/pmic_wrap.c @@ -17,6 +17,7 @@ #include <soc/infracfg.h> #include <soc/pll.h> #include <soc/pmic_wrap.h> +#include <timer.h> #define PRIORITY_FIELD(x) ((x % 4) * 8) #define PRIORITY_IN(id, priority) (id << PRIORITY_FIELD(priority)) diff --git a/src/soc/nvidia/tegra210/romstage.c b/src/soc/nvidia/tegra210/romstage.c index bfa3c0a..3bd1a5b 100644 --- a/src/soc/nvidia/tegra210/romstage.c +++ b/src/soc/nvidia/tegra210/romstage.c @@ -28,7 +28,6 @@ #include <soc/romstage.h> #include <soc/nvidia/tegra/apbmisc.h> #include <symbols.h> -#include <timer.h> #include <vendorcode/google/chromeos/chromeos.h> void __weak romstage_mainboard_init(void) diff --git a/src/soc/nvidia/tegra210/soc.c b/src/soc/nvidia/tegra210/soc.c index c013099..cedcc18 100644 --- a/src/soc/nvidia/tegra210/soc.c +++ b/src/soc/nvidia/tegra210/soc.c @@ -26,7 +26,6 @@ #include <soc/cpu.h> #include <soc/mc.h> #include <soc/nvidia/tegra/apbmisc.h> -#include <timer.h> #include <soc/sdram.h> #include <soc/sdram_configs.h> diff --git a/src/soc/nvidia/tegra210/spi.c b/src/soc/nvidia/tegra210/spi.c index 6542df1..edb052d 100644 --- a/src/soc/nvidia/tegra210/spi.c +++ b/src/soc/nvidia/tegra210/spi.c @@ -29,8 +29,6 @@ #include <stdint.h> #include <stdlib.h> #include <symbols.h> -#include <timer.h> - #if defined(CONFIG_DEBUG_SPI) && CONFIG_DEBUG_SPI # define DEBUG_SPI(x,...) printk(BIOS_DEBUG, "TEGRA_SPI: " x) diff --git a/src/soc/qualcomm/ipq40xx/blobs_init.c b/src/soc/qualcomm/ipq40xx/blobs_init.c index 761b571..5cda9fc 100644 --- a/src/soc/qualcomm/ipq40xx/blobs_init.c +++ b/src/soc/qualcomm/ipq40xx/blobs_init.c @@ -19,9 +19,7 @@ #include <cbfs.h> #include <console/console.h> #include <string.h> -#include <timer.h> #include <program_loading.h> - #include <soc/iomap.h> #include <soc/soc_services.h> diff --git a/src/soc/qualcomm/sdm845/clock.c b/src/soc/qualcomm/sdm845/clock.c index bdbcfb8..5f0c305 100644 --- a/src/soc/qualcomm/sdm845/clock.c +++ b/src/soc/qualcomm/sdm845/clock.c @@ -17,10 +17,8 @@ #include <types.h> #include <console/console.h> #include <delay.h> -#include <timer.h> #include <commonlib/helpers.h> #include <assert.h> - #include <soc/clock.h> #define DIV(div) (2*div - 1) diff --git a/src/soc/qualcomm/sdm845/gpio.c b/src/soc/qualcomm/sdm845/gpio.c index a2a6fb9..afa461d 100644 --- a/src/soc/qualcomm/sdm845/gpio.c +++ b/src/soc/qualcomm/sdm845/gpio.c @@ -16,8 +16,6 @@ #include <device/mmio.h> #include <types.h> #include <delay.h> -#include <timer.h> - #include <gpio.h> void gpio_configure(gpio_t gpio, uint32_t func, uint32_t pull, diff --git a/src/soc/samsung/exynos5420/dp.c b/src/soc/samsung/exynos5420/dp.c index 190842e..5ad3dd3 100644 --- a/src/soc/samsung/exynos5420/dp.c +++ b/src/soc/samsung/exynos5420/dp.c @@ -23,7 +23,6 @@ #include <soc/sysreg.h> #include <stdlib.h> #include <string.h> -#include <timer.h> /* * Here is the rough outline of how we bring up the display: diff --git a/src/soc/samsung/exynos5420/dp_lowlevel.c b/src/soc/samsung/exynos5420/dp_lowlevel.c index 5381657..164704b 100644 --- a/src/soc/samsung/exynos5420/dp_lowlevel.c +++ b/src/soc/samsung/exynos5420/dp_lowlevel.c @@ -23,7 +23,6 @@ #include <soc/power.h> #include <soc/sysreg.h> #include <stdlib.h> -#include <timer.h> /* FIXME: I think the DP controller shouldn't be hardcoded here... */ static struct exynos_dp * const dp_regs = (void *)EXYNOS5_DP1_BASE; diff --git a/src/soc/samsung/exynos5420/fimd.c b/src/soc/samsung/exynos5420/fimd.c index 2987598..6b69f18 100644 --- a/src/soc/samsung/exynos5420/fimd.c +++ b/src/soc/samsung/exynos5420/fimd.c @@ -24,7 +24,6 @@ #include <soc/fimd.h> #include <soc/periph.h> #include <soc/sysreg.h> -#include <timer.h> /* fairly useful debugging stuff. */ #if 0 -- To view, visit https://review.coreboot.org/c/coreboot/+/32009 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5e739233f3742fd68d537f671642bb04886e3009 Gerrit-Change-Number: 32009 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

2 7

Change in ...coreboot[master]: Doc/mb/asrock/h110m: Fix the links
by Maxim Polyakov (Code Review) 06 Apr '19

06 Apr '19

Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32052 Change subject: Doc/mb/asrock/h110m: Fix the links ...................................................................... Doc/mb/asrock/h110m: Fix the links Change-Id: I7b925518416a4268037efac9060ef911e4ae74cd Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- M Documentation/mainboard/asrock/h110m-dvs.md 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/32052/1 diff --git a/Documentation/mainboard/asrock/h110m-dvs.md b/Documentation/mainboard/asrock/h110m-dvs.md index 5a3bb3e..8ceb7c8 100644 --- a/Documentation/mainboard/asrock/h110m-dvs.md +++ b/Documentation/mainboard/asrock/h110m-dvs.md @@ -5,9 +5,9 @@ ## Required proprietary blobs Mainboard is based on Intel Skylake/Kaby Lake processor and H110 Chipset. -Intel company provides [Firmware Support Package (2.0)](../../Documentation/soc/intel/fsp/index.md) +Intel company provides [Firmware Support Package (2.0)](../../../Documentation/soc/intel/fsp/index.md) (intel FSP 2.0) to initialize this generation silicon. Please see this -[document](../../Documentation/soc/intel/code_development_model/code_development_model.md). +[document](../../../Documentation/soc/intel/code_development_model/code_development_model.md). FSP Information: @@ -62,7 +62,7 @@ the BIOS region of the flash is writable. If you wish to change any other region, such as the Management Engine or firmware descriptor, then an external programmer is required (unless you find a clever way around -the flash protection). More information about this [here](../../Documentation/flash_tutorial/index.md). +the flash protection). More information about this [here](../../../Documentation/flash_tutorial/index.md). ### External programming -- To view, visit https://review.coreboot.org/c/coreboot/+/32052 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b925518416a4268037efac9060ef911e4ae74cd Gerrit-Change-Number: 32052 Gerrit-PatchSet: 1 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-MessageType: newchange

4 6

Change in ...coreboot[master]: mb/asrock/h110m: Add PEG Gen3 support
by Maxim Polyakov (Code Review) 06 Apr '19

06 Apr '19

Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31948 Change subject: mb/asrock/h110m: Add PEG Gen3 support ...................................................................... mb/asrock/h110m: Add PEG Gen3 support This patch adds support PCIe Gen 3 with 8GT/s link speed for PEG x16 slot. All parameters for FSP are set during initialization in romstage. Now there is no need to additionally configure the FSP before building the ROM image. Tested on Intel Core i5-6600 processor with the following devices: - LP11000e Fibre Channel HBA (Gen2 x8); - PEX8734 PCIe Fabric/Switch (Gen3 x16); - NVIDIA GeForce GTX 1060 GPU (Gen3 x16). GPU works with an nouveau and proprietary driver under Ubuntu 18.04.2 (4.15.0-46-generic GNU/Linux kernel). Discrete graphic card is used as primary device for display output (if CONFIG_ONBOARD_VGA_IS_PRIMARY is not set). Dynamic switching is not yet supported. Tianocore (edk2-stable201811-216-g51be9d0) is used as the payload. Change-Id: Ia4f29df47d76de5069fe53120434cc7c2ab6f044 Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/asrock/h110m/romstage.c 2 files changed, 27 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/31948/1 diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb index 9e2fca0..78e99f3 100644 --- a/src/mainboard/asrock/h110m/devicetree.cb +++ b/src/mainboard/asrock/h110m/devicetree.cb @@ -201,6 +201,13 @@ [PchSerialIoIndexUart2] = PchSerialIoDisabled, \ }" + # Use SRCCLKREQ0# and CLKSRC0 for PEG x16 root port + register "PcieRpClkReqSupport[0]" = "1" + register "PcieRpClkReqNumber[0]" = "0" + # Enable Latency Tolerance Reporting Mechanism + register "PcieRpLtrEnable[0]" = "1" + register "PcieRpClkSrcNumber[0]" = "0" + # Enable Root port 6(x1) for LAN. register "PcieRpEnable[5]" = "1" # Enable CLKREQ# diff --git a/src/mainboard/asrock/h110m/romstage.c b/src/mainboard/asrock/h110m/romstage.c index 4961a79..dacf47b 100644 --- a/src/mainboard/asrock/h110m/romstage.c +++ b/src/mainboard/asrock/h110m/romstage.c @@ -83,4 +83,24 @@ /* desktop type */ mem_cfg->UserBd = BOARD_TYPE_DESKTOP; + + /* initialize PEG 0:1:0 x16 Gen3 (8GT/s) root port */ + mupd->FspmConfig.Peg0Enable = 1; + mupd->FspmConfig.Peg0MaxLinkSpeed = 3; + + /* + * use Phase 2 Link Equalization for Gen3 Data Rate + * to minimize the BER (bit error rate) + */ + mupd->FspmTestConfig.Peg0Gen3EqPh2Enable = 1; + + /* + * Set primary display device + * default value: 3 (AUTO) + * 0: iGPU, 1: external GPU on PEG + */ + if(CONFIG(ONBOARD_VGA_IS_PRIMARY)) + mupd->FspmConfig.PrimaryDisplay = 0; + else + mupd->FspmConfig.PrimaryDisplay = 1; } -- To view, visit https://review.coreboot.org/c/coreboot/+/31948 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia4f29df47d76de5069fe53120434cc7c2ab6f044 Gerrit-Change-Number: 31948 Gerrit-PatchSet: 1 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-MessageType: newchange

5 30

Change in ...coreboot[master]: soc/intel/skylake: Add devicetree options for PEG
by Maxim Polyakov (Code Review) 06 Apr '19

06 Apr '19

Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32045 Change subject: soc/intel/skylake: Add devicetree options for PEG ...................................................................... soc/intel/skylake: Add devicetree options for PEG List of options for each port: - PegMaxLinkSpeed - PegMaxLinkWidth - PegPowerDownUnusedLanes - PegGen3EqPh2Enable To enable or disable the corresponding PEG root port you need to add to the devicetree.cb: device pci 01.0 on end # enable PEG0 root port device pci 01.1 off end # do not configure PEG1 If PEG port is not defined in the devicetree, it will be disabled in FSP. Change-Id: I23708f7060edf08739adf61fe61a419329907563 Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/chip.h M src/soc/intel/skylake/include/soc/pci_devs.h M src/soc/intel/skylake/romstage/romstage_fsp20.c 4 files changed, 100 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/32045/1 diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 53094b1..de476ff 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -258,6 +258,10 @@ bool default n +config MAX_PEG_PORTS + int + default 3 + config MAX_ROOT_PORTS int default 24 if PLATFORM_USES_FSP2_0 diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index a8ee064..1f0e2f4 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -214,6 +214,42 @@ */ /* + * PEG max link speed + * 0: Maximum possible link speed, + * which is set in FSP. + * 1: Gen1 link speed + * 2: Gen2 link speed + * 3: Gen3 link speed + */ + u8 PegMaxLinkSpeed[CONFIG_MAX_PEG_PORTS]; + + /* + * PEG Max Link Width + * 0: Maximum possible link width: + * x16 for PEG0, + * x8 for PEG1, + * x4 for PEG2. + * 1: x1 + * 2: x4, only for PEG0 and PEG1 + * 3: x8, only for PEG0 + */ + u8 PegMaxLinkWidth[CONFIG_MAX_PEG_PORTS]; + + /* + * Power down unused lanes on PEG + * 0: No power saving + * 1: Power down unused lanes + */ + u8 PegPowerDownUnusedLanes[CONFIG_MAX_PEG_PORTS]; + + /* + * Phase2 EQ enable on the PEG + * 0: Disable phase 2 + * 1: Enable phase 2 + */ + u8 PegGen3EqPh2Enable[CONFIG_MAX_PEG_PORTS]; + + /* * Enable/Disable Root Port * 0: Disable Root Port * 1: Enable Root Port diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h index f695794..d59c800 100644 --- a/src/soc/intel/skylake/include/soc/pci_devs.h +++ b/src/soc/intel/skylake/include/soc/pci_devs.h @@ -37,6 +37,13 @@ #define SA_DEVFN_ROOT _SA_DEVFN(ROOT) #define SA_DEV_ROOT _SA_DEV(ROOT) +#define SA_DEV_SLOT_PEG 0x01 +#define SA_DEVFN_PEG(func) PCI_DEVFN(SA_DEV_SLOT_PEG, func) +#define SA_DEV_PEG(func) dev_find_slot(0, SA_DEVFN_PEG(func)) +#define SA_DEV_PEG0 SA_DEV_PEG(0) +#define SA_DEV_PEG1 SA_DEV_PEG(1) +#define SA_DEV_PEG2 SA_DEV_PEG(2) + #define SA_DEV_SLOT_IGD 0x02 #define SA_DEVFN_IGD _SA_DEVFN(IGD) #define SA_DEV_IGD _SA_DEV(IGD) diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index f38a775..b963d17 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -202,6 +202,58 @@ m_cfg->CpuRatio = (flex_ratio.lo >> 8) & 0xff; } +static void soc_peg_init_params(FSP_M_CONFIG *m_cfg, + FSP_M_TEST_CONFIG *m_t_cfg, + const struct soc_intel_skylake_config *config) +{ + const struct device *dev; + /* + * To enable or disable the corresponding PEG root port you need to + * add to the devicetree.cb: + * + * device pci 01.0 on end # enable PEG0 root port + * device pci 01.1 off end # do not configure PEG1 + * + * If PEG port is not defined in the device tree, it will be disabled + * in FSP + */ + dev = SA_DEV_PEG0; /* PEG 0:1:0 */ + if (!dev || !dev->enabled) + m_cfg->Peg0Enable = 0; + else if (dev->enabled) { + m_cfg->Peg0Enable = dev->enabled; + m_cfg->Peg0MaxLinkSpeed = config->PegMaxLinkSpeed[0]; + m_cfg->Peg0MaxLinkWidth = config->PegMaxLinkWidth[0]; + m_cfg->Peg0PowerDownUnusedLanes = + config->PegPowerDownUnusedLanes[0]; + m_t_cfg->Peg0Gen3EqPh2Enable = config->PegGen3EqPh2Enable[0]; + } + + dev = SA_DEV_PEG1; /* PEG 0:1:1 */ + if (!dev || !dev->enabled) + m_cfg->Peg1Enable = 0; + else if (dev->enabled) { + m_cfg->Peg1Enable = dev->enabled; + m_cfg->Peg1MaxLinkSpeed = config->PegMaxLinkSpeed[1]; + m_cfg->Peg1MaxLinkWidth = config->PegMaxLinkWidth[1]; + m_cfg->Peg1PowerDownUnusedLanes = + config->PegPowerDownUnusedLanes[1]; + m_t_cfg->Peg1Gen3EqPh2Enable = config->PegGen3EqPh2Enable[1]; + } + + dev = SA_DEV_PEG0; /* PEG 0:1:2 */ + if (!dev || !dev->enabled) + m_cfg->Peg2Enable = 0; + else if (dev->enabled) { + m_cfg->Peg2Enable = dev->enabled; + m_cfg->Peg2MaxLinkSpeed = config->PegMaxLinkSpeed[2]; + m_cfg->Peg2MaxLinkWidth = config->PegMaxLinkWidth[2]; + m_cfg->Peg2PowerDownUnusedLanes = + config->PegPowerDownUnusedLanes[2]; + m_t_cfg->Peg2Gen3EqPh2Enable = config->PegGen3EqPh2Enable[2]; + } +} + static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const struct soc_intel_skylake_config *config) { @@ -254,6 +306,7 @@ config = dev->chip_info; soc_memory_init_params(m_cfg, config); + soc_peg_init_params(m_cfg, m_t_cfg, config); /* Skip creating Management Engine MBP HOB */ m_t_cfg->SkipMbpHob = 0x01; -- To view, visit https://review.coreboot.org/c/coreboot/+/32045 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I23708f7060edf08739adf61fe61a419329907563 Gerrit-Change-Number: 32045 Gerrit-PatchSet: 1 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-MessageType: newchange

3 14

Change in ...coreboot[master]: payloads: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
by Julius Werner (Code Review) 06 Apr '19

06 Apr '19

Hello Aaron Durbin, Patrick Georgi, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/31775 to review the following change. Change subject: payloads: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) ...................................................................... payloads: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) This patch is a raw application of find payloads/ -type f | \ xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I883b03b189f59b5d998a09a2596b0391a2d5cf33 Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- M payloads/coreinfo/bootlog_module.c M payloads/coreinfo/cbfs_module.c M payloads/coreinfo/coreboot_module.c M payloads/coreinfo/coreinfo.c M payloads/coreinfo/cpuinfo_module.c M payloads/coreinfo/multiboot_module.c M payloads/coreinfo/nvram_module.c M payloads/coreinfo/pci_module.c M payloads/coreinfo/ramdump_module.c M payloads/coreinfo/timestamps_module.c M payloads/external/tint/libpayload_tint.patch M payloads/libpayload/arch/arm/main.c M payloads/libpayload/arch/arm64/main.c M payloads/libpayload/arch/mips/main.c M payloads/libpayload/arch/x86/delay.c M payloads/libpayload/arch/x86/exception.c M payloads/libpayload/arch/x86/main.c M payloads/libpayload/arch/x86/multiboot.c M payloads/libpayload/arch/x86/rom_media.c M payloads/libpayload/arch/x86/sysinfo.c M payloads/libpayload/crypto/sha1.c M payloads/libpayload/curses/keyboard.c M payloads/libpayload/curses/local.h M payloads/libpayload/curses/pdcurses-backend/pdcdisp.c M payloads/libpayload/curses/pdcurses-backend/pdckbd.c M payloads/libpayload/curses/pdcurses-backend/pdcscrn.c M payloads/libpayload/curses/pdcurses-backend/pdcsetsc.c M payloads/libpayload/curses/pdcurses-backend/pdcutil.c M payloads/libpayload/curses/tinycurses.c M payloads/libpayload/drivers/i8042/i8042.c M payloads/libpayload/drivers/i8042/keyboard.c M payloads/libpayload/drivers/mouse_cursor.c M payloads/libpayload/drivers/nvram.c M payloads/libpayload/drivers/serial/8250.c M payloads/libpayload/drivers/storage/ahci.c M payloads/libpayload/drivers/storage/ahci_ata.c M payloads/libpayload/drivers/storage/ata.c M payloads/libpayload/drivers/storage/storage.c M payloads/libpayload/drivers/usb/ehci.c M payloads/libpayload/drivers/usb/ehci_rh.c M payloads/libpayload/drivers/usb/ohci.c M payloads/libpayload/drivers/usb/usb.c M payloads/libpayload/drivers/usb/usbhid.c M payloads/libpayload/drivers/usb/usbinit.c M payloads/libpayload/drivers/usb/xhci.c M payloads/libpayload/drivers/usb/xhci_devconf.c M payloads/libpayload/drivers/usb/xhci_rh.c M payloads/libpayload/drivers/video/video.c M payloads/libpayload/include/endian.h M payloads/libpayload/include/stdlib.h M payloads/libpayload/include/storage/storage.h M payloads/libpayload/include/sysinfo.h M payloads/libpayload/libc/64bit_div.c M payloads/libpayload/libc/console.c M payloads/libpayload/libc/coreboot.c M payloads/libpayload/libc/exec.c M payloads/libpayload/libc/malloc.c M payloads/libpayload/libc/time.c M payloads/libpayload/libcbfs/cbfs.c M payloads/libpayload/libcbfs/cbfs_core.c M payloads/nvramcui/nvramcui.c 61 files changed, 176 insertions(+), 176 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/31775/1 diff --git a/payloads/coreinfo/bootlog_module.c b/payloads/coreinfo/bootlog_module.c index 1d00744..caf5d13 100644 --- a/payloads/coreinfo/bootlog_module.c +++ b/payloads/coreinfo/bootlog_module.c @@ -15,7 +15,7 @@ #include "coreinfo.h" -#if IS_ENABLED(CONFIG_MODULE_BOOTLOG) +#if CONFIG(MODULE_BOOTLOG) #define LINES_SHOWN 19 #define TAB_WIDTH 2 diff --git a/payloads/coreinfo/cbfs_module.c b/payloads/coreinfo/cbfs_module.c index 6a04879..e7cfc8c 100644 --- a/payloads/coreinfo/cbfs_module.c +++ b/payloads/coreinfo/cbfs_module.c @@ -16,7 +16,7 @@ #include "coreinfo.h" #include "endian.h" -#if IS_ENABLED(CONFIG_MODULE_CBFS) +#if CONFIG(MODULE_CBFS) #define FILES_VISIBLE 19 diff --git a/payloads/coreinfo/coreboot_module.c b/payloads/coreinfo/coreboot_module.c index adf8f14..d294288 100644 --- a/payloads/coreinfo/coreboot_module.c +++ b/payloads/coreinfo/coreboot_module.c @@ -16,7 +16,7 @@ #include "coreinfo.h" #include <coreboot_tables.h> -#if IS_ENABLED(CONFIG_MODULE_COREBOOT) +#if CONFIG(MODULE_COREBOOT) #define MAX_MEMORY_COUNT 5 diff --git a/payloads/coreinfo/coreinfo.c b/payloads/coreinfo/coreinfo.c index 718c589..649bfde 100644 --- a/payloads/coreinfo/coreinfo.c +++ b/payloads/coreinfo/coreinfo.c @@ -28,34 +28,34 @@ extern struct coreinfo_module timestamps_module; struct coreinfo_module *system_modules[] = { -#if IS_ENABLED(CONFIG_MODULE_CPUINFO) +#if CONFIG(MODULE_CPUINFO) &cpuinfo_module, #endif -#if IS_ENABLED(CONFIG_MODULE_PCI) +#if CONFIG(MODULE_PCI) &pci_module, #endif -#if IS_ENABLED(CONFIG_MODULE_NVRAM) +#if CONFIG(MODULE_NVRAM) &nvram_module, #endif -#if IS_ENABLED(CONFIG_MODULE_RAMDUMP) +#if CONFIG(MODULE_RAMDUMP) &ramdump_module, #endif }; struct coreinfo_module *firmware_modules[] = { -#if IS_ENABLED(CONFIG_MODULE_COREBOOT) +#if CONFIG(MODULE_COREBOOT) &coreboot_module, #endif -#if IS_ENABLED(CONFIG_MODULE_MULTIBOOT) +#if CONFIG(MODULE_MULTIBOOT) &multiboot_module, #endif -#if IS_ENABLED(CONFIG_MODULE_BOOTLOG) +#if CONFIG(MODULE_BOOTLOG) &bootlog_module, #endif -#if IS_ENABLED(CONFIG_MODULE_CBFS) +#if CONFIG(MODULE_CBFS) &cbfs_module, #endif -#if IS_ENABLED(CONFIG_MODULE_TIMESTAMPS) +#if CONFIG(MODULE_TIMESTAMPS) &timestamps_module, #endif }; @@ -114,7 +114,7 @@ mvwprintw(menuwin, 0, 0, menu); } -#if IS_ENABLED(CONFIG_SHOW_DATE_TIME) +#if CONFIG(SHOW_DATE_TIME) static void print_time_and_date(void) { struct tm tm; @@ -149,7 +149,7 @@ mvwprintw(menuwin, 1, 0, menu); -#if IS_ENABLED(CONFIG_SHOW_DATE_TIME) +#if CONFIG(SHOW_DATE_TIME) print_time_and_date(); #endif } @@ -253,7 +253,7 @@ while (1) { int ch = -1; -#if IS_ENABLED(CONFIG_SHOW_DATE_TIME) +#if CONFIG(SHOW_DATE_TIME) print_time_and_date(); wrefresh(menuwin); #endif @@ -291,7 +291,7 @@ { int i, j; - if (IS_ENABLED(CONFIG_LP_USB)) + if (CONFIG(LP_USB)) usb_initialize(); initscr(); diff --git a/payloads/coreinfo/cpuinfo_module.c b/payloads/coreinfo/cpuinfo_module.c index 72b941e..0ea2dfc 100644 --- a/payloads/coreinfo/cpuinfo_module.c +++ b/payloads/coreinfo/cpuinfo_module.c @@ -18,7 +18,7 @@ #include "coreinfo.h" -#if IS_ENABLED(CONFIG_MODULE_CPUINFO) +#if CONFIG(MODULE_CPUINFO) #include <arch/rdtsc.h> #define VENDOR_INTEL 0x756e6547 diff --git a/payloads/coreinfo/multiboot_module.c b/payloads/coreinfo/multiboot_module.c index 2fc60fa..e394dbd 100644 --- a/payloads/coreinfo/multiboot_module.c +++ b/payloads/coreinfo/multiboot_module.c @@ -16,7 +16,7 @@ #include <multiboot_tables.h> #include "coreinfo.h" -#if IS_ENABLED(CONFIG_MODULE_MULTIBOOT) +#if CONFIG(MODULE_MULTIBOOT) #define MAX_MEMORY_COUNT 10 diff --git a/payloads/coreinfo/nvram_module.c b/payloads/coreinfo/nvram_module.c index 7997911..45edfb3 100644 --- a/payloads/coreinfo/nvram_module.c +++ b/payloads/coreinfo/nvram_module.c @@ -15,7 +15,7 @@ #include "coreinfo.h" -#if IS_ENABLED(CONFIG_MODULE_NVRAM) +#if CONFIG(MODULE_NVRAM) /** * Dump 256 bytes of NVRAM. diff --git a/payloads/coreinfo/pci_module.c b/payloads/coreinfo/pci_module.c index 9f10b12..ff042af 100644 --- a/payloads/coreinfo/pci_module.c +++ b/payloads/coreinfo/pci_module.c @@ -18,7 +18,7 @@ #include <libpayload.h> #include "coreinfo.h" -#if IS_ENABLED(CONFIG_MODULE_PCI) +#if CONFIG(MODULE_PCI) struct pci_devices { pcidev_t device; diff --git a/payloads/coreinfo/ramdump_module.c b/payloads/coreinfo/ramdump_module.c index 8401a61..28d7a03 100644 --- a/payloads/coreinfo/ramdump_module.c +++ b/payloads/coreinfo/ramdump_module.c @@ -15,7 +15,7 @@ #include "coreinfo.h" -#if IS_ENABLED(CONFIG_MODULE_RAMDUMP) +#if CONFIG(MODULE_RAMDUMP) static s64 cursor = 0; static s64 cursor_max = (1 * 1024 * 1024 * 1024); /* Max. 1 GB RAM for now. */ diff --git a/payloads/coreinfo/timestamps_module.c b/payloads/coreinfo/timestamps_module.c index fda5a96..0978f31 100644 --- a/payloads/coreinfo/timestamps_module.c +++ b/payloads/coreinfo/timestamps_module.c @@ -14,7 +14,7 @@ #include "coreinfo.h" #include <commonlib/timestamp_serialized.h> -#if IS_ENABLED(CONFIG_MODULE_TIMESTAMPS) +#if CONFIG(MODULE_TIMESTAMPS) #define LINES_SHOWN 19 #define TAB_WIDTH 2 diff --git a/payloads/external/tint/libpayload_tint.patch b/payloads/external/tint/libpayload_tint.patch index bb19718..34246a6 100644 --- a/payloads/external/tint/libpayload_tint.patch +++ b/payloads/external/tint/libpayload_tint.patch @@ -371,7 +371,7 @@ int ch; engine_t engine; /* Initialize */ -+ if (IS_ENABLED(CONFIG_LP_USB)) ++ if (CONFIG(LP_USB)) + usb_initialize(); rand_init (); /* must be called before engine_init () */ engine_init (&engine,score_function); /* must be called before using engine.curshape */ diff --git a/payloads/libpayload/arch/arm/main.c b/payloads/libpayload/arch/arm/main.c index b63e0be..cb2d242 100644 --- a/payloads/libpayload/arch/arm/main.c +++ b/payloads/libpayload/arch/arm/main.c @@ -48,7 +48,7 @@ lib_get_sysinfo(); /* Optionally set up the consoles. */ -#if !IS_ENABLED(CONFIG_LP_SKIP_CONSOLE_INIT) +#if !CONFIG(LP_SKIP_CONSOLE_INIT) console_init(); #endif diff --git a/payloads/libpayload/arch/arm64/main.c b/payloads/libpayload/arch/arm64/main.c index aa2292f..593c40e 100644 --- a/payloads/libpayload/arch/arm64/main.c +++ b/payloads/libpayload/arch/arm64/main.c @@ -123,7 +123,7 @@ post_sysinfo_scan_mmu_setup(); -#if !IS_ENABLED(CONFIG_LP_SKIP_CONSOLE_INIT) +#if !CONFIG(LP_SKIP_CONSOLE_INIT) console_init(); #endif diff --git a/payloads/libpayload/arch/mips/main.c b/payloads/libpayload/arch/mips/main.c index 9f9326e..b8c0c4d 100644 --- a/payloads/libpayload/arch/mips/main.c +++ b/payloads/libpayload/arch/mips/main.c @@ -34,7 +34,7 @@ lib_get_sysinfo(); /* Optionally set up the consoles. */ -#if !IS_ENABLED(CONFIG_LP_SKIP_CONSOLE_INIT) +#if !CONFIG(LP_SKIP_CONSOLE_INIT) console_init(); #endif diff --git a/payloads/libpayload/arch/x86/delay.c b/payloads/libpayload/arch/x86/delay.c index a617ce6..14056dd 100644 --- a/payloads/libpayload/arch/x86/delay.c +++ b/payloads/libpayload/arch/x86/delay.c @@ -50,7 +50,7 @@ if (ns > APIC_INTERRUPT_LATENCY_NS) apic_us = (ns - APIC_INTERRUPT_LATENCY_NS) / NSECS_PER_USEC; - if (IS_ENABLED(CONFIG_LP_ENABLE_APIC) && apic_initialized() && apic_us) + if (CONFIG(LP_ENABLE_APIC) && apic_initialized() && apic_us) apic_delay(apic_us); if (delta > PAUSE_THRESHOLD_TICKS) diff --git a/payloads/libpayload/arch/x86/exception.c b/payloads/libpayload/arch/x86/exception.c index 983a9f3..13ff58c 100644 --- a/payloads/libpayload/arch/x86/exception.c +++ b/payloads/libpayload/arch/x86/exception.c @@ -173,10 +173,10 @@ handlers[vec](vec); goto success; } else if (vec >= EXC_COUNT - && IS_ENABLED(CONFIG_LP_IGNORE_UNKNOWN_INTERRUPTS)) { + && CONFIG(LP_IGNORE_UNKNOWN_INTERRUPTS)) { goto success; } else if (vec >= EXC_COUNT - && IS_ENABLED(CONFIG_LP_LOG_UNKNOWN_INTERRUPTS)) { + && CONFIG(LP_LOG_UNKNOWN_INTERRUPTS)) { printf("Ignoring interrupt vector %u\n", vec); goto success; } @@ -192,7 +192,7 @@ return; success: - if (IS_ENABLED(CONFIG_LP_ENABLE_APIC)) + if (CONFIG(LP_ENABLE_APIC)) apic_eoi(vec); } diff --git a/payloads/libpayload/arch/x86/main.c b/payloads/libpayload/arch/x86/main.c index 05ffa0d..4da0bba 100644 --- a/payloads/libpayload/arch/x86/main.c +++ b/payloads/libpayload/arch/x86/main.c @@ -52,13 +52,13 @@ lib_get_sysinfo(); /* Optionally set up the consoles. */ -#if !IS_ENABLED(CONFIG_LP_SKIP_CONSOLE_INIT) +#if !CONFIG(LP_SKIP_CONSOLE_INIT) console_init(); #endif exception_init(); - if (IS_ENABLED(CONFIG_LP_ENABLE_APIC)) { + if (CONFIG(LP_ENABLE_APIC)) { apic_init(); enable_interrupts(); diff --git a/payloads/libpayload/arch/x86/multiboot.c b/payloads/libpayload/arch/x86/multiboot.c index 1cd0295..76eeae3 100644 --- a/payloads/libpayload/arch/x86/multiboot.c +++ b/payloads/libpayload/arch/x86/multiboot.c @@ -40,7 +40,7 @@ if (info->n_memranges >= SYSINFO_MAX_MEM_RANGES) return -1; -#if IS_ENABLED(CONFIG_LP_MEMMAP_RAM_ONLY) +#if CONFIG(LP_MEMMAP_RAM_ONLY) /* 1 == normal RAM. Ignore everything else for now */ if (type != 1) return 0; diff --git a/payloads/libpayload/arch/x86/rom_media.c b/payloads/libpayload/arch/x86/rom_media.c index 0c6f521..d9c27fa 100644 --- a/payloads/libpayload/arch/x86/rom_media.c +++ b/payloads/libpayload/arch/x86/rom_media.c @@ -83,7 +83,7 @@ struct cbfs_header *header = (struct cbfs_header*) *(uint32_t*)(0xfffffffc); if (CBFS_HEADER_MAGIC != ntohl(header->magic)) { -#if IS_ENABLED(CONFIG_LP_ROM_SIZE) +#if CONFIG(LP_ROM_SIZE) printk(BIOS_ERR, "Invalid CBFS master header at %p\n", header); media->context = (void*)CONFIG_LP_ROM_SIZE; #else @@ -92,7 +92,7 @@ } else { uint32_t romsize = ntohl(header->romsize); media->context = (void*)romsize; -#if IS_ENABLED(CONFIG_LP_ROM_SIZE) +#if CONFIG(LP_ROM_SIZE) if (CONFIG_LP_ROM_SIZE != romsize) printk(BIOS_INFO, "Warning: rom size unmatch (%d/%d)\n", CONFIG_LP_ROM_SIZE, romsize); diff --git a/payloads/libpayload/arch/x86/sysinfo.c b/payloads/libpayload/arch/x86/sysinfo.c index ddd6550..4494f0b 100644 --- a/payloads/libpayload/arch/x86/sysinfo.c +++ b/payloads/libpayload/arch/x86/sysinfo.c @@ -40,7 +40,7 @@ */ struct sysinfo_t lib_sysinfo = { .cpu_khz = CPU_KHZ_DEFAULT, -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) .ser_ioport = CONFIG_LP_SERIAL_IOBASE, #else .ser_ioport = 0x3f8, @@ -51,7 +51,7 @@ { int ret; -#if IS_ENABLED(CONFIG_LP_MULTIBOOT) +#if CONFIG(LP_MULTIBOOT) /* Get the information from the multiboot tables, * if they exist */ get_multiboot_info(&lib_sysinfo); diff --git a/payloads/libpayload/crypto/sha1.c b/payloads/libpayload/crypto/sha1.c index 721d1a4..fc4a4f3 100644 --- a/payloads/libpayload/crypto/sha1.c +++ b/payloads/libpayload/crypto/sha1.c @@ -30,7 +30,7 @@ /* Moved from libpayload.h */ -#if IS_ENABLED(CONFIG_LP_LITTLE_ENDIAN) +#if CONFIG(LP_LITTLE_ENDIAN) #define BYTE_ORDER LITTLE_ENDIAN #else #define BYTE_ORDER BIG_ENDIAN diff --git a/payloads/libpayload/curses/keyboard.c b/payloads/libpayload/curses/keyboard.c index f571d56..fe9dc34 100644 --- a/payloads/libpayload/curses/keyboard.c +++ b/payloads/libpayload/curses/keyboard.c @@ -45,7 +45,7 @@ /* ============== Serial ==================== */ -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) /* We treat serial like a vt100 terminal. For now we do the cooking in here, but we should probably eventually pass it to dedicated vt100 code */ @@ -146,13 +146,13 @@ static int curses_getchar(int _delay) { -#if IS_ENABLED(CONFIG_LP_USB_HID) || IS_ENABLED(CONFIG_LP_PC_KEYBOARD) || \ - IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_USB_HID) || CONFIG(LP_PC_KEYBOARD) || \ + CONFIG(LP_SERIAL_CONSOLE) unsigned short c; #endif do { -#if IS_ENABLED(CONFIG_LP_USB_HID) +#if CONFIG(LP_USB_HID) usb_poll(); if ((curses_flags & F_ENABLE_CONSOLE) && usbhid_havechar()) { @@ -160,7 +160,7 @@ if (c != 0) return c; } #endif -#if IS_ENABLED(CONFIG_LP_PC_KEYBOARD) +#if CONFIG(LP_PC_KEYBOARD) if ((curses_flags & F_ENABLE_CONSOLE) && keyboard_havechar()) { c = keyboard_getchar(); @@ -168,7 +168,7 @@ } #endif -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) if ((curses_flags & F_ENABLE_SERIAL) && serial_havechar()) { c = serial_getchar(); @@ -226,7 +226,7 @@ return 0; } -#if IS_ENABLED(CONFIG_LP_VGA_VIDEO_CONSOLE) +#if CONFIG(LP_VGA_VIDEO_CONSOLE) void curses_enable_vga(int state) { if (state) @@ -244,7 +244,7 @@ int curses_vga_enabled(void) { return 0; } #endif -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) void curses_enable_serial(int state) { if (state) diff --git a/payloads/libpayload/curses/local.h b/payloads/libpayload/curses/local.h index 660f5db..274c389 100644 --- a/payloads/libpayload/curses/local.h +++ b/payloads/libpayload/curses/local.h @@ -70,13 +70,13 @@ /* Flags used to determine what output methods are available */ -#if IS_ENABLED(CONFIG_LP_VIDEO_CONSOLE) +#if CONFIG(LP_VIDEO_CONSOLE) #define F_ENABLE_CONSOLE 0x01 #else #define F_ENABLE_CONSOLE 0x00 #endif -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) #define F_ENABLE_SERIAL 0x02 #else #define F_ENABLE_SERIAL 0x00 diff --git a/payloads/libpayload/curses/pdcurses-backend/pdcdisp.c b/payloads/libpayload/curses/pdcurses-backend/pdcdisp.c index af1b50a..234d62a 100644 --- a/payloads/libpayload/curses/pdcurses-backend/pdcdisp.c +++ b/payloads/libpayload/curses/pdcurses-backend/pdcdisp.c @@ -66,8 +66,8 @@ '|', '<', '>', '*', '!', 'f', 'o', ' ', }; -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) -#if IS_ENABLED(CONFIG_LP_SERIAL_ACS_FALLBACK) +#if CONFIG(LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_ACS_FALLBACK) chtype serial_acs_map[128]; #else /* See acsc of vt100. */ @@ -93,7 +93,7 @@ #endif #endif -#if IS_ENABLED(CONFIG_LP_VIDEO_CONSOLE) +#if CONFIG(LP_VIDEO_CONSOLE) /* See acsc of linux. */ chtype console_acs_map[128] = { @@ -122,10 +122,10 @@ { PDC_LOG(("PDC_gotoyx() - called: row %d col %d\n", row, col)); -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) serial_set_cursor(col, row); #endif -#if IS_ENABLED(CONFIG_LP_VIDEO_CONSOLE) +#if CONFIG(LP_VIDEO_CONSOLE) video_console_set_cursor(col, row); #endif } @@ -139,7 +139,7 @@ PDC_LOG(("PDC_transform_line() - called: line %d, len %d, curses_flags %d\n", lineno, len, curses_flags)); -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) int serial_is_bold = 0; int serial_is_reverse = 0; int serial_is_altcharset = 0; @@ -157,7 +157,7 @@ { ch = srcp[j]; attr = ch; -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) if (curses_flags & F_ENABLE_SERIAL) { if (attr & A_BOLD) { if (!serial_is_bold) { @@ -222,7 +222,7 @@ } #endif -#if IS_ENABLED(CONFIG_LP_VIDEO_CONSOLE) +#if CONFIG(LP_VIDEO_CONSOLE) unsigned char c = pdc_atrtab[srcp[j] >> PDC_ATTR_SHIFT]; if (curses_flags & F_ENABLE_CONSOLE) { diff --git a/payloads/libpayload/curses/pdcurses-backend/pdckbd.c b/payloads/libpayload/curses/pdcurses-backend/pdckbd.c index 6b5b7ea..2d8a55b 100644 --- a/payloads/libpayload/curses/pdcurses-backend/pdckbd.c +++ b/payloads/libpayload/curses/pdcurses-backend/pdckbd.c @@ -5,7 +5,7 @@ unsigned long pdc_key_modifiers = 0L; -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) /* We treat serial like a vt100 terminal. For now we do the cooking in here, but we should probably eventually pass it to dedicated vt100 code */ @@ -108,7 +108,7 @@ bool PDC_check_key(void) { -#if IS_ENABLED(CONFIG_LP_USB_HID) +#if CONFIG(LP_USB_HID) usb_poll(); if ((curses_flags & F_ENABLE_CONSOLE) && usbhid_havechar()) { @@ -116,14 +116,14 @@ } #endif -#if IS_ENABLED(CONFIG_LP_PC_KEYBOARD) +#if CONFIG(LP_PC_KEYBOARD) if ((curses_flags & F_ENABLE_CONSOLE) && keyboard_havechar()) { return TRUE; } #endif -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) if ((curses_flags & F_ENABLE_SERIAL) && serial_havechar()) { return TRUE; @@ -139,7 +139,7 @@ { int c = 0; -#if IS_ENABLED(CONFIG_LP_USB_HID) +#if CONFIG(LP_USB_HID) usb_poll(); if ((curses_flags & F_ENABLE_CONSOLE) && usbhid_havechar()) { @@ -147,14 +147,14 @@ } #endif -#if IS_ENABLED(CONFIG_LP_PC_KEYBOARD) +#if CONFIG(LP_PC_KEYBOARD) if ((curses_flags & F_ENABLE_CONSOLE) && keyboard_havechar() && (c == 0)) { c = keyboard_getchar(); } #endif -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) if ((curses_flags & F_ENABLE_SERIAL) && serial_havechar() && (c == 0)) { c = cook_serial(serial_getchar()); diff --git a/payloads/libpayload/curses/pdcurses-backend/pdcscrn.c b/payloads/libpayload/curses/pdcurses-backend/pdcscrn.c index e33edc2..6286b7f 100644 --- a/payloads/libpayload/curses/pdcurses-backend/pdcscrn.c +++ b/payloads/libpayload/curses/pdcurses-backend/pdcscrn.c @@ -72,7 +72,7 @@ SP->lines = PDC_get_rows(); SP->cols = PDC_get_columns(); -#if IS_ENABLED(CONFIG_LP_SPEAKER) +#if CONFIG(LP_SPEAKER) SP->audible = TRUE; #endif diff --git a/payloads/libpayload/curses/pdcurses-backend/pdcsetsc.c b/payloads/libpayload/curses/pdcurses-backend/pdcsetsc.c index ba230c6..adcf069 100644 --- a/payloads/libpayload/curses/pdcurses-backend/pdcsetsc.c +++ b/payloads/libpayload/curses/pdcurses-backend/pdcsetsc.c @@ -13,12 +13,12 @@ ret_vis = SP->visibility; SP->visibility = visibility; -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) if (curses_flags & F_ENABLE_SERIAL) { serial_cursor_enable(visibility); } #endif -#if IS_ENABLED(CONFIG_LP_VIDEO_CONSOLE) +#if CONFIG(LP_VIDEO_CONSOLE) if (curses_flags & F_ENABLE_CONSOLE) { video_console_cursor_enable(visibility); } diff --git a/payloads/libpayload/curses/pdcurses-backend/pdcutil.c b/payloads/libpayload/curses/pdcurses-backend/pdcutil.c index d423f0c..f3f131f 100644 --- a/payloads/libpayload/curses/pdcurses-backend/pdcutil.c +++ b/payloads/libpayload/curses/pdcurses-backend/pdcutil.c @@ -11,7 +11,7 @@ { PDC_LOG(("PDC_beep() - called\n")); -#if IS_ENABLED(CONFIG_LP_SPEAKER) +#if CONFIG(LP_SPEAKER) speaker_tone(1760, 500); /* 1760 == note A6 */ #endif } diff --git a/payloads/libpayload/curses/tinycurses.c b/payloads/libpayload/curses/tinycurses.c index 789accb..c50f10b 100644 --- a/payloads/libpayload/curses/tinycurses.c +++ b/payloads/libpayload/curses/tinycurses.c @@ -111,8 +111,8 @@ '|', '<', '>', '*', '!', 'f', 'o', ' ', }; -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) -#if IS_ENABLED(CONFIG_LP_SERIAL_ACS_FALLBACK) +#if CONFIG(LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_ACS_FALLBACK) chtype serial_acs_map[128]; #else /* See acsc of vt100. */ @@ -138,7 +138,7 @@ #endif #endif -#if IS_ENABLED(CONFIG_LP_VIDEO_CONSOLE) +#if CONFIG(LP_VIDEO_CONSOLE) /* See acsc of linux. */ chtype console_acs_map[128] = { @@ -191,7 +191,7 @@ int beep(void) { /* TODO: Flash the screen if beeping fails? */ -#if IS_ENABLED(CONFIG_LP_SPEAKER) +#if CONFIG(LP_SPEAKER) speaker_tone(1760, 500); /* 1760 == note A6 */ #endif return OK; @@ -202,12 +202,12 @@ // int color_content(short color, short *r, short *g, short *b) {} int curs_set(int on) { -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) if (curses_flags & F_ENABLE_SERIAL) { serial_cursor_enable(on); } #endif -#if IS_ENABLED(CONFIG_LP_VIDEO_CONSOLE) +#if CONFIG(LP_VIDEO_CONSOLE) if (curses_flags & F_ENABLE_CONSOLE) { video_console_cursor_enable(on); } @@ -315,12 +315,12 @@ for (i = 0; i < 128; i++) acs_map[i] = (chtype) i | A_ALTCHARSET; -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) if (curses_flags & F_ENABLE_SERIAL) { serial_clear(); } #endif -#if IS_ENABLED(CONFIG_LP_VIDEO_CONSOLE) +#if CONFIG(LP_VIDEO_CONSOLE) if (curses_flags & F_ENABLE_CONSOLE) { /* Clear the screen and kill the cursor */ @@ -724,7 +724,7 @@ (((c) & 0x4400) >> 2) | ((c) & 0xAA00) | (((c) & 0x1100) << 2) int wnoutrefresh(WINDOW *win) { -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) // FIXME. int serial_is_bold = 0; int serial_is_reverse = 0; @@ -737,7 +737,7 @@ int x, y; chtype ch; -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) serial_end_bold(); serial_end_altcharset(); #endif @@ -749,7 +749,7 @@ /* Position the serial cursor */ -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) if (curses_flags & F_ENABLE_SERIAL) serial_set_cursor(win->_begy + y, win->_begx + win->_line[y].firstchar); @@ -758,7 +758,7 @@ for (x = win->_line[y].firstchar; x <= win->_line[y].lastchar; x++) { attr_t attr = win->_line[y].text[x].attr; -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) if (curses_flags & F_ENABLE_SERIAL) { ch = win->_line[y].text[x].chars[0]; @@ -824,7 +824,7 @@ } #endif -#if IS_ENABLED(CONFIG_LP_VIDEO_CONSOLE) +#if CONFIG(LP_VIDEO_CONSOLE) unsigned int c = ((int)color_pairs[PAIR_NUMBER(attr)]) << 8; @@ -865,12 +865,12 @@ win->_line[y].lastchar = _NOCHANGE; } -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) if (curses_flags & F_ENABLE_SERIAL) serial_set_cursor(win->_begy + win->_cury, win->_begx + win->_curx); #endif -#if IS_ENABLED(CONFIG_LP_VIDEO_CONSOLE) +#if CONFIG(LP_VIDEO_CONSOLE) if (curses_flags & F_ENABLE_CONSOLE) video_console_set_cursor(win->_begx + win->_curx, win->_begy + win->_cury); #endif diff --git a/payloads/libpayload/drivers/i8042/i8042.c b/payloads/libpayload/drivers/i8042/i8042.c index 4cdd0be..e97fab8 100644 --- a/payloads/libpayload/drivers/i8042/i8042.c +++ b/payloads/libpayload/drivers/i8042/i8042.c @@ -229,7 +229,7 @@ } /* Test secondary port */ - if (IS_ENABLED(CONFIG_LP_PC_MOUSE)) { + if (CONFIG(LP_PC_MOUSE)) { if (i8042_cmd_with_response(I8042_CMD_AUX_TEST) == 0) aux_fifo = fifo_init(4 * 32); } diff --git a/payloads/libpayload/drivers/i8042/keyboard.c b/payloads/libpayload/drivers/i8042/keyboard.c index a0d5b63..be22497 100644 --- a/payloads/libpayload/drivers/i8042/keyboard.c +++ b/payloads/libpayload/drivers/i8042/keyboard.c @@ -45,7 +45,7 @@ static int modifier = 0; static struct layout_maps keyboard_layouts[] = { -#if IS_ENABLED(CONFIG_LP_PC_KEYBOARD_LAYOUT_US) +#if CONFIG(LP_PC_KEYBOARD_LAYOUT_US) { .country = "us", .map = { { /* No modifier */ 0x00, 0x1B, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, @@ -101,7 +101,7 @@ } }}, #endif -#if IS_ENABLED(CONFIG_LP_PC_KEYBOARD_LAYOUT_DE) +#if CONFIG(LP_PC_KEYBOARD_LAYOUT_DE) { .country = "de", .map = { { /* No modifier */ 0x00, 0x1B, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, @@ -309,16 +309,16 @@ /* Set scancode set 1 */ ret = keyboard_cmd(I8042_KBCMD_SET_SCANCODE); - if (!ret && !IS_ENABLED(CONFIG_LP_PC_KEYBOARD_IGNORE_INIT_FAILURE)) + if (!ret && !CONFIG(LP_PC_KEYBOARD_IGNORE_INIT_FAILURE)) return; ret = keyboard_cmd(I8042_SCANCODE_SET_1); - if (!ret && !IS_ENABLED(CONFIG_LP_PC_KEYBOARD_IGNORE_INIT_FAILURE)) + if (!ret && !CONFIG(LP_PC_KEYBOARD_IGNORE_INIT_FAILURE)) return; /* Enable scanning */ ret = keyboard_cmd(I8042_KBCMD_EN); - if (!ret && !IS_ENABLED(CONFIG_LP_PC_KEYBOARD_IGNORE_INIT_FAILURE)) + if (!ret && !CONFIG(LP_PC_KEYBOARD_IGNORE_INIT_FAILURE)) return; console_add_input_driver(&cons); diff --git a/payloads/libpayload/drivers/mouse_cursor.c b/payloads/libpayload/drivers/mouse_cursor.c index 40c8934..7006b4d 100644 --- a/payloads/libpayload/drivers/mouse_cursor.c +++ b/payloads/libpayload/drivers/mouse_cursor.c @@ -60,7 +60,7 @@ /** Init enabled mouse cursor drivers */ void mouse_cursor_init(void) { -#if IS_ENABLED(CONFIG_LP_PC_MOUSE) +#if CONFIG(LP_PC_MOUSE) i8042_mouse_init(); #endif } diff --git a/payloads/libpayload/drivers/nvram.c b/payloads/libpayload/drivers/nvram.c index c825331..a116d1b 100644 --- a/payloads/libpayload/drivers/nvram.c +++ b/payloads/libpayload/drivers/nvram.c @@ -60,7 +60,7 @@ * doesn't try to do this on its own. */ #define RTC_PORT_STANDARD 0x70 -#if IS_ENABLED(CONFIG_LP_RTC_PORT_EXTENDED_VIA) +#if CONFIG(LP_RTC_PORT_EXTENDED_VIA) #define RTC_PORT_EXTENDED 0x74 #else #define RTC_PORT_EXTENDED 0x72 diff --git a/payloads/libpayload/drivers/serial/8250.c b/payloads/libpayload/drivers/serial/8250.c index 9327304..f503bdb 100644 --- a/payloads/libpayload/drivers/serial/8250.c +++ b/payloads/libpayload/drivers/serial/8250.c @@ -41,7 +41,7 @@ { offset *= lib_sysinfo.serial->regwidth; -#if IS_ENABLED(CONFIG_LP_IO_ADDRESS_SPACE) +#if CONFIG(LP_IO_ADDRESS_SPACE) if (!serial_is_mem_mapped) return inb(IOBASE + offset); else @@ -56,7 +56,7 @@ { offset *= lib_sysinfo.serial->regwidth; -#if IS_ENABLED(CONFIG_LP_IO_ADDRESS_SPACE) +#if CONFIG(LP_IO_ADDRESS_SPACE) if (!serial_is_mem_mapped) outb(val, IOBASE + offset); else @@ -67,13 +67,13 @@ writeb(val, MEMBASE + offset); } -#if IS_ENABLED(CONFIG_LP_SERIAL_SET_SPEED) +#if CONFIG(LP_SERIAL_SET_SPEED) static void serial_hardware_init(int speed, int word_bits, int parity, int stop_bits) { unsigned char reg; -#if !IS_ENABLED(CONFIG_LP_PL011_SERIAL_CONSOLE) +#if !CONFIG(LP_PL011_SERIAL_CONSOLE) /* Disable interrupts. */ serial_write_reg(0, 0x01); @@ -114,7 +114,7 @@ (lib_sysinfo.serial->type == CB_SERIAL_TYPE_MEMORY_MAPPED); if (!serial_is_mem_mapped) { -#if IS_ENABLED(CONFIG_LP_IO_ADDRESS_SPACE) +#if CONFIG(LP_IO_ADDRESS_SPACE) if ((inb(IOBASE + 0x05) == 0xFF) && (inb(IOBASE + 0x06) == 0xFF)) { printf("IO space mapped serial not present."); @@ -126,7 +126,7 @@ #endif } -#if IS_ENABLED(CONFIG_LP_SERIAL_SET_SPEED) +#if CONFIG(LP_SERIAL_SET_SPEED) serial_hardware_init(CONFIG_LP_SERIAL_BAUD_RATE, 8, 0, 1); #endif } @@ -147,7 +147,7 @@ { if (!serial_hardware_is_present) return; -#if !IS_ENABLED(CONFIG_LP_PL011_SERIAL_CONSOLE) +#if !CONFIG(LP_PL011_SERIAL_CONSOLE) while ((serial_read_reg(0x05) & 0x20) == 0) ; #endif serial_write_reg(c, 0x00); diff --git a/payloads/libpayload/drivers/storage/ahci.c b/payloads/libpayload/drivers/storage/ahci.c index bb0d37e..fbfcf97 100644 --- a/payloads/libpayload/drivers/storage/ahci.c +++ b/payloads/libpayload/drivers/storage/ahci.c @@ -153,7 +153,7 @@ switch (port->signature) { case HBA_PxSIG_ATA: printf("ahci: ATA drive on port #%d.\n", portnum); -#if IS_ENABLED(CONFIG_LP_STORAGE_ATA) +#if CONFIG(LP_STORAGE_ATA) dev->ata_dev.identify = ahci_identify_device; dev->ata_dev.read_sectors = ahci_ata_read_sectors; return ata_attach_device(&dev->ata_dev, PORT_TYPE_SATA); @@ -161,7 +161,7 @@ break; case HBA_PxSIG_ATAPI: printf("ahci: ATAPI drive on port #%d.\n", portnum); -#if IS_ENABLED(CONFIG_LP_STORAGE_ATAPI) +#if CONFIG(LP_STORAGE_ATAPI) dev->atapi_dev.identify = ahci_identify_device; dev->atapi_dev.packet_read_cmd = ahci_packet_read_cmd; return atapi_attach_device(&dev->atapi_dev, PORT_TYPE_SATA); @@ -218,7 +218,7 @@ ahci_dev_init(ctrl, port, portnum); } -#if IS_ENABLED(CONFIG_LP_STORAGE_AHCI_ONLY_TESTED) +#if CONFIG(LP_STORAGE_AHCI_ONLY_TESTED) static u32 working_controllers[] = { 0x8086 | 0x2929 << 16, /* Mobile ICH9 */ 0x8086 | 0x1c03 << 16, /* Mobile Cougar Point PCH */ @@ -236,7 +236,7 @@ const u16 vendor = pci_read_config16(dev, 0x00); const u16 device = pci_read_config16(dev, 0x02); -#if IS_ENABLED(CONFIG_LP_STORAGE_AHCI_ONLY_TESTED) +#if CONFIG(LP_STORAGE_AHCI_ONLY_TESTED) const u32 vendor_device = pci_read_config32(dev, 0x0); for (i = 0; i < ARRAY_SIZE(working_controllers); ++i) if (vendor_device == working_controllers[i]) diff --git a/payloads/libpayload/drivers/storage/ahci_ata.c b/payloads/libpayload/drivers/storage/ahci_ata.c index 2c916fd..94c13e0 100644 --- a/payloads/libpayload/drivers/storage/ahci_ata.c +++ b/payloads/libpayload/drivers/storage/ahci_ata.c @@ -56,7 +56,7 @@ printf("ahci: Sector count too high (max. 256).\n"); count = 256; } -#if IS_ENABLED(CONFIG_LP_STORAGE_64BIT_LBA) +#if CONFIG(LP_STORAGE_64BIT_LBA) } else if (ata_dev->read_cmd == ATA_READ_DMA_EXT) { if (start >= (1ULL << 48)) { printf("ahci: Sector is not 48-bit addressable.\n"); @@ -84,7 +84,7 @@ dev->cmdtable->fis[ 6] = (start >> 16) & 0xff; dev->cmdtable->fis[ 7] = FIS_H2D_DEV_LBA; dev->cmdtable->fis[ 8] = (start >> 24) & 0xff; -#if IS_ENABLED(CONFIG_LP_STORAGE_64BIT_LBA) +#if CONFIG(LP_STORAGE_64BIT_LBA) if (ata_dev->read_cmd == ATA_READ_DMA_EXT) { dev->cmdtable->fis[ 9] = (start >> 32) & 0xff; dev->cmdtable->fis[10] = (start >> 40) & 0xff; diff --git a/payloads/libpayload/drivers/storage/ata.c b/payloads/libpayload/drivers/storage/ata.c index 80178c3..91ddf59 100644 --- a/payloads/libpayload/drivers/storage/ata.c +++ b/payloads/libpayload/drivers/storage/ata.c @@ -212,7 +212,7 @@ ata_strncpy(model, id + 27, sizeof(model)); printf("ata: Identified %s [%s]\n", model, fw); -#if IS_ENABLED(CONFIG_LP_STORAGE_64BIT_LBA) +#if CONFIG(LP_STORAGE_64BIT_LBA) if (id[ATA_CMDS_AND_FEATURE_SETS + 1] & (1 << 10)) { printf("ata: Support for LBA-48 enabled.\n"); dev->read_cmd = ATA_READ_DMA_EXT; diff --git a/payloads/libpayload/drivers/storage/storage.c b/payloads/libpayload/drivers/storage/storage.c index c4cfd40..a7141ee 100644 --- a/payloads/libpayload/drivers/storage/storage.c +++ b/payloads/libpayload/drivers/storage/storage.c @@ -28,7 +28,7 @@ */ #include <libpayload.h> -#if IS_ENABLED(CONFIG_LP_STORAGE_AHCI) +#if CONFIG(LP_STORAGE_AHCI) # include <storage/ahci.h> #endif #include <storage/storage.h> @@ -110,7 +110,7 @@ */ void storage_initialize(void) { -#if IS_ENABLED(CONFIG_LP_STORAGE_AHCI) +#if CONFIG(LP_STORAGE_AHCI) ahci_initialize(); #endif } diff --git a/payloads/libpayload/drivers/usb/ehci.c b/payloads/libpayload/drivers/usb/ehci.c index eb59d97..30cf191 100644 --- a/payloads/libpayload/drivers/usb/ehci.c +++ b/payloads/libpayload/drivers/usb/ehci.c @@ -850,7 +850,7 @@ return controller; } -#if IS_ENABLED(CONFIG_LP_USB_PCI) +#if CONFIG(LP_USB_PCI) hci_t * ehci_pci_init (pcidev_t addr) { diff --git a/payloads/libpayload/drivers/usb/ehci_rh.c b/payloads/libpayload/drivers/usb/ehci_rh.c index da8d8af..d3fc979 100644 --- a/payloads/libpayload/drivers/usb/ehci_rh.c +++ b/payloads/libpayload/drivers/usb/ehci_rh.c @@ -102,7 +102,7 @@ /* device connected, handle */ if (RH_INST(dev)->ports[port] & P_CURR_CONN_STATUS) { mdelay(100); // usb20 spec 9.1.2 - if (!IS_ENABLED(CONFIG_LP_USB_EHCI_HOSTPC_ROOT_HUB_TT) && + if (!CONFIG(LP_USB_EHCI_HOSTPC_ROOT_HUB_TT) && (RH_INST(dev)->ports[port] & P_LINE_STATUS) == P_LINE_STATUS_LOWSPEED) { ehci_rh_hand_over_port(dev, port); @@ -138,7 +138,7 @@ ehci_rh_hand_over_port(dev, port); return; } - if (IS_ENABLED(CONFIG_LP_USB_EHCI_HOSTPC_ROOT_HUB_TT)) { + if (CONFIG(LP_USB_EHCI_HOSTPC_ROOT_HUB_TT)) { port_speed = (usb_speed) ((EHCI_INST(dev->controller)->operation->hostpc >> 25) & 0x03); diff --git a/payloads/libpayload/drivers/usb/ohci.c b/payloads/libpayload/drivers/usb/ohci.c index dcf7169..1964689 100644 --- a/payloads/libpayload/drivers/usb/ohci.c +++ b/payloads/libpayload/drivers/usb/ohci.c @@ -247,7 +247,7 @@ return controller; } -#if IS_ENABLED(CONFIG_LP_USB_PCI) +#if CONFIG(LP_USB_PCI) hci_t * ohci_pci_init (pcidev_t addr) { diff --git a/payloads/libpayload/drivers/usb/usb.c b/payloads/libpayload/drivers/usb/usb.c index 62604a2..9c9854d 100644 --- a/payloads/libpayload/drivers/usb/usb.c +++ b/payloads/libpayload/drivers/usb/usb.c @@ -563,7 +563,7 @@ break; case hid_device: usb_debug ("HID\n"); -#if IS_ENABLED(CONFIG_LP_USB_HID) +#if CONFIG(LP_USB_HID) dev->init = usb_hid_init; return dev->address; #else @@ -581,7 +581,7 @@ break; case msc_device: usb_debug ("MSC\n"); -#if IS_ENABLED(CONFIG_LP_USB_MSC) +#if CONFIG(LP_USB_MSC) dev->init = usb_msc_init; return dev->address; #else @@ -590,7 +590,7 @@ break; case hub_device: usb_debug ("hub\n"); -#if IS_ENABLED(CONFIG_LP_USB_HUB) +#if CONFIG(LP_USB_HUB) dev->init = usb_hub_init; return dev->address; #else diff --git a/payloads/libpayload/drivers/usb/usbhid.c b/payloads/libpayload/drivers/usb/usbhid.c index 22ed8e7..072530c 100644 --- a/payloads/libpayload/drivers/usb/usbhid.c +++ b/payloads/libpayload/drivers/usb/usbhid.c @@ -142,7 +142,7 @@ static const struct layout_maps *map; static const struct layout_maps keyboard_layouts[] = { -// #if IS_ENABLED(CONFIG_LP_PC_KEYBOARD_LAYOUT_US) +// #if CONFIG(LP_PC_KEYBOARD_LAYOUT_US) { .country = "us", .map = { { /* No modifier */ -1, -1, -1, -1, 'a', 'b', 'c', 'd', diff --git a/payloads/libpayload/drivers/usb/usbinit.c b/payloads/libpayload/drivers/usb/usbinit.c index 721fde8..0ac27e4 100644 --- a/payloads/libpayload/drivers/usb/usbinit.c +++ b/payloads/libpayload/drivers/usb/usbinit.c @@ -37,7 +37,7 @@ #include "dwc2.h" #include <usb/usbdisk.h> -#if IS_ENABLED(CONFIG_LP_USB_PCI) +#if CONFIG(LP_USB_PCI) /** * Initializes USB controller attached to PCI * @@ -72,7 +72,7 @@ pciid >> 16, pciid & 0xFFFF, func); switch (prog_if) { case 0x00: -#if IS_ENABLED(CONFIG_LP_USB_UHCI) +#if CONFIG(LP_USB_UHCI) usb_debug("UHCI controller\n"); uhci_pci_init (pci_device); #else @@ -81,7 +81,7 @@ break; case 0x10: -#if IS_ENABLED(CONFIG_LP_USB_OHCI) +#if CONFIG(LP_USB_OHCI) usb_debug("OHCI controller\n"); ohci_pci_init(pci_device); #else @@ -90,7 +90,7 @@ break; case 0x20: -#if IS_ENABLED(CONFIG_LP_USB_EHCI) +#if CONFIG(LP_USB_EHCI) usb_debug("EHCI controller\n"); ehci_pci_init(pci_device); #else @@ -99,7 +99,7 @@ break; case 0x30: -#if IS_ENABLED(CONFIG_LP_USB_XHCI) +#if CONFIG(LP_USB_XHCI) usb_debug("xHCI controller\n"); xhci_pci_init(pci_device); #else @@ -166,7 +166,7 @@ */ int usb_initialize(void) { -#if IS_ENABLED(CONFIG_LP_USB_PCI) +#if CONFIG(LP_USB_PCI) usb_scan_pci_bus(0); #endif return 0; @@ -175,19 +175,19 @@ hci_t *usb_add_mmio_hc(hc_type type, void *bar) { switch (type) { -#if IS_ENABLED(CONFIG_LP_USB_OHCI) +#if CONFIG(LP_USB_OHCI) case OHCI: return ohci_init((unsigned long)bar); #endif -#if IS_ENABLED(CONFIG_LP_USB_EHCI) +#if CONFIG(LP_USB_EHCI) case EHCI: return ehci_init((unsigned long)bar); #endif -#if IS_ENABLED(CONFIG_LP_USB_DWC2) +#if CONFIG(LP_USB_DWC2) case DWC2: return dwc2_init(bar); #endif -#if IS_ENABLED(CONFIG_LP_USB_XHCI) +#if CONFIG(LP_USB_XHCI) case XHCI: return xhci_init((unsigned long)bar); #endif diff --git a/payloads/libpayload/drivers/usb/xhci.c b/payloads/libpayload/drivers/usb/xhci.c index 3f1064a..0a69c51 100644 --- a/payloads/libpayload/drivers/usb/xhci.c +++ b/payloads/libpayload/drivers/usb/xhci.c @@ -88,7 +88,7 @@ } /* On Panther Point: switch ports shared with EHCI to xHCI */ -#if IS_ENABLED(CONFIG_LP_USB_PCI) +#if CONFIG(LP_USB_PCI) static void xhci_switch_ppt_ports(pcidev_t addr) { @@ -112,7 +112,7 @@ } #endif -#if IS_ENABLED(CONFIG_LP_USB_PCI) +#if CONFIG(LP_USB_PCI) /* On Panther Point: switch all ports back to EHCI */ static void xhci_switchback_ppt_ports(pcidev_t addr) @@ -297,7 +297,7 @@ return NULL; } -#if IS_ENABLED(CONFIG_LP_USB_PCI) +#if CONFIG(LP_USB_PCI) hci_t * xhci_pci_init (pcidev_t addr) { @@ -336,7 +336,7 @@ * Without this delay, the subsequent HC register access, * may result in a system hang very rarely. */ - if (IS_ENABLED(CONFIG_LP_ARCH_X86)) + if (CONFIG(LP_ARCH_X86)) mdelay(1); xhci_debug("Resetting controller... "); @@ -426,7 +426,7 @@ xhci_t *const xhci = XHCI_INST(controller); xhci_stop(controller); -#if IS_ENABLED(CONFIG_LP_USB_PCI) +#if CONFIG(LP_USB_PCI) if (controller->pcidev) xhci_switchback_ppt_ports(controller->pcidev); #endif @@ -563,7 +563,7 @@ cur_length = length; packets = 0; length = 0; - } else if (!IS_ENABLED(CONFIG_LP_USB_XHCI_MTK_QUIRK)) { + } else if (!CONFIG(LP_USB_XHCI_MTK_QUIRK)) { packets -= (residue + cur_length) / mps; residue = (residue + cur_length) % mps; length -= cur_length; @@ -576,7 +576,7 @@ TRB_SET(TDS, trb, MIN(TRB_MAX_TD_SIZE, packets)); TRB_SET(CH, trb, 1); - if (length && IS_ENABLED(CONFIG_LP_USB_XHCI_MTK_QUIRK)) { + if (length && CONFIG(LP_USB_XHCI_MTK_QUIRK)) { /* * For MTK's xHCI controller, TDS defines a number of * packets that remain to be transferred for a TD after diff --git a/payloads/libpayload/drivers/usb/xhci_devconf.c b/payloads/libpayload/drivers/usb/xhci_devconf.c index b697b0f..99e3037 100644 --- a/payloads/libpayload/drivers/usb/xhci_devconf.c +++ b/payloads/libpayload/drivers/usb/xhci_devconf.c @@ -353,7 +353,7 @@ EC_SET(AVRTRB, epctx, avrtrb); EC_SET(MXESIT, epctx, EC_GET(MPS, epctx) * EC_GET(MBS, epctx)); - if (IS_ENABLED(CONFIG_LP_USB_XHCI_MTK_QUIRK)) { + if (CONFIG(LP_USB_XHCI_MTK_QUIRK)) { /* The MTK xHCI defines some extra SW parameters which are * put into reserved DWs in Slot and Endpoint Contexts for * synchronous endpoints. But for non-isochronous transfers, diff --git a/payloads/libpayload/drivers/usb/xhci_rh.c b/payloads/libpayload/drivers/usb/xhci_rh.c index ddf6ce8..453fa5b 100644 --- a/payloads/libpayload/drivers/usb/xhci_rh.c +++ b/payloads/libpayload/drivers/usb/xhci_rh.c @@ -122,7 +122,7 @@ static int xhci_rh_enable_port(usbdev_t *const dev, int port) { - if (IS_ENABLED(CONFIG_LP_USB_XHCI_MTK_QUIRK)) { + if (CONFIG(LP_USB_XHCI_MTK_QUIRK)) { xhci_t *const xhci = XHCI_INST(dev->controller); volatile u32 *const portsc = &xhci->opreg->prs[port - 1].portsc; diff --git a/payloads/libpayload/drivers/video/video.c b/payloads/libpayload/drivers/video/video.c index b932a63..9ab7ba2 100644 --- a/payloads/libpayload/drivers/video/video.c +++ b/payloads/libpayload/drivers/video/video.c @@ -31,27 +31,27 @@ #include <libpayload.h> #include <video_console.h> -#if IS_ENABLED(CONFIG_LP_GEODELX_VIDEO_CONSOLE) +#if CONFIG(LP_GEODELX_VIDEO_CONSOLE) extern struct video_console geodelx_video_console; #endif -#if IS_ENABLED(CONFIG_LP_COREBOOT_VIDEO_CONSOLE) +#if CONFIG(LP_COREBOOT_VIDEO_CONSOLE) extern struct video_console coreboot_video_console; #endif -#if IS_ENABLED(CONFIG_LP_VGA_VIDEO_CONSOLE) +#if CONFIG(LP_VGA_VIDEO_CONSOLE) extern struct video_console vga_video_console; #endif static struct video_console *console_list[] = { -#if IS_ENABLED(CONFIG_LP_GEODELX_VIDEO_CONSOLE) +#if CONFIG(LP_GEODELX_VIDEO_CONSOLE) &geodelx_video_console, #endif -#if IS_ENABLED(CONFIG_LP_COREBOOT_VIDEO_CONSOLE) +#if CONFIG(LP_COREBOOT_VIDEO_CONSOLE) &coreboot_video_console, #endif -#if IS_ENABLED(CONFIG_LP_VGA_VIDEO_CONSOLE) +#if CONFIG(LP_VGA_VIDEO_CONSOLE) &vga_video_console, #endif }; diff --git a/payloads/libpayload/include/endian.h b/payloads/libpayload/include/endian.h index 2dcfa1f..b387e66 100644 --- a/payloads/libpayload/include/endian.h +++ b/payloads/libpayload/include/endian.h @@ -53,7 +53,7 @@ /* Endian functions from glibc 2.9 / BSD "endian.h" */ -#if IS_ENABLED(CONFIG_LP_BIG_ENDIAN) +#if CONFIG(LP_BIG_ENDIAN) #define htobe16(in) (in) #define htobe32(in) (in) @@ -63,7 +63,7 @@ #define htole32(in) swap_bytes32(in) #define htole64(in) swap_bytes64(in) -#elif IS_ENABLED(CONFIG_LP_LITTLE_ENDIAN) +#elif CONFIG(LP_LITTLE_ENDIAN) #define htobe16(in) swap_bytes16(in) #define htobe32(in) swap_bytes32(in) diff --git a/payloads/libpayload/include/stdlib.h b/payloads/libpayload/include/stdlib.h index a2e612d..aaacc87 100644 --- a/payloads/libpayload/include/stdlib.h +++ b/payloads/libpayload/include/stdlib.h @@ -45,7 +45,7 @@ * @defgroup malloc Memory allocation functions * @{ */ -#if IS_ENABLED(CONFIG_LP_DEBUG_MALLOC) && !defined(IN_MALLOC_C) +#if CONFIG(LP_DEBUG_MALLOC) && !defined(IN_MALLOC_C) #define free(p) \ ({ \ extern void print_malloc_map(void); \ @@ -222,7 +222,7 @@ void halt(void) __attribute__((noreturn)); void exit(int status) __attribute__((noreturn)); #define abort() halt() /**< Alias for the halt() function */ -#if IS_ENABLED(CONFIG_LP_REMOTEGDB) +#if CONFIG(LP_REMOTEGDB) /* Override abort()/halt() to trap into GDB if it is enabled. */ #define halt() do { gdb_enter(); halt(); } while (0) #endif diff --git a/payloads/libpayload/include/storage/storage.h b/payloads/libpayload/include/storage/storage.h index f2e6f29..2dc70b0 100644 --- a/payloads/libpayload/include/storage/storage.h +++ b/payloads/libpayload/include/storage/storage.h @@ -34,7 +34,7 @@ #include <unistd.h> -#if !IS_ENABLED(CONFIG_LP_STORAGE_64BIT_LBA) +#if !CONFIG(LP_STORAGE_64BIT_LBA) typedef u32 lba_t; #else typedef u64 lba_t; diff --git a/payloads/libpayload/include/sysinfo.h b/payloads/libpayload/include/sysinfo.h index bd64cdb..845b7c4 100644 --- a/payloads/libpayload/include/sysinfo.h +++ b/payloads/libpayload/include/sysinfo.h @@ -98,7 +98,7 @@ void *vboot_handoff; u32 vboot_handoff_size; -#if IS_ENABLED(CONFIG_LP_ARCH_X86) +#if CONFIG(LP_ARCH_X86) int x86_rom_var_mtrr_index; #endif diff --git a/payloads/libpayload/libc/64bit_div.c b/payloads/libpayload/libc/64bit_div.c index 877cef2..5cd5bc5 100644 --- a/payloads/libpayload/libc/64bit_div.c +++ b/payloads/libpayload/libc/64bit_div.c @@ -30,7 +30,7 @@ #include <libpayload-config.h> #include <stdlib.h> -#if !IS_ENABLED(CONFIG_LP_LITTLE_ENDIAN) +#if !CONFIG(LP_LITTLE_ENDIAN) #error this code is for little endian only #endif diff --git a/payloads/libpayload/libc/console.c b/payloads/libpayload/libc/console.c index b57fc47..8d7d62d 100644 --- a/payloads/libpayload/libc/console.c +++ b/payloads/libpayload/libc/console.c @@ -102,16 +102,16 @@ void console_init(void) { -#if IS_ENABLED(CONFIG_LP_VIDEO_CONSOLE) +#if CONFIG(LP_VIDEO_CONSOLE) video_console_init(); #endif -#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE) +#if CONFIG(LP_SERIAL_CONSOLE) serial_console_init(); #endif -#if IS_ENABLED(CONFIG_LP_PC_KEYBOARD) +#if CONFIG(LP_PC_KEYBOARD) keyboard_init(); #endif -#if IS_ENABLED(CONFIG_LP_CBMEM_CONSOLE) +#if CONFIG(LP_CBMEM_CONSOLE) cbmem_console_init(); #endif } @@ -147,7 +147,7 @@ int havekey(void) { -#if IS_ENABLED(CONFIG_LP_USB) +#if CONFIG(LP_USB) usb_poll(); #endif struct console_input_driver *in; @@ -164,7 +164,7 @@ int getchar(void) { while (1) { -#if IS_ENABLED(CONFIG_LP_USB) +#if CONFIG(LP_USB) usb_poll(); #endif struct console_input_driver *in; diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c index 2189161..ba5bb27 100644 --- a/payloads/libpayload/libc/coreboot.c +++ b/payloads/libpayload/libc/coreboot.c @@ -56,7 +56,7 @@ for (i = 0; i < count; i++) { struct cb_memory_range *range = MEM_RANGE_PTR(mem, i); -#if IS_ENABLED(CONFIG_LP_MEMMAP_RAM_ONLY) +#if CONFIG(LP_MEMMAP_RAM_ONLY) if (range->type != CB_MEM_RAM) continue; #endif @@ -155,7 +155,7 @@ info->sku_id = sku_id->id_code; } -#if IS_ENABLED(CONFIG_LP_NVRAM) +#if CONFIG(LP_NVRAM) static void cb_parse_optiontable(void *ptr, struct sysinfo_t *info) { /* ptr points to a coreboot table entry and is already virtual */ @@ -171,7 +171,7 @@ } #endif -#if IS_ENABLED(CONFIG_LP_COREBOOT_VIDEO_CONSOLE) +#if CONFIG(LP_COREBOOT_VIDEO_CONSOLE) static void cb_parse_framebuffer(void *ptr, struct sysinfo_t *info) { /* ptr points to a coreboot table entry and is already virtual */ @@ -232,7 +232,7 @@ info->chromeos_vpd = phys_to_virt(cbmem->cbmem_tab); } -#if IS_ENABLED(CONFIG_LP_TIMER_RDTSC) +#if CONFIG(LP_TIMER_RDTSC) static void cb_parse_tsc_info(void *ptr, struct sysinfo_t *info) { const struct cb_tsc_info *tsc_info = ptr; @@ -328,7 +328,7 @@ case CB_TAG_ASSEMBLER: cb_parse_string(ptr, &info->assembler); break; -#if IS_ENABLED(CONFIG_LP_NVRAM) +#if CONFIG(LP_NVRAM) case CB_TAG_CMOS_OPTION_TABLE: cb_parse_optiontable(ptr, info); break; @@ -336,7 +336,7 @@ cb_parse_checksum(ptr, info); break; #endif -#if IS_ENABLED(CONFIG_LP_COREBOOT_VIDEO_CONSOLE) +#if CONFIG(LP_COREBOOT_VIDEO_CONSOLE) // FIXME we should warn on serial if coreboot set up a // framebuffer buf the payload does not know about it. case CB_TAG_FRAMEBUFFER: @@ -394,7 +394,7 @@ case CB_TAG_BOOT_MEDIA_PARAMS: cb_parse_boot_media_params(ptr, info); break; -#if IS_ENABLED(CONFIG_LP_TIMER_RDTSC) +#if CONFIG(LP_TIMER_RDTSC) case CB_TAG_TSC_INFO: cb_parse_tsc_info(ptr, info); break; diff --git a/payloads/libpayload/libc/exec.c b/payloads/libpayload/libc/exec.c index d48d213..533600d 100644 --- a/payloads/libpayload/libc/exec.c +++ b/payloads/libpayload/libc/exec.c @@ -30,7 +30,7 @@ #include <libpayload-config.h> #include <libpayload.h> -#if IS_ENABLED(CONFIG_LP_ARCH_X86) +#if CONFIG(LP_ARCH_X86) extern void i386_do_exec(long addr, int argc, char **argv, int *ret); #endif @@ -46,7 +46,7 @@ { int val = -1; -#if IS_ENABLED(CONFIG_LP_ARCH_X86) +#if CONFIG(LP_ARCH_X86) i386_do_exec(addr, argc, argv, &val); #endif return val; diff --git a/payloads/libpayload/libc/malloc.c b/payloads/libpayload/libc/malloc.c index 595af63..957f0e0 100644 --- a/payloads/libpayload/libc/malloc.c +++ b/payloads/libpayload/libc/malloc.c @@ -47,7 +47,7 @@ void *start; void *end; struct align_region_t* align_regions; -#if IS_ENABLED(CONFIG_LP_DEBUG_MALLOC) +#if CONFIG(LP_DEBUG_MALLOC) int magic_initialized; size_t minimal_free; const char *name; @@ -58,7 +58,7 @@ static struct memory_type default_type = { (void *)&_heap, (void *)&_eheap, NULL -#if IS_ENABLED(CONFIG_LP_DEBUG_MALLOC) +#if CONFIG(LP_DEBUG_MALLOC) , 0, 0, "HEAP" #endif }; @@ -104,7 +104,7 @@ dma->end = start + size; dma->align_regions = NULL; -#if IS_ENABLED(CONFIG_LP_DEBUG_MALLOC) +#if CONFIG(LP_DEBUG_MALLOC) dma->minimal_free = 0; dma->magic_initialized = 0; dma->name = "DMA"; @@ -139,7 +139,7 @@ if (!HAS_MAGIC(*ptr)) { size_t size = (type->end - type->start) - HDRSIZE; *ptr = FREE_BLOCK(size); -#if IS_ENABLED(CONFIG_LP_DEBUG_MALLOC) +#if CONFIG(LP_DEBUG_MALLOC) type->magic_initialized = 1; type->minimal_free = size; #endif @@ -356,7 +356,7 @@ struct align_region_t *r; size_t extra_space; -#if IS_ENABLED(CONFIG_LP_DEBUG_MALLOC) +#if CONFIG(LP_DEBUG_MALLOC) printf("%s(old align_regions=%p, alignment=%u, num_elements=%u, size=%zu)\n", __func__, type->align_regions, alignment, num_elements, size); #endif @@ -479,7 +479,7 @@ { if ((reg->alignment == align) && (reg->free >= (size + align - 1)/align)) { -#if IS_ENABLED(CONFIG_LP_DEBUG_MALLOC) +#if CONFIG(LP_DEBUG_MALLOC) printf(" found memalign region. %x free, %x required\n", reg->free, (size + align - 1)/align); #endif break; @@ -488,12 +488,12 @@ } if (reg == 0) { -#if IS_ENABLED(CONFIG_LP_DEBUG_MALLOC) +#if CONFIG(LP_DEBUG_MALLOC) printf(" need to allocate a new memalign region\n"); #endif /* get align regions */ reg = allocate_region(align, large_request/align, size, type); -#if IS_ENABLED(CONFIG_LP_DEBUG_MALLOC) +#if CONFIG(LP_DEBUG_MALLOC) printf(" ... returned %p\n", reg); #endif } @@ -539,7 +539,7 @@ } /* This is for debugging purposes. */ -#if IS_ENABLED(CONFIG_LP_DEBUG_MALLOC) +#if CONFIG(LP_DEBUG_MALLOC) void print_malloc_map(void) { struct memory_type *type = heap; diff --git a/payloads/libpayload/libc/time.c b/payloads/libpayload/libc/time.c index f891346..7583448 100644 --- a/payloads/libpayload/libc/time.c +++ b/payloads/libpayload/libc/time.c @@ -34,7 +34,7 @@ #include <libpayload-config.h> #include <libpayload.h> -#if IS_ENABLED(CONFIG_LP_ARCH_X86) && IS_ENABLED(CONFIG_LP_NVRAM) +#if CONFIG(LP_ARCH_X86) && CONFIG(LP_NVRAM) #include <arch/rdtsc.h> #endif @@ -70,7 +70,7 @@ } } -#if IS_ENABLED(CONFIG_LP_NVRAM) +#if CONFIG(LP_NVRAM) static unsigned int day_of_year(int mon, int day, int year) { diff --git a/payloads/libpayload/libcbfs/cbfs.c b/payloads/libpayload/libcbfs/cbfs.c index d679e67..d2d13ea 100644 --- a/payloads/libpayload/libcbfs/cbfs.c +++ b/payloads/libpayload/libcbfs/cbfs.c @@ -31,11 +31,11 @@ #ifdef LIBPAYLOAD # include <libpayload-config.h> -# if IS_ENABLED(CONFIG_LP_LZMA) +# if CONFIG(LP_LZMA) # include <lzma.h> # define CBFS_CORE_WITH_LZMA # endif -# if IS_ENABLED(CONFIG_LP_LZ4) +# if CONFIG(LP_LZ4) # include <lz4.h> # define CBFS_CORE_WITH_LZ4 # endif diff --git a/payloads/libpayload/libcbfs/cbfs_core.c b/payloads/libpayload/libcbfs/cbfs_core.c index 39bbdb5..e94e1e7 100644 --- a/payloads/libpayload/libcbfs/cbfs_core.c +++ b/payloads/libpayload/libcbfs/cbfs_core.c @@ -119,7 +119,7 @@ // Logical offset (for source media) of first file. *offset = ntohl(header->offset); *cbfs_end = ntohl(header->romsize); -#if IS_ENABLED(CONFIG_LP_ARCH_X86) +#if CONFIG(LP_ARCH_X86) // resolve actual length of ROM used for CBFS components // the bootblock size was not taken into account *cbfs_end -= ntohl(header->bootblocksize); diff --git a/payloads/nvramcui/nvramcui.c b/payloads/nvramcui/nvramcui.c index 675e002..453b9aa 100644 --- a/payloads/nvramcui/nvramcui.c +++ b/payloads/nvramcui/nvramcui.c @@ -176,7 +176,7 @@ int ch, done; int i; - if (IS_ENABLED(CONFIG_LP_USB)) + if (CONFIG(LP_USB)) usb_initialize(); /* coreboot data structures */ -- To view, visit https://review.coreboot.org/c/coreboot/+/31775 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I883b03b189f59b5d998a09a2596b0391a2d5cf33 Gerrit-Change-Number: 31775 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: util/arm_boot_tools/mksunxiboot: Correct format string for longs
by Jacob Garber (Code Review) 03 Apr '19

03 Apr '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32008 Change subject: util/arm_boot_tools/mksunxiboot: Correct format string for longs ...................................................................... util/arm_boot_tools/mksunxiboot: Correct format string for longs %lx is the right format string for printing longs. Fixes Coverity CID 1229686, 1229687 Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> Change-Id: Ib7ab54dc039bdd60969c79f3c881d69fc68f0d2a --- M util/arm_boot_tools/mksunxiboot/mksunxiboot.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/32008/1 diff --git a/util/arm_boot_tools/mksunxiboot/mksunxiboot.c b/util/arm_boot_tools/mksunxiboot/mksunxiboot.c index 58765b1..493f476 100644 --- a/util/arm_boot_tools/mksunxiboot/mksunxiboot.c +++ b/util/arm_boot_tools/mksunxiboot/mksunxiboot.c @@ -156,7 +156,7 @@ return EXIT_FAILURE; } - printf("File size: 0x%x\n", file_size); + printf("File size: 0x%lx\n", file_size); if (fread(file_data, file_size, 1, fd_in) != 1) { fprintf(stderr, "Cannot read %s: %s\n", argv[1], strerror(errno)); @@ -168,7 +168,7 @@ if (load_size > SRAM_LOAD_MAX_SIZE) load_size = SRAM_LOAD_MAX_SIZE; - printf("Load size: 0x%x\n", load_size); + printf("Load size: 0x%lx\n", load_size); fd_out = fopen(argv[2], "w"); if (!fd_out) { -- To view, visit https://review.coreboot.org/c/coreboot/+/32008 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib7ab54dc039bdd60969c79f3c881d69fc68f0d2a Gerrit-Change-Number: 32008 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

3 5

Change in ...coreboot[master]: mb/google/sarien/variants/sarien: Update thermal configuration for DPTF
by John Su (Code Review) 03 Apr '19

03 Apr '19

John Su has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32118 Change subject: mb/google/sarien/variants/sarien: Update thermal configuration for DPTF ...................................................................... mb/google/sarien/variants/sarien: Update thermal configuration for DPTF Follow thermal table for second tunning. BUG=b:129509918 TEST=Built and tested on sarien system Change-Id: I64844b84891dc3ab7abe9378cdca5dcf57b3e433 Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> --- M src/mainboard/google/sarien/variants/sarien/devicetree.cb M src/mainboard/google/sarien/variants/sarien/include/variant/acpi/dptf.asl 2 files changed, 10 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/32118/1 diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index 2714b60..4544b0f 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -42,7 +42,7 @@ register "SlowSlewRateForGt" = "2" register "SlowSlewRateForSa" = "2" register "SlowSlewRateForFivr" = "2" - register "tdp_pl1_override" = "25" + register "tdp_pl1_override" = "15" register "tdp_pl2_override" = "51" register "Device4Enable" = "1" # Enable eDP device diff --git a/src/mainboard/google/sarien/variants/sarien/include/variant/acpi/dptf.asl b/src/mainboard/google/sarien/variants/sarien/include/variant/acpi/dptf.asl index be052f8..0cdbcd1 100644 --- a/src/mainboard/google/sarien/variants/sarien/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/sarien/variants/sarien/include/variant/acpi/dptf.asl @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#define DPTF_CPU_PASSIVE 95 +#define DPTF_CPU_PASSIVE 99 #define DPTF_CPU_CRITICAL 105 /* Skin Sensor for CPU VR temperature monitor */ @@ -25,7 +25,7 @@ /* Memory Sensor for DDR temperature monitor */ #define DPTF_TSR1_SENSOR_ID 2 #define DPTF_TSR1_SENSOR_NAME "DDR" -#define DPTF_TSR1_PASSIVE 56 +#define DPTF_TSR1_PASSIVE 55 #define DPTF_TSR1_CRITICAL 100 /* M.2 Sensor for Ambient temperature monitor */ @@ -39,16 +39,16 @@ Name (DTRT, Package () { /* CPU Throttle Effect on CPU */ - Package () { \_SB.PCI0.TCPU, \_SB.PCI0.TCPU, 5000, 10, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.TCPU, \_SB.PCI0.TCPU, 250, 10, 0, 0, 0, 0 }, /* CPU Throttle Effect on Skin (TSR0) */ - Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 200, 10, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 250, 10, 0, 0, 0, 0 }, /* CPU Throttle Effect on DDR (TSR1) */ - Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 2000, 10, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 250, 10, 0, 0, 0, 0 }, /* CPU Throttle Effect on Ambient (TSR2) */ - Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR2, 200, 10, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR2, 250, 10, 0, 0, 0, 0 }, }) Name (MPPC, Package () @@ -56,15 +56,15 @@ 0x2, /* Revision */ Package () { /* Power Limit 1 */ 0, /* PowerLimitIndex, 0 for Power Limit 1 */ - 3000, /* PowerLimitMinimum */ - 25000, /* PowerLimitMaximum */ + 5000, /* PowerLimitMinimum */ + 15000, /* PowerLimitMaximum */ 10000, /* TimeWindowMinimum */ 10000, /* TimeWindowMaximum */ 100 /* StepSize */ }, Package () { /* Power Limit 2 */ 1, /* PowerLimitIndex, 1 for Power Limit 2 */ - 3000, /* PowerLimitMinimum */ + 5000, /* PowerLimitMinimum */ 51000, /* PowerLimitMaximum */ 28000, /* TimeWindowMinimum */ 28000, /* TimeWindowMaximum */ -- To view, visit https://review.coreboot.org/c/coreboot/+/32118 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I64844b84891dc3ab7abe9378cdca5dcf57b3e433 Gerrit-Change-Number: 32118 Gerrit-PatchSet: 1 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit March 2019