coreboot-gerrit March 2019

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Change in ...coreboot[master]: src: Include <stdint.h> instead of <inttypes.h>
by HAOUAS Elyes (Code Review) 08 Mar '19

08 Mar '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31817 Change subject: src: Include <stdint.h> instead of <inttypes.h> ...................................................................... src: Include <stdint.h> instead of <inttypes.h> Change-Id: I2708d4b6edbda58c9a70fe84de2463c2035c92a2 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/amd/family_10h-family_15h/fidvid.c M src/drivers/intel/fsp2_0/hand_off_block.c M src/drivers/uart/pl011.h M src/drivers/vpd/lib_vpd.h M src/drivers/vpd/vpd_tables.h M src/lib/primitive_memtest.c M src/northbridge/amd/amdfam10/amdfam10.h M src/northbridge/amd/amdfam10/debug.h M src/northbridge/amd/amdfam10/early_ht.c M src/northbridge/amd/amdfam10/pci.h M src/northbridge/amd/amdfam10/raminit_amdmct.c M src/northbridge/amd/amdfam10/setup_resource_map.c M src/northbridge/amd/amdht/comlib.h M src/northbridge/amd/amdht/h3ncmn.h M src/northbridge/amd/amdht/ht_wrapper.h M src/northbridge/amd/amdmct/mct/mct_d.h M src/northbridge/amd/amdmct/mct/mct_d_gcc.h M src/northbridge/amd/amdmct/mct/mctardk3.c M src/northbridge/amd/amdmct/mct/mctardk4.c M src/northbridge/amd/amdmct/mct_ddr3/mct_d.h M src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.c M src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.h M src/northbridge/amd/amdmct/mct_ddr3/mctardk5.c M src/northbridge/amd/amdmct/mct_ddr3/mctchi_d.c M src/northbridge/amd/amdmct/mct_ddr3/mctcsi_d.c M src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c M src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c M src/northbridge/amd/amdmct/mct_ddr3/mcthdi.c M src/northbridge/amd/amdmct/mct_ddr3/mcthwl.c M src/northbridge/amd/amdmct/mct_ddr3/mctmtr_d.c M src/northbridge/amd/amdmct/mct_ddr3/mctndi_d.c M src/northbridge/amd/amdmct/mct_ddr3/mctprob.c M src/northbridge/amd/amdmct/mct_ddr3/mctproc.c M src/northbridge/amd/amdmct/mct_ddr3/mctprod.c M src/northbridge/amd/amdmct/mct_ddr3/mctrci.c M src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c M src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c M src/northbridge/amd/amdmct/mct_ddr3/mctsrc1p.c M src/northbridge/amd/amdmct/mct_ddr3/mcttmrl.c M src/northbridge/amd/amdmct/mct_ddr3/mctwl.c M src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c M src/northbridge/amd/amdmct/mct_ddr3/modtrd.c M src/northbridge/amd/amdmct/mct_ddr3/modtrdim.c M src/northbridge/amd/amdmct/mct_ddr3/mport_d.c M src/northbridge/amd/amdmct/mct_ddr3/mutilc_d.c M src/northbridge/amd/amdmct/mct_ddr3/s3utils.c M src/northbridge/amd/amdmct/wrappers/mcti.h M src/soc/cavium/cn81xx/include/soc/soc.h M src/soc/cavium/cn81xx/include/soc/timer.h M src/soc/cavium/cn81xx/include/soc/uart.h M src/soc/cavium/cn81xx/timer.c M src/soc/nvidia/tegra124/dma.c M src/soc/nvidia/tegra124/include/soc/dma.h M src/soc/nvidia/tegra124/spi.c M src/soc/nvidia/tegra210/dma.c M src/soc/nvidia/tegra210/include/soc/dma.h M src/soc/nvidia/tegra210/spi.c M src/soc/rockchip/rk3288/include/soc/timer.h M src/soc/rockchip/rk3399/include/soc/timer.h 59 files changed, 57 insertions(+), 59 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/31817/1 diff --git a/src/cpu/amd/family_10h-family_15h/fidvid.c b/src/cpu/amd/family_10h-family_15h/fidvid.c index 428924d..8da6079 100644 --- a/src/cpu/amd/family_10h-family_15h/fidvid.c +++ b/src/cpu/amd/family_10h-family_15h/fidvid.c @@ -90,7 +90,7 @@ */ #include <cpu/amd/msr.h> -#include <inttypes.h> +#include <stdint.h> #include <northbridge/amd/amdht/AsPsDefs.h> static inline void print_debug_fv(const char *str, u32 val) diff --git a/src/drivers/intel/fsp2_0/hand_off_block.c b/src/drivers/intel/fsp2_0/hand_off_block.c index 86f0b26..69e1f52 100644 --- a/src/drivers/intel/fsp2_0/hand_off_block.c +++ b/src/drivers/intel/fsp2_0/hand_off_block.c @@ -17,7 +17,7 @@ #include <console/console.h> #include <fsp/api.h> #include <fsp/util.h> -#include <inttypes.h> +#include <stdint.h> #include <string.h> #define HOB_HEADER_LEN 8 diff --git a/src/drivers/uart/pl011.h b/src/drivers/uart/pl011.h index 9247ef7..2568dbc 100644 --- a/src/drivers/uart/pl011.h +++ b/src/drivers/uart/pl011.h @@ -10,7 +10,7 @@ #ifndef __DRIVERS_UART_PL011_H #define __DRIVERS_UART_PL011_H -#include <inttypes.h> +#include <stdint.h> #include <types.h> /* PL011 r1p5 registers */ diff --git a/src/drivers/vpd/lib_vpd.h b/src/drivers/vpd/lib_vpd.h index 156d279..ea95bba 100644 --- a/src/drivers/vpd/lib_vpd.h +++ b/src/drivers/vpd/lib_vpd.h @@ -8,7 +8,7 @@ #ifndef __LIB_VPD__ #define __LIB_VPD__ -#include <inttypes.h> +#include <stdint.h> enum { VPD_OK = 0, diff --git a/src/drivers/vpd/vpd_tables.h b/src/drivers/vpd/vpd_tables.h index 0bd215a..4add5bd 100644 --- a/src/drivers/vpd/vpd_tables.h +++ b/src/drivers/vpd/vpd_tables.h @@ -9,7 +9,7 @@ #ifndef __LIB_VPD_TABLES_H__ #define __LIB_VPD_TABLES_H__ -#include <inttypes.h> +#include <stdint.h> #define VPD_ENTRY_MAGIC "_SM_" #define VPD_INFO_MAGIC \ diff --git a/src/lib/primitive_memtest.c b/src/lib/primitive_memtest.c index c699e89..aa01377 100644 --- a/src/lib/primitive_memtest.c +++ b/src/lib/primitive_memtest.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include <lib.h> #include <console/console.h> diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h index d2a0528..0690aa5 100644 --- a/src/northbridge/amd/amdfam10/amdfam10.h +++ b/src/northbridge/amd/amdfam10/amdfam10.h @@ -17,7 +17,7 @@ #ifndef AMDFAM10_H #define AMDFAM10_H -#include <inttypes.h> +#include <stdint.h> #include <device/device.h> #include "early_ht.h" diff --git a/src/northbridge/amd/amdfam10/debug.h b/src/northbridge/amd/amdfam10/debug.h index a23303e..e24290e 100644 --- a/src/northbridge/amd/amdfam10/debug.h +++ b/src/northbridge/amd/amdfam10/debug.h @@ -16,7 +16,7 @@ #ifndef AMDFAM10_DEBUG_H #define AMDFAM10_DEBUG_H -#include <inttypes.h> +#include <stdint.h> #include "pci.h" void print_debug_addr(const char *str, void *val); diff --git a/src/northbridge/amd/amdfam10/early_ht.c b/src/northbridge/amd/amdfam10/early_ht.c index afa07bb..b1bd26a 100644 --- a/src/northbridge/amd/amdfam10/early_ht.c +++ b/src/northbridge/amd/amdfam10/early_ht.c @@ -14,7 +14,7 @@ */ #include "early_ht.h" -#include <inttypes.h> +#include <stdint.h> #include <device/pci_ops.h> #include <device/pci_def.h> diff --git a/src/northbridge/amd/amdfam10/pci.h b/src/northbridge/amd/amdfam10/pci.h index 2893949..21623c1 100644 --- a/src/northbridge/amd/amdfam10/pci.h +++ b/src/northbridge/amd/amdfam10/pci.h @@ -16,7 +16,7 @@ #ifndef AMDFAM10_PCI_H #define AMDFAM10_PCI_H -#include <inttypes.h> +#include <stdint.h> #include <device/pci_type.h> #include <device/pci_def.h> diff --git a/src/northbridge/amd/amdfam10/raminit_amdmct.c b/src/northbridge/amd/amdfam10/raminit_amdmct.c index 8dee9ab..ae0098c 100644 --- a/src/northbridge/amd/amdfam10/raminit_amdmct.c +++ b/src/northbridge/amd/amdfam10/raminit_amdmct.c @@ -15,7 +15,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include <arch/acpi.h> #include <arch/cpu.h> #include <device/pci.h> diff --git a/src/northbridge/amd/amdfam10/setup_resource_map.c b/src/northbridge/amd/amdfam10/setup_resource_map.c index de2eeac..13ff018 100644 --- a/src/northbridge/amd/amdfam10/setup_resource_map.c +++ b/src/northbridge/amd/amdfam10/setup_resource_map.c @@ -15,7 +15,7 @@ */ #include <arch/io.h> -#include <inttypes.h> +#include <stdint.h> #include <console/console.h> #include <device/pci_ops.h> #include <northbridge/amd/amdfam10/raminit.h> diff --git a/src/northbridge/amd/amdht/comlib.h b/src/northbridge/amd/amdht/comlib.h index d497fd2..94e5ac8 100644 --- a/src/northbridge/amd/amdht/comlib.h +++ b/src/northbridge/amd/amdht/comlib.h @@ -19,7 +19,7 @@ #undef FILECODE #define FILECODE 0xF001 -#include <inttypes.h> +#include <stdint.h> #include <stdlib.h> #include "porting.h" diff --git a/src/northbridge/amd/amdht/h3ncmn.h b/src/northbridge/amd/amdht/h3ncmn.h index f4a782d..7292c64 100644 --- a/src/northbridge/amd/amdht/h3ncmn.h +++ b/src/northbridge/amd/amdht/h3ncmn.h @@ -17,7 +17,7 @@ #ifndef H3NCMN_H #define H3NCMN_H -#include <inttypes.h> +#include <stdint.h> #include <device/pci.h> #include <console/console.h> #include <cpu/amd/msr.h> diff --git a/src/northbridge/amd/amdht/ht_wrapper.h b/src/northbridge/amd/amdht/ht_wrapper.h index 331c3df..629e08f 100644 --- a/src/northbridge/amd/amdht/ht_wrapper.h +++ b/src/northbridge/amd/amdht/ht_wrapper.h @@ -18,7 +18,7 @@ #include <northbridge/amd/amdfam10/raminit.h> #include <northbridge/amd/amdfam10/amdfam10.h> -#include <inttypes.h> +#include <stdint.h> #include "h3finit.h" void amd_ht_fixup(struct sys_info *sysinfo); diff --git a/src/northbridge/amd/amdmct/mct/mct_d.h b/src/northbridge/amd/amdmct/mct/mct_d.h index 5d31d44..b97079c 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.h +++ b/src/northbridge/amd/amdmct/mct/mct_d.h @@ -22,7 +22,7 @@ #define DQS_TRAIN_DEBUG 0 -#include <inttypes.h> +#include <stdint.h> #include "mct_d_gcc.h" #include <console/console.h> #include <northbridge/amd/amdfam10/debug.h> diff --git a/src/northbridge/amd/amdmct/mct/mct_d_gcc.h b/src/northbridge/amd/amdmct/mct/mct_d_gcc.h index 0b9a7d1..993aa21d 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d_gcc.h +++ b/src/northbridge/amd/amdmct/mct/mct_d_gcc.h @@ -16,7 +16,7 @@ #ifndef MCT_D_GCC_H #define MCT_D_GCC_H -#include <inttypes.h> +#include <stdint.h> void _WRMSR(u32 addr, u32 lo, u32 hi); void _RDMSR(u32 addr, u32 *lo, u32 *hi); diff --git a/src/northbridge/amd/amdmct/mct/mctardk3.c b/src/northbridge/amd/amdmct/mct/mctardk3.c index ce79a52..5cd18fd 100644 --- a/src/northbridge/amd/amdmct/mct/mctardk3.c +++ b/src/northbridge/amd/amdmct/mct/mctardk3.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include "mct_d.h" static void Get_ChannelPS_Cfg0_D(u8 MAAdimms, u8 Speed, u8 MAAload, diff --git a/src/northbridge/amd/amdmct/mct/mctardk4.c b/src/northbridge/amd/amdmct/mct/mctardk4.c index d112c46..fc73b33 100644 --- a/src/northbridge/amd/amdmct/mct/mctardk4.c +++ b/src/northbridge/amd/amdmct/mct/mctardk4.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include "mct_d.h" static void Get_ChannelPS_Cfg0_D(u8 MAAdimms, u8 Speed, u8 MAAload, diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h index 3cda13f..952a66f 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h @@ -22,7 +22,7 @@ #define DQS_TRAIN_DEBUG 0 -#include <inttypes.h> +#include <stdint.h> #include <northbridge/amd/amdfam10/raminit.h> /*=========================================================================== diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.c index 82911c0..ccea732 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.c @@ -15,7 +15,7 @@ */ #include "mct_d_gcc.h" -#include <inttypes.h> +#include <stdint.h> #include <arch/cpu.h> void _WRMSR(u32 addr, u32 lo, u32 hi) diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.h b/src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.h index f0d0f76..629e6e6 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.h +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.h @@ -17,7 +17,7 @@ #ifndef MCT_D_GCC_H #define MCT_D_GCC_H -#include <inttypes.h> +#include <stdint.h> #include <cpu/x86/cr.h> void _WRMSR(u32 addr, u32 lo, u32 hi); diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctardk5.c b/src/northbridge/amd/amdmct/mct_ddr3/mctardk5.c index 2e5a500..e811634 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctardk5.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctardk5.c @@ -17,7 +17,7 @@ /* AM3/ASB2/C32/G34 DDR3 */ #include <arch/cpu.h> -#include <inttypes.h> +#include <stdint.h> #include "mct_d.h" #include "mct_d_gcc.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctchi_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctchi_d.c index 55cf3a1..d458f3a 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctchi_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctchi_d.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include "mct_d.h" #include "mct_d_gcc.h" #include <console/console.h> diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctcsi_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctcsi_d.c index 716e419..85e7930 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctcsi_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctcsi_d.c @@ -20,7 +20,7 @@ * ;page size), and subtract 8. */ -#include <inttypes.h> +#include <stdint.h> #include "mct_d.h" #include "mct_d_gcc.h" #include <console/console.h> diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c index 34b13ea..5253694 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include <console/console.h> #include <string.h> #include <arch/cpu.h> diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c index 6d41560..0ed953d 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c @@ -15,7 +15,7 @@ */ #include <arch/cpu.h> -#include <inttypes.h> +#include <stdint.h> #include <console/console.h> #include <device/pci_ops.h> #include <string.h> diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mcthdi.c b/src/northbridge/amd/amdmct/mct_ddr3/mcthdi.c index 2038af9..c821ec0 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mcthdi.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mcthdi.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include "mct_d.h" #include "mct_d_gcc.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mcthwl.c b/src/northbridge/amd/amdmct/mct_ddr3/mcthwl.c index 57f0e96..1ee1060 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mcthwl.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mcthwl.c @@ -15,7 +15,7 @@ */ #include <arch/cpu.h> -#include <inttypes.h> +#include <stdint.h> #include <console/console.h> #include <string.h> #include "mct_d.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctmtr_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctmtr_d.c index 4836757..4ec42aa 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctmtr_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctmtr_d.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include <console/console.h> #include <string.h> #include "mct_d.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctndi_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctndi_d.c index 3df0323..d918cad 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctndi_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctndi_d.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include <console/console.h> #include <string.h> #include "mct_d.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctprob.c b/src/northbridge/amd/amdmct/mct_ddr3/mctprob.c index a02b15f..044d32f 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctprob.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctprob.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include <string.h> #include "mct_d.h" #include "mct_d_gcc.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c index eb3143f..2f6926d 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include <string.h> #include "mct_d.h" #include "mct_d_gcc.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctprod.c b/src/northbridge/amd/amdmct/mct_ddr3/mctprod.c index 5a4fd2a..898ec92 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctprod.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctprod.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include <string.h> #include "mct_d.h" #include "mct_d_gcc.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c b/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c index d299f56..4e4d497 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c @@ -15,7 +15,7 @@ */ #include <arch/cpu.h> -#include <inttypes.h> +#include <stdint.h> #include <console/console.h> #include <string.h> #include "mct_d.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c index 3ca1a98..c648092 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c @@ -15,7 +15,7 @@ */ #include <arch/cpu.h> -#include <inttypes.h> +#include <stdint.h> #include <console/console.h> #include <string.h> #include "mct_d.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c index a6faf90..fd737f9 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c @@ -20,7 +20,7 @@ ******************************************************************************/ #include <arch/cpu.h> -#include <inttypes.h> +#include <stdint.h> #include <console/console.h> #include <string.h> #include <cpu/x86/msr.h> diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc1p.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc1p.c index eb30c8d..eefc816 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc1p.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc1p.c @@ -15,7 +15,7 @@ */ #include <arch/cpu.h> -#include <inttypes.h> +#include <stdint.h> #include <string.h> #include "mct_d.h" #include "mct_d_gcc.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mcttmrl.c b/src/northbridge/amd/amdmct/mct_ddr3/mcttmrl.c index 6c3db47..69ce6ef 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mcttmrl.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mcttmrl.c @@ -18,7 +18,7 @@ * Description: Max Read Latency Training feature for DDR 3 MCT */ -#include <inttypes.h> +#include <stdint.h> #include <console/console.h> #include <string.h> #include <cpu/amd/msr.h> diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctwl.c b/src/northbridge/amd/amdmct/mct_ddr3/mctwl.c index a91fb08..f1fb546 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctwl.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctwl.c @@ -15,7 +15,7 @@ */ #include <arch/cpu.h> -#include <inttypes.h> +#include <stdint.h> #include <console/console.h> #include <string.h> #include "mct_d.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c index b62661b..7c695ca 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include <console/console.h> #include <string.h> #include "mct_d.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/modtrd.c b/src/northbridge/amd/amdmct/mct_ddr3/modtrd.c index 26ea031..37b788b 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/modtrd.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/modtrd.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include <string.h> #include "mct_d.h" #include "mct_d_gcc.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/modtrdim.c b/src/northbridge/amd/amdmct/mct_ddr3/modtrdim.c index 1c2a135..2148c95 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/modtrdim.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/modtrdim.c @@ -16,7 +16,7 @@ /* This file contains functions for odt setting on registered DDR3 dimms */ -#include <inttypes.h> +#include <stdint.h> #include <console/console.h> #include <string.h> #include "mct_d.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mport_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mport_d.c index 3c512ed..e2f832a 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mport_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mport_d.c @@ -14,7 +14,7 @@ */ #include <arch/io.h> -#include <inttypes.h> +#include <stdint.h> #include <string.h> #include "mct_d.h" #include "mct_d_gcc.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mutilc_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mutilc_d.c index e4afa70..c997b3e 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mutilc_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mutilc_d.c @@ -17,7 +17,7 @@ /* This file contains functions for common utility functions */ #include <arch/cpu.h> -#include <inttypes.h> +#include <stdint.h> #include <string.h> #include "mct_d.h" #include "mct_d_gcc.h" diff --git a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c index 7267f12..32d271e 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c @@ -29,7 +29,7 @@ #include <spi-generic.h> #include <spi_flash.h> #include <pc80/mc146818rtc.h> -#include <inttypes.h> +#include <stdint.h> #include "mct_d.h" #include "mct_d_gcc.h" diff --git a/src/northbridge/amd/amdmct/wrappers/mcti.h b/src/northbridge/amd/amdmct/wrappers/mcti.h index db92fa7..f81a617 100644 --- a/src/northbridge/amd/amdmct/wrappers/mcti.h +++ b/src/northbridge/amd/amdmct/wrappers/mcti.h @@ -18,7 +18,7 @@ #ifndef MCTI_H #define MCTI_H -#include <inttypes.h> +#include <stdint.h> #include <stdlib.h> #include <pc80/mc146818rtc.h> diff --git a/src/soc/cavium/cn81xx/include/soc/soc.h b/src/soc/cavium/cn81xx/include/soc/soc.h index a751e64..582cff3 100644 --- a/src/soc/cavium/cn81xx/include/soc/soc.h +++ b/src/soc/cavium/cn81xx/include/soc/soc.h @@ -16,7 +16,7 @@ #ifndef __SOC_CAVIUM_CN81XX_INCLUDE_SOC_SOC_H #define __SOC_CAVIUM_CN81XX_INCLUDE_SOC_SOC_H -#include <inttypes.h> +#include <stdint.h> #include <types.h> /* MIO BOOT Registers */ diff --git a/src/soc/cavium/cn81xx/include/soc/timer.h b/src/soc/cavium/cn81xx/include/soc/timer.h index 4507b0b..a104b83 100644 --- a/src/soc/cavium/cn81xx/include/soc/timer.h +++ b/src/soc/cavium/cn81xx/include/soc/timer.h @@ -16,7 +16,7 @@ #ifndef __SOC_CAVIUM_CN81XX_TIMER_H__ #define __SOC_CAVIUM_CN81XX_TIMER_H__ -#include <inttypes.h> +#include <stdint.h> #include <types.h> #include <timer.h> #include <delay.h> diff --git a/src/soc/cavium/cn81xx/include/soc/uart.h b/src/soc/cavium/cn81xx/include/soc/uart.h index e402206..baa06e1 100644 --- a/src/soc/cavium/cn81xx/include/soc/uart.h +++ b/src/soc/cavium/cn81xx/include/soc/uart.h @@ -16,7 +16,7 @@ #ifndef __SOC_CAVIUM_COMMON_INCLUDE_SOC_UART_H #define __SOC_CAVIUM_COMMON_INCLUDE_SOC_UART_H -#include <inttypes.h> +#include <stdint.h> #include <types.h> int uart_is_enabled(const size_t bus); diff --git a/src/soc/cavium/cn81xx/timer.c b/src/soc/cavium/cn81xx/timer.c index d6828e9..c86ff80 100644 --- a/src/soc/cavium/cn81xx/timer.c +++ b/src/soc/cavium/cn81xx/timer.c @@ -19,7 +19,7 @@ #include <device/mmio.h> #include <arch/lib_helpers.h> #include <console/console.h> -#include <inttypes.h> +#include <stdint.h> #include <soc/clock.h> #include <soc/timer.h> #include <stdint.h> diff --git a/src/soc/nvidia/tegra124/dma.c b/src/soc/nvidia/tegra124/dma.c index 73d050f..761bb6b 100644 --- a/src/soc/nvidia/tegra124/dma.c +++ b/src/soc/nvidia/tegra124/dma.c @@ -17,7 +17,7 @@ #include <device/mmio.h> #include <console/console.h> -#include <inttypes.h> +#include <stdint.h> #include <soc/addressmap.h> #include <soc/dma.h> #include <stddef.h> diff --git a/src/soc/nvidia/tegra124/include/soc/dma.h b/src/soc/nvidia/tegra124/include/soc/dma.h index 42c7027..3d6d209 100644 --- a/src/soc/nvidia/tegra124/include/soc/dma.h +++ b/src/soc/nvidia/tegra124/include/soc/dma.h @@ -18,7 +18,7 @@ #ifndef __NVIDIA_TEGRA124_DMA_H__ #define __NVIDIA_TEGRA124_DMA_H__ -#include <inttypes.h> +#include <stdint.h> #include <soc/addressmap.h> /* diff --git a/src/soc/nvidia/tegra124/spi.c b/src/soc/nvidia/tegra124/spi.c index 51fa10f..d770724 100644 --- a/src/soc/nvidia/tegra124/spi.c +++ b/src/soc/nvidia/tegra124/spi.c @@ -20,7 +20,6 @@ #include <boot_device.h> #include <console/console.h> #include <delay.h> -#include <inttypes.h> #include <soc/addressmap.h> #include <soc/dma.h> #include <soc/spi.h> diff --git a/src/soc/nvidia/tegra210/dma.c b/src/soc/nvidia/tegra210/dma.c index 03c5e67..75376d9 100644 --- a/src/soc/nvidia/tegra210/dma.c +++ b/src/soc/nvidia/tegra210/dma.c @@ -17,7 +17,7 @@ #include <device/mmio.h> #include <console/console.h> -#include <inttypes.h> +#include <stdint.h> #include <soc/addressmap.h> #include <soc/dma.h> #include <stddef.h> diff --git a/src/soc/nvidia/tegra210/include/soc/dma.h b/src/soc/nvidia/tegra210/include/soc/dma.h index 1093479..8ad2787 100644 --- a/src/soc/nvidia/tegra210/include/soc/dma.h +++ b/src/soc/nvidia/tegra210/include/soc/dma.h @@ -17,7 +17,7 @@ #ifndef __NVIDIA_TEGRA210_DMA_H__ #define __NVIDIA_TEGRA210_DMA_H__ -#include <inttypes.h> +#include <stdint.h> #include <soc/addressmap.h> /* diff --git a/src/soc/nvidia/tegra210/spi.c b/src/soc/nvidia/tegra210/spi.c index 6330779..6d9dba6 100644 --- a/src/soc/nvidia/tegra210/spi.c +++ b/src/soc/nvidia/tegra210/spi.c @@ -20,7 +20,6 @@ #include <boot_device.h> #include <console/console.h> #include <delay.h> -#include <inttypes.h> #include <spi-generic.h> #include <spi_flash.h> #include <soc/addressmap.h> diff --git a/src/soc/rockchip/rk3288/include/soc/timer.h b/src/soc/rockchip/rk3288/include/soc/timer.h index 04efeaf..1d08fcc 100644 --- a/src/soc/rockchip/rk3288/include/soc/timer.h +++ b/src/soc/rockchip/rk3288/include/soc/timer.h @@ -16,7 +16,7 @@ #ifndef __SOC_ROCKCHIP_RK3288_TIMER_H__ #define __SOC_ROCKCHIP_RK3288_TIMER_H__ -#include <inttypes.h> +#include <stdint.h> #include <soc/addressmap.h> #include <soc/clock.h> #include <timer.h> diff --git a/src/soc/rockchip/rk3399/include/soc/timer.h b/src/soc/rockchip/rk3399/include/soc/timer.h index 8513cfa..46c69e6 100644 --- a/src/soc/rockchip/rk3399/include/soc/timer.h +++ b/src/soc/rockchip/rk3399/include/soc/timer.h @@ -16,7 +16,7 @@ #ifndef __SOC_ROCKCHIP_RK3399_TIMER_H__ #define __SOC_ROCKCHIP_RK3399_TIMER_H__ -#include <inttypes.h> +#include <stdint.h> #include <soc/addressmap.h> #include <timer.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/31817 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2708d4b6edbda58c9a70fe84de2463c2035c92a2 Gerrit-Change-Number: 31817 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 1

Change in ...coreboot[master]: util: Include <stdint.h> instead of <inttypes.h>
by HAOUAS Elyes (Code Review) 08 Mar '19

08 Mar '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31818 Change subject: util: Include <stdint.h> instead of <inttypes.h> ...................................................................... util: Include <stdint.h> instead of <inttypes.h> Change-Id: I1bdabcbd27e09091cb8ac4d871b274fc53f86a9c Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M util/cbfstool/ProcessorBind.h M util/cbfstool/cbfs-mkstage.c M util/cbfstool/cbfs_image.c M util/cbfstool/flashmap/fmap.c M util/cbfstool/flashmap/fmap.h M util/cbfstool/flashmap/kv_pair.h M util/cbfstool/flashmap/valstr.c M util/cbfstool/flashmap/valstr.h M util/cbfstool/fmd_scanner.c_shipped M util/cbfstool/fmd_scanner.h_shipped M util/cbfstool/rmodule.c M util/cbmem/cbmem.c M util/intelmetool/intelmetool.c M util/intelmetool/me.h M util/intelmetool/mmap.h M util/intelmetool/msr.h M util/intelmetool/rcba.c M util/inteltool/ahci.c M util/inteltool/gfx.c M util/inteltool/gpio_groups.c M util/inteltool/inteltool.c M util/inteltool/ivy_memory.c M util/inteltool/memory.c M util/inteltool/pcie.c M util/inteltool/pcr.c M util/inteltool/powermgt.c M util/kconfig/zconf.lex.c_shipped M util/nvramtool/lbtable.c M util/sconfig/lex.yy.c_shipped M util/viatool/viatool.c 30 files changed, 31 insertions(+), 31 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/31818/1 diff --git a/util/cbfstool/ProcessorBind.h b/util/cbfstool/ProcessorBind.h index c0f4df0..aaa097a 100644 --- a/util/cbfstool/ProcessorBind.h +++ b/util/cbfstool/ProcessorBind.h @@ -21,7 +21,7 @@ * This to mimic a processor binding for EDK. This is just to provide the * processor types. */ -#include <inttypes.h> +#include <stdint.h> /// /// Define the processor type so other code can make processor based choices. diff --git a/util/cbfstool/cbfs-mkstage.c b/util/cbfstool/cbfs-mkstage.c index 6071437..1056f05 100644 --- a/util/cbfstool/cbfs-mkstage.c +++ b/util/cbfstool/cbfs-mkstage.c @@ -16,7 +16,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include <stdio.h> #include <stdlib.h> #include <string.h> diff --git a/util/cbfstool/cbfs_image.c b/util/cbfstool/cbfs_image.c index 6ccc4f9..ff5bd3a 100644 --- a/util/cbfstool/cbfs_image.c +++ b/util/cbfstool/cbfs_image.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include <libgen.h> #include <stddef.h> #include <stdio.h> diff --git a/util/cbfstool/flashmap/fmap.c b/util/cbfstool/flashmap/fmap.c index f1d2fb9..d7f1703 100644 --- a/util/cbfstool/flashmap/fmap.c +++ b/util/cbfstool/flashmap/fmap.c @@ -44,7 +44,7 @@ #include <sys/stat.h> #include <sys/mman.h> #include <errno.h> -#include <inttypes.h> +#include <stdint.h> #include <limits.h> #include <assert.h> diff --git a/util/cbfstool/flashmap/fmap.h b/util/cbfstool/flashmap/fmap.h index e360011..485b41d 100644 --- a/util/cbfstool/flashmap/fmap.h +++ b/util/cbfstool/flashmap/fmap.h @@ -36,7 +36,7 @@ #ifndef FLASHMAP_LIB_FMAP_H__ #define FLASHMAP_LIB_FMAP_H__ -#include <inttypes.h> +#include <stdint.h> #include <valstr.h> #define FMAP_SIGNATURE "__FMAP__" diff --git a/util/cbfstool/flashmap/kv_pair.h b/util/cbfstool/flashmap/kv_pair.h index 1185a08..e4b3cf8 100644 --- a/util/cbfstool/flashmap/kv_pair.h +++ b/util/cbfstool/flashmap/kv_pair.h @@ -37,7 +37,7 @@ #define FLASHMAP_LIB_KV_PAIR_H__ #include <stdio.h> -#include <inttypes.h> +#include <stdint.h> #include <string.h> /* key=value string pair list */ diff --git a/util/cbfstool/flashmap/valstr.c b/util/cbfstool/flashmap/valstr.c index 4843962..1220177 100644 --- a/util/cbfstool/flashmap/valstr.c +++ b/util/cbfstool/flashmap/valstr.c @@ -29,7 +29,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include <inttypes.h> +#include <stdint.h> #include <string.h> #include <strings.h> diff --git a/util/cbfstool/flashmap/valstr.h b/util/cbfstool/flashmap/valstr.h index 9b57d58..2fd81a0 100644 --- a/util/cbfstool/flashmap/valstr.h +++ b/util/cbfstool/flashmap/valstr.h @@ -32,7 +32,7 @@ #ifndef FLASHMAP_LIB_VALSTR_H__ #define FLASHMAP_LIB_VALSTR_H__ -#include <inttypes.h> +#include <stdint.h> /* value + string structure for common conversions */ struct valstr { diff --git a/util/cbfstool/fmd_scanner.c_shipped b/util/cbfstool/fmd_scanner.c_shipped index 71d541d..b137e48 100644 --- a/util/cbfstool/fmd_scanner.c_shipped +++ b/util/cbfstool/fmd_scanner.c_shipped @@ -39,7 +39,7 @@ #define __STDC_LIMIT_MACROS 1 #endif -#include <inttypes.h> +#include <stdint.h> typedef int8_t flex_int8_t; typedef uint8_t flex_uint8_t; typedef int16_t flex_int16_t; diff --git a/util/cbfstool/fmd_scanner.h_shipped b/util/cbfstool/fmd_scanner.h_shipped index 2a8b291..70d4375 100644 --- a/util/cbfstool/fmd_scanner.h_shipped +++ b/util/cbfstool/fmd_scanner.h_shipped @@ -42,7 +42,7 @@ #define __STDC_LIMIT_MACROS 1 #endif -#include <inttypes.h> +#include <stdint.h> typedef int8_t flex_int8_t; typedef uint8_t flex_uint8_t; typedef int16_t flex_int16_t; diff --git a/util/cbfstool/rmodule.c b/util/cbfstool/rmodule.c index 80e8911..674dbb0 100644 --- a/util/cbfstool/rmodule.c +++ b/util/cbfstool/rmodule.c @@ -12,7 +12,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include <stdio.h> #include <stdlib.h> #include <string.h> diff --git a/util/cbmem/cbmem.c b/util/cbmem/cbmem.c index ae1d212..792edf9 100644 --- a/util/cbmem/cbmem.c +++ b/util/cbmem/cbmem.c @@ -14,12 +14,12 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include <stdio.h> #include <stdlib.h> #include <string.h> #include <unistd.h> -#include <inttypes.h> +#include <stdint.h> #include <getopt.h> #include <dirent.h> #include <errno.h> diff --git a/util/intelmetool/intelmetool.c b/util/intelmetool/intelmetool.c index 37cd357..0336544 100644 --- a/util/intelmetool/intelmetool.c +++ b/util/intelmetool/intelmetool.c @@ -13,7 +13,7 @@ */ #include <stdio.h> -#include <inttypes.h> +#include <stdint.h> #include <stdlib.h> #include <getopt.h> #include <unistd.h> diff --git a/util/intelmetool/me.h b/util/intelmetool/me.h index 6a20807..da1152e 100644 --- a/util/intelmetool/me.h +++ b/util/intelmetool/me.h @@ -17,7 +17,7 @@ #ifndef ME_H #define ME_H -#include <inttypes.h> +#include <stdint.h> #include <pci/pci.h> #define ME_RETRY 100000 /* 1 second */ diff --git a/util/intelmetool/mmap.h b/util/intelmetool/mmap.h index 31d8313..579a96b 100644 --- a/util/intelmetool/mmap.h +++ b/util/intelmetool/mmap.h @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #include <stdlib.h> #include <fcntl.h> #include <sys/mman.h> diff --git a/util/intelmetool/msr.h b/util/intelmetool/msr.h index 1f6a117..d3aa780 100644 --- a/util/intelmetool/msr.h +++ b/util/intelmetool/msr.h @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <inttypes.h> +#include <stdint.h> #ifndef __DARWIN__ diff --git a/util/intelmetool/rcba.c b/util/intelmetool/rcba.c index ebc2d9c..4f169bd 100644 --- a/util/intelmetool/rcba.c +++ b/util/intelmetool/rcba.c @@ -14,7 +14,7 @@ */ #include <stdio.h> -#include <inttypes.h> +#include <stdint.h> #include "intelmetool.h" #include "mmap.h" diff --git a/util/inteltool/ahci.c b/util/inteltool/ahci.c index 22a5b01..73e4aed 100644 --- a/util/inteltool/ahci.c +++ b/util/inteltool/ahci.c @@ -17,7 +17,7 @@ #include <stdio.h> #include <stdlib.h> -#include <inttypes.h> +#include <stdint.h> #include "inteltool.h" static const char *ghc_regs[] = { diff --git a/util/inteltool/gfx.c b/util/inteltool/gfx.c index ffcf75c..d2ec010 100644 --- a/util/inteltool/gfx.c +++ b/util/inteltool/gfx.c @@ -16,7 +16,7 @@ #include <stdio.h> #include <stdlib.h> -#include <inttypes.h> +#include <stdint.h> #include "inteltool.h" #define MMIO_SIZE 0x100000 diff --git a/util/inteltool/gpio_groups.c b/util/inteltool/gpio_groups.c index 69fb87e..9d568e6 100644 --- a/util/inteltool/gpio_groups.c +++ b/util/inteltool/gpio_groups.c @@ -18,7 +18,7 @@ #include <stddef.h> #include <stdint.h> #include <assert.h> -#include <inttypes.h> +#include <stdint.h> #include "inteltool.h" #include "pcr.h" diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index 2066839..dad8a3e 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -19,7 +19,7 @@ #include <stdio.h> #include <stdlib.h> #include <string.h> -#include <inttypes.h> +#include <stdint.h> #include <getopt.h> #include <fcntl.h> #include <sys/mman.h> diff --git a/util/inteltool/ivy_memory.c b/util/inteltool/ivy_memory.c index f0e473f..9d1dffe 100644 --- a/util/inteltool/ivy_memory.c +++ b/util/inteltool/ivy_memory.c @@ -14,7 +14,7 @@ #include <stdio.h> #include <stdlib.h> #include <string.h> -#include <inttypes.h> +#include <stdint.h> #include <errno.h> #include "inteltool.h" diff --git a/util/inteltool/memory.c b/util/inteltool/memory.c index f0c7562..067336a 100644 --- a/util/inteltool/memory.c +++ b/util/inteltool/memory.c @@ -16,7 +16,7 @@ #include <stdio.h> #include <stdlib.h> -#include <inttypes.h> +#include <stdint.h> #include "inteltool.h" volatile uint8_t *mchbar; diff --git a/util/inteltool/pcie.c b/util/inteltool/pcie.c index 5b35dbd..f95ffc0 100644 --- a/util/inteltool/pcie.c +++ b/util/inteltool/pcie.c @@ -16,7 +16,7 @@ #include <stdio.h> #include <stdlib.h> -#include <inttypes.h> +#include <stdint.h> #include "inteltool.h" /* 320766 */ diff --git a/util/inteltool/pcr.c b/util/inteltool/pcr.c index 5c97a6c..f16b5a4 100644 --- a/util/inteltool/pcr.c +++ b/util/inteltool/pcr.c @@ -17,7 +17,7 @@ #include <stdlib.h> #include <stdint.h> #include <stdbool.h> -#include <inttypes.h> +#include <stdint.h> #include <assert.h> #include "pcr.h" diff --git a/util/inteltool/powermgt.c b/util/inteltool/powermgt.c index 3591800..4cee683 100644 --- a/util/inteltool/powermgt.c +++ b/util/inteltool/powermgt.c @@ -17,7 +17,7 @@ #include <stdio.h> #include <stdlib.h> -#include <inttypes.h> +#include <stdint.h> #include <commonlib/helpers.h> #include "inteltool.h" diff --git a/util/kconfig/zconf.lex.c_shipped b/util/kconfig/zconf.lex.c_shipped index 72e3a5f..a189727 100644 --- a/util/kconfig/zconf.lex.c_shipped +++ b/util/kconfig/zconf.lex.c_shipped @@ -58,7 +58,7 @@ #define __STDC_LIMIT_MACROS 1 #endif -#include <inttypes.h> +#include <stdint.h> typedef int8_t flex_int8_t; typedef uint8_t flex_uint8_t; typedef int16_t flex_int16_t; diff --git a/util/nvramtool/lbtable.c b/util/nvramtool/lbtable.c index a9586c8..39192fa 100644 --- a/util/nvramtool/lbtable.c +++ b/util/nvramtool/lbtable.c @@ -26,7 +26,7 @@ \*****************************************************************************/ #include <stdint.h> -#include <inttypes.h> +#include <stdint.h> #include <string.h> #ifndef __MINGW32__ #include <sys/mman.h> diff --git a/util/sconfig/lex.yy.c_shipped b/util/sconfig/lex.yy.c_shipped index b3dff41..abdbe16 100644 --- a/util/sconfig/lex.yy.c_shipped +++ b/util/sconfig/lex.yy.c_shipped @@ -37,7 +37,7 @@ #define __STDC_LIMIT_MACROS 1 #endif -#include <inttypes.h> +#include <stdint.h> typedef int8_t flex_int8_t; typedef uint8_t flex_uint8_t; typedef int16_t flex_int16_t; diff --git a/util/viatool/viatool.c b/util/viatool/viatool.c index 328377a..f5a6273 100644 --- a/util/viatool/viatool.c +++ b/util/viatool/viatool.c @@ -18,7 +18,7 @@ #include <stdio.h> #include <stdlib.h> -#include <inttypes.h> +#include <stdint.h> #include <getopt.h> #include <fcntl.h> #include <sys/mman.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/31818 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1bdabcbd27e09091cb8ac4d871b274fc53f86a9c Gerrit-Change-Number: 31818 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newchange

1 5

Change in ...coreboot[master]: drivers/intel/fsp2_0: Implement EFI_MP_SERVICES_PPI structure APIs
by Subrata Banik (Code Review) 08 Mar '19

08 Mar '19

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25634 ) Change subject: drivers/intel/fsp2_0: Implement EFI_MP_SERVICES_PPI structure APIs ...................................................................... Patch Set 52: > Also, do me a favor and add documentation as markdown document why > we need this coreboot -> FSP -> coreboot service interface. Create > Documentation/soc/intel/fsp/ppi and also create Documentation/soc/intel/fsp > where you can add existing document links of Intel FSP public > documentation. Hi Philipp, isn't this good enough to know why we need coreboot -> FSP-> coreboot service interface ? https://github.com/coreboot/coreboot/blob/master/Documentation/soc/intel/ic… -- To view, visit https://review.coreboot.org/c/coreboot/+/25634 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie844e3f15f759ea09a8f3fd24825ee740151c956 Gerrit-Change-Number: 25634 Gerrit-PatchSet: 52 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Vincent Zimmer <vincent.zimmer(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Nathaniel L Desimone <nathaniel.l.desimone(a)intel.com> Gerrit-Comment-Date: Fri, 08 Mar 2019 11:39:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: mainboard/google/mistral: Add support for Mistral
by Sricharan Ramabadhran (Code Review) 08 Mar '19

08 Mar '19

Sricharan Ramabadhran has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29949 ) Change subject: mainboard/google/mistral: Add support for Mistral ...................................................................... Patch Set 12: (2 comments) https://review.coreboot.org/#/c/29949/12/src/mainboard/google/mistral/chrom… File src/mainboard/google/mistral/chromeos.fmd: https://review.coreboot.org/#/c/29949/12/src/mainboard/google/mistral/chrom… PS12, Line 21: TODO: Move FMAP to 2M or 3M once FSG can be smaller > From the fmap that seems to be possible now: GBB + RO_FRID + RO_VPD + RO_PRESERVE are 152K, so there […] ok. Will change. https://review.coreboot.org/#/c/29949/12/src/mainboard/google/mistral/chrom… PS12, Line 27: RO_PRESERVE { > You should get rid of this now and just directly have RO_DDR_TRAINING(PRESERVE) 8K here (see CB:3170 […] Ok, will change this below and also fix the below comment -- To view, visit https://review.coreboot.org/c/coreboot/+/29949 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ecfad68bb50f42acf36f51bc3433add56597c3d Gerrit-Change-Number: 29949 Gerrit-PatchSet: 12 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: nsekar(a)codeaurora.org Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Fri, 08 Mar 2019 11:34:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: drivers/intel/fsp2_0: Implement EFI_MP_SERVICES_PPI structure APIs
by Philipp Deppenwiese (Code Review) 08 Mar '19

08 Mar '19

1 0

Change in ...coreboot[master]: drivers/intel/fsp2_0: Implement EFI_MP_SERVICES_PPI structure APIs
by Philipp Deppenwiese (Code Review) 08 Mar '19

08 Mar '19

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25634 ) Change subject: drivers/intel/fsp2_0: Implement EFI_MP_SERVICES_PPI structure APIs ...................................................................... Patch Set 52: (4 comments) https://review.coreboot.org/#/c/25634/52/src/drivers/intel/fsp2_0/Kconfig File src/drivers/intel/fsp2_0/Kconfig: https://review.coreboot.org/#/c/25634/52/src/drivers/intel/fsp2_0/Kconfig@1… PS52, Line 175: config FSP_USES_MP_SERVICES_PPI Create a generalized way to include the PPI interface. Not for every single feature. e.g. FSP_PEIM_TO_PEIM_INTERFACE https://review.coreboot.org/#/c/25634/52/src/drivers/intel/fsp2_0/Makefile.… File src/drivers/intel/fsp2_0/Makefile.inc: https://review.coreboot.org/#/c/25634/52/src/drivers/intel/fsp2_0/Makefile.… PS52, Line 41: ramstage-$(CONFIG_FSP_USES_MP_SERVICES_PPI) += ppi/fsp_mp_service_ppi.c same here subdirs-$(CONFIG_FSP_PEIM_TO_PEIM_INTERFACE) += ppi and it's own makefile in the PPI directory https://review.coreboot.org/#/c/25634/52/src/drivers/intel/fsp2_0/include/f… File src/drivers/intel/fsp2_0/include/fsp/fsp_mp_service_ppi.h: PS52: If we start here with a PPI (interface) also make it part of the include/fsp/ppi/mp_service.h https://review.coreboot.org/#/c/25634/52/src/drivers/intel/fsp2_0/ppi/fsp_m… File src/drivers/intel/fsp2_0/ppi/fsp_mp_service_ppi.c: PS52: rename to mp_service.c -- To view, visit https://review.coreboot.org/c/coreboot/+/25634 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie844e3f15f759ea09a8f3fd24825ee740151c956 Gerrit-Change-Number: 25634 Gerrit-PatchSet: 52 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Vincent Zimmer <vincent.zimmer(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Nathaniel L Desimone <nathaniel.l.desimone(a)intel.com> Gerrit-Comment-Date: Fri, 08 Mar 2019 11:18:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: soc/qualcomm/qcs405: Support for new SoC
by Sricharan Ramabadhran (Code Review) 08 Mar '19

08 Mar '19

Sricharan Ramabadhran has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31767 ) Change subject: soc/qualcomm/qcs405: Support for new SoC ...................................................................... Patch Set 1: > Patch Set 1: > > (1 comment) Thanks Julius and Patrick for the reviews. So for this Config, will remove this and repost. -- To view, visit https://review.coreboot.org/c/coreboot/+/31767 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0e1078b23921f02e505b374ad515ab92260a6dda Gerrit-Change-Number: 31767 Gerrit-PatchSet: 1 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: nsekar(a)codeaurora.org Gerrit-CC: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Fri, 08 Mar 2019 10:34:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: src/mb: Shorten 'include <arch/x86/include/arch/acpigen.h>'
by HAOUAS Elyes (Code Review) 08 Mar '19

08 Mar '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31779 Change subject: src/mb: Shorten 'include <arch/x86/include/arch/acpigen.h>' ...................................................................... src/mb: Shorten 'include <arch/x86/include/arch/acpigen.h>' 'include <arch/acpigen.h>' is good enough. Change-Id: Idc96376571715f5dd2c386f187b5c6d1613accee Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/apple/macbook21/mainboard.c M src/mainboard/asus/p5gc-mx/cstates.c M src/mainboard/foxconn/d41s/cstates.c M src/mainboard/getac/p470/cstates.c M src/mainboard/gigabyte/ga-945gcm-s2l/cstates.c M src/mainboard/ibase/mb899/cstates.c M src/mainboard/intel/d510mo/cstates.c M src/mainboard/intel/d945gclf/cstates.c M src/mainboard/kontron/986lcd-m/cstates.c M src/mainboard/packardbell/ms2290/mainboard.c M src/mainboard/roda/rk886ex/cstates.c 11 files changed, 11 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/31779/1 diff --git a/src/mainboard/apple/macbook21/mainboard.c b/src/mainboard/apple/macbook21/mainboard.c index bafcb0b..25c4660 100644 --- a/src/mainboard/apple/macbook21/mainboard.c +++ b/src/mainboard/apple/macbook21/mainboard.c @@ -21,7 +21,7 @@ #include <device/pci_ops.h> #include <arch/interrupt.h> #include <northbridge/intel/i945/i945.h> -#include <arch/x86/include/arch/acpigen.h> +#include <arch/acpigen.h> #include <drivers/intel/gma/int15.h> #include <ec/acpi/ec.h> #define PANEL INT15_5F35_CL_DISPLAY_DEFAULT diff --git a/src/mainboard/asus/p5gc-mx/cstates.c b/src/mainboard/asus/p5gc-mx/cstates.c index f683756..0370a69 100644 --- a/src/mainboard/asus/p5gc-mx/cstates.c +++ b/src/mainboard/asus/p5gc-mx/cstates.c @@ -12,7 +12,7 @@ */ #include <device/device.h> -#include <arch/x86/include/arch/acpigen.h> +#include <arch/acpigen.h> int get_cst_entries(acpi_cstate_t **entries) { diff --git a/src/mainboard/foxconn/d41s/cstates.c b/src/mainboard/foxconn/d41s/cstates.c index b7eb6df..45b5752 100644 --- a/src/mainboard/foxconn/d41s/cstates.c +++ b/src/mainboard/foxconn/d41s/cstates.c @@ -14,7 +14,7 @@ */ #include <device/device.h> -#include <arch/x86/include/arch/acpigen.h> +#include <arch/acpigen.h> int get_cst_entries(acpi_cstate_t **entries) { diff --git a/src/mainboard/getac/p470/cstates.c b/src/mainboard/getac/p470/cstates.c index fe4af04..55e6ab8 100644 --- a/src/mainboard/getac/p470/cstates.c +++ b/src/mainboard/getac/p470/cstates.c @@ -12,7 +12,7 @@ */ #include <device/device.h> -#include <arch/x86/include/arch/acpigen.h> +#include <arch/acpigen.h> #include <southbridge/intel/i82801gx/i82801gx.h> static acpi_cstate_t cst_entries[] = { diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/cstates.c b/src/mainboard/gigabyte/ga-945gcm-s2l/cstates.c index f683756..0370a69 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/cstates.c +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/cstates.c @@ -12,7 +12,7 @@ */ #include <device/device.h> -#include <arch/x86/include/arch/acpigen.h> +#include <arch/acpigen.h> int get_cst_entries(acpi_cstate_t **entries) { diff --git a/src/mainboard/ibase/mb899/cstates.c b/src/mainboard/ibase/mb899/cstates.c index f683756..0370a69 100644 --- a/src/mainboard/ibase/mb899/cstates.c +++ b/src/mainboard/ibase/mb899/cstates.c @@ -12,7 +12,7 @@ */ #include <device/device.h> -#include <arch/x86/include/arch/acpigen.h> +#include <arch/acpigen.h> int get_cst_entries(acpi_cstate_t **entries) { diff --git a/src/mainboard/intel/d510mo/cstates.c b/src/mainboard/intel/d510mo/cstates.c index b7eb6df..45b5752 100644 --- a/src/mainboard/intel/d510mo/cstates.c +++ b/src/mainboard/intel/d510mo/cstates.c @@ -14,7 +14,7 @@ */ #include <device/device.h> -#include <arch/x86/include/arch/acpigen.h> +#include <arch/acpigen.h> int get_cst_entries(acpi_cstate_t **entries) { diff --git a/src/mainboard/intel/d945gclf/cstates.c b/src/mainboard/intel/d945gclf/cstates.c index f683756..0370a69 100644 --- a/src/mainboard/intel/d945gclf/cstates.c +++ b/src/mainboard/intel/d945gclf/cstates.c @@ -12,7 +12,7 @@ */ #include <device/device.h> -#include <arch/x86/include/arch/acpigen.h> +#include <arch/acpigen.h> int get_cst_entries(acpi_cstate_t **entries) { diff --git a/src/mainboard/kontron/986lcd-m/cstates.c b/src/mainboard/kontron/986lcd-m/cstates.c index f683756..0370a69 100644 --- a/src/mainboard/kontron/986lcd-m/cstates.c +++ b/src/mainboard/kontron/986lcd-m/cstates.c @@ -12,7 +12,7 @@ */ #include <device/device.h> -#include <arch/x86/include/arch/acpigen.h> +#include <arch/acpigen.h> int get_cst_entries(acpi_cstate_t **entries) { diff --git a/src/mainboard/packardbell/ms2290/mainboard.c b/src/mainboard/packardbell/ms2290/mainboard.c index 701d6a3..8e4293b 100644 --- a/src/mainboard/packardbell/ms2290/mainboard.c +++ b/src/mainboard/packardbell/ms2290/mainboard.c @@ -25,7 +25,7 @@ #include <northbridge/intel/nehalem/nehalem.h> #include <southbridge/intel/bd82x6x/pch.h> #include <ec/acpi/ec.h> -#include <arch/x86/include/arch/acpigen.h> +#include <arch/acpigen.h> #include <drivers/intel/gma/int15.h> #include <arch/interrupt.h> #include <pc80/keyboard.h> diff --git a/src/mainboard/roda/rk886ex/cstates.c b/src/mainboard/roda/rk886ex/cstates.c index f683756..0370a69 100644 --- a/src/mainboard/roda/rk886ex/cstates.c +++ b/src/mainboard/roda/rk886ex/cstates.c @@ -12,7 +12,7 @@ */ #include <device/device.h> -#include <arch/x86/include/arch/acpigen.h> +#include <arch/acpigen.h> int get_cst_entries(acpi_cstate_t **entries) { -- To view, visit https://review.coreboot.org/c/coreboot/+/31779 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc96376571715f5dd2c386f187b5c6d1613accee Gerrit-Change-Number: 31779 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: soc/intel/common: Remove common chip config use_fsp_mp_init
by Subrata Banik (Code Review) 08 Mar '19

08 Mar '19

Hello Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30289 to look at the new patch set (#7). Change subject: soc/intel/common: Remove common chip config use_fsp_mp_init ...................................................................... soc/intel/common: Remove common chip config use_fsp_mp_init This patch ensures to make use of common MP Init Kconfig to choose desire method to peform MP initialization for platform. Change-Id: I4ee51276026748e8daf154f89e57095e8fe50280 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/mainboard/google/dragonegg/Kconfig M src/mainboard/intel/icelake_rvp/Kconfig M src/mainboard/intel/saddlebrook/Kconfig M src/mainboard/intel/saddlebrook/devicetree.cb M src/soc/intel/apollolake/chip.c M src/soc/intel/cannonlake/romstage/fsp_params.c M src/soc/intel/common/block/chip/chip.c M src/soc/intel/common/block/cpu/mp_init.c M src/soc/intel/common/block/include/intelblocks/chip.h M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/chip_fsp20.c 11 files changed, 26 insertions(+), 41 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/30289/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/30289 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4ee51276026748e8daf154f89e57095e8fe50280 Gerrit-Change-Number: 30289 Gerrit-PatchSet: 7 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: soc/intel/common: Add Kconfig option to choose desired MP Init for pl...
by Subrata Banik (Code Review) 08 Mar '19

08 Mar '19

Hello Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30287 to look at the new patch set (#7). Change subject: soc/intel/common: Add Kconfig option to choose desired MP Init for platform ...................................................................... soc/intel/common: Add Kconfig option to choose desired MP Init for platform mainboard users can select correct MP Init Kconfig in order to perform MP initialization. 1. Native coreboot MP Init. 2. FSP to do MP Init. 3. FSP to make use of coreboot MP service PPI to make MP Init Change-Id: Ifbea463fdaf97d68c21a759c37f49492d58a056b Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/common/block/cpu/Kconfig 1 file changed, 23 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/30287/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/30287 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifbea463fdaf97d68c21a759c37f49492d58a056b Gerrit-Change-Number: 30287 Gerrit-PatchSet: 7 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit March 2019