coreboot-gerrit March 2019

coreboot-gerrit@coreboot.org

1 participants
1542 discussions

Change in ...coreboot[master]: soc/intel/braswell: Reserve IOAPIC and ROM resources
by Nico Huber (Code Review) 08 Mar '19

08 Mar '19

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29423 ) Change subject: soc/intel/braswell: Reserve IOAPIC and ROM resources ...................................................................... Patch Set 10: Code-Review+2 (1 comment) https://review.coreboot.org/#/c/29423/10/src/soc/intel/braswell/southcluste… File src/soc/intel/braswell/southcluster.c: https://review.coreboot.org/#/c/29423/10/src/soc/intel/braswell/southcluste… PS10, Line 82: (CONFIG_COREBOOT_ROMSIZE_KB*KiB)); /* BIOS ROM */ This has simply a static size in `acpi/lpc.asl`, the maximum 0xff000000..0xffffffff. Maybe use the same here? -- To view, visit https://review.coreboot.org/c/coreboot/+/29423 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I917c30892b46ac1d964e7bab339082d17a1e706d Gerrit-Change-Number: 29423 Gerrit-PatchSet: 10 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 08 Mar 2019 13:26:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: drivers/intel/fsp1_1/raminit.c: Make check FSP HOBs independent of CO...
by Frans Hendriks (Code Review) 08 Mar '19

08 Mar '19

Hello Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29371 to look at the new patch set (#3). Change subject: drivers/intel/fsp1_1/raminit.c: Make check FSP HOBs independent of CONFIG_DISPLAY_HOBS ...................................................................... drivers/intel/fsp1_1/raminit.c: Make check FSP HOBs independent of CONFIG_DISPLAY_HOBS Check for FSP HOBS is disabled when CONFIG_DISPLAY_HOBS is disabled. Use the CONFIG_DISPLAY_HOBS for determination of display HOB info only. BUG=N/A TEST=Intel CherryHill CRB Change-Id: I3776fa37866c7ef3aea090842387660c22bbdd4d Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- M src/drivers/intel/fsp1_1/raminit.c 1 file changed, 2 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/29371/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/29371 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3776fa37866c7ef3aea090842387660c22bbdd4d Gerrit-Change-Number: 29371 Gerrit-PatchSet: 3 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Huang Jin <huang.jin(a)intel.com> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: drivers/pc80/rtc/mc146818rtc.c: Reset RTC time on RTC power failure
by Frans Hendriks (Code Review) 08 Mar '19

08 Mar '19

Hello Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29329 to look at the new patch set (#5). Change subject: drivers/pc80/rtc/mc146818rtc.c: Reset RTC time on RTC power failure ...................................................................... drivers/pc80/rtc/mc146818rtc.c: Reset RTC time on RTC power failure RTC time contains invalid values on system without RTC battery. Add config to enable reset of RTC time when RTC power failure has been detected. BUG=N/A TEST=Portwell PQ-M107 booting Linux Embedded Change-Id: I5eae57d00f328400a8b03c28b7ecdbbc71522206 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- M src/drivers/pc80/rtc/Kconfig M src/drivers/pc80/rtc/mc146818rtc.c 2 files changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/29329/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/29329 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5eae57d00f328400a8b03c28b7ecdbbc71522206 Gerrit-Change-Number: 29329 Gerrit-PatchSet: 5 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: Mistral: QCS405: Added RPM support
by Sricharan Ramabadhran (Code Review) 08 Mar '19

08 Mar '19

Sricharan Ramabadhran has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29970 ) Change subject: Mistral: QCS405: Added RPM support ...................................................................... Patch Set 14: (1 comment) https://review.coreboot.org/#/c/29970/14/src/soc/qualcomm/qcs405/Makefile.i… File src/soc/qualcomm/qcs405/Makefile.inc: https://review.coreboot.org/#/c/29970/14/src/soc/qualcomm/qcs405/Makefile.i… PS14, Line 61: ifneq (,$(findstring $(RPM_FILE),$(rpm_file))) > This is a hack, I don't not think we should submit any code like this. […] Ok, will follow it up internally and come back on this. -- To view, visit https://review.coreboot.org/c/coreboot/+/29970 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17f491f0a4bd0dce7522b7e80e1bac97ec18b945 Gerrit-Change-Number: 29970 Gerrit-PatchSet: 14 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: nsekar(a)codeaurora.org Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Fri, 08 Mar 2019 12:34:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: Mistral: QCS405: Added RPM support
by Sricharan Ramabadhran (Code Review) 08 Mar '19

08 Mar '19

Sricharan Ramabadhran has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29970 ) Change subject: Mistral: QCS405: Added RPM support ...................................................................... Patch Set 14: (1 comment) https://review.coreboot.org/#/c/29970/14/src/soc/qualcomm/qcs405/include/so… File src/soc/qualcomm/qcs405/include/soc/memlayout.ld: https://review.coreboot.org/#/c/29970/14/src/soc/qualcomm/qcs405/include/so… PS14, Line 34: REGION(rpm, 0x00200000, 0xA4000, 0x0) > nit: Do you really need two regions here? They're both covering the same space. […] ho ok. One should be enough. Will remove that. -- To view, visit https://review.coreboot.org/c/coreboot/+/29970 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17f491f0a4bd0dce7522b7e80e1bac97ec18b945 Gerrit-Change-Number: 29970 Gerrit-PatchSet: 14 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: nsekar(a)codeaurora.org Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Fri, 08 Mar 2019 12:28:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: qcs405: Add DRAM resources
by Patrick Rudolph (Code Review) 08 Mar '19

08 Mar '19

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29954 ) Change subject: qcs405: Add DRAM resources ...................................................................... Patch Set 13: (2 comments) https://review.coreboot.org/#/c/29954/13/src/soc/qualcomm/qcs405/include/so… File src/soc/qualcomm/qcs405/include/soc/symbols.h: https://review.coreboot.org/#/c/29954/13/src/soc/qualcomm/qcs405/include/so… PS13, Line 29: extern u8 _dram_reserved[]; DECLARE_REGION as introduced in 7e0dea6317d https://review.coreboot.org/#/c/29954/13/src/soc/qualcomm/qcs405/soc.c File src/soc/qualcomm/qcs405/soc.c: https://review.coreboot.org/#/c/29954/13/src/soc/qualcomm/qcs405/soc.c@24 PS13, Line 24: ram_resource(dev, 0, (uintptr_t)_dram / KiB, DRAMSIZE1GB / KiB); 1 * GiB I don't see why a new define should be used instead -- To view, visit https://review.coreboot.org/c/coreboot/+/29954 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea79a942c297400c88aa205da713bcfcb8c51185 Gerrit-Change-Number: 29954 Gerrit-PatchSet: 13 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: nsekar(a)codeaurora.org Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Fri, 08 Mar 2019 12:21:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: qclib: Add qclib support
by Sricharan Ramabadhran (Code Review) 08 Mar '19

08 Mar '19

Sricharan Ramabadhran has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29967 ) Change subject: qclib: Add qclib support ...................................................................... Patch Set 14: > Patch Set 14: Code-Review-1 > > The QcLib stuff needs to be deduplicated with SDM845, please do not submit this as is. This is a very outdated version of the QcLib interface, we have made a lot of progress on CB:25208 since with full support for the interface table that's supposed to be used there. Hi Julius, So this patch is without the interface table support. Only loading the qclib blob. Will add the support for the interface table in later patches. Was planning to add all the relevant structures at that time. Hence trimmed this patch to be minimal like this. Not ok ? -- To view, visit https://review.coreboot.org/c/coreboot/+/29967 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I534af71163d034ea04420dda6a94ce31b08c8a07 Gerrit-Change-Number: 29967 Gerrit-PatchSet: 14 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: nsekar(a)codeaurora.org Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Fri, 08 Mar 2019 12:19:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: qclib: Add qclib support
by Sricharan Ramabadhran (Code Review) 08 Mar '19

08 Mar '19

Sricharan Ramabadhran has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29967 ) Change subject: qclib: Add qclib support ...................................................................... Patch Set 14: (1 comment) https://review.coreboot.org/#/c/29967/14/src/soc/qualcomm/qcs405/qclib_exec… File src/soc/qualcomm/qcs405/qclib_execute.c: https://review.coreboot.org/#/c/29967/14/src/soc/qualcomm/qcs405/qclib_exec… PS14, Line 27: PMIC_NAME "/ > In the rpm loader you're directly using the strings in the PROG_INIT() macro. […] ok will do -- To view, visit https://review.coreboot.org/c/coreboot/+/29967 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I534af71163d034ea04420dda6a94ce31b08c8a07 Gerrit-Change-Number: 29967 Gerrit-PatchSet: 14 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: nsekar(a)codeaurora.org Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Fri, 08 Mar 2019 12:18:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: qcs405: Add DRAM resources
by Sricharan Ramabadhran (Code Review) 08 Mar '19

08 Mar '19

Sricharan Ramabadhran has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29954 ) Change subject: qcs405: Add DRAM resources ...................................................................... Patch Set 13: (1 comment) https://review.coreboot.org/#/c/29954/13/src/soc/qualcomm/qcs405/include/so… File src/soc/qualcomm/qcs405/include/soc/memlayout.ld: https://review.coreboot.org/#/c/29954/13/src/soc/qualcomm/qcs405/include/so… PS13, Line 46: > Just curious, but is there any particular reason for moving them away from here? The new reserved re […] The DRAM START ADDRESS is from 0x80000000. Apart from that bl31.elf is compiled for between 0x85000000 to 0x8a100000 region. So need to reserve that. Will add it in comments -- To view, visit https://review.coreboot.org/c/coreboot/+/29954 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea79a942c297400c88aa205da713bcfcb8c51185 Gerrit-Change-Number: 29954 Gerrit-PatchSet: 13 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: nsekar(a)codeaurora.org Gerrit-CC: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Fri, 08 Mar 2019 12:15:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: soc/qualcomm/qcs405: Add MMU support
by Sricharan Ramabadhran (Code Review) 08 Mar '19

08 Mar '19

Sricharan Ramabadhran has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29950 ) Change subject: soc/qualcomm/qcs405: Add MMU support ...................................................................... Patch Set 13: (2 comments) https://review.coreboot.org/#/c/29950/13/src/soc/qualcomm/qcs405/include/so… File src/soc/qualcomm/qcs405/include/soc/symbols.h: https://review.coreboot.org/#/c/29950/13/src/soc/qualcomm/qcs405/include/so… PS13, Line 23: #define _ssram_size (_essram - _ssram) > This pattern has recently been replaced, please use DECLARE_REGION() (from <symbols.h>) now. ok, will do https://review.coreboot.org/#/c/29950/13/src/soc/qualcomm/qcs405/mmu.c File src/soc/qualcomm/qcs405/mmu.c: https://review.coreboot.org/#/c/29950/13/src/soc/qualcomm/qcs405/mmu.c@28 PS13, Line 28: _ssram_size > ... […] ok -- To view, visit https://review.coreboot.org/c/coreboot/+/29950 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8c6353be2c0379ec94f91223805762a2286de06d Gerrit-Change-Number: 29950 Gerrit-PatchSet: 13 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: nsekar(a)codeaurora.org Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Fri, 08 Mar 2019 11:52:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit March 2019