coreboot-gerrit February 2019

coreboot-gerrit@coreboot.org

1 participants
1249 discussions

Change in ...coreboot[master]: cpu/intel/speedstep: Add Netburst
by HAOUAS Elyes (Code Review) 15 Feb '19

15 Feb '19

Hello Kyösti Mälkki, Patrick Rudolph, Angel Pons, Arthur Heymans, Paul Menzel, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/22604 to look at the new patch set (#69). Change subject: cpu/intel/speedstep: Add Netburst ...................................................................... cpu/intel/speedstep: Add Netburst CPUs Netburst CPUs hang if we read MSR_PLATFORM_INFO or MSR_EXTENDED_CONFIG. The maximum bus ratio can be read in MSR_PERF_STAT[44:40] Tested with P4 (CPUID F65) on 945G-M4 board. Change-Id: I06e162d3260dedeb3b16583460633507fbcbd52a Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/intel/speedstep/speedstep.c 1 file changed, 46 insertions(+), 33 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/22604/69 -- To view, visit https://review.coreboot.org/c/coreboot/+/22604 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I06e162d3260dedeb3b16583460633507fbcbd52a Gerrit-Change-Number: 22604 Gerrit-PatchSet: 69 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: cpu/intel/speedstep: Add Netburst
by build bot (Jenkins) (Code Review) 15 Feb '19

15 Feb '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/22604 ) Change subject: cpu/intel/speedstep: Add Netburst ...................................................................... Patch Set 68: (2 comments) https://review.coreboot.org/#/c/22604/68/src/cpu/intel/speedstep/speedstep.c File src/cpu/intel/speedstep/speedstep.c: https://review.coreboot.org/#/c/22604/68/src/cpu/intel/speedstep/speedstep.… PS68, Line 118: } code indent should use tabs where possible https://review.coreboot.org/#/c/22604/68/src/cpu/intel/speedstep/speedstep.… PS68, Line 118: } please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/22604 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I06e162d3260dedeb3b16583460633507fbcbd52a Gerrit-Change-Number: 22604 Gerrit-PatchSet: 68 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 15 Feb 2019 12:38:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: cpu/intel/speedstep: Add Netburst
by build bot (Jenkins) (Code Review) 15 Feb '19

15 Feb '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/22604 ) Change subject: cpu/intel/speedstep: Add Netburst ...................................................................... Patch Set 67: (2 comments) https://review.coreboot.org/#/c/22604/67/src/cpu/intel/speedstep/speedstep.c File src/cpu/intel/speedstep/speedstep.c: https://review.coreboot.org/#/c/22604/67/src/cpu/intel/speedstep/speedstep.… PS67, Line 118: } code indent should use tabs where possible https://review.coreboot.org/#/c/22604/67/src/cpu/intel/speedstep/speedstep.… PS67, Line 118: } please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/22604 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I06e162d3260dedeb3b16583460633507fbcbd52a Gerrit-Change-Number: 22604 Gerrit-PatchSet: 67 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 15 Feb 2019 12:37:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: cpu/intel/speedstep: Add Netburst
by HAOUAS Elyes (Code Review) 15 Feb '19

15 Feb '19

Hello Kyösti Mälkki, Patrick Rudolph, Angel Pons, Arthur Heymans, Paul Menzel, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/22604 to look at the new patch set (#67). Change subject: cpu/intel/speedstep: Add Netburst ...................................................................... cpu/intel/speedstep: Add Netburst CPUs Netburst CPUs hang if we read MSR_PLATFORM_INFO or MSR_EXTENDED_CONFIG. The maximum bus ratio can be read in MSR_PERF_STAT[44:40] Tested with P4 (CPUID F65) on 945G-M4 board. Change-Id: I06e162d3260dedeb3b16583460633507fbcbd52a Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/intel/speedstep/speedstep.c 1 file changed, 45 insertions(+), 32 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/22604/67 -- To view, visit https://review.coreboot.org/c/coreboot/+/22604 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I06e162d3260dedeb3b16583460633507fbcbd52a Gerrit-Change-Number: 22604 Gerrit-PatchSet: 67 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: security/vboot: Add measured boot mode
by Werner Zeh (Code Review) 15 Feb '19

15 Feb '19

Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29547 ) Change subject: security/vboot: Add measured boot mode ...................................................................... Patch Set 55: (1 comment) I still dislike the idea of CBFS files being measured every go they are accessed. This will lead hashing the same file multiple times. https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_crtm.h File src/security/vboot/vboot_crtm.h: https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_crtm.h@47 PS55, Line 47: #define TPM_DATA_PCR 6 > I'm honestly still a bit confused by what logic you're splitting up these PCRs. […] There is one valid case for spliting up PCRs, at least a bit. There might be configuration data inside cbfs which should not be measured in the same PCR like runtime code. So just smashing everything into one single PCR would be counterproductive. -- To view, visit https://review.coreboot.org/c/coreboot/+/29547 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I339a2f1051e44f36aba9f99828f130592a09355e Gerrit-Change-Number: 29547 Gerrit-PatchSet: 55 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 15 Feb 2019 12:22:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: src/cpu/intel: Add model_f6x
by HAOUAS Elyes (Code Review) 15 Feb '19

15 Feb '19

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25565 ) Change subject: src/cpu/intel: Add model_f6x ...................................................................... Patch Set 30: (1 comment) https://review.coreboot.org/#/c/25565/26/src/cpu/intel/model_f6x/model_f6x_… File src/cpu/intel/model_f6x/model_f6x_init.c: https://review.coreboot.org/#/c/25565/26/src/cpu/intel/model_f6x/model_f6x_… PS26, Line 33: wrmsr(MSR_EBC_FREQUENCY_ID, msr_2c); > Which datasheet did you get this from? The IA32 manual I was looking at described these MSR bits 31- […] I'm using IA32 manual indeed 0x2c is read-only, it was just for test to understand why the value change for CPU1 after 'setup_lapic() -- To view, visit https://review.coreboot.org/c/coreboot/+/25565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6003ec0f4d4245ce5fc9c1f38e555bfcfa1c22b5 Gerrit-Change-Number: 25565 Gerrit-PatchSet: 30 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 15 Feb 2019 11:57:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: src/cpu/intel: Add model_f6x
by Kyösti Mälkki (Code Review) 15 Feb '19

15 Feb '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25565 ) Change subject: src/cpu/intel: Add model_f6x ...................................................................... Patch Set 30: (2 comments) https://review.coreboot.org/#/c/25565/26/src/cpu/intel/model_f6x/model_f6x_… File src/cpu/intel/model_f6x/model_f6x_init.c: https://review.coreboot.org/#/c/25565/26/src/cpu/intel/model_f6x/model_f6x_… PS26, Line 33: wrmsr(MSR_EBC_FREQUENCY_ID, msr_2c); Which datasheet did you get this from? The IA32 manual I was looking at described these MSR bits 31-24 as read-only, latched from bootstraps on hardware reset. https://review.coreboot.org/#/c/25565/26/src/cpu/intel/model_f6x/model_f6x_… PS26, Line 72: > here with printf , on debug console, CPU0 and CPU1 have the same MSR(0x2c).lo value = 0x11120511. […] Ramstage pretty much shuts down CPU1 so this register might get reset when woken up again. I am not convinced of writing MSR 0x2c in the first place. -- To view, visit https://review.coreboot.org/c/coreboot/+/25565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6003ec0f4d4245ce5fc9c1f38e555bfcfa1c22b5 Gerrit-Change-Number: 25565 Gerrit-PatchSet: 30 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 15 Feb 2019 11:28:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: cpu/intel/speedstep: Add Netburst
by Kyösti Mälkki (Code Review) 15 Feb '19

15 Feb '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/22604 ) Change subject: cpu/intel/speedstep: Add Netburst ...................................................................... Patch Set 66: (2 comments) https://review.coreboot.org/#/c/22604/66/src/cpu/intel/speedstep/acpi.c File src/cpu/intel/speedstep/acpi.c: https://review.coreboot.org/#/c/22604/66/src/cpu/intel/speedstep/acpi.c@57 PS66, Line 57: int fsb3 = get_ia32_fsb_x3(); This could be a separate change, with argument MSR_FSB_FREQ was not available with NetBurst? https://review.coreboot.org/#/c/22604/66/src/cpu/intel/speedstep/speedstep.c File src/cpu/intel/speedstep/speedstep.c: https://review.coreboot.org/#/c/22604/66/src/cpu/intel/speedstep/speedstep.… PS66, Line 102: break; Hmmm.. I don't like nested 'switch' statements that much. Doesn't this 'break' enter the default Merom values below? -- To view, visit https://review.coreboot.org/c/coreboot/+/22604 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I06e162d3260dedeb3b16583460633507fbcbd52a Gerrit-Change-Number: 22604 Gerrit-PatchSet: 66 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 15 Feb 2019 11:11:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: [WIP] add i945G based mainboard
by HAOUAS Elyes (Code Review) 15 Feb '19

15 Feb '19

Hello Kyösti Mälkki, Patrick Rudolph, Arthur Heymans, Idwer Vollering, Paul Menzel, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/25509 to look at the new patch set (#27). Change subject: [WIP] add i945G based mainboard ...................................................................... [WIP] add i945G based mainboard 82945GC - 82801Gx - W83627EHG CPU: CPUID 0f65.Mmicrocode loaded correctly. DDR2: Supports Up to 4 DIMM. S3: working properly. Issues: 1) It will not boot when using RAM 533MHz. I believe that there is a problem with time/clock or something related to clock when RAM 533 is used. 2) It will not boot if channel 0 is not populated at all. 3) HWM is not working. The FAN is running at high speed. Change-Id: I5398b990c26d087afb20e4b1028a7a1cad4b3ee3 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- A src/mainboard/nec/945g-m4/Kconfig A src/mainboard/nec/945g-m4/Kconfig.name A src/mainboard/nec/945g-m4/Makefile.inc A src/mainboard/nec/945g-m4/acpi/ec.asl A src/mainboard/nec/945g-m4/acpi/ich7_pci_irqs.asl A src/mainboard/nec/945g-m4/acpi/mainboard.asl A src/mainboard/nec/945g-m4/acpi/platform.asl A src/mainboard/nec/945g-m4/acpi/superio.asl A src/mainboard/nec/945g-m4/acpi/thermal.asl A src/mainboard/nec/945g-m4/acpi/video.asl A src/mainboard/nec/945g-m4/acpi_tables.c A src/mainboard/nec/945g-m4/board_info.txt A src/mainboard/nec/945g-m4/cmos.default A src/mainboard/nec/945g-m4/cmos.layout A src/mainboard/nec/945g-m4/cstates.c A src/mainboard/nec/945g-m4/devicetree.cb A src/mainboard/nec/945g-m4/dsdt.asl A src/mainboard/nec/945g-m4/gpio.c A src/mainboard/nec/945g-m4/hda_verb.c A src/mainboard/nec/945g-m4/mainboard.c A src/mainboard/nec/945g-m4/romstage.c A src/mainboard/nec/945g-m4/superio_hwm.c A src/mainboard/nec/945g-m4/superio_hwm.h A src/mainboard/nec/Kconfig A src/mainboard/nec/Kconfig.name M src/northbridge/intel/i945/early_init.c M src/northbridge/intel/i945/gma.c 27 files changed, 1,417 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/25509/27 -- To view, visit https://review.coreboot.org/c/coreboot/+/25509 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5398b990c26d087afb20e4b1028a7a1cad4b3ee3 Gerrit-Change-Number: 25509 Gerrit-PatchSet: 27 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: [WIP] add i945G based mainboard
by HAOUAS Elyes (Code Review) 15 Feb '19

15 Feb '19

Hello Kyösti Mälkki, Patrick Rudolph, Arthur Heymans, Idwer Vollering, Paul Menzel, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/25509 to look at the new patch set (#26). Change subject: [WIP] add i945G based mainboard ...................................................................... [WIP] add i945G based mainboard 82945GC - 82801Gx - W83627EHG CPU: CPUID 0f65.Mmicrocode loaded correctly. DDR2: Supports Up to 4 DIMM. S3: working properly. Issues: 1) It will not boot when using RAM 533MHz. I believe that there is a problem with time/clock or something related to clock when RAM 533 is used. 2) It will not boot if channel 0 is not populated at all. 3) HWM is not working. The FAN is running at high speed. Change-Id: I5398b990c26d087afb20e4b1028a7a1cad4b3ee3 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- A src/mainboard/nec/945g-m4/Kconfig A src/mainboard/nec/945g-m4/Kconfig.name A src/mainboard/nec/945g-m4/Makefile.inc A src/mainboard/nec/945g-m4/acpi/ec.asl A src/mainboard/nec/945g-m4/acpi/ich7_pci_irqs.asl A src/mainboard/nec/945g-m4/acpi/mainboard.asl A src/mainboard/nec/945g-m4/acpi/platform.asl A src/mainboard/nec/945g-m4/acpi/superio.asl A src/mainboard/nec/945g-m4/acpi/thermal.asl A src/mainboard/nec/945g-m4/acpi/video.asl A src/mainboard/nec/945g-m4/acpi_tables.c A src/mainboard/nec/945g-m4/board_info.txt A src/mainboard/nec/945g-m4/cmos.default A src/mainboard/nec/945g-m4/cmos.layout A src/mainboard/nec/945g-m4/cstates.c A src/mainboard/nec/945g-m4/devicetree.cb A src/mainboard/nec/945g-m4/dsdt.asl A src/mainboard/nec/945g-m4/gpio.c A src/mainboard/nec/945g-m4/hda_verb.c A src/mainboard/nec/945g-m4/mainboard.c A src/mainboard/nec/945g-m4/romstage.c A src/mainboard/nec/945g-m4/superio_hwm.c A src/mainboard/nec/945g-m4/superio_hwm.h A src/mainboard/nec/Kconfig A src/mainboard/nec/Kconfig.name M src/northbridge/intel/i945/early_init.c M src/northbridge/intel/i945/gma.c 27 files changed, 1,417 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/25509/26 -- To view, visit https://review.coreboot.org/c/coreboot/+/25509 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5398b990c26d087afb20e4b1028a7a1cad4b3ee3 Gerrit-Change-Number: 25509 Gerrit-PatchSet: 26 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit February 2019