coreboot-gerrit February 2019

coreboot-gerrit@coreboot.org

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Change in ...coreboot[master]: drivers/i2c/max98373: Set default bus speed as I2C_SPEED_FAST
by Furquan Shaikh (Code Review) 15 Feb '19

15 Feb '19

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31407 Change subject: drivers/i2c/max98373: Set default bus speed as I2C_SPEED_FAST ...................................................................... drivers/i2c/max98373: Set default bus speed as I2C_SPEED_FAST This change sets default bus speed as I2C_SPEED_FAST instead of I2C_SPEED_STANDARD when board does not provide any speed. This makes it similar to all other i2c drivers in coreboot. BUG=b:124403846 BRANCH=nocturne,atlas Change-Id: I877d837eea2dfebf78ad7d97a32ee2071500625e Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/drivers/i2c/max98373/max98373.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/31407/1 diff --git a/src/drivers/i2c/max98373/max98373.c b/src/drivers/i2c/max98373/max98373.c index e10ccf1..0431c2e 100644 --- a/src/drivers/i2c/max98373/max98373.c +++ b/src/drivers/i2c/max98373/max98373.c @@ -34,7 +34,7 @@ struct acpi_i2c i2c = { .address = dev->path.i2c.device, .mode_10bit = dev->path.i2c.mode_10bit, - .speed = config->bus_speed ? : I2C_SPEED_STANDARD, + .speed = config->bus_speed ? : I2C_SPEED_FAST, .resource = scope, }; struct acpi_dp *dp; -- To view, visit https://review.coreboot.org/c/coreboot/+/31407 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I877d837eea2dfebf78ad7d97a32ee2071500625e Gerrit-Change-Number: 31407 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: security/tpm: Fix TCPA log feature
by Julius Werner (Code Review) 15 Feb '19

15 Feb '19

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29563 ) Change subject: security/tpm: Fix TCPA log feature ...................................................................... Patch Set 32: (8 comments) https://review.coreboot.org/#/c/29563/32/src/commonlib/include/commonlib/tc… File src/commonlib/include/commonlib/tcpa_log_serialized.h: https://review.coreboot.org/#/c/29563/32/src/commonlib/include/commonlib/tc… PS32, Line 24: TCPA_PCR_HASH_TYPE This should be called ...HASH_TYPE_LENGTH or something like that. Also, do we realy need to store this in ASCII? Wouldn't a uint32_t enum be enough (ideally reusing enum vb2_hash_algorithm)? And aren't we always going to use the same hash for all measurements, so why put it into every entry rather than once into tcpa_table? https://review.coreboot.org/#/c/29563/26/src/security/tpm/tspi/log.c File src/security/tpm/tspi/log.c: https://review.coreboot.org/#/c/29563/26/src/security/tpm/tspi/log.c@32 PS26, Line 32: struct tcpa_table *tclt; Why is the static gone here, again? (Sorry if we talked about that already, I forgot everything about this CL since I last reviewed it.) https://review.coreboot.org/#/c/29563/32/src/security/tpm/tspi/log.c File src/security/tpm/tspi/log.c: https://review.coreboot.org/#/c/29563/32/src/security/tpm/tspi/log.c@75 PS32, Line 75: " %u ", No need to put every element on a new line, I think? https://review.coreboot.org/#/c/29563/32/src/security/tpm/tspi/log.c@83 PS32, Line 83: tce->digest_type, If you store an enum this could look up the conversion to ASCII in a table. (There are existing tables and helpers for this in vboot_reference/host/lib21/host_key.c, maybe those could be moved into a place that coreboot can link.) https://review.coreboot.org/#/c/29563/32/src/security/tpm/tspi/log.c@92 PS32, Line 92: if (ENV_POSTCAR) You realize this means you won't be measuring the ramstage, right? Are you planning to fix that later? https://review.coreboot.org/#/c/29563/32/src/security/tpm/tspi/log.c@104 PS32, Line 104: if (!name || !digest_type) Should this be an assert()? https://review.coreboot.org/#/c/29563/32/src/security/tpm/tspi/log.c@117 PS32, Line 117: MIN(digest_length, TCPA_DIGEST_MAX_LENGTH) This can still just be digest_length https://review.coreboot.org/#/c/29563/32/src/security/tpm/tspi/log.c@140 PS32, Line 140: tclt->num_entries = 0; Now that this hook is only called once you shouldn't need this. -- To view, visit https://review.coreboot.org/c/coreboot/+/29563 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic93133531b84318f48940d34bded48cbae739c44 Gerrit-Change-Number: 29563 Gerrit-PatchSet: 32 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 15 Feb 2019 05:55:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/sarien/variants/sarien: Enable elan touchscreen
by Chris Zhou (Code Review) 15 Feb '19

15 Feb '19

Chris Zhou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31413 Change subject: mb/google/sarien/variants/sarien: Enable elan touchscreen ...................................................................... mb/google/sarien/variants/sarien: Enable elan touchscreen BUG=b:119763054 BRANCH=master TEST=Verify touchscreen on sarien works with this change. Signed-off-by: Chris Zhou <chris_zhou(a)compal.corp-partner.google.com> Change-Id: I790436338705fc9d68f714245e9b9bb518ddb30a --- M src/mainboard/google/sarien/variants/sarien/devicetree.cb 1 file changed, 13 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/31413/1 diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index d3d26f9..d6563fb 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -235,6 +235,19 @@ register "hid_desc_reg_offset" = "0x0" device i2c 10 on end end + chip drivers/i2c/hid + register "generic.hid" = ""ELAN900C"" + register "generic.desc" = ""ELAN Touchscreen"" + register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_C23_IRQ)" + register "generic.probed" = "1" + register "generic.enable_gpio" = + "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E7)" + register "generic.enable_delay_ms" = "5" + register "generic.enable_off_delay_ms" = "100" + register "generic.has_power_resource" = "1" + register "hid_desc_reg_offset" = "0x01" + device i2c 10 on end + end end # I2C #0 device pci 15.1 on chip drivers/i2c/generic -- To view, visit https://review.coreboot.org/c/coreboot/+/31413 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I790436338705fc9d68f714245e9b9bb518ddb30a Gerrit-Change-Number: 31413 Gerrit-PatchSet: 1 Gerrit-Owner: Chris Zhou <chris_zhou(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: security/vboot: Add measured boot mode
by Julius Werner (Code Review) 15 Feb '19

15 Feb '19

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29547 ) Change subject: security/vboot: Add measured boot mode ...................................................................... Patch Set 55: (5 comments) https://review.coreboot.org/#/c/29547/55/src/lib/cbfs.c File src/lib/cbfs.c: https://review.coreboot.org/#/c/29547/55/src/lib/cbfs.c@64 PS55, Line 64: if (!ret && !ENV_BOOTBLOCK && !ENV_DECOMPRESSOR && IS_ENABLED(CONFIG_VBOOT_MEASURED_BOOT)) { Let's not spill all this logic into this function, to keep it clean. Just put int ret = cbfs_locate(...); if (!ret) vboot_crtm_cbfs_hook(fh, name); return ret; here, and then put vboot_crtm_cbfs_hook() in the header as either an empty inline or a prototype, depending on whether the feature is enabled (e.g. like timestamp_add()). You can extract the CBFS type and check for the right stage inside that function. https://review.coreboot.org/#/c/29547/55/src/lib/cbfs.c@147 PS55, Line 147: && !IS_ENABLED(CONFIG_COMPRESS_RAMSTAGE)) There are still dozens of Jenkins errors and unrelated whitespace changes in here. It looks like you're running some sort of automated formatting tool on every file you touch... please don't do that! If you want to fix formatting somewhere, please do it in a separate CL so it's clearly separated from the new feature stuff. https://review.coreboot.org/#/c/29547/55/src/lib/prog_loaders.c File src/lib/prog_loaders.c: https://review.coreboot.org/#/c/29547/55/src/lib/prog_loaders.c@52 PS55, Line 52: if (vboot_measure_prog_hook(prog)) Same here. (Actually, why do we have two hooks now? Can't you somehow cover this from the cbfs_boot_locate() hook as well? This function calls that, after all.) https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_crtm.h File src/security/vboot/vboot_crtm.h: https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_crtm.h@47 PS55, Line 47: #define TPM_DATA_PCR 6 I'm honestly still a bit confused by what logic you're splitting up these PCRs. Now the "static data" may contain data that's both from the RO and RW image. What's the goal here? Really, why do we need to use more than one PCR at all? All the information the retrace the hash is in the TCPA log, right? So wouldn't one be enough? If userland only wanted to attest some but not all components measured in there, it can just "trust" the hashes in the TCPA log for the components it doesn't care about when recreating the PCR value... that still doesn't make it any less safe for the components that it actually tries to verify. (In fact, I think for any application trying to verify this TCPA log it would probably be easier if it was all in one bucket, rather than having to follow exactly which component has been measured into where.) PCRs are a limited (and platform-dependent) resource, and you're already wasting 6 of them now for no clear reason. I think it would be better if you just throw it all into e.g. PCR2 and leave the others available for orthogonal features. https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_crtm.c File src/security/vboot/vboot_crtm.c: https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_crtm.c@209 PS55, Line 209: default: Can't you just add a CBFS_TYPE_STAGE: section here and cover the progs with that? -- To view, visit https://review.coreboot.org/c/coreboot/+/29547 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I339a2f1051e44f36aba9f99828f130592a09355e Gerrit-Change-Number: 29547 Gerrit-PatchSet: 55 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 15 Feb 2019 01:28:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: security/vboot: Add measured boot mode
by build bot (Jenkins) (Code Review) 15 Feb '19

15 Feb '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29547 ) Change subject: security/vboot: Add measured boot mode ...................................................................... Patch Set 55: (14 comments) https://review.coreboot.org/#/c/29547/55/src/lib/cbfs.c File src/lib/cbfs.c: https://review.coreboot.org/#/c/29547/55/src/lib/cbfs.c@64 PS55, Line 64: if (!ret && !ENV_BOOTBLOCK && !ENV_DECOMPRESSOR && IS_ENABLED(CONFIG_VBOOT_MEASURED_BOOT)) { line over 80 characters https://review.coreboot.org/#/c/29547/55/src/lib/cbfs.c@111 PS55, Line 111: size_t in_size, void *buffer, size_t buffer_size, uint32_t compression) line over 80 characters https://review.coreboot.org/#/c/29547/55/src/lib/cbfs.c@124 PS55, Line 124: if ((ENV_BOOTBLOCK || ENV_VERSTAGE) && !IS_ENABLED(CONFIG_COMPRESS_PRERAM_STAGES)) line over 80 characters https://review.coreboot.org/#/c/29547/55/src/lib/cbfs.c@266 PS55, Line 266: if (ENV_VERSTAGE && !IS_ENABLED(CONFIG_NO_XIP_EARLY_STAGES) && IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)) { line over 80 characters https://review.coreboot.org/#/c/29547/55/src/lib/prog_loaders.c File src/lib/prog_loaders.c: https://review.coreboot.org/#/c/29547/55/src/lib/prog_loaders.c@51 PS55, Line 51: if (!ENV_BOOTBLOCK && !ENV_DECOMPRESSOR && IS_ENABLED(CONFIG_VBOOT_MEASURED_BOOT)) line over 80 characters https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_crtm.h File src/security/vboot/vboot_crtm.h: https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_crtm.h@85 PS55, Line 85: uint32_t vboot_measure_region_hook(const struct region_device *region, const char *name, uint32_t type); line over 80 characters https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_crtm.c File src/security/vboot/vboot_crtm.c: https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_crtm.c@153 PS55, Line 153: uint32_t vboot_measure_region_hook(const struct region_device *region, const char *name, uint32_t type) line over 80 characters https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_logic.c File src/security/vboot/vboot_logic.c: https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_logic.c@98 PS55, Line 98: BUG(); /* Should never get called if init() returned an error. */ Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON() https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_logic.c@1… PS55, Line 104: BUG(); /* Should never get called if init() returned an error. */ Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON() https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_logic.c@2… PS55, Line 281: return vboot_extend_pcr(ctx, 0, BOOT_MODE_PCR) || vboot_extend_pcr(ctx, 1, HWID_DIGEST_PCR); line over 80 characters https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_logic.c@3… PS55, Line 308: if (IS_ENABLED(CONFIG_RESUME_PATH_SAME_AS_BOOT) && vboot_platform_is_resuming()) line over 80 characters https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_logic.c@3… PS55, Line 319: if (IS_ENABLED(CONFIG_VBOOT_MEASURED_BOOT) && !(ctx.flags & VB2_CONTEXT_S3_RESUME)) { line over 80 characters https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_logic.c@3… PS55, Line 324: if (IS_ENABLED(CONFIG_VBOOT_PHYSICAL_DEV_SWITCH) && get_developer_mode_switch()) line over 80 characters https://review.coreboot.org/#/c/29547/55/src/security/vboot/vboot_logic.c@3… PS55, Line 333: if (IS_ENABLED(CONFIG_VBOOT_WIPEOUT_SUPPORTED) && get_wipeout_mode_switch()) line over 80 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/29547 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I339a2f1051e44f36aba9f99828f130592a09355e Gerrit-Change-Number: 29547 Gerrit-PatchSet: 55 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 15 Feb 2019 00:32:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: security/vboot: Add measured boot mode
by Philipp Deppenwiese (Code Review) 15 Feb '19

15 Feb '19

Hello Patrick Rudolph, Aaron Durbin, Piotr Król, Julius Werner, Krystian Hebel, Patrick Rudolph, Stefan Reinauer, Paul Menzel, build bot (Jenkins), Patrick Georgi, Werner Zeh, Huang Jin, York Yang, David Hendricks, Martin Roth, Michał Żygowski, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29547 to look at the new patch set (#55). Change subject: security/vboot: Add measured boot mode ...................................................................... security/vboot: Add measured boot mode * Introduce a measured boot mode into vboot. * Add hook for stage measurements in prog_ops. * Implement and hook-up CRTM in vboot and check for suspend. * Documentation will be done in a follow up Change-Id: I339a2f1051e44f36aba9f99828f130592a09355e Signed-off-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com> --- M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Makefile.inc M src/lib/cbfs.c M src/lib/fmap.c M src/lib/prog_loaders.c M src/lib/prog_ops.c M src/security/tpm/tspi/tspi.c M src/security/vboot/Kconfig M src/security/vboot/Makefile.inc A src/security/vboot/vboot_crtm.c A src/security/vboot/vboot_crtm.h M src/security/vboot/vboot_logic.c M src/soc/amd/stoneyridge/Makefile.inc M src/soc/intel/baytrail/Makefile.inc M src/soc/intel/braswell/Makefile.inc M src/soc/intel/broadwell/Makefile.inc M src/soc/intel/fsp_baytrail/Makefile.inc M src/soc/intel/fsp_broadwell_de/Makefile.inc M src/soc/mediatek/mt8183/include/soc/memlayout.ld M src/soc/rockchip/rk3288/include/soc/memlayout.ld M util/abuild/abuild 22 files changed, 405 insertions(+), 60 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/29547/55 -- To view, visit https://review.coreboot.org/c/coreboot/+/29547 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I339a2f1051e44f36aba9f99828f130592a09355e Gerrit-Change-Number: 29547 Gerrit-PatchSet: 55 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/clevo/n130wu: Add mainboard
by Felix Singer (Code Review) 14 Feb '19

14 Feb '19

Hello Paul Menzel, Stefan Reinauer, Philipp Deppenwiese, build bot (Jenkins), Martin Roth, Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/28640 to look at the new patch set (#84). Change subject: mb/clevo/n130wu: Add mainboard ...................................................................... mb/clevo/n130wu: Add mainboard Devices: - N130WU / N131WU Working: - Compiling - Seabios, iPXE - NVMe, SATA3, booting from SSD into Arch Linux - USB2, USB3 - Graphics, mDP, HDMI - Sound - Webcam - WLAN, LAN, Bluetooth, LTE - Keyboard, touchpad - TPM - flashrom support; reading / flashing from Linux Works, but needs testing: - Thunderbolt WIP: - Documentation Not working: - EC ACPI Untested: - Virtualization Change-Id: I364f5849ef88f43b85efbd7a635a27e54d08c513 Signed-off-by: Felix Singer <migy(a)darmstadt.ccc.de> --- A Documentation/mainboard/clevo/index.md A Documentation/mainboard/clevo/n130wu/index.md A Documentation/mainboard/clevo/n130wu/n130wu_overview.jpg M Documentation/mainboard/index.md A src/mainboard/clevo/Kconfig A src/mainboard/clevo/Kconfig.name A src/mainboard/clevo/kbl-u/Kconfig A src/mainboard/clevo/kbl-u/Kconfig.name A src/mainboard/clevo/kbl-u/Makefile.inc A src/mainboard/clevo/kbl-u/acpi/ec.asl A src/mainboard/clevo/kbl-u/acpi/superio.asl A src/mainboard/clevo/kbl-u/acpi_tables.c A src/mainboard/clevo/kbl-u/board_info.txt A src/mainboard/clevo/kbl-u/dsdt.asl A src/mainboard/clevo/kbl-u/gpio.h A src/mainboard/clevo/kbl-u/hda_verb.c A src/mainboard/clevo/kbl-u/pei_data.c A src/mainboard/clevo/kbl-u/pei_data.h A src/mainboard/clevo/kbl-u/ramstage.c A src/mainboard/clevo/kbl-u/romstage.c A src/mainboard/clevo/kbl-u/variants/n13xwu/data.vbt A src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb 22 files changed, 1,286 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/28640/84 -- To view, visit https://review.coreboot.org/c/coreboot/+/28640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I364f5849ef88f43b85efbd7a635a27e54d08c513 Gerrit-Change-Number: 28640 Gerrit-PatchSet: 84 Gerrit-Owner: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Shaleen jain <shaleen(a)jain.sh> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/clevo/n130wu: Add mainboard
by Felix Singer (Code Review) 14 Feb '19

14 Feb '19

Hello Paul Menzel, Stefan Reinauer, Philipp Deppenwiese, build bot (Jenkins), Martin Roth, Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/28640 to look at the new patch set (#83). Change subject: mb/clevo/n130wu: Add mainboard ...................................................................... mb/clevo/n130wu: Add mainboard Devices: - N130WU / N131WU Working: - Compiling - Seabios, iPXE - NVMe, SATA3, booting from SSD into Arch Linux - USB2, USB3 - Graphics, mDP, HDMI - Sound - Webcam - WLAN, LAN, Bluetooth, LTE - Keyboard, touchpad - TPM - flashrom support; reading / flashing from Linux Works, but needs testing: - Thunderbolt WIP: - Documentation Not working: - EC ACPI Untested: - Virtualization Change-Id: I364f5849ef88f43b85efbd7a635a27e54d08c513 Signed-off-by: Felix Singer <migy(a)darmstadt.ccc.de> --- A Documentation/mainboard/clevo/index.md A Documentation/mainboard/clevo/n130wu/index.md A Documentation/mainboard/clevo/n130wu/n130wu_overview.jpg M Documentation/mainboard/index.md A src/mainboard/clevo/Kconfig A src/mainboard/clevo/Kconfig.name A src/mainboard/clevo/kbl-u/Kconfig A src/mainboard/clevo/kbl-u/Kconfig.name A src/mainboard/clevo/kbl-u/Makefile.inc A src/mainboard/clevo/kbl-u/acpi/ec.asl A src/mainboard/clevo/kbl-u/acpi/superio.asl A src/mainboard/clevo/kbl-u/acpi_tables.c A src/mainboard/clevo/kbl-u/board_info.txt A src/mainboard/clevo/kbl-u/dsdt.asl A src/mainboard/clevo/kbl-u/gpio.h A src/mainboard/clevo/kbl-u/hda_verb.c A src/mainboard/clevo/kbl-u/pei_data.c A src/mainboard/clevo/kbl-u/pei_data.h A src/mainboard/clevo/kbl-u/ramstage.c A src/mainboard/clevo/kbl-u/romstage.c A src/mainboard/clevo/kbl-u/variants/n13xwu/data.vbt A src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb 22 files changed, 1,265 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/28640/83 -- To view, visit https://review.coreboot.org/c/coreboot/+/28640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I364f5849ef88f43b85efbd7a635a27e54d08c513 Gerrit-Change-Number: 28640 Gerrit-PatchSet: 83 Gerrit-Owner: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Shaleen jain <shaleen(a)jain.sh> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/clevo/n130wu: Add mainboard
by Felix Singer (Code Review) 14 Feb '19

14 Feb '19

Hello Paul Menzel, Stefan Reinauer, Philipp Deppenwiese, build bot (Jenkins), Martin Roth, Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/28640 to look at the new patch set (#82). Change subject: mb/clevo/n130wu: Add mainboard ...................................................................... mb/clevo/n130wu: Add mainboard Devices: - N130WU / N131WU Working: - Compiling - Seabios, iPXE - NVMe, SATA3, booting from SSD into Arch Linux - USB2, USB3 - Graphics, mDP, HDMI - Sound - Webcam - WLAN, LAN, Bluetooth, LTE - Keyboard, touchpad - TPM - flashrom support; reading / flashing from Linux Works, but needs testing: - Thunderbolt WIP: - Documentation Not working: - EC ACPI Untested: - Virtualization Change-Id: I364f5849ef88f43b85efbd7a635a27e54d08c513 Signed-off-by: Felix Singer <migy(a)darmstadt.ccc.de> --- A Documentation/mainboard/clevo/index.md A Documentation/mainboard/clevo/n130wu/index.md A Documentation/mainboard/clevo/n130wu/n130wu_overview.jpg M Documentation/mainboard/index.md A src/mainboard/clevo/Kconfig A src/mainboard/clevo/Kconfig.name A src/mainboard/clevo/kbl-u/Kconfig A src/mainboard/clevo/kbl-u/Kconfig.name A src/mainboard/clevo/kbl-u/Makefile.inc A src/mainboard/clevo/kbl-u/acpi/ec.asl A src/mainboard/clevo/kbl-u/acpi/superio.asl A src/mainboard/clevo/kbl-u/acpi_tables.c A src/mainboard/clevo/kbl-u/board_info.txt A src/mainboard/clevo/kbl-u/devicetree.cb A src/mainboard/clevo/kbl-u/dsdt.asl A src/mainboard/clevo/kbl-u/gpio.h A src/mainboard/clevo/kbl-u/hda_verb.c A src/mainboard/clevo/kbl-u/pei_data.c A src/mainboard/clevo/kbl-u/pei_data.h A src/mainboard/clevo/kbl-u/ramstage.c A src/mainboard/clevo/kbl-u/romstage.c A src/mainboard/clevo/kbl-u/variants/n13xwu/data.vbt A src/mainboard/clevo/kbl-u/variants/n13xwu/overridetree.cb 23 files changed, 1,266 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/28640/82 -- To view, visit https://review.coreboot.org/c/coreboot/+/28640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I364f5849ef88f43b85efbd7a635a27e54d08c513 Gerrit-Change-Number: 28640 Gerrit-PatchSet: 82 Gerrit-Owner: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Shaleen jain <shaleen(a)jain.sh> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/clevo/n130wu: Add mainboard
by build bot (Jenkins) (Code Review) 14 Feb '19

14 Feb '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/28640 ) Change subject: mb/clevo/n130wu: Add mainboard ...................................................................... Patch Set 81: (2 comments) https://review.coreboot.org/#/c/28640/81/src/mainboard/clevo/kbl-u/gpio.h File src/mainboard/clevo/kbl-u/gpio.h: https://review.coreboot.org/#/c/28640/81/src/mainboard/clevo/kbl-u/gpio.h@1… PS81, Line 168: /* I2C5_SDA/ISH_I2C2_SDA */ _PAD_CFG_STRUCT(GPP_F10, 0x44000b02, 0x2000000), line over 80 characters https://review.coreboot.org/#/c/28640/81/src/mainboard/clevo/kbl-u/gpio.h@1… PS81, Line 169: /* I2C5_SCL/ISH_I2C2_SCL */ _PAD_CFG_STRUCT(GPP_F11, 0x44000b02, 0x2000000), line over 80 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/28640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I364f5849ef88f43b85efbd7a635a27e54d08c513 Gerrit-Change-Number: 28640 Gerrit-PatchSet: 81 Gerrit-Owner: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Shaleen jain <shaleen(a)jain.sh> Gerrit-Comment-Date: Thu, 14 Feb 2019 21:24:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit February 2019