Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29682 )
Change subject: soc/intel/skylake: Use real common code for VMX init
......................................................................
Patch Set 7:
(2 comments)
https://review.coreboot.org/#/c/29682/7//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/29682/7//COMMIT_MSG@9
PS7, Line 9: Use the common VMX implementation, and set IA32_FEATURE_CONTROL
Thanks, fetched the wrong patch set... I wonder why they made the
patch set handling such awkward in the new UI.
https://review.coreboot.org/#/c/29682/7/src/soc/intel/skylake/cpu.c
File src/soc/intel/skylake/cpu.c:
https://review.coreboot.org/#/c/29682/7/src/soc/intel/skylake/cpu.c@496
PS7, Line 496: mp_run_on_all_cpus(vmx_configure, NULL, 2 * USECS_PER_MSEC);
:
: mp_run_on_all_cpus(sgx_configure, NULL, 14 * USECS_PER_MSEC);
:
: mp_run_on_all_cpus(fc_lock_configure, NULL, 2 * USECS_PER_MSEC);
> not the scope of this patch but why is it run in post_mp_init and not in the cpu_driver.ops. […]
SGX probably because of "requirements", the lock because of SGX,
but VMX could be set earlier.
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Gerrit-Change-Id: Iea598cf74ba542a650433719f29cb5c9df700c0f
Gerrit-Change-Number: 29682
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29682 )
Change subject: soc/intel/skylake: Use real common code for VMX init
......................................................................
Patch Set 7: Code-Review+2
(1 comment)
https://review.coreboot.org/#/c/29682/7/src/soc/intel/skylake/cpu.c
File src/soc/intel/skylake/cpu.c:
https://review.coreboot.org/#/c/29682/7/src/soc/intel/skylake/cpu.c@496
PS7, Line 496: mp_run_on_all_cpus(vmx_configure, NULL, 2 * USECS_PER_MSEC);
:
: mp_run_on_all_cpus(sgx_configure, NULL, 14 * USECS_PER_MSEC);
:
: mp_run_on_all_cpus(fc_lock_configure, NULL, 2 * USECS_PER_MSEC);
not the scope of this patch but why is it run in post_mp_init and not in the cpu_driver.ops.init ?
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Matt DeVillier has uploaded a new patch set (#7) to the change originally created by Nico Huber. ( https://review.coreboot.org/c/coreboot/+/29682 )
Change subject: soc/intel/skylake: Use real common code for VMX init
......................................................................
soc/intel/skylake: Use real common code for VMX init
Use the common VMX implementation, and set IA32_FEATURE_CONTROL
lock bit per Kconfig *after* SGX is configured (as SGX also sets
bits on the IA32_FEATURE_CONTROL register).
As it is now correctly based on a Kconfig, the `VmxEnable` devicetree
setting vanishes.
Test: build/boot google/[chell,fizz], observe Virtualization enabled
under Windows 10 when VMX enabled and lock bit set.
Change-Id: Iea598cf74ba542a650433719f29cb5c9df700c0f
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
---
M src/mainboard/google/eve/devicetree.cb
M src/mainboard/google/fizz/variants/baseboard/devicetree.cb
M src/mainboard/google/glados/variants/asuka/devicetree.cb
M src/mainboard/google/glados/variants/caroline/devicetree.cb
M src/mainboard/google/glados/variants/cave/devicetree.cb
M src/mainboard/google/glados/variants/chell/devicetree.cb
M src/mainboard/google/glados/variants/glados/devicetree.cb
M src/mainboard/google/glados/variants/lars/devicetree.cb
M src/mainboard/google/glados/variants/sentry/devicetree.cb
M src/mainboard/google/poppy/variants/atlas/devicetree.cb
M src/mainboard/google/poppy/variants/baseboard/devicetree.cb
M src/mainboard/google/poppy/variants/nami/devicetree.cb
M src/mainboard/google/poppy/variants/nautilus/devicetree.cb
M src/mainboard/google/poppy/variants/nocturne/devicetree.cb
M src/mainboard/google/poppy/variants/rammus/devicetree.cb
M src/mainboard/google/poppy/variants/soraka/devicetree.cb
M src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
M src/mainboard/intel/kunimitsu/devicetree.cb
M src/mainboard/intel/saddlebrook/devicetree.cb
M src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
M src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
M src/soc/intel/skylake/Kconfig
M src/soc/intel/skylake/chip.h
M src/soc/intel/skylake/chip_fsp20.c
M src/soc/intel/skylake/cpu.c
M src/soc/intel/skylake/romstage/romstage_fsp20.c
26 files changed, 16 insertions(+), 52 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/29682/7
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Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
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Gerrit-MessageType: newpatchset
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/28640 )
Change subject: mb/clevo/kbl-u: Add mainboard
......................................................................
Patch Set 86:
In my opinion it is ready for reviewing and merging.
EC ACPI and documentation is WIP.
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Gerrit-Comment-Date: Sat, 16 Feb 2019 22:25:07 +0000
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29682 )
Change subject: soc/intel/skylake: Use real common code for VMX init
......................................................................
Patch Set 6: Code-Review+2
+2 on Matt's part (most of it anyway)
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Hello Patrick Rudolph, Angel Pons, Arthur Heymans, Youness Alaoui, Matt DeVillier, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/29682
to look at the new patch set (#6).
Change subject: soc/intel/skylake: Use real common code for VMX init
......................................................................
soc/intel/skylake: Use real common code for VMX init
Use the common VXM implementation, and set IA32_FEATURE_CONTROL
lock bit per Kconfig *after* SGX is configured (as SGX also sets
bits on the IA32_FEATURE_CONTROL register).
As it is now correctly based on a Kconfig, the `VmxEnable` devicetree
setting vanishes.
Test: build/boot google/[chell,fizz], observe Virtualization enabled
under Windows 10 when VMX enabled and lock bit set.
Change-Id: Iea598cf74ba542a650433719f29cb5c9df700c0f
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
---
M src/mainboard/google/eve/devicetree.cb
M src/mainboard/google/fizz/variants/baseboard/devicetree.cb
M src/mainboard/google/glados/variants/asuka/devicetree.cb
M src/mainboard/google/glados/variants/caroline/devicetree.cb
M src/mainboard/google/glados/variants/cave/devicetree.cb
M src/mainboard/google/glados/variants/chell/devicetree.cb
M src/mainboard/google/glados/variants/glados/devicetree.cb
M src/mainboard/google/glados/variants/lars/devicetree.cb
M src/mainboard/google/glados/variants/sentry/devicetree.cb
M src/mainboard/google/poppy/variants/atlas/devicetree.cb
M src/mainboard/google/poppy/variants/baseboard/devicetree.cb
M src/mainboard/google/poppy/variants/nami/devicetree.cb
M src/mainboard/google/poppy/variants/nautilus/devicetree.cb
M src/mainboard/google/poppy/variants/nocturne/devicetree.cb
M src/mainboard/google/poppy/variants/rammus/devicetree.cb
M src/mainboard/google/poppy/variants/soraka/devicetree.cb
M src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
M src/mainboard/intel/kunimitsu/devicetree.cb
M src/mainboard/intel/saddlebrook/devicetree.cb
M src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
M src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
M src/soc/intel/skylake/Kconfig
M src/soc/intel/skylake/chip.h
M src/soc/intel/skylake/chip_fsp20.c
M src/soc/intel/skylake/cpu.c
M src/soc/intel/skylake/romstage/romstage_fsp20.c
26 files changed, 16 insertions(+), 52 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/29682/6
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29682 )
Change subject: soc/intel/skylake: Use real common code for VMX init
......................................................................
Patch Set 5:
This change is ready for review.
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29683 )
Change subject: Revert "soc/intel/common/block: add VMX support"
......................................................................
Patch Set 4:
I might have seen something on Gerrit that would collide with this.
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Hello Paul Menzel, Stefan Reinauer, Philipp Deppenwiese, build bot (Jenkins), Martin Roth, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/28640
to look at the new patch set (#86).
Change subject: mb/clevo/kbl-u: Add mainboard
......................................................................
mb/clevo/kbl-u: Add mainboard
Devices:
- N130WU / N131WU
Working:
- Compiling
- Seabios, iPXE
- NVMe, SATA3, booting from SSD into Arch Linux
- USB2, USB3
- Thunderbolt
- Graphics, mDP, HDMI
- Sound
- Webcam
- WLAN, LAN, Bluetooth, LTE
- Keyboard, touchpad
- TPM
- Virtualization
- flashrom support; reading / flashing from Linux
Works, but needs testing:
- Nothing
WIP:
- Documentation
Not working:
- EC ACPI
Untested:
- Nothing
Change-Id: I364f5849ef88f43b85efbd7a635a27e54d08c513
Signed-off-by: Felix Singer <migy(a)darmstadt.ccc.de>
---
A Documentation/mainboard/clevo/index.md
A Documentation/mainboard/clevo/n130wu/index.md
A Documentation/mainboard/clevo/n130wu/n130wu_overview.jpg
M Documentation/mainboard/index.md
A src/mainboard/clevo/Kconfig
A src/mainboard/clevo/Kconfig.name
A src/mainboard/clevo/kbl-u/Kconfig
A src/mainboard/clevo/kbl-u/Kconfig.name
A src/mainboard/clevo/kbl-u/Makefile.inc
A src/mainboard/clevo/kbl-u/acpi/ec.asl
A src/mainboard/clevo/kbl-u/acpi/superio.asl
A src/mainboard/clevo/kbl-u/acpi_tables.c
A src/mainboard/clevo/kbl-u/board_info.txt
A src/mainboard/clevo/kbl-u/dsdt.asl
A src/mainboard/clevo/kbl-u/gpio.h
A src/mainboard/clevo/kbl-u/hda_verb.c
A src/mainboard/clevo/kbl-u/pei_data.c
A src/mainboard/clevo/kbl-u/pei_data.h
A src/mainboard/clevo/kbl-u/ramstage.c
A src/mainboard/clevo/kbl-u/romstage.c
A src/mainboard/clevo/kbl-u/variants/n13xwu/data.vbt
A src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb
22 files changed, 1,286 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/28640/86
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