coreboot-gerrit February 2019

coreboot-gerrit@coreboot.org

1 participants
1249 discussions

Change in ...coreboot[master]: mb/lenovo/r500: Add mainboard
by Arthur Heymans (Code Review) 08 Feb '19

08 Feb '19

Hello Alexander Couzens, Patrick Rudolph, Angel Pons, Paul Menzel, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/28644 to look at the new patch set (#8). Change subject: mb/lenovo/r500: Add mainboard ...................................................................... mb/lenovo/r500: Add mainboard Tested: - Ethernet NIC - Wifi RFKill - USB - LVDS, VGA with libgfxinit - Booting with dock attached (COM1) - Keyboard, trackpoint - SeaBIOS 1.12 - S3 resume - Tested in descriptor mode, with vendor FD and ME Untested: - SATA (likely works) - Trackpad (my cable is broken, likely works) - Displayport (likely works) - Descriptorless mode - DVD drive - Extra battery Does not work: - Dock hotplug - Quad core CPU (hangs during AP init, probably needs hardware mod) - Models with a sole ATI GPU (needs probing of PEG in romstage) - Hotplugging the expresscard slot (works with 'echo 1 | sudo tee /sys/bus/pci/rescan') TODO: - proper dock support - documentation note: This board was hard to flash, I had to desolder the flash. TESTED: on a R500 with an Intel iGPU, SeaBIOS 1.12, Debian 9, Linux 4.9 from USB Change-Id: I9e129b2e916acdf2b8534fa9d8d2cfc8f64f5815 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/lenovo/t400/Kconfig M src/mainboard/lenovo/t400/Kconfig.name M src/mainboard/lenovo/t400/Makefile.inc M src/mainboard/lenovo/t400/devicetree.cb M src/mainboard/lenovo/t400/dsdt.asl A src/mainboard/lenovo/t400/variants/r500/Makefile.inc A src/mainboard/lenovo/t400/variants/r500/data.vbt A src/mainboard/lenovo/t400/variants/r500/gpio.c A src/mainboard/lenovo/t400/variants/r500/overridetree.cb A src/mainboard/lenovo/t400/variants/t400/Makefile.inc R src/mainboard/lenovo/t400/variants/t400/gpio.c A src/mainboard/lenovo/t400/variants/t400/overridetree.cb 12 files changed, 247 insertions(+), 39 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/28644/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/28644 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9e129b2e916acdf2b8534fa9d8d2cfc8f64f5815 Gerrit-Change-Number: 28644 Gerrit-PatchSet: 8 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: src: Remove unused variables
by HAOUAS Elyes (Code Review) 08 Feb '19

08 Feb '19

Hello Patrick Rudolph, Angel Pons, Huang Jin, Julius Werner, York Yang, Philipp Deppenwiese, build bot (Jenkins), Patrick Georgi, Damien Zammit, David Guckian, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29917 to look at the new patch set (#28). Change subject: src: Remove unused variables ...................................................................... src: Remove unused variables If we enable Wunused in the compiler, we'll have some 'unused variables'. This patch corrects some of them. Change-Id: Ibdfbf1031130ff861c4313d1271d6ccb68bf8837 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/amd/family_10h-family_15h/init_cpus.c M src/cpu/amd/quadcore/quadcore.c M src/device/dram/ddr3.c M src/drivers/spi/sst.c M src/lib/selfboot.c M src/northbridge/amd/amdmct/mct/mct_d.c M src/northbridge/amd/amdmct/mct_ddr3/mct_d.c M src/northbridge/amd/pi/00730F01/northbridge.c M src/northbridge/intel/pineview/raminit.c M src/northbridge/intel/x4x/dq_dqs.c M src/northbridge/via/vx900/raminit_ddr3.c M src/soc/cavium/common/bootblock.c M src/soc/intel/fsp_baytrail/romstage/romstage.c M src/soc/intel/fsp_broadwell_de/acpi.c M src/soc/intel/fsp_broadwell_de/romstage/romstage.c M src/southbridge/amd/common/amd_pci_util.c M src/southbridge/intel/fsp_rangeley/romstage.c M src/southbridge/intel/i82371eb/fadt.c 18 files changed, 43 insertions(+), 80 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/29917/28 -- To view, visit https://review.coreboot.org/c/coreboot/+/29917 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibdfbf1031130ff861c4313d1271d6ccb68bf8837 Gerrit-Change-Number: 29917 Gerrit-PatchSet: 28 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit <damien(a)zamaudio.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: [Test] Remaining unused variables - volunteers?
by HAOUAS Elyes (Code Review) 08 Feb '19

08 Feb '19

Hello Angel Pons, build bot (Jenkins), Martin Roth, Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29926 to look at the new patch set (#16). Change subject: [Test] Remaining unused variables - volunteers? ...................................................................... [Test] Remaining unused variables - volunteers? Test CFLAGS_common += -Wno-unused-function \ -Wno-tautological-compare -Wno-shift-overflow Change-Id: Ic3dde296ab4b84add8a8ab6a3bb5ecb65da2c158 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M Makefile.inc 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/29926/16 -- To view, visit https://review.coreboot.org/c/coreboot/+/29926 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic3dde296ab4b84add8a8ab6a3bb5ecb65da2c158 Gerrit-Change-Number: 29926 Gerrit-PatchSet: 16 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: [Test] Remaining unused variables
by HAOUAS Elyes (Code Review) 08 Feb '19

08 Feb '19

Hello Angel Pons, build bot (Jenkins), Martin Roth, Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29926 to look at the new patch set (#15). Change subject: [Test] Remaining unused variables ...................................................................... [Test] Remaining unused variables Test CFLAGS_common += -Wno-unused-function \ -Wno-tautological-compare -Wno-shift-overflow Change-Id: Ic3dde296ab4b84add8a8ab6a3bb5ecb65da2c158 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M Makefile.inc 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/29926/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/29926 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic3dde296ab4b84add8a8ab6a3bb5ecb65da2c158 Gerrit-Change-Number: 29926 Gerrit-PatchSet: 15 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: src: Remove unused variables
by HAOUAS Elyes (Code Review) 08 Feb '19

08 Feb '19

Hello Patrick Rudolph, Angel Pons, Huang Jin, Julius Werner, York Yang, Philipp Deppenwiese, build bot (Jenkins), Patrick Georgi, Damien Zammit, David Guckian, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29917 to look at the new patch set (#27). Change subject: src: Remove unused variables ...................................................................... src: Remove unused variables If we enable Wunused in the compiler, we'll have some 'unused variables'. This patch corrects some of them. Change-Id: Ibdfbf1031130ff861c4313d1271d6ccb68bf8837 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/amd/family_10h-family_15h/init_cpus.c M src/cpu/amd/quadcore/quadcore.c M src/device/dram/ddr3.c M src/drivers/spi/sst.c M src/lib/selfboot.c M src/northbridge/amd/amdmct/mct/mct_d.c M src/northbridge/amd/amdmct/mct_ddr3/mct_d.c M src/northbridge/amd/pi/00730F01/northbridge.c M src/northbridge/intel/pineview/early_init.c M src/northbridge/intel/pineview/raminit.c M src/northbridge/intel/x4x/dq_dqs.c M src/northbridge/via/vx900/raminit_ddr3.c M src/soc/cavium/common/bootblock.c M src/soc/intel/fsp_baytrail/romstage/romstage.c M src/soc/intel/fsp_broadwell_de/acpi.c M src/soc/intel/fsp_broadwell_de/romstage/romstage.c M src/southbridge/amd/common/amd_pci_util.c M src/southbridge/intel/fsp_rangeley/romstage.c M src/southbridge/intel/i82371eb/fadt.c 19 files changed, 49 insertions(+), 83 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/29917/27 -- To view, visit https://review.coreboot.org/c/coreboot/+/29917 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibdfbf1031130ff861c4313d1271d6ccb68bf8837 Gerrit-Change-Number: 29917 Gerrit-PatchSet: 27 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit <damien(a)zamaudio.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: mainboard/facebook/fbg1701: Do initial mainboard commit
by build bot (Jenkins) (Code Review) 08 Feb '19

08 Feb '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30414 ) Change subject: mainboard/facebook/fbg1701: Do initial mainboard commit ...................................................................... Patch Set 15: (2 comments) https://review.coreboot.org/#/c/30414/15/src/mainboard/facebook/fbg1701/irq… File src/mainboard/facebook/fbg1701/irqroute.h: https://review.coreboot.org/#/c/30414/15/src/mainboard/facebook/fbg1701/irq… PS15, Line 40: #define PCI_DEV_PIRQ_ROUTES \ Macros with complex values should be enclosed in parentheses https://review.coreboot.org/#/c/30414/15/src/mainboard/facebook/fbg1701/irq… PS15, Line 62: #define PIRQ_PIC_ROUTES \ Macros with complex values should be enclosed in parentheses -- To view, visit https://review.coreboot.org/c/coreboot/+/30414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Gerrit-Change-Number: 30414 Gerrit-PatchSet: 15 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 08 Feb 2019 11:54:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: mainboard/facebook/fbg1701: Do initial mainboard commit
by Frans Hendriks (Code Review) 08 Feb '19

08 Feb '19

Hello Patrick Rudolph, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30414 to look at the new patch set (#15). Change subject: mainboard/facebook/fbg1701: Do initial mainboard commit ...................................................................... mainboard/facebook/fbg1701: Do initial mainboard commit Create Facebook FBG-1701 coreboot implementation coreboot implementation is prepared for Bootblock, measured boot and verified boot support. These features are default disabled. This Braswell implementation is based on Intel Strago. Additional modifiiciation included: - Move Winbond defines to include - Add SMBus support for Braswell BUG=N/A TEST=Facebook FBG-1701 booting Embedded Linux Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- A Documentation/mainboard/facebook/fbg1701.md M Documentation/mainboard/index.md A src/drivers/spi/spi_winbond.h M src/drivers/spi/winbond.c A src/mainboard/facebook/fbg1701/Kconfig A src/mainboard/facebook/fbg1701/Kconfig.name A src/mainboard/facebook/fbg1701/Makefile.inc A src/mainboard/facebook/fbg1701/acpi/dptf.asl A src/mainboard/facebook/fbg1701/acpi/ec.asl A src/mainboard/facebook/fbg1701/acpi/mainboard.asl A src/mainboard/facebook/fbg1701/acpi/sleepstates.asl A src/mainboard/facebook/fbg1701/acpi/superio.asl A src/mainboard/facebook/fbg1701/acpi_tables.c A src/mainboard/facebook/fbg1701/board_info.txt A src/mainboard/facebook/fbg1701/board_mboot.c A src/mainboard/facebook/fbg1701/board_verified_boot.c A src/mainboard/facebook/fbg1701/board_verified_boot.h A src/mainboard/facebook/fbg1701/bootblock.c A src/mainboard/facebook/fbg1701/cmos.layout A src/mainboard/facebook/fbg1701/com_init.c A src/mainboard/facebook/fbg1701/devicetree.cb A src/mainboard/facebook/fbg1701/dsdt.asl A src/mainboard/facebook/fbg1701/fadt.c A src/mainboard/facebook/fbg1701/fmap.fmd A src/mainboard/facebook/fbg1701/gpio.c A src/mainboard/facebook/fbg1701/hda_verb.c A src/mainboard/facebook/fbg1701/irqroute.c A src/mainboard/facebook/fbg1701/irqroute.h A src/mainboard/facebook/fbg1701/logo.c A src/mainboard/facebook/fbg1701/mainboard.c A src/mainboard/facebook/fbg1701/mainboard.h A src/mainboard/facebook/fbg1701/manifest.h A src/mainboard/facebook/fbg1701/onboard.h A src/mainboard/facebook/fbg1701/ramstage.c A src/mainboard/facebook/fbg1701/romstage.c A src/mainboard/facebook/fbg1701/smihandler.c A src/mainboard/facebook/fbg1701/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex A src/mainboard/facebook/fbg1701/w25q64.c M src/soc/intel/braswell/Makefile.inc M src/soc/intel/braswell/include/soc/pci_devs.h A src/soc/intel/braswell/include/soc/smbus.h M src/soc/intel/braswell/include/soc/spi.h A src/soc/intel/braswell/smbus.c 43 files changed, 3,062 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/30414/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/30414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Gerrit-Change-Number: 30414 Gerrit-PatchSet: 15 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: x86/acpi: Use PM_TABLET where appropriate
by Duncan Laurie (Code Review) 08 Feb '19

08 Feb '19

Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31277 Change subject: x86/acpi: Use PM_TABLET where appropriate ...................................................................... x86/acpi: Use PM_TABLET where appropriate Instead of having SYSTEM_TYPE_DETACHABLE and SYSTEM_TYPE_TABLET use PM_MOBILE have them use PM_TABLET instead. Change-Id: If0ce51e522d36420ecd5b51bdfec6cca11c00333 Signed-off-by: Duncan Laurie <dlaurie(a)google.com> --- M src/arch/x86/acpi.c 1 file changed, 4 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/31277/1 diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c index a89b871..0c85d3a 100644 --- a/src/arch/x86/acpi.c +++ b/src/arch/x86/acpi.c @@ -1067,10 +1067,11 @@ fadt->x_dsdt_h = 0; if (IS_ENABLED(CONFIG_SYSTEM_TYPE_CONVERTIBLE) || - IS_ENABLED(CONFIG_SYSTEM_TYPE_DETACHABLE) || - IS_ENABLED(CONFIG_SYSTEM_TYPE_LAPTOP) || - IS_ENABLED(CONFIG_SYSTEM_TYPE_TABLET)) + IS_ENABLED(CONFIG_SYSTEM_TYPE_LAPTOP)) fadt->preferred_pm_profile = PM_MOBILE; + else if (IS_ENABLED(CONFIG_SYSTEM_TYPE_DETACHABLE) || + IS_ENABLED(CONFIG_SYSTEM_TYPE_TABLET)) + fadt->preferred_pm_profile = PM_TABLET; else fadt->preferred_pm_profile = PM_DESKTOP; -- To view, visit https://review.coreboot.org/c/coreboot/+/31277 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If0ce51e522d36420ecd5b51bdfec6cca11c00333 Gerrit-Change-Number: 31277 Gerrit-PatchSet: 1 Gerrit-Owner: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-MessageType: newchange

4 4

Change in ...coreboot[master]: cpu/intel/model_1067x: Check for lock bit on IA32_FEATURE_CONTROL
by Arthur Heymans (Code Review) 08 Feb '19

08 Feb '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31255 Change subject: cpu/intel/model_1067x: Check for lock bit on IA32_FEATURE_CONTROL ...................................................................... cpu/intel/model_1067x: Check for lock bit on IA32_FEATURE_CONTROL df7aecd " cpu/intel: Configure IA32_FEATURE_CONTROL for alternative SMRR" introduced a regression because it unconditionally writes to IA32_FEATURE_CONTROL, which if it is already locked results in an unhandled exception. The lock bit is already set on a system reboot. Change-Id: I7d2df9e1b9d767809da7a61ccd877c6c40f132eb Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/intel/model_1067x/mp_init.c 1 file changed, 14 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/31255/1 diff --git a/src/cpu/intel/model_1067x/mp_init.c b/src/cpu/intel/model_1067x/mp_init.c index ab77859..f3890fd 100644 --- a/src/cpu/intel/model_1067x/mp_init.c +++ b/src/cpu/intel/model_1067x/mp_init.c @@ -60,11 +60,20 @@ /* We don't care if the lock is already setting as our smm relocation handler is able to handle setups where SMRR is not enabled here. */ - if (!IS_ENABLED(CONFIG_SET_IA32_FC_LOCK_BIT)) - printk(BIOS_INFO, - "Overriding CONFIG_SET_IA32_FC_LOCK_BIT to enable SMRR\n"); - ia32_ft_ctrl.lo |= (1 << 3) | (1 << 0); - wrmsr(IA32_FEATURE_CONTROL, ia32_ft_ctrl); + if (ia32_ft_ctrl & (1 << 0)) { + /* IA32_FEATURE_CONTROL locked. If we set it again we get an + * illegal instruction + */ + printk(BIOS_DEBUG, "IA32_FEATURE_CONTROL already locked\n"); + printk(BIOS_DEBUG, "SMRR status: %senabled\n", + ia32_ft_ctrl & (1 << 3) ? "" : "not "); + } else { + if (!IS_ENABLED(CONFIG_SET_IA32_FC_LOCK_BIT)) + printk(BIOS_INFO, + "Overriding CONFIG_SET_IA32_FC_LOCK_BIT to enable SMRR\n"); + ia32_ft_ctrl.lo |= (1 << 3) | (1 << 0); + wrmsr(IA32_FEATURE_CONTROL, ia32_ft_ctrl); + } } else { set_vmx_and_lock(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/31255 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7d2df9e1b9d767809da7a61ccd877c6c40f132eb Gerrit-Change-Number: 31255 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

6 13

Change in ...coreboot[master]: mb/ocp/wedge100s: Fix devicetree
by Patrick Rudolph (Code Review) 08 Feb '19

08 Feb '19

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31228 Change subject: mb/ocp/wedge100s: Fix devicetree ...................................................................... mb/ocp/wedge100s: Fix devicetree Match devicetree what's present and in use. Tested on wedge100s: All PCI devices show up. Change-Id: I669d059da1876ed669793db8c7eb1b96b481cb4c Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/mainboard/ocp/wedge100s/devicetree.cb 1 file changed, 24 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/31228/1 diff --git a/src/mainboard/ocp/wedge100s/devicetree.cb b/src/mainboard/ocp/wedge100s/devicetree.cb index bbea89e..48410ba 100644 --- a/src/mainboard/ocp/wedge100s/devicetree.cb +++ b/src/mainboard/ocp/wedge100s/devicetree.cb @@ -4,10 +4,26 @@ end device domain 0 on device pci 00.0 on end # SoC router - device pci 14.0 on end # xHCI Controller - device pci 19.0 on end # Gigabit LAN Controller - device pci 1d.0 on end # EHCI Controller - device pci 1f.0 on + device pci 01.0 on # PCIe x1 + # Intel i210t + end + device pci 02.0 on # PCIe x1 + # QuickData Technology + end + device pci 02.2 on # PCIe x1 + # Intel X552 10 GbE SFP+ + end + device pci 03.0 on end # PEG 16x + device pci 05.0 on end # Vtd + device pci 05.1 on end # IIO Hotplug + device pci 05.2 on end # IIO + device pci 05.4 on end # PIC + device pci 14.0 off end # xHCI Controller + device pci 1c.0 on # PCH PCIe Gen2 x4 + # BCM56960 Switch ASIC + end + device pci 1d.0 on end # PCH EHCI Controller + device pci 1f.0 on # LPC chip drivers/pc80/tpm device pnp 0c31.0 on end end @@ -47,6 +63,9 @@ end # LPC Bridge device pci 1f.2 on end # SATA Controller device pci 1f.3 on end # SMBus Controller - device pci 1f.5 on end # SATA Controller + device pci 1f.5 off end # SATA Controller + device pci 1f.6 on # Thermal Management Controller + # DON'T DISABLE, CRASHES FSP MR2 + end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/31228 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I669d059da1876ed669793db8c7eb1b96b481cb4c Gerrit-Change-Number: 31228 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

6 7

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit February 2019