coreboot-gerrit December 2019

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Change in coreboot[master]: soc/intel/tigerlake: Fix build issues
by Subrata Banik (Code Review) 10 Dec '19

10 Dec '19

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37426 ) Change subject: soc/intel/tigerlake: Fix build issues ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/c/coreboot/+/37426/2/src/soc/intel/tigerlake/Kc… File src/soc/intel/tigerlake/Kconfig: https://review.coreboot.org/c/coreboot/+/37426/2/src/soc/intel/tigerlake/Kc… PS2, Line 64: select INTEL_CAR_NEM are you sure ? you want to boot with NEM not enhanced ? -- To view, visit https://review.coreboot.org/c/coreboot/+/37426 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I04020d55f1063d521b15f8d0dabbd6f1dabf577c Gerrit-Change-Number: 37426 Gerrit-PatchSet: 2 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Venkata Krishna Nimmagadda Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Comment-Date: Tue, 10 Dec 2019 06:08:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: arch/acpi.h: Use of typedef for acpi_spmi
by Name of user not set (Code Review) 10 Dec '19

10 Dec '19

Name of user not set #1002476 has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36428 ) Change subject: arch/acpi.h: Use of typedef for acpi_spmi ...................................................................... arch/acpi.h: Use of typedef for acpi_spmi Use of typedef and modify the usage accordingly. Change-Id: Iab59f26a4f069efb991fa3d077a5bbae78d90bdc Signed-off-by: Himanshu Sahdev <himanshusah(a)hcl.com> --- M src/arch/x86/acpi.c M src/arch/x86/include/arch/acpi.h M src/drivers/ipmi/ipmi_kcs_ops.c 3 files changed, 8 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/36428/1 diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c index 2f793b4..ee48100 100644 --- a/src/arch/x86/acpi.c +++ b/src/arch/x86/acpi.c @@ -770,7 +770,7 @@ } void acpi_create_ipmi(struct device *device, - struct acpi_spmi *spmi, + acpi_spmi_t *spmi, const u16 ipmi_revision, const acpi_addr_t *addr, const enum acpi_ipmi_interface_type type, @@ -779,7 +779,7 @@ const u32 uid) { acpi_header_t *header = &(spmi->header); - memset((void *)spmi, 0, sizeof(struct acpi_spmi)); + memset((void *)spmi, 0, sizeof(acpi_spmi_t)); /* Fill out header fields. */ memcpy(header->signature, "SPMI", 4); @@ -788,7 +788,7 @@ memcpy(header->asl_compiler_id, ASLC, 4); header->asl_compiler_revision = asl_revision; - header->length = sizeof(struct acpi_spmi); + header->length = sizeof(acpi_spmi_t); header->revision = get_acpi_table_revision(SPMI); spmi->reserved = 1; diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h index 20c244c..0269e5b 100644 --- a/src/arch/x86/include/arch/acpi.h +++ b/src/arch/x86/include/arch/acpi.h @@ -792,7 +792,7 @@ #define ACPI_IPMI_INT_TYPE_APIC (1 << 1) /* ACPI IPMI 2.0 */ -struct acpi_spmi { +typedef struct acpi_spmi { acpi_header_t header; u8 interface_type; u8 reserved; @@ -814,7 +814,7 @@ u8 uid[4]; }; u8 reserved3; -} __packed; +} __packed acpi_spmi_t; unsigned long fw_cfg_acpi_tables(unsigned long start); @@ -869,7 +869,7 @@ unsigned long current)); void acpi_create_ipmi(struct device *device, - struct acpi_spmi *spmi, + acpi_spmi_t *spmi, const u16 ipmi_revision, const acpi_addr_t *addr, const enum acpi_ipmi_interface_type type, diff --git a/src/drivers/ipmi/ipmi_kcs_ops.c b/src/drivers/ipmi/ipmi_kcs_ops.c index 90f19dd..59269f9 100644 --- a/src/drivers/ipmi/ipmi_kcs_ops.c +++ b/src/drivers/ipmi/ipmi_kcs_ops.c @@ -121,7 +121,7 @@ struct acpi_rsdp *rsdp) { struct drivers_ipmi_config *conf = NULL; - struct acpi_spmi *spmi; + acpi_spmi_t *spmi; s8 gpe_interrupt = -1; u32 apic_interrupt = 0; acpi_addr_t addr = { @@ -148,7 +148,7 @@ current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * SPMI at %lx\n", current); - spmi = (struct acpi_spmi *)current; + spmi = (acpi_spmi_t *)current; if (dev->chip_info) conf = dev->chip_info; -- To view, visit https://review.coreboot.org/c/coreboot/+/36428 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab59f26a4f069efb991fa3d077a5bbae78d90bdc Gerrit-Change-Number: 36428 Gerrit-PatchSet: 1 Gerrit-Owner: Name of user not set #1002476 Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/common/block/cse: Add boot partition related APIs
by Sridhar Siricilla (Code Review) 10 Dec '19

10 Dec '19

Hello Patrick Rudolph, Subrata Banik, Balaji Manigandan, Aamir Bohra, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/35402 to look at the new patch set (#39). Change subject: soc/intel/common/block/cse: Add boot partition related APIs ...................................................................... soc/intel/common/block/cse: Add boot partition related APIs The CSE region is logically divided into 3 boot partitions when redundancy is enabled. These boot partitions are represented by BP1, BP2 and BP3. In chrome, CSE can boot from either BP1 or BP2. The CSE image layout appears as below.. ------------- ------------------ -------------------------- |CSE REGION | => | RO | RW | => | BP1 | BP2 + BP3 + DATA | ------------- ------------------ -------------------------- In order to support CSE FW update to RW region, below APIs help coreboot to get info about the boot partitions, and allows the coreboot to set CSE to boot from required boot partition(either BP1(RO) or BP2). GET_BOOT_PARTITION_INFO - provides info on available partitions in the CSE region. The API provides info on boot partitions like start/end offsets of a partition within CSE region, and their version and partition status. SET_BOOT_PARTITION_INFO - Sets the next boot partition to boot for CSE. With the HECI API, firmware can notify CSE to boot from BP1 or BP2 on next boot. BUG=b:145809764 Change-Id: Iaa62409c0616d5913d21374a8a6804f82258eb4f Signed-off-by: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> --- M src/soc/intel/common/block/cse/Makefile.inc A src/soc/intel/common/block/cse/cse_bp.c M src/soc/intel/common/block/include/intelblocks/cse.h 3 files changed, 492 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/35402/39 -- To view, visit https://review.coreboot.org/c/coreboot/+/35402 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa62409c0616d5913d21374a8a6804f82258eb4f Gerrit-Change-Number: 35402 Gerrit-PatchSet: 39 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <anpetrov(a)fb.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common: Add Jasperlake Device IDs
by V Sowmya (Code Review) 10 Dec '19

10 Dec '19

V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37434 ) Change subject: soc/intel/common: Add Jasperlake Device IDs ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/37434 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2c9ec1ee4236184b986d99250f263172c80f7117 Gerrit-Change-Number: 37434 Gerrit-PatchSet: 5 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 10 Dec 2019 04:10:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Add Jasperlake Device IDs
by Aamir Bohra (Code Review) 10 Dec '19

10 Dec '19

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37434 ) Change subject: soc/intel/common: Add Jasperlake Device IDs ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/37434 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2c9ec1ee4236184b986d99250f263172c80f7117 Gerrit-Change-Number: 37434 Gerrit-PatchSet: 5 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 10 Dec 2019 04:00:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in em100[master]: Allow serial numbers beginning with EM
by Chris K (Code Review) 09 Dec '19

09 Dec '19

Hello Chris Koch, I'd like you to do a code review. Please visit https://review.coreboot.org/c/em100/+/37624 to review the following change. Change subject: Allow serial numbers beginning with EM ...................................................................... Allow serial numbers beginning with EM Newer em100s have serial numbers beginning with EM instead of DP. Signed-off-by: Chris Koch <chrisko(a)google.com> Change-Id: I6f4b3b0900fe1b5c776acd02f54ca97b31d85420 --- M em100.c 1 file changed, 4 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/em100 refs/changes/24/37624/1 diff --git a/em100.c b/em100.c index 1ee22ec..46f2c64 100644 --- a/em100.c +++ b/em100.c @@ -878,8 +878,10 @@ firmware_is_dpfw = 1; break; case 'x': - if ((optarg[0] == 'D' || optarg[0] == 'd') && - (optarg[1] == 'P' || optarg[1] == 'p')) + if (((optarg[0] == 'D' || optarg[0] == 'd') && + (optarg[1] == 'P' || optarg[1] == 'p')) || + ((optarg[0] == 'E' || optarg[0] == 'e') && + (optarg[1] == 'M' || optarg[1] == 'm'))) sscanf(optarg + 2, "%d", &serial_number); else sscanf(optarg, "%d:%d", &bus, &device); -- To view, visit https://review.coreboot.org/c/em100/+/37624 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: em100 Gerrit-Branch: master Gerrit-Change-Id: I6f4b3b0900fe1b5c776acd02f54ca97b31d85420 Gerrit-Change-Number: 37624 Gerrit-PatchSet: 1 Gerrit-Owner: Chris K <c(a)chrisko.ch> Gerrit-Reviewer: Chris Koch <chrisko(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: Makefile: Write .xcompile to $(obj)
by Patrick Georgi (Code Review) 09 Dec '19

09 Dec '19

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/28101 ) Change subject: Makefile: Write .xcompile to $(obj) ...................................................................... Patch Set 10: > Patch Set 10: > > > Patch Set 10: > > > > > Patch Set 10: > > > > > > Not sure how to set this as WIP until I get Martin's comments addressed. > > > > Overflow menu in the top right, "mark as work in progress"? > > Only thing listed in that menu is: > Cherry pick > Download patch > Follow-up > Ignore > Mark unreviewed I'll recheck permissions for that feature, thanks for the heads-up. marking WIP for you. -- To view, visit https://review.coreboot.org/c/coreboot/+/28101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia83f234447b977efa824751c9674154b77d606b0 Gerrit-Change-Number: 28101 Gerrit-PatchSet: 10 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Raul Rangel <rrangel(a)google.com> Gerrit-Comment-Date: Mon, 09 Dec 2019 19:35:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Makefile: Write .xcompile to $(obj)
by Raul Rangel (Code Review) 09 Dec '19

09 Dec '19

Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/28101 ) Change subject: Makefile: Write .xcompile to $(obj) ...................................................................... Patch Set 10: > Patch Set 10: > > > Patch Set 10: > > > > Not sure how to set this as WIP until I get Martin's comments addressed. > > Overflow menu in the top right, "mark as work in progress"? Only thing listed in that menu is: Cherry pick Download patch Follow-up Ignore Mark unreviewed -- To view, visit https://review.coreboot.org/c/coreboot/+/28101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia83f234447b977efa824751c9674154b77d606b0 Gerrit-Change-Number: 28101 Gerrit-PatchSet: 10 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Raul Rangel <rrangel(a)google.com> Gerrit-Comment-Date: Mon, 09 Dec 2019 19:33:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Makefile: Write .xcompile to $(obj)
by Patrick Georgi (Code Review) 09 Dec '19

09 Dec '19

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/28101 ) Change subject: Makefile: Write .xcompile to $(obj) ...................................................................... Patch Set 10: > Patch Set 10: > > Not sure how to set this as WIP until I get Martin's comments addressed. Overflow menu in the top right, "mark as work in progress"? -- To view, visit https://review.coreboot.org/c/coreboot/+/28101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia83f234447b977efa824751c9674154b77d606b0 Gerrit-Change-Number: 28101 Gerrit-PatchSet: 10 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Raul Rangel <rrangel(a)google.com> Gerrit-Comment-Date: Mon, 09 Dec 2019 19:28:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Makefile: Write .xcompile to $(obj)
by Raul Rangel (Code Review) 09 Dec '19

09 Dec '19

Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/28101 ) Change subject: Makefile: Write .xcompile to $(obj) ...................................................................... Patch Set 10: Not sure how to set this as WIP until I get Martin's comments addressed. -- To view, visit https://review.coreboot.org/c/coreboot/+/28101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia83f234447b977efa824751c9674154b77d606b0 Gerrit-Change-Number: 28101 Gerrit-PatchSet: 10 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Raul Rangel <rrangel(a)google.com> Gerrit-Comment-Date: Mon, 09 Dec 2019 19:06:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit December 2019