coreboot-gerrit December 2019

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Change in coreboot[master]: mb/lenovo/l520/devicetree: Use subsystemid inheritance
by Peter Lemenkov (Code Review) 09 Dec '19

09 Dec '19

Peter Lemenkov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37296 ) Change subject: mb/lenovo/l520/devicetree: Use subsystemid inheritance ...................................................................... mb/lenovo/l520/devicetree: Use subsystemid inheritance Change-Id: I90774e22fb7765f44b6cd4fa05b535236b782023 Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- M src/mainboard/lenovo/l520/devicetree.cb 1 file changed, 39 insertions(+), 83 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/37296/1 diff --git a/src/mainboard/lenovo/l520/devicetree.cb b/src/mainboard/lenovo/l520/devicetree.cb index 024b8f8..29b7598 100644 --- a/src/mainboard/lenovo/l520/devicetree.cb +++ b/src/mainboard/lenovo/l520/devicetree.cb @@ -15,7 +15,7 @@ register "gpu_panel_power_up_delay" = "0" register "gpu_pch_backlight" = "0x00000000" - device cpu_cluster 0x0 on + device cpu_cluster 0 on chip cpu/intel/model_206ax register "c1_acpower" = "1" register "c1_battery" = "1" @@ -28,15 +28,13 @@ end end - device domain 0x0 on - device pci 00.0 on # Host bridge Host bridge - subsystemid 0x17aa 0x21dd - end - device pci 01.0 on # PCIe Bridge for discrete graphics - end - device pci 02.0 on # Internal graphics VGA controller - subsystemid 0x17aa 0x21dd - end + device domain 0 on + subsystemid 0x17aa 0x21dd inherit + + device pci 00.0 on end # Host bridge + device pci 01.0 on end # PCIe Bridge for discrete graphics + device pci 02.0 on end # Internal graphics VGA controller + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH register "c2_latency" = "0x0065" register "docking_supported" = "1" @@ -54,57 +52,28 @@ register "spi_uvscc" = "0" register "spi_lvscc" = "0x2005" - device pci 16.0 on # Management Engine Interface 1 - subsystemid 0x17aa 0x21dd - end - device pci 16.1 off # Management Engine Interface 2 - end - device pci 16.2 off # Management Engine IDE-R - end - device pci 16.3 off # Management Engine KT - end - device pci 19.0 off # Intel Gigabit Ethernet - end - device pci 1a.0 on # USB2 EHCI #2 - subsystemid 0x17aa 0x21dd - end - device pci 1b.0 on # High Definition Audio Audio controller - subsystemid 0x17aa 0x21dd - end - device pci 1c.0 on # PCIe Port #1 - subsystemid 0x17aa 0x21dd - end - device pci 1c.1 on # PCIe Port #2 - subsystemid 0x17aa 0x21dd - end - device pci 1c.2 on # PCIe Port #3 - subsystemid 0x17aa 0x21dd - end - device pci 1c.3 on # PCIe Port #4 - subsystemid 0x17aa 0x21dd - end - device pci 1c.4 on # PCIe Port #5 - subsystemid 0x17aa 0x21dd - end - device pci 1c.5 on # PCIe Port #6 - subsystemid 0x17aa 0x21dd - end - device pci 1c.6 off # PCIe Port #7 - end - device pci 1c.7 off # PCIe Port #8 - end - device pci 1d.0 on # USB2 EHCI #1 - subsystemid 0x17aa 0x21dd - end - device pci 1e.0 off # PCI bridge - end + device pci 16.0 on end # Management Engine Interface 1 + device pci 16.1 off end # Management Engine Interface 2 + device pci 16.2 off end # Management Engine IDE-R + device pci 16.3 off end # Management Engine KT + device pci 19.0 off end # Intel Gigabit Ethernet + device pci 1a.0 on end # USB2 EHCI #2 + device pci 1b.0 on end # High Definition Audio Audio controller + device pci 1c.0 on end # PCIe Port #1 + device pci 1c.1 on end # PCIe Port #2 + device pci 1c.2 on end # PCIe Port #3 + device pci 1c.3 on end # PCIe Port #4 + device pci 1c.4 on end # PCIe Port #5 + device pci 1c.5 on end # PCIe Port #6 + device pci 1c.6 off end # PCIe Port #7 + device pci 1c.7 off end # PCIe Port #8 + device pci 1d.0 on end # USB2 EHCI #1 + device pci 1e.0 off end # PCI bridge device pci 1f.0 on # LPC bridge PCI-LPC bridge - subsystemid 0x17aa 0x21dd chip ec/lenovo/pmh7 register "backlight_enable" = "0x01" register "dock_event_enable" = "0x01" - device pnp ff.1 on # dummy - end + device pnp ff.1 on end # dummy end chip ec/lenovo/h8 register "config0" = "0xa7" @@ -136,35 +105,22 @@ io 0x66 = 0x1604 end end - end - device pci 1f.2 on # SATA Controller 1 - subsystemid 0x17aa 0x21dd - end + end # LPC bridge + device pci 1f.2 on end # SATA Controller 1 device pci 1f.3 on # SMBus - subsystemid 0x17aa 0x21dd chip drivers/i2c/at24rf08c # eeprom, 8 virtual devices, same chip - device i2c 54 on - end - device i2c 55 on - end - device i2c 56 on - end - device i2c 57 on - end - device i2c 5c on - end - device i2c 5d on - end - device i2c 5e on - end - device i2c 5f on - end + device i2c 54 on end + device i2c 55 on end + device i2c 56 on end + device i2c 57 on end + device i2c 5c on end + device i2c 5d on end + device i2c 5e on end + device i2c 5f on end end - end - device pci 1f.5 off # SATA Controller 2 - end - device pci 1f.6 off # Thermal - end + end # SMBus + device pci 1f.5 off end # SATA Controller 2 + device pci 1f.6 off end # Thermal end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/37296 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I90774e22fb7765f44b6cd4fa05b535236b782023 Gerrit-Change-Number: 37296 Gerrit-PatchSet: 1 Gerrit-Owner: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-MessageType: newchange

3 2

Change in coreboot[master]: mb/lenovo/t420s/devicetree: Use subsystemid inheritance
by Peter Lemenkov (Code Review) 09 Dec '19

09 Dec '19

Peter Lemenkov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37285 ) Change subject: mb/lenovo/t420s/devicetree: Use subsystemid inheritance ...................................................................... mb/lenovo/t420s/devicetree: Use subsystemid inheritance Change-Id: Ia77f0ce89b2234b9c164bb326d76bef98949832a Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- M src/mainboard/lenovo/t420s/devicetree.cb 1 file changed, 13 insertions(+), 29 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/37285/1 diff --git a/src/mainboard/lenovo/t420s/devicetree.cb b/src/mainboard/lenovo/t420s/devicetree.cb index aa6cc68..d4c69dc 100644 --- a/src/mainboard/lenovo/t420s/devicetree.cb +++ b/src/mainboard/lenovo/t420s/devicetree.cb @@ -1,4 +1,5 @@ chip northbridge/intel/sandybridge + # IGD Displays register "gfx.ndid" = "3" register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }" @@ -36,9 +37,9 @@ register "pci_mmio_size" = "2048" device domain 0 on - device pci 00.0 on - subsystemid 0x17aa 0x21d2 - end # host bridge + subsystemid 0x17aa 0x21d2 inherit + + device pci 00.0 on end # host bridge device pci 01.0 on end # NVIDIA Corporation GF119M [NVS 4200M] device pci 02.0 on subsystemid 0x17aa 0x21d3 @@ -69,6 +70,7 @@ register "c2_latency" = "101" # c2 not supported + # device specific SPI configuration register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005" @@ -79,36 +81,23 @@ device pci 19.0 on subsystemid 0x17aa 0x21ce end # Intel Gigabit Ethernet - device pci 1a.0 on - subsystemid 0x17aa 0x21d2 - end # USB Enhanced Host Controller #2 - device pci 1b.0 on - subsystemid 0x17aa 0x21d2 - end # High Definition Audio Controller + device pci 1a.0 on end # USB Enhanced Host Controller #2 + device pci 1b.0 on end # High Definition Audio Controller device pci 1c.0 off end # PCIe Port #1 - device pci 1c.1 on - subsystemid 0x17aa 0x21d2 - end # PCIe Port #2 Integrated Wireless LAN + device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN device pci 1c.2 off end # PCIe Port #3 device pci 1c.3 on - subsystemid 0x17aa 0x21d2 smbios_slot_desc "7" "3" "ExpressCard Slot" "8" end # PCIe Port #4 ExpressCard device pci 1c.4 off end # PCIe Port #5 device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe) - device pci 1c.6 on - subsystemid 0x17aa 0x21d2 - end # PCIe Port #7 NEC Corporation uPD720200A USB 3.0 Host Controller + device pci 1c.6 on end # PCIe Port #7 NEC Corporation uPD720200A USB 3.0 Host Controller device pci 1c.7 off end # PCIe Port #8 - device pci 1d.0 on - subsystemid 0x17aa 0x21d2 - end # USB Enhanced Host Controller #1 + device pci 1d.0 on end # USB Enhanced Host Controller #1 device pci 1e.0 off end # PCI bridge device pci 1f.0 on - subsystemid 0x17aa 0x21d2 chip ec/lenovo/pmh7 - device pnp ff.1 on # dummy - end + device pnp ff.1 on end # dummy register "backlight_enable" = "0x01" register "dock_event_enable" = "0x01" end @@ -168,11 +157,8 @@ register "has_thinker1" = "1" end end # LPC Controller - device pci 1f.2 on - subsystemid 0x17aa 0x21d2 - end # 6 port SATA AHCI Controller + device pci 1f.2 on end # 6 port SATA AHCI Controller device pci 1f.3 on - subsystemid 0x17aa 0x21d2 # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c device i2c 54 on end @@ -186,9 +172,7 @@ end end # SMBus Controller device pci 1f.5 off end # SATA Controller 2 - device pci 1f.6 on - subsystemid 0x17aa 0x21d2 - end # Thermal + device pci 1f.6 on end # Thermal end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/37285 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia77f0ce89b2234b9c164bb326d76bef98949832a Gerrit-Change-Number: 37285 Gerrit-PatchSet: 1 Gerrit-Owner: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-MessageType: newchange

5 10

Change in coreboot[master]: mb/lenovo/t420/devicetree: Use subsystemid inheritance
by Peter Lemenkov (Code Review) 09 Dec '19

09 Dec '19

Peter Lemenkov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37284 ) Change subject: mb/lenovo/t420/devicetree: Use subsystemid inheritance ...................................................................... mb/lenovo/t420/devicetree: Use subsystemid inheritance Change-Id: Ia321f2b974539ac1684173d767dd9eb64060364a Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- M src/mainboard/lenovo/t420/devicetree.cb 1 file changed, 14 insertions(+), 36 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/37284/1 diff --git a/src/mainboard/lenovo/t420/devicetree.cb b/src/mainboard/lenovo/t420/devicetree.cb index 6deff60..53bd16f 100644 --- a/src/mainboard/lenovo/t420/devicetree.cb +++ b/src/mainboard/lenovo/t420/devicetree.cb @@ -37,13 +37,11 @@ register "pci_mmio_size" = "2048" device domain 0 on - device pci 00.0 on - subsystemid 0x17aa 0x21ce - end # host bridge + subsystemid 0x17aa 0x21ce inherit + + device pci 00.0 on end # host bridge device pci 01.0 on end # PCIe Bridge for discrete graphics - device pci 02.0 on - subsystemid 0x17aa 0x21ce - end # Integrated Graphics Controller + device pci 02.0 on end # Integrated Graphics Controller chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH # GPI routing @@ -67,6 +65,7 @@ # Enable zero-based linear PCIe root port functions register "pcie_port_coalesce" = "1" + register "c2_latency" = "101" # c2 not supported # device specific SPI configuration @@ -77,46 +76,30 @@ device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT - device pci 19.0 on - subsystemid 0x17aa 0x21ce - end # Intel Gigabit Ethernet - device pci 1a.0 on - subsystemid 0x17aa 0x21ce - end # USB Enhanced Host Controller #2 - device pci 1b.0 on - subsystemid 0x17aa 0x21ce - end # High Definition Audio Controller + device pci 19.0 on end # Intel Gigabit Ethernet + device pci 1a.0 on end # USB Enhanced Host Controller #2 + device pci 1b.0 on end # High Definition Audio Controller device pci 1c.0 off end # PCIe Port #1 - device pci 1c.1 on - subsystemid 0x17aa 0x21ce - end # PCIe Port #2 Integrated Wireless LAN + device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN device pci 1c.2 off end # PCIe Port #3 device pci 1c.3 on - subsystemid 0x17aa 0x21ce smbios_slot_desc "7" "3" "ExpressCard Slot" "8" end # PCIe Port #4 ExpressCard device pci 1c.4 on - subsystemid 0x17aa 0x21ce chip drivers/ricoh/rce822 register "sdwppol" = "1" register "disable_mask" = "0x87" - device pci 00.0 on - subsystemid 0x17aa 0x21ce - end + device pci 00.0 on end end end # PCIe Port #5 (Ricoh SD & FW) device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe) device pci 1c.6 off end # PCIe Port #7 device pci 1c.7 off end # PCIe Port #8 - device pci 1d.0 on - subsystemid 0x17aa 0x21ce - end # USB Enhanced Host Controller #1 + device pci 1d.0 on end # USB Enhanced Host Controller #1 device pci 1e.0 off end # PCI bridge device pci 1f.0 on - subsystemid 0x17aa 0x21ce chip ec/lenovo/pmh7 - device pnp ff.1 on # dummy - end + device pnp ff.1 on end # dummy register "backlight_enable" = "0x01" register "dock_event_enable" = "0x01" end @@ -176,11 +159,8 @@ register "has_thinker1" = "1" end end # LPC Controller - device pci 1f.2 on - subsystemid 0x17aa 0x21ce - end # 6 port SATA AHCI Controller + device pci 1f.2 on end # 6 port SATA AHCI Controller device pci 1f.3 on - subsystemid 0x17aa 0x21ce # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c device i2c 54 on end @@ -194,9 +174,7 @@ end end # SMBus Controller device pci 1f.5 off end # SATA Controller 2 - device pci 1f.6 on - subsystemid 0x17aa 0x21ce - end # Thermal + device pci 1f.6 on end # Thermal end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/37284 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia321f2b974539ac1684173d767dd9eb64060364a Gerrit-Change-Number: 37284 Gerrit-PatchSet: 1 Gerrit-Owner: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-MessageType: newchange

5 10

Change in coreboot[master]: [WIP] mb/gigabyte/ga-b75m-d3h: Add ga-b75-d3v as a variant
by Bill XIE (Code Review) 09 Dec '19

09 Dec '19

Bill XIE has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36992 ) Change subject: [WIP] mb/gigabyte/ga-b75m-d3h: Add ga-b75-d3v as a variant ...................................................................... [WIP] mb/gigabyte/ga-b75m-d3h: Add ga-b75-d3v as a variant It is an ATX board similar to existing ga-b75* boards. The major difference is the configuration of pci-e ports on PCH, and on-board pci-e NIC. (see below) Tested: - CPU i5 3570T - Slotted DIMM 8GiB*4 from Kingston - usb2 and usb3 - libgfxinit-based graphic init - NVRAM options for North and South bridges - tpm 1.2 on lpc (similar to ga-b75m-d3h) - Linux 4.19.67-2 within Debian GNU/Linux stable, loaded from Seabios. Should work: - sata - Sound - S3 Unstable: - some pci-e devices connected to pch (including the AR8161 below attached to 1c.2) breaks RTC init and causes hang in mc146818rtc.c:__cmos_init(), possibly related to power consumption. TODO: Add AR8161 support. (it is supported by driver "alx" in Linux kernel, and the logic to set mac address is essentially identical to the one for atl1e, but the logic to detect address burned in efuse and external rom are different) Change-Id: I1a969880e4da02abf8ba73aac60ee1296fe0abf2 Signed-off-by: Bill XIE <persmule(a)hardenedlinux.org> --- M src/mainboard/gigabyte/ga-b75m-d3h/Kconfig M src/mainboard/gigabyte/ga-b75m-d3h/Kconfig.name A src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/board_info.txt A src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/gma-mainboard.ads A src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/gpio.c A src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/include/variant/hda_verb.h A src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/overridetree.cb A src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75m-d3h/overridetree.cb A src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75m-d3v/overridetree.cb 9 files changed, 348 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/36992/1 diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig b/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig index ceb2dbc..7fd030a 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig +++ b/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig @@ -1,4 +1,4 @@ -if BOARD_GIGABYTE_GA_B75M_D3H || BOARD_GIGABYTE_GA_B75M_D3V +if BOARD_GIGABYTE_GA_B75M_D3H || BOARD_GIGABYTE_GA_B75M_D3V || BOARD_GIGABYTE_GA_B75_D3V config BOARD_SPECIFIC_OPTIONS def_bool y @@ -34,11 +34,17 @@ string default "ga-b75m-d3h" if BOARD_GIGABYTE_GA_B75M_D3H default "ga-b75m-d3v" if BOARD_GIGABYTE_GA_B75M_D3V + default "ga-b75-d3v" if BOARD_GIGABYTE_GA_B75_D3V config MAINBOARD_PART_NUMBER string default "GA-B75M-D3H" if BOARD_GIGABYTE_GA_B75M_D3H default "GA-B75M-D3V" if BOARD_GIGABYTE_GA_B75M_D3V + default "GA-B75-D3V" if BOARD_GIGABYTE_GA_B75_D3V + +config OVERRIDE_DEVICETREE + string + default "variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" config MAX_CPUS int @@ -49,4 +55,4 @@ string default "src/mainboard/$(MAINBOARDDIR)/data.vbt" -endif # BOARD_GIGABYTE_GA_B75M* +endif # BOARD_GIGABYTE_GA_B75* diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig.name b/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig.name index f8fbe54..93f73a5 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig.name +++ b/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig.name @@ -3,3 +3,6 @@ config BOARD_GIGABYTE_GA_B75M_D3V bool "GA-B75M-D3V" + +config BOARD_GIGABYTE_GA_B75_D3V + bool "GA-B75-D3V" diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/board_info.txt b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/board_info.txt new file mode 100644 index 0000000..f90483f --- /dev/null +++ b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/board_info.txt @@ -0,0 +1,7 @@ +Category: desktop +Board URL: https://www.gigabyte.com/Motherboard/GA-B75-D3V-rev-11 +ROM package: SOIC-8 +ROM protocol: SPI +ROM socketed: n +Flashrom support: y +Release year: 2012 diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/gma-mainboard.ads b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/gma-mainboard.ads new file mode 100644 index 0000000..416732d --- /dev/null +++ b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/gma-mainboard.ads @@ -0,0 +1,28 @@ +-- +-- Copyright (C) 2017 Bill XIE persmule(a)gmail.com +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 2 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- + +with HW.GFX.GMA; +with HW.GFX.GMA.Display_Probing; + +use HW.GFX.GMA; +use HW.GFX.GMA.Display_Probing; + +private package GMA.Mainboard is + + ports : constant Port_List := + (HDMI1, + Analog, + others => Disabled); + +end GMA.Mainboard; diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/gpio.c b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/gpio.c new file mode 100644 index 0000000..763dfad --- /dev/null +++ b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/gpio.c @@ -0,0 +1,201 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * Copyright (C) 2014 Vladimir Serbinenko + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <southbridge/intel/common/gpio.h> + +static const struct pch_gpio_set1 pch_gpio_set1_mode = { + .gpio0 = GPIO_MODE_GPIO, + .gpio1 = GPIO_MODE_GPIO, + .gpio2 = GPIO_MODE_NATIVE, + .gpio3 = GPIO_MODE_NATIVE, + .gpio4 = GPIO_MODE_NATIVE, + .gpio5 = GPIO_MODE_NATIVE, + .gpio6 = GPIO_MODE_GPIO, + .gpio7 = GPIO_MODE_GPIO, + .gpio8 = GPIO_MODE_GPIO, + .gpio9 = GPIO_MODE_NATIVE, + .gpio10 = GPIO_MODE_NATIVE, + .gpio11 = GPIO_MODE_NATIVE, + .gpio12 = GPIO_MODE_GPIO, + .gpio13 = GPIO_MODE_GPIO, + .gpio14 = GPIO_MODE_NATIVE, + .gpio15 = GPIO_MODE_GPIO, + .gpio16 = GPIO_MODE_GPIO, + .gpio17 = GPIO_MODE_GPIO, + .gpio18 = GPIO_MODE_NATIVE, + .gpio19 = GPIO_MODE_GPIO, + .gpio20 = GPIO_MODE_NATIVE, + .gpio21 = GPIO_MODE_GPIO, + .gpio22 = GPIO_MODE_GPIO, + .gpio23 = GPIO_MODE_NATIVE, + .gpio24 = GPIO_MODE_GPIO, + .gpio25 = GPIO_MODE_NATIVE, + .gpio26 = GPIO_MODE_NATIVE, + .gpio27 = GPIO_MODE_GPIO, + .gpio28 = GPIO_MODE_GPIO, + .gpio29 = GPIO_MODE_GPIO, + .gpio30 = GPIO_MODE_NATIVE, + .gpio31 = GPIO_MODE_GPIO, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_direction = { + .gpio0 = GPIO_DIR_INPUT, + .gpio1 = GPIO_DIR_INPUT, + .gpio6 = GPIO_DIR_INPUT, + .gpio7 = GPIO_DIR_INPUT, + .gpio8 = GPIO_DIR_OUTPUT, + .gpio12 = GPIO_DIR_OUTPUT, + .gpio13 = GPIO_DIR_INPUT, + .gpio15 = GPIO_DIR_OUTPUT, + .gpio16 = GPIO_DIR_INPUT, + .gpio17 = GPIO_DIR_INPUT, + .gpio19 = GPIO_DIR_INPUT, + .gpio21 = GPIO_DIR_INPUT, + .gpio22 = GPIO_DIR_INPUT, + .gpio24 = GPIO_DIR_OUTPUT, + .gpio27 = GPIO_DIR_INPUT, + .gpio28 = GPIO_DIR_OUTPUT, + .gpio29 = GPIO_DIR_INPUT, + .gpio31 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_level = { + .gpio8 = GPIO_LEVEL_HIGH, + .gpio12 = GPIO_LEVEL_HIGH, + .gpio15 = GPIO_LEVEL_LOW, + .gpio24 = GPIO_LEVEL_LOW, + .gpio28 = GPIO_LEVEL_LOW, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_reset = { + .gpio24 = GPIO_RESET_RSMRST, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_invert = { + .gpio13 = GPIO_INVERT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_blink = { +}; + +static const struct pch_gpio_set2 pch_gpio_set2_mode = { + .gpio32 = GPIO_MODE_GPIO, + .gpio33 = GPIO_MODE_GPIO, + .gpio34 = GPIO_MODE_GPIO, + .gpio35 = GPIO_MODE_GPIO, + .gpio36 = GPIO_MODE_GPIO, + .gpio37 = GPIO_MODE_GPIO, + .gpio38 = GPIO_MODE_GPIO, + .gpio39 = GPIO_MODE_GPIO, + .gpio40 = GPIO_MODE_NATIVE, + .gpio41 = GPIO_MODE_NATIVE, + .gpio42 = GPIO_MODE_NATIVE, + .gpio43 = GPIO_MODE_NATIVE, + .gpio44 = GPIO_MODE_NATIVE, + .gpio45 = GPIO_MODE_NATIVE, + .gpio46 = GPIO_MODE_NATIVE, + .gpio47 = GPIO_MODE_NATIVE, + .gpio48 = GPIO_MODE_GPIO, + .gpio49 = GPIO_MODE_GPIO, + .gpio50 = GPIO_MODE_NATIVE, + .gpio51 = GPIO_MODE_NATIVE, + .gpio52 = GPIO_MODE_NATIVE, + .gpio53 = GPIO_MODE_NATIVE, + .gpio54 = GPIO_MODE_NATIVE, + .gpio55 = GPIO_MODE_NATIVE, + .gpio56 = GPIO_MODE_NATIVE, + .gpio57 = GPIO_MODE_GPIO, + .gpio58 = GPIO_MODE_NATIVE, + .gpio59 = GPIO_MODE_NATIVE, + .gpio60 = GPIO_MODE_NATIVE, + .gpio61 = GPIO_MODE_NATIVE, + .gpio62 = GPIO_MODE_NATIVE, + .gpio63 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_direction = { + .gpio32 = GPIO_DIR_OUTPUT, + .gpio33 = GPIO_DIR_OUTPUT, + .gpio34 = GPIO_DIR_INPUT, + .gpio35 = GPIO_DIR_OUTPUT, + .gpio36 = GPIO_DIR_INPUT, + .gpio37 = GPIO_DIR_INPUT, + .gpio38 = GPIO_DIR_INPUT, + .gpio39 = GPIO_DIR_INPUT, + .gpio48 = GPIO_DIR_INPUT, + .gpio49 = GPIO_DIR_INPUT, + .gpio57 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_level = { + .gpio32 = GPIO_LEVEL_HIGH, + .gpio33 = GPIO_LEVEL_HIGH, + .gpio35 = GPIO_LEVEL_LOW, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_reset = { +}; + +static const struct pch_gpio_set3 pch_gpio_set3_mode = { + .gpio64 = GPIO_MODE_NATIVE, + .gpio65 = GPIO_MODE_NATIVE, + .gpio66 = GPIO_MODE_NATIVE, + .gpio67 = GPIO_MODE_NATIVE, + .gpio68 = GPIO_MODE_GPIO, + .gpio69 = GPIO_MODE_GPIO, + .gpio70 = GPIO_MODE_NATIVE, + .gpio71 = GPIO_MODE_NATIVE, + .gpio72 = GPIO_MODE_GPIO, + .gpio73 = GPIO_MODE_NATIVE, + .gpio74 = GPIO_MODE_NATIVE, + .gpio75 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_direction = { + .gpio68 = GPIO_DIR_INPUT, + .gpio69 = GPIO_DIR_INPUT, + .gpio72 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_level = { +}; + +static const struct pch_gpio_set3 pch_gpio_set3_reset = { +}; + +const struct pch_gpio_map mainboard_gpio_map = { + .set1 = { + .mode = &pch_gpio_set1_mode, + .direction = &pch_gpio_set1_direction, + .level = &pch_gpio_set1_level, + .blink = &pch_gpio_set1_blink, + .invert = &pch_gpio_set1_invert, + .reset = &pch_gpio_set1_reset, + }, + .set2 = { + .mode = &pch_gpio_set2_mode, + .direction = &pch_gpio_set2_direction, + .level = &pch_gpio_set2_level, + .reset = &pch_gpio_set2_reset, + }, + .set3 = { + .mode = &pch_gpio_set3_mode, + .direction = &pch_gpio_set3_direction, + .level = &pch_gpio_set3_level, + .reset = &pch_gpio_set3_reset, + }, +}; diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/include/variant/hda_verb.h b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/include/variant/hda_verb.h new file mode 100644 index 0000000..c92c625 --- /dev/null +++ b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/include/variant/hda_verb.h @@ -0,0 +1,69 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef GA_B75_D3V_HDA_VERB_H +#define GA_B75_D3V_HDA_VERB_H + +const u32 cim_verb_data[] = { + /* coreboot specific header */ + 0x10ec0887, // Realtek 887 + 0x1458a002, // Subsystem ID + 0x0000000e, // Number of entries + + /* NID 0x01: Subsystem ID. */ + AZALIA_SUBVENDOR(0x2, 0x1458a002), + + /* NID 0x11. */ + AZALIA_PIN_CFG(0x2, 0x11, 0x99430130), + + /* NID 0x12. */ + AZALIA_PIN_CFG(0x2, 0x12, 0x411111f0), + + /* NID 0x14. */ + AZALIA_PIN_CFG(0x2, 0x14, 0x01014410), + + /* NID 0x15. */ + AZALIA_PIN_CFG(0x2, 0x15, 0x411111f0), + + /* NID 0x16. */ + AZALIA_PIN_CFG(0x2, 0x16, 0x411111f0), + + /* NID 0x17. */ + AZALIA_PIN_CFG(0x2, 0x17, 0x411111f0), + + /* NID 0x18. */ + AZALIA_PIN_CFG(0x2, 0x18, 0x01a19c50), + + /* NID 0x19. */ + AZALIA_PIN_CFG(0x2, 0x19, 0x02a19c60), + + /* NID 0x1a. */ + AZALIA_PIN_CFG(0x2, 0x1a, 0x0181345f), + + /* NID 0x1b. */ + AZALIA_PIN_CFG(0x2, 0x1b, 0x02214c20), + + /* NID 0x1c. */ + AZALIA_PIN_CFG(0x2, 0x1c, 0x411111f0), + + /* NID 0x1d. */ + AZALIA_PIN_CFG(0x2, 0x1d, 0x4004c601), + + /* NID 0x1e. */ + AZALIA_PIN_CFG(0x2, 0x1e, 0x411111f0), + + /* NID 0x1f. */ + AZALIA_PIN_CFG(0x2, 0x1f, 0x411111f0), +}; + +#endif diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/overridetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/overridetree.cb new file mode 100644 index 0000000..e5b7285 --- /dev/null +++ b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/overridetree.cb @@ -0,0 +1,26 @@ +chip northbridge/intel/sandybridge + device domain 0 on + chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH + device pci 16.0 off end # Management Engine Interface 1 + register "xhci_overcurrent_mapping" = "0x00000c03" + device pci 1c.1 on end # PCIe Port #2 + device pci 1c.2 on + device pci 00.0 on # PCI 1969:1091 + subsystemid 0x1458 0xe000 + end + end # PCIe Port #3 + device pci 1c.3 on end # PCIe Port #4 + device pci 1c.4 on end # PCIe Port #5 + device pci 1f.0 on # ISA/LPC bridge + subsystemid 0x1458 0x5001 + chip superio/ite/it8728f + device pnp 2e.2 off end # COM2 + device pnp 2e.3 off end # LPT + device pnp 2e.4 on # EC + io 0x62 = 0x230 + end + end + end + end + end +end diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75m-d3h/overridetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75m-d3h/overridetree.cb new file mode 100644 index 0000000..dbe35ba --- /dev/null +++ b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75m-d3h/overridetree.cb @@ -0,0 +1,3 @@ +chip northbridge/intel/sandybridge + device domain 0 on end +end \ No newline at end of file diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75m-d3v/overridetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75m-d3v/overridetree.cb new file mode 100644 index 0000000..dbe35ba --- /dev/null +++ b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75m-d3v/overridetree.cb @@ -0,0 +1,3 @@ +chip northbridge/intel/sandybridge + device domain 0 on end +end \ No newline at end of file -- To view, visit https://review.coreboot.org/c/coreboot/+/36992 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1a969880e4da02abf8ba73aac60ee1296fe0abf2 Gerrit-Change-Number: 36992 Gerrit-PatchSet: 1 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-MessageType: newchange

5 26

Change in coreboot[master]: src/device: Fix typo
by HAOUAS Elyes (Code Review) 09 Dec '19

09 Dec '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37571 ) Change subject: src/device: Fix typo ...................................................................... src/device: Fix typo Change-Id: Ibe99264a82fdea0e185907d2d2d4c57078ef3ae4 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/device/pciexp_device.c M util/lint/spelling.txt 2 files changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/37571/1 diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index 72aac4c..c73c548 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -165,7 +165,7 @@ cap = pci_find_capability(dev, PCI_CAP_ID_PCIE); /* - * Check if capibility pointer is valid and + * Check if capability pointer is valid and * device supports LTR mechanism. */ if (!cap || !pciexp_is_ltr_supported(dev, cap)) { diff --git a/util/lint/spelling.txt b/util/lint/spelling.txt index 118a435..7ca4e6b 100644 --- a/util/lint/spelling.txt +++ b/util/lint/spelling.txt @@ -222,6 +222,7 @@ capabitilies||capabilities capatibilities||capabilities capapbilities||capabilities +capibility||capability carefuly||carefully cariage||carriage catagory||category -- To view, visit https://review.coreboot.org/c/coreboot/+/37571 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe99264a82fdea0e185907d2d2d4c57078ef3ae4 Gerrit-Change-Number: 37571 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

4 5

Change in coreboot[master]: util/lint: Update 'spelling.txt' file
by HAOUAS Elyes (Code Review) 09 Dec '19

09 Dec '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37572 ) Change subject: util/lint: Update 'spelling.txt' file ...................................................................... util/lint: Update 'spelling.txt' file 'spelling.txt' file source: https://github.com/torvalds/linux/blob/master/scripts/spelling.txt Change-Id: Ife90b61d04e32f307a688d81922bdcf6fa57cfc9 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M util/lint/spelling.txt 1 file changed, 219 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/37572/1 diff --git a/util/lint/spelling.txt b/util/lint/spelling.txt index 118a435..1f2752b 100644 --- a/util/lint/spelling.txt +++ b/util/lint/spelling.txt @@ -11,6 +11,10 @@ abandonning||abandoning abigious||ambiguous abitrate||arbitrate +abnornally||abnormally +abnrormal||abnormal +abord||abort +aboslute||absolute abov||above abreviated||abbreviated absense||absence @@ -26,6 +30,7 @@ accesss||access accidentaly||accidentally accidentually||accidentally +acclerated||accelerated accoding||according accomodate||accommodate accomodates||accommodates @@ -37,6 +42,7 @@ accross||across acessable||accessible acess||access +acessing||accessing achitecture||architecture acient||ancient acitions||actions @@ -50,6 +56,7 @@ actived||activated actualy||actually acumulating||accumulating +acumulative||accumulative acumulator||accumulator adapater||adapter addional||additional @@ -59,12 +66,15 @@ adddress||address addreses||addresses addresss||address +addrress||address aditional||additional aditionally||additionally aditionaly||additionally adminstrative||administrative adress||address adresses||addresses +adrresses||addresses +advertisment||advertisement adviced||advised afecting||affecting againt||against @@ -78,6 +88,7 @@ algorithmical||algorithmically algoritm||algorithm algoritms||algorithms +algorithmn||algorithm algorrithm||algorithm algorritm||algorithm aligment||alignment @@ -96,11 +107,15 @@ alot||a lot alow||allow alows||allows +alredy||already altough||although alue||value ambigious||ambiguous +ambigous||ambiguous amoung||among amout||amount +amplifer||amplifier +amplifyer||amplifier an union||a union an user||a user an userspace||a userspace @@ -139,6 +154,7 @@ asign||assign asser||assert assertation||assertion +assertting||asserting assiged||assigned assigment||assignment assigments||assignments @@ -146,11 +162,15 @@ assocation||association associcated||associated assotiated||associated +asssert||assert assum||assume assumtpion||assumption asuming||assuming asycronous||asynchronous asynchnous||asynchronous +asynchromous||asynchronous +asymetric||asymmetric +asymmeric||asymmetric atomatically||automatically atomicly||atomically atempt||attempt @@ -158,8 +178,11 @@ attched||attached attemps||attempts attemping||attempting +attepmpt||attempt +attnetion||attention attruibutes||attributes authentification||authentication +authenicated||authenticated automaticaly||automatically automaticly||automatically automatize||automate @@ -173,6 +196,7 @@ availabe||available availabled||available availablity||availability +availaible||available availale||available availavility||availability availble||available @@ -206,9 +230,14 @@ borad||board boundry||boundary brievely||briefly +brigde||bridge +broadcase||broadcast broadcat||broadcast +bufufer||buffer cacluated||calculated +caculate||calculate caculation||calculation +cadidate||candidate calender||calendar calescing||coalescing calle||called @@ -218,16 +247,20 @@ cancelation||cancellation cancle||cancel capabilites||capabilities +capabilties||capabilities capabilty||capability capabitilies||capabilities +capablity||capability capatibilities||capabilities capapbilities||capabilities +caputure||capture carefuly||carefully cariage||carriage catagory||category cehck||check challange||challenge challanges||challenges +chache||cache chanell||channel changable||changeable chanined||chained @@ -241,6 +274,7 @@ charcter||character chcek||check chck||check +checksumed||checksummed checksuming||checksumming childern||children childs||children @@ -256,7 +290,9 @@ clared||cleared closeing||closing clustred||clustered +cnfiguration||configuration coexistance||coexistence +colescing||coalescing collapsable||collapsible colorfull||colorful comand||command @@ -273,6 +309,7 @@ comsuming||consuming compability||compatibility compaibility||compatibility +comparsion||comparison compatability||compatibility compatable||compatible compatibiliy||compatibility @@ -286,15 +323,21 @@ complient||compliant componnents||components compoment||component +comppatible||compatible compres||compress compresion||compression comression||compression comunication||communication conbination||combination conditionaly||conditionally +conditon||condition conected||connected +conector||connector connecetd||connected +configration||configuration configuartion||configuration +configuation||configuration +configued||configured configuratoin||configuration configuraton||configuration configuretion||configuration @@ -311,11 +354,13 @@ contaisn||contains contant||contact contence||contents +contiguos||contiguous continious||continuous continous||continuous continously||continuously continueing||continuing contraints||constraints +contruct||construct contol||control contoller||controller controled||controlled @@ -343,10 +388,14 @@ dafault||default deafult||default deamon||daemon +debouce||debounce decompres||decompress +decsribed||described decription||description dectected||detected defailt||default +deferal||deferral +deffered||deferred defferred||deferred definate||definite definately||definitely @@ -373,13 +422,16 @@ desactivate||deactivate desciptor||descriptor desciptors||descriptors +descripto||descriptor descripton||description descrition||description descritptor||descriptor desctiptor||descriptor desriptor||descriptor desriptors||descriptors +desination||destination destionation||destination +destoried||destroyed destory||destroy destoryed||destroyed destorys||destroys @@ -396,43 +448,64 @@ devided||divided deviece||device diable||disable +dicline||decline dictionnary||dictionary didnt||didn't diferent||different differrence||difference diffrent||different +differenciate||differentiate diffrentiate||differentiate difinition||definition +digial||digital +dimention||dimension dimesions||dimensions +dispalying||displaying diplay||display +directon||direction direectly||directly +diregard||disregard disassocation||disassociation disapear||disappear disapeared||disappeared disappared||disappeared +disbale||disable +disbaled||disabled disble||disable disbled||disabled disconnet||disconnect discontinous||discontinuous +disharge||discharge +disnabled||disabled dispertion||dispersion dissapears||disappears +dissconect||disconnect distiction||distinction +divisable||divisible +divsiors||divisors docuentation||documentation documantation||documentation documentaion||documentation documment||document doesnt||doesn't +donwload||download +donwloading||downloading dorp||drop dosen||doesn downlad||download downlads||downloads +droped||dropped +droput||dropout druing||during dynmaic||dynamic +eanable||enable +eanble||enable easilly||easily ecspecially||especially edditable||editable editting||editing efective||effective +effectivness||effectiveness efficently||efficiently ehther||ether eigth||eight @@ -440,6 +513,8 @@ eletronic||electronic embeded||embedded enabledi||enabled +enbale||enable +enble||enable enchanced||enhanced encorporating||incorporating encrupted||encrypted @@ -448,6 +523,9 @@ endianess||endianness enhaced||enhanced enlightnment||enlightenment +enqueing||enqueuing +entires||entries +entites||entities entrys||entries enocded||encoded enterily||entirely @@ -467,7 +545,10 @@ excecutable||executable exceded||exceeded excellant||excellent +execeeded||exceeded +execeeds||exceeds exeed||exceed +exeuction||execution existance||existence existant||existent exixt||exist @@ -475,6 +556,7 @@ exlcusive||exclusive exmaple||example expecially||especially +experies||expires explicite||explicit explicitely||explicitly explict||explicit @@ -485,9 +567,14 @@ extened||extended extensability||extensibility extention||extension +extenstion||extension extracter||extractor +faied||failed +faield||failed falied||failed faild||failed +failded||failed +failer||failure faill||fail failied||failed faillure||failure @@ -506,6 +593,8 @@ fetaures||features fileystem||filesystem fimware||firmware +firmare||firmware +firmaware||firmware firware||firmware finanize||finalize findn||find @@ -521,13 +610,17 @@ forse||force fortan||fortran forwardig||forwarding +frambuffer||framebuffer framming||framing framwork||framework frequncy||frequency +frequancy||frequency frome||from fucntion||function fuction||function fuctions||functions +fullill||fulfill +funcation||function funcion||function functionallity||functionality functionaly||functionally @@ -538,9 +631,13 @@ furthur||further futhermore||furthermore futrue||future +gatable||gateable +gateing||gating +gauage||gauge gaurenteed||guaranteed generiously||generously genereate||generate +genereted||generated genric||generic globel||global grabing||grabbing @@ -554,14 +651,17 @@ halfs||halves hander||handler handfull||handful +hanlde||handle hanled||handled happend||happened harware||hardware heirarchically||hierarchically helpfull||helpful +hexdecimal||hexadecimal hybernate||hibernate hierachy||hierarchy hierarchie||hierarchy +homogenous||homogeneous howver||however hsould||should hypervior||hypervisor @@ -569,12 +669,16 @@ identidier||identifier iligal||illegal illigal||illegal +illgal||illegal +iomaped||iomapped imblance||imbalance immeadiately||immediately immedaite||immediate +immedate||immediate immediatelly||immediately immediatly||immediately immidiate||immediate +immutible||immutable impelentation||implementation impementated||implemented implemantation||implementation @@ -592,10 +696,12 @@ incomming||incoming incompatabilities||incompatibilities incompatable||incompatible +incompatble||incompatible inconsistant||inconsistent increas||increase incremeted||incremented incrment||increment +inculde||include indendation||indentation indended||intended independant||independent @@ -604,6 +710,7 @@ indiate||indicate indicat||indicate inexpect||inexpected +inferface||interface infomation||information informatiom||information informations||information @@ -618,14 +725,22 @@ initation||initiation initators||initiators initialiazation||initialization +initializationg||initialization initializiation||initialization +initialze||initialize initialzed||initialized +initialzing||initializing initilization||initialization initilize||initialize +initliaze||initialize inofficial||unofficial +inrerface||interface insititute||institute +instace||instance instal||install +instanciate||instantiate instanciated||instantiated +insufficent||insufficient inteface||interface integreated||integrated integrety||integrity @@ -640,6 +755,8 @@ internel||internal interoprability||interoperability interuupt||interrupt +interupt||interrupt +interupts||interrupts interrface||interface interrrupt||interrupt interrup||interrupt @@ -655,10 +772,14 @@ intialized||initialized intialize||initialize intregral||integral +intrerrupt||interrupt intrrupt||interrupt intterrupt||interrupt intuative||intuitive +inavlid||invalid invaid||invalid +invaild||invalid +invailid||invalid invald||invalid invalde||invalid invalide||invalid @@ -667,6 +788,7 @@ invididual||individual invokation||invocation invokations||invocations +ireelevant||irrelevant irrelevent||irrelevant isnt||isn't isssue||issue @@ -675,6 +797,7 @@ itslef||itself jave||java jeffies||jiffies +jumpimng||jumping juse||just jus||just kown||known @@ -684,6 +807,7 @@ langugage||language lauch||launch layed||laid +legnth||length leightweight||lightweight lengh||length lenght||length @@ -694,29 +818,39 @@ librairies||libraries libraris||libraries licenceing||licencing +logaritmic||logarithmic loggging||logging loggin||login logile||logfile +loobpack||loopback loosing||losing losted||lost machinary||machinery +maibox||mailbox maintainance||maintenance maintainence||maintenance maintan||maintain makeing||making +mailformed||malformed malplaced||misplaced malplace||misplace managable||manageable managment||management mangement||management manoeuvering||maneuvering +manufaucturing||manufacturing mappping||mapping +matchs||matches mathimatical||mathematical mathimatic||mathematic mathimatics||mathematics +maximium||maximum maxium||maximum mechamism||mechanism meetign||meeting +memeory||memory +memmber||member +memoery||memory ment||meant mergable||mergeable mesage||message @@ -724,11 +858,14 @@ messgaes||messages messsage||message messsages||messages +metdata||metadata micropone||microphone microprocesspr||microprocessor +migrateable||migratable milliseonds||milliseconds minium||minimum minimam||minimum +miniumum||minimum minumum||minimum misalinged||misaligned miscelleneous||miscellaneous @@ -737,11 +874,14 @@ mispelt||misspelt mising||missing mismactch||mismatch +missign||missing missmanaged||mismanaged missmatch||mismatch +misssing||missing miximum||maximum mmnemonic||mnemonic mnay||many +modfiy||modify modulues||modules momery||memory memomry||memory @@ -752,6 +892,7 @@ mroe||more mulitplied||multiplied multidimensionnal||multidimensional +multipe||multiple multple||multiple mumber||number muticast||multicast @@ -774,10 +915,13 @@ nessessary||necessary noticable||noticeable notications||notifications +notifcations||notifications notifed||notified +notity||notify numebr||number numner||number obtaion||obtain +obusing||abusing occassionally||occasionally occationally||occasionally occurance||occurrence @@ -787,7 +931,11 @@ occure||occurred occured||occurred occuring||occurring +offser||offset offet||offset +offlaod||offload +offloded||offloaded +offseting||offsetting omited||omitted omiting||omitting omitt||omit @@ -802,6 +950,7 @@ orientatied||orientated orientied||oriented orignal||original +originial||original otherise||otherwise ouput||output oustanding||outstanding @@ -821,6 +970,7 @@ packge||package packtes||packets pakage||package +paket||packet pallette||palette paln||plan paramameters||parameters @@ -830,23 +980,30 @@ parametised||parametrised paramter||parameter paramters||parameters +parmaters||parameters particuarly||particularly particularily||particularly +partion||partition +partions||partitions partiton||partition pased||passed passin||passing pathes||paths pecularities||peculiarities peformance||performance +peforming||performing peice||piece pendantic||pedantic peprocessor||preprocessor perfoming||performing +peripherial||peripheral permissons||permissions peroid||period persistance||persistence persistant||persistent +phoneticly||phonetically plalform||platform +platfoem||platform platfrom||platform plattform||platform pleaes||please @@ -858,7 +1015,10 @@ posible||possible positon||position possibilites||possibilities +potocol||protocol powerfull||powerful +pramater||parameter +preamle||preamble preample||preamble preapre||prepare preceeded||preceded @@ -871,6 +1031,7 @@ prefferably||preferably premption||preemption prepaired||prepared +preperation||preparation pressre||pressure primative||primitive princliple||principle @@ -898,6 +1059,8 @@ programm||program programms||programs progresss||progress +prohibitted||prohibited +prohibitting||prohibiting promiscous||promiscuous promps||prompts pronnounced||pronounced @@ -912,19 +1075,24 @@ protable||portable protcol||protocol protecion||protection +protedcted||protected protocoll||protocol promixity||proximity psudo||pseudo psuedo||pseudo psychadelic||psychedelic pwoer||power +queing||queuing quering||querying +queus||queues randomally||randomly raoming||roaming reasearcher||researcher reasearchers||researchers reasearch||research +receieve||receive recepient||recipient +recevied||received receving||receiving recieved||received recieve||receive @@ -936,6 +1104,7 @@ recyle||recycle redircet||redirect redirectrion||redirection +redundacy||redundancy reename||rename refcounf||refcount refence||reference @@ -974,19 +1143,27 @@ requred||required requried||required requst||request +reregisteration||reregistration reseting||resetting +reseved||reserved +reseverd||reserved resizeable||resizable resouce||resource resouces||resources resoures||resources responce||response +resrouce||resource ressizes||resizes ressource||resource ressources||resources +restesting||retesting +resumbmitting||resubmitting retransmited||retransmitted retreived||retrieved retreive||retrieve +retreiving||retrieving retrive||retrieve +retrived||retrieved retuned||returned reudce||reduce reuest||request @@ -1007,14 +1184,18 @@ safly||safely safty||safety savable||saveable +scaleing||scaling scaned||scanned scaning||scanning scarch||search +schdule||schedule seach||search searchs||searches secquence||sequence secund||second segement||segment +semaphone||semaphore +senario||scenario senarios||scenarios sentivite||sensitive separatly||separately @@ -1026,9 +1207,13 @@ seperatly||separately seperator||separator sepperate||separate +seqeunce||sequence +seqeuncer||sequencer +seqeuencer||sequencer sequece||sequence sequencial||sequential serveral||several +servive||service setts||sets settting||setting shotdown||shutdown @@ -1047,9 +1232,11 @@ singal||signal singed||signed sleeped||slept +sliped||slipped softwares||software speach||speech specfic||specific +specfield||specified speciefied||specified specifc||specific specifed||specified @@ -1072,8 +1259,12 @@ standardss||standards standartization||standardization standart||standard +standy||standby +stardard||standard staticly||statically +statuss||status stoped||stopped +stoping||stopping stoppped||stopped straming||streaming struc||struct @@ -1086,6 +1277,7 @@ suble||subtle substract||subtract submition||submission +suceed||succeed succesfully||successfully succesful||successful successed||succeeded @@ -1109,6 +1301,7 @@ surpresses||suppresses susbsystem||subsystem suspeneded||suspended +suspsend||suspend suspicously||suspiciously swaping||swapping switchs||switches @@ -1123,6 +1316,7 @@ symetric||symmetric synax||syntax synchonized||synchronized +synchronuously||synchronously syncronize||synchronize syncronized||synchronized syncronizing||synchronizing @@ -1131,28 +1325,38 @@ sytem||system sythesis||synthesis taht||that +tansmit||transmit targetted||targeted targetting||targeting +taskelt||tasklet teh||the temorary||temporary temproarily||temporarily +temperture||temperature +thead||thread therfore||therefore thier||their threds||threads threshhold||threshold thresold||threshold throught||through +trackling||tracking troughput||throughput thses||these +tiggers||triggers tiggered||triggered tipically||typically +timeing||timing timout||timeout tmis||this +toogle||toggle torerable||tolerable +traking||tracking tramsmitted||transmitted tramsmit||transmit tranasction||transaction tranfer||transfer +transcevier||transceiver transciever||transceiver transferd||transferred transfered||transferred @@ -1163,6 +1367,7 @@ trasfer||transfer trasmission||transmission treshold||threshold +trigerred||triggered trigerring||triggering trun||turn tunning||tuning @@ -1170,8 +1375,11 @@ tyep||type udpate||update uesd||used +uknown||unknown +usupported||unsupported uncommited||uncommitted unconditionaly||unconditionally +undeflow||underflow underun||underrun unecessary||unnecessary unexecpted||unexpected @@ -1182,11 +1390,15 @@ unexpexted||unexpected unfortunatelly||unfortunately unifiy||unify +uniterrupted||uninterrupted unintialized||uninitialized +unitialized||uninitialized unkmown||unknown unknonw||unknown unknow||unknown unkown||unknown +unamed||unnamed +uneeded||unneeded unneded||unneeded unneccecary||unnecessary unneccesary||unnecessary @@ -1205,12 +1417,15 @@ unsuported||unsupported untill||until unuseful||useless +unvalid||invalid upate||update +upsupported||unsupported usefule||useful usefull||useful usege||usage usera||users usualy||usually +usupported||unsupported utilites||utilities utillities||utilities utilties||utilities @@ -1225,6 +1440,7 @@ varient||variant vaule||value verbse||verbose +veify||verify verisons||versions verison||version verson||version @@ -1234,7 +1450,9 @@ virtiual||virtual visiters||visitors vitual||virtual +vunerable||vulnerable wakeus||wakeups +wathdog||watchdog wating||waiting wiat||wait wether||whether @@ -1251,5 +1469,6 @@ workarould||workaround writeing||writing writting||writing +wtih||with zombe||zombie zomebie||zombie -- To view, visit https://review.coreboot.org/c/coreboot/+/37572 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ife90b61d04e32f307a688d81922bdcf6fa57cfc9 Gerrit-Change-Number: 37572 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

4 5

Change in coreboot[master]: drivers/intel/fsp2_0: Allow to add FSP binaries from repo for IceLake
by Mimoja (Code Review) 09 Dec '19

09 Dec '19

Mimoja has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37561 ) Change subject: drivers/intel/fsp2_0: Allow to add FSP binaries from repo for IceLake ...................................................................... drivers/intel/fsp2_0: Allow to add FSP binaries from repo for IceLake This commits adds a dependency check for the FSP_USE_REPO config option which so far was not able to deal with IceLake systems. Change-Id: I29faa8d3acff5680b611951fc193d33f514dc0d3 Signed-off-by: Johanna Schander <coreboot(a)mimoja.de> --- M src/drivers/intel/fsp2_0/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/37561/1 diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index 77382d3..c51b268 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -55,7 +55,7 @@ depends on ADD_FSP_BINARIES depends on SOC_INTEL_APOLLOLAKE || SOC_INTEL_SKYLAKE || \ SOC_INTEL_KABYLAKE || SOC_INTEL_COFFEELAKE || \ - SOC_INTEL_WHISKEYLAKE + SOC_INTEL_ICELAKE || SOC_INTEL_WHISKEYLAKE help When selecting this option, the SoC must set FSP_HEADER_PATH and FSP_FD_PATH correctly so FSP splitting works. -- To view, visit https://review.coreboot.org/c/coreboot/+/37561 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29faa8d3acff5680b611951fc193d33f514dc0d3 Gerrit-Change-Number: 37561 Gerrit-PatchSet: 1 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-MessageType: newchange

6 16

Change in coreboot[master]: soc/intel/bsw/gpio: Factor out GPI macros
by Angel Pons (Code Review) 09 Dec '19

09 Dec '19

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37404 ) Change subject: soc/intel/bsw/gpio: Factor out GPI macros ...................................................................... soc/intel/bsw/gpio: Factor out GPI macros This patch simplifies some GPIO macros by removing redundant code. Also, for the sake of completeness, add two missing macros. Change-Id: I838efe8b26f60d3e059f4ce18c116aefbc0b0400 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/braswell/include/soc/gpio.h 1 file changed, 9 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/37404/1 diff --git a/src/soc/intel/braswell/include/soc/gpio.h b/src/soc/intel/braswell/include/soc/gpio.h index 2240ae1..24318c5 100644 --- a/src/soc/intel/braswell/include/soc/gpio.h +++ b/src/soc/intel/braswell/include/soc/gpio.h @@ -228,30 +228,17 @@ #define PAD_CONFIG1_CSEN 0x0DC00000 #define PAD_CONFIG1_DEFAULT1 0x05C00020 -#define GPIO_INPUT_NO_PULL \ - { .pad_conf0 = PAD_PULL_DISABLE | PAD_GPIO_ENABLE \ - | PAD_CONFIG0_GPI_DEFAULT, \ +#define GPIO_INPUT_PULL(pull) \ + { .pad_conf0 = pull | PAD_GPIO_ENABLE | PAD_CONFIG0_GPI_DEFAULT, \ .pad_conf1 = PAD_CONFIG1_DEFAULT0 } -#define GPIO_INPUT_PU_20K \ - { .pad_conf0 = PAD_PULL_UP_20K | PAD_GPIO_ENABLE \ - | PAD_CONFIG0_GPI_DEFAULT, \ - .pad_conf1 = PAD_CONFIG1_DEFAULT0 } - -#define GPIO_INPUT_PD_5K \ - { .pad_conf0 = PAD_PULL_DOWN_5K | PAD_GPIO_ENABLE \ - | PAD_CONFIG0_GPI_DEFAULT, \ - .pad_conf1 = PAD_CONFIG1_DEFAULT0 } - -#define GPIO_INPUT_PD_20K \ - { .pad_conf0 = PAD_PULL_DOWN_20K | PAD_GPIO_ENABLE \ - | PAD_CONFIG0_GPI_DEFAULT, \ - .pad_conf1 = PAD_CONFIG1_DEFAULT0 } - -#define GPIO_INPUT_PU_5K \ - { .pad_conf0 = PAD_PULL_UP_5K | PAD_GPIO_ENABLE \ - | PAD_CONFIG0_GPI_DEFAULT, \ - .pad_conf1 = PAD_CONFIG1_DEFAULT0 } +#define GPIO_INPUT_NO_PULL GPIO_INPUT_PULL(PAD_PULL_DISABLE) +#define GPIO_INPUT_PU_20K GPIO_INPUT_PULL(PAD_PULL_UP_20K) +#define GPIO_INPUT_PU_5K GPIO_INPUT_PULL(PAD_PULL_UP_5K) +#define GPIO_INPUT_PU_1K GPIO_INPUT_PULL(PAD_PULL_UP_1K) +#define GPIO_INPUT_PD_20K GPIO_INPUT_PULL(PAD_PULL_DOWN_20K) +#define GPIO_INPUT_PD_5K GPIO_INPUT_PULL(PAD_PULL_DOWN_5K) +#define GPIO_INPUT_PD_1K GPIO_INPUT_PULL(PAD_PULL_DOWN_1K) #define GPI(int_type, int_sel, term, int_msk, glitch_cfg, wake_msk, gpe_val) { \ .pad_conf0 = PAD_INT_SEL(int_sel) | PAD_GFCFG(glitch_cfg) \ -- To view, visit https://review.coreboot.org/c/coreboot/+/37404 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I838efe8b26f60d3e059f4ce18c116aefbc0b0400 Gerrit-Change-Number: 37404 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

3 2

Change in coreboot[master]: libpayload/drivers/nvram: Add function to write RTC
by Patrick Georgi (Code Review) 09 Dec '19

09 Dec '19

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/23585 ) Change subject: libpayload/drivers/nvram: Add function to write RTC ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/c/coreboot/+/23585/2/payloads/libpayload/driver… File payloads/libpayload/drivers/nvram.c: https://review.coreboot.org/c/coreboot/+/23585/2/payloads/libpayload/driver… PS2, Line 179: NVRAM_RTC_STATUSB defined in uncommitted parent commit (commenting here to prevent out of order submission) -- To view, visit https://review.coreboot.org/c/coreboot/+/23585 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17b4c1ee0dcc649738ac6a7400b087d07213eaf0 Gerrit-Change-Number: 23585 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Comment-Date: Mon, 09 Dec 2019 09:42:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: libpayload/drivers/nvram: Add function to write RTC
by Patrick Georgi (Code Review) 09 Dec '19

09 Dec '19

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/23585 ) Change subject: libpayload/drivers/nvram: Add function to write RTC ...................................................................... Patch Set 2: depends on parent commit which has open comments. -- To view, visit https://review.coreboot.org/c/coreboot/+/23585 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17b4c1ee0dcc649738ac6a7400b087d07213eaf0 Gerrit-Change-Number: 23585 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Comment-Date: Mon, 09 Dec 2019 09:42:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit December 2019