Shaunak Saha has uploaded a new patch set (#12) to the change originally created by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/37427 )
Change subject: soc/intel/tigerlake: Update GPIO config
......................................................................
soc/intel/tigerlake: Update GPIO config
Add tigerlake SOC specific GPIO definitions and ASL setting.
GPIO's are divided into different communities. Each community
consists of one or more GPIO groups. We need to configure the
groups from coreboot so that they are mapped properly.
BUG=none
BRANCH=none
TEST=Build and boot tigerlake rvp board
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com>
Change-Id: I585100375feee39b5a9105bdf6d9f5ca3a5bb2fa
---
M src/soc/intel/tigerlake/acpi/gpio.asl
M src/soc/intel/tigerlake/gpio.c
M src/soc/intel/tigerlake/include/soc/gpio.h
M src/soc/intel/tigerlake/include/soc/gpio_defs.h
M src/soc/intel/tigerlake/include/soc/gpio_soc_defs.h
M src/soc/intel/tigerlake/include/soc/pmc.h
6 files changed, 822 insertions(+), 612 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/37427/12
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Gerrit-MessageType: newpatchset
Shaunak Saha has uploaded a new patch set (#11) to the change originally created by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/37427 )
Change subject: soc/intel/tigerlake: Update GPIO config
......................................................................
soc/intel/tigerlake: Update GPIO config
Add tigerlake SOC specific GPIO definitions and ASL setting.
GPIO's are divided into different communities. Each community
consists of one or more GPIO groups. We need to configure the
groups from coreboot so that they are mapped properly.
BUG=none
BRANCH=none
TEST=Build and boot tigerlake rvp board
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com>
Change-Id: I585100375feee39b5a9105bdf6d9f5ca3a5bb2fa
---
M src/soc/intel/tigerlake/acpi/gpio.asl
M src/soc/intel/tigerlake/gpio.c
M src/soc/intel/tigerlake/include/soc/gpio.h
M src/soc/intel/tigerlake/include/soc/gpio_defs.h
M src/soc/intel/tigerlake/include/soc/gpio_soc_defs.h
M src/soc/intel/tigerlake/include/soc/pmc.h
6 files changed, 822 insertions(+), 612 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/37427/11
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Wonkyu Kim has uploaded a new patch set (#11) to the change originally created by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/37426 )
Change subject: soc/intel/tigerlake: Update Kconfig
......................................................................
soc/intel/tigerlake: Update Kconfig
Update Kconfig:
- use CAR NEM mode for tigerlake only as NEM Enhanced is under debug
- update GSPI, UART, RP, I2C max device #s according to
PCH EDS#576591 vol1 rev1.2
- update UART M/N setting according to new PCH baseclock
BUG=none
BRANCH=none
TEST=Build and boot tigerlake rvp board
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com>
Change-Id: I04020d55f1063d521b15f8d0dabbd6f1dabf577c
Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com>
---
M src/soc/intel/tigerlake/Kconfig
1 file changed, 14 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/37426/11
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Gerrit-MessageType: newpatchset
Wonkyu Kim has uploaded a new patch set (#10) to the change originally created by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/37426 )
Change subject: soc/intel/tigerlake: Update Kconfig
......................................................................
soc/intel/tigerlake: Update Kconfig
Update Kconfig:
- use CAR NEM mode for tigerlake only as NEM Enhanced is under debug
- update GSPI, UART, RP, I2C max device #s according to
PCH EDS#576591 vol1 rev1.2
- update UART M/N setting according to new PCH baseclock
BUG=none
BRANCH=none
TEST=Build and boot tigerlake rvp board
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com>
Change-Id: I04020d55f1063d521b15f8d0dabbd6f1dabf577c
Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com>
---
M src/soc/intel/tigerlake/Kconfig
1 file changed, 14 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/37426/10
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Gerrit-MessageType: newpatchset
Roja Rani Yarubandi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35499 )
Change subject: sc7180: Add QUPv3 FW load & config
......................................................................
Patch Set 25:
> Patch Set 11:
>
> I assume this patch will still get reworked based on what we discussed on the SDM845 version and via email?
Hi Julius, we have done the changes and updated the patches. We validated existing drivers functionality and still working on the test plan as mentioned in the mail thread "Dynamically loading of FW to QUPs". Can you please review these patches and share you comments.
Thanks,
Roja
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Wonkyu Kim has uploaded a new patch set (#17) to the change originally created by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/36091 )
Change subject: mb/intel/tglrvp: Do initial mainboard commit
......................................................................
mb/intel/tglrvp: Do initial mainboard commit
1. Add tglrvp baseboard files
2. Add tglrvp UP3 variant board files
3. Add board id support
4. Add SPD memory support
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com>
Change-Id: I79a05881d2ea50ff4113243bf5ae26207db63322
---
A src/mainboard/intel/tglrvp/Kconfig
A src/mainboard/intel/tglrvp/Kconfig.name
A src/mainboard/intel/tglrvp/Makefile.inc
A src/mainboard/intel/tglrvp/acpi/mainboard.asl
A src/mainboard/intel/tglrvp/acpi/mipi_camera.asl
A src/mainboard/intel/tglrvp/acpi_tables.c
A src/mainboard/intel/tglrvp/board_id.c
A src/mainboard/intel/tglrvp/board_id.h
A src/mainboard/intel/tglrvp/board_info.txt
A src/mainboard/intel/tglrvp/bootblock.c
A src/mainboard/intel/tglrvp/chromeos.c
A src/mainboard/intel/tglrvp/chromeos.fmd
A src/mainboard/intel/tglrvp/dsdt.asl
A src/mainboard/intel/tglrvp/ec.c
A src/mainboard/intel/tglrvp/romstage.c
A src/mainboard/intel/tglrvp/smihandler.c
A src/mainboard/intel/tglrvp/spd/Hynix-H9HKNNNEBMAV-4267.spd.hex
A src/mainboard/intel/tglrvp/spd/Makefile.inc
A src/mainboard/intel/tglrvp/spd/Micron-MT53D1G64D8SQ-046.spd.hex
A src/mainboard/intel/tglrvp/spd/Samsung-K4UBE3D4AA-MGCL.spd.hex
A src/mainboard/intel/tglrvp/spd/spd.h
A src/mainboard/intel/tglrvp/variants/baseboard/Makefile.inc
A src/mainboard/intel/tglrvp/variants/baseboard/devicetree.cb
A src/mainboard/intel/tglrvp/variants/baseboard/gpio.c
A src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/ec.h
A src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/gpio.h
A src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h
A src/mainboard/intel/tglrvp/variants/baseboard/mainboard.c
A src/mainboard/intel/tglrvp/variants/baseboard/memory.c
A src/mainboard/intel/tglrvp/variants/tglrvp_up3/Makefile.inc
A src/mainboard/intel/tglrvp/variants/tglrvp_up3/include/variant/ec.h
A src/mainboard/intel/tglrvp/variants/tglrvp_up3/include/variant/gpio.h
32 files changed, 2,086 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/36091/17
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