coreboot-gerrit November 2019

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Change in coreboot[master]: AGESA,binaryPI: Remove early_all_cores()
by Kyösti Mälkki (Code Review) 27 Nov '19

27 Nov '19

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37203 ) Change subject: AGESA,binaryPI: Remove early_all_cores() ...................................................................... AGESA,binaryPI: Remove early_all_cores() This was implemented to make sure it gets called before attempting any PCI MMIO access. Now that we have one central romstage_main() implementation this extra precaution is no longer useful. Change-Id: I09b24da827e00d7a9ba0a51d5eef36f174b893a6 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/drivers/amd/agesa/cache_as_ram.S M src/drivers/amd/agesa/romstage.c 2 files changed, 3 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/37203/1 diff --git a/src/drivers/amd/agesa/cache_as_ram.S b/src/drivers/amd/agesa/cache_as_ram.S index 3f1358a..e3e5735 100644 --- a/src/drivers/amd/agesa/cache_as_ram.S +++ b/src/drivers/amd/agesa/cache_as_ram.S @@ -94,8 +94,6 @@ #endif - call early_all_cores - /* Must maintain 16-byte stack alignment here. */ pushl $0x0 pushl $0x0 diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c index 72aac3e..0ecfeb2 100644 --- a/src/drivers/amd/agesa/romstage.c +++ b/src/drivers/amd/agesa/romstage.c @@ -27,15 +27,6 @@ #include <northbridge/amd/agesa/agesa_helper.h> #include <northbridge/amd/agesa/state_machine.h> -#if !CONFIG(POSTCAR_STAGE) -#error "Only POSTCAR_STAGE is supported." -#endif - -void asmlinkage early_all_cores(void) -{ - amd_initmmio(); -} - void __weak platform_once(struct sysinfo *cb) { board_BeforeAgesa(cb); @@ -57,6 +48,9 @@ u8 initial_apic_id = (u8) (cpuid_ebx(1) >> 24); int cbmem_initted = 0; + /* Enable PCI MMIO configuration. */ + amd_initmmio(); + fill_sysinfo(cb); if ((initial_apic_id == 0) && boot_cpu()) { -- To view, visit https://review.coreboot.org/c/coreboot/+/37203 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I09b24da827e00d7a9ba0a51d5eef36f174b893a6 Gerrit-Change-Number: 37203 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: binaryPI: Drop CAR teardown without POSTCAR_STAGE
by Kyösti Mälkki (Code Review) 27 Nov '19

27 Nov '19

Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/18526 ) Change subject: binaryPI: Drop CAR teardown without POSTCAR_STAGE ...................................................................... binaryPI: Drop CAR teardown without POSTCAR_STAGE The remaining (active) binaryPI boards moved away from BINARYPI_LEGACY_WRAPPER and have POSTCAR_STAGE now. As the cache_as_ram.S is also used with AGESA, this slightly reduces the codesize there for romstage and postcar as well. This commit is actually a revert for the vendorcode parts, AMD originally shipped the codes using 'invd' for the CAR teardown, but these were changed for coreboot due the convoluted teardown that used to happen with non-empty stack. Change-Id: I693c104c3aab3be537c00695cbd764a48bd603b0 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/18526 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/drivers/amd/agesa/Makefile.inc M src/drivers/amd/agesa/cache_as_ram.S A src/drivers/amd/agesa/exit_car.S M src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc M src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc M src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc 6 files changed, 45 insertions(+), 139 deletions(-) Approvals: build bot (Jenkins): Verified Michał Żygowski: Looks good to me, approved diff --git a/src/drivers/amd/agesa/Makefile.inc b/src/drivers/amd/agesa/Makefile.inc index fb46d91..dfb385d 100644 --- a/src/drivers/amd/agesa/Makefile.inc +++ b/src/drivers/amd/agesa/Makefile.inc @@ -20,7 +20,7 @@ ramstage-y += state_machine.c cpu_incs-y += $(src)/drivers/amd/agesa/cache_as_ram.S -postcar-y += cache_as_ram.S +postcar-y += exit_car.S romstage-y += def_callouts.c romstage-y += eventlog.c diff --git a/src/drivers/amd/agesa/cache_as_ram.S b/src/drivers/amd/agesa/cache_as_ram.S index dcb0c43..3f1358a 100644 --- a/src/drivers/amd/agesa/cache_as_ram.S +++ b/src/drivers/amd/agesa/cache_as_ram.S @@ -27,7 +27,6 @@ .code32 .globl _cache_as_ram_setup, _cache_as_ram_setup_end -.globl chipset_teardown_car _cache_as_ram_setup: @@ -105,66 +104,11 @@ pushl %eax call romstage_main -#if CONFIG(POSTCAR_STAGE) - -/* We do not return. Execution continues with run_postcar_phase() - * calling to chipset_teardown_car below. - */ - jmp postcar_entry_failure - -chipset_teardown_car: - -/* - * Retrieve return address from stack as it will get trashed below if - * execution is utilizing the cache-as-ram stack. - */ - pop %esp - -#else - - movl %eax, %esp - -/* Register %esp is new stacktop for remaining of romstage. */ - -#endif - - /* Disable cache */ - movl %cr0, %eax - orl $CR0_CacheDisable, %eax - movl %eax, %cr0 - -/* Register %esp is preserved in AMD_DISABLE_STACK. */ - AMD_DISABLE_STACK - -#if CONFIG(POSTCAR_STAGE) - - jmp *%esp - -#else - - /* enable cache */ - movl %cr0, %eax - andl $0x9fffffff, %eax - movl %eax, %cr0 - - call romstage_after_car - -#endif - /* Should never see this postcode */ - post_code(0xaf) + post_code(0xae) stop: hlt jmp stop -/* These are here for linking purposes. */ -.weak early_all_cores, romstage_main -early_all_cores: -romstage_main: -postcar_entry_failure: - /* Should never see this postcode */ - post_code(0xae) - jmp stop - _cache_as_ram_setup_end: diff --git a/src/drivers/amd/agesa/exit_car.S b/src/drivers/amd/agesa/exit_car.S new file mode 100644 index 0000000..f9d056e --- /dev/null +++ b/src/drivers/amd/agesa/exit_car.S @@ -0,0 +1,37 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <gcccar.inc> +#include <cpu/x86/cache.h> + +.code32 +.globl chipset_teardown_car + +chipset_teardown_car: + pop %esp + + /* Disable cache */ + movl %cr0, %eax + orl $CR0_CacheDisable, %eax + movl %eax, %cr0 + + AMD_DISABLE_STACK + + /* enable cache */ + movl %cr0, %eax + andl $(~(CR0_CD | CR0_NW)), %eax + movl %eax, %cr0 + + jmp *%esp diff --git a/src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc b/src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc index 75ba9e7..4d903e6 100644 --- a/src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc +++ b/src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc @@ -696,13 +696,6 @@ * Return any family specific controls to their 'standard' * settings for using cache with main memory. * -* Note: Customized for coreboot: -* A wbinvd is used to send cache to memory. The existing stack is preserved -* at its original location and additional information is preserved (e.g. -* coreboot CAR globals, heap structures, etc.). This implementation should -* NOT be used with S3 resume IF the stack/cache area is not reserved and -* over system memory. -* * Inputs: * ESI - [31:24] flags; [15,8]= Node#; [7,0]= core# * Outputs: @@ -911,16 +904,7 @@ btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion _WRMSR - #-------------------------------------------------------------------------- - # Send cache to memory. Preserve stack and coreboot CAR globals. - # This shouldn't be used with S3 resume IF the stack/cache area is - # not reserved and over system memory. - #-------------------------------------------------------------------------- -#if !CONFIG(POSTCAR_STAGE) - wbinvd -#else invd -#endif #.if (bh == 01h) || (bh == 03h) ; Is this TN or KV? cmp $01, %bh @@ -1563,17 +1547,8 @@ .endm /***************************************************************************** -* AMD_DISABLE_STACK: Implementation is modified for coreboot from -* the original AMD intent. A WBINVD is used in the HOOK -* to send dirty cache contents to DRAM backing before -* disabling cache-as-ram. This is not safe for S3 resume. -* -* todo: -* * rework PI/AGESA source to set DRAM to UC to send -* writes directly to memory -* * move DCACHE_BASE or use postcar stage for teardown -* to eliminate car_migrated problem that will occur -* after wbinvd is changed back to invd +* AMD_DISABLE_STACK: Destroy the stack inside the cache. This routine +* should only be executed on the BSP * * In: * none diff --git a/src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc b/src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc index 8f3ca83..b208cc1 100644 --- a/src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc +++ b/src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc @@ -401,13 +401,6 @@ * Return any family specific controls to their 'standard' * settings for using cache with main memory. * -* Note: Customized for coreboot: -* A wbinvd is used to send cache to memory. The existing stack is preserved -* at its original location and additional information is preserved (e.g. -* coreboot CAR globals, heap structures, etc.). This implementation should -* NOT be used with S3 resume IF the stack/cache area is not reserved and -* over system memory. -* * Inputs: * ESI - [31:24] flags; [15,8]= Node#; [7,0]= core# * Outputs: @@ -646,16 +639,7 @@ btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion _WRMSR - #-------------------------------------------------------------------------- - # Send cache to memory. Preserve stack and coreboot CAR globals. - # This shouldn't be used with S3 resume IF the stack/cache area is - # not reserved and over system memory. - #-------------------------------------------------------------------------- -#if !CONFIG(POSTCAR_STAGE) - wbinvd -#else invd -#endif # #.if (bh == 01h) || (bh == 03h) ; Is this TN or KM? # cmp $01, %bh @@ -1302,17 +1286,8 @@ .endm /***************************************************************************** -* AMD_DISABLE_STACK: Implementation is modified for coreboot from -* the original AMD intent. A WBINVD is used in the HOOK -* to send dirty cache contents to DRAM backing before -* disabling cache-as-ram. This is not safe for S3 resume. -* -* todo: -* * rework PI/AGESA source to set DRAM to UC to send -* writes directly to memory -* * move DCACHE_BASE or use postcar stage for teardown -* to eliminate car_migrated problem that will occur -* after wbinvd is changed back to invd +* AMD_DISABLE_STACK: Destroy the stack inside the cache. This routine +* should only be executed on the BSP * * In: * none diff --git a/src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc b/src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc index 357b8be..7d86a31 100644 --- a/src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc +++ b/src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc @@ -383,13 +383,6 @@ ; Return any family specific controls to their 'standard' ; settings for using cache with main memory. ; -; Note: Customized for coreboot: -; A wbinvd is used to send cache to memory. The existing stack is preserved -; at its original location and additional information is preserved (e.g. -; coreboot CAR globals, heap structures, etc.). This implementation should -; NOT be used with S3 resume IF the stack/cache area is not reserved and -; over system memory. -; ; Inputs: ; ESI - [31:24] flags; [15:8]= Node#; [7:0]= core# ; Outputs: @@ -610,16 +603,7 @@ btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion _WRMSR - #-------------------------------------------------------------------------- - # Send cache to memory. Preserve stack and coreboot CAR globals. - # This shouldn't be used with S3 resume IF the stack/cache area is - # not reserved and over system memory. - #-------------------------------------------------------------------------- -#if !CONFIG(POSTCAR_STAGE) - wbinvd -#else invd -#endif #Do Standard Family 16 work mov $HWCR, %ecx # MSR:C001_0015h @@ -1276,17 +1260,8 @@ .endm /***************************************************************************** -* AMD_DISABLE_STACK: Implementation is modified for coreboot from -* the original AMD intent. A WBINVD is used in the HOOK -* to send dirty cache contents to DRAM backing before -* disabling cache-as-ram. This is not safe for S3 resume. -* -* todo: -* * rework PI/AGESA source to set DRAM to UC to send -* writes directly to memory -* * move DCACHE_BASE or use postcar stage for teardown -* to eliminate car_migrated problem that will occur -* after wbinvd is changed back to invd +* AMD_DISABLE_STACK: Destroy the stack inside the cache. This routine +* should only be executed on the BSP * * In: * none -- To view, visit https://review.coreboot.org/c/coreboot/+/18526 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I693c104c3aab3be537c00695cbd764a48bd603b0 Gerrit-Change-Number: 18526 Gerrit-PatchSet: 12 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: binaryPI: Drop BINARYPI_LEGACY_WRAPPER support
by Kyösti Mälkki (Code Review) 27 Nov '19

27 Nov '19

Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/19275 ) Change subject: binaryPI: Drop BINARYPI_LEGACY_WRAPPER support ...................................................................... binaryPI: Drop BINARYPI_LEGACY_WRAPPER support Drop all the sources that were guarded with this. Change-Id: I6c6fd19875cb57f0caf42a1a94f59efed83bfe0d Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/19275 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> --- M src/cpu/amd/pi/Kconfig M src/cpu/amd/pi/Makefile.inc D src/cpu/amd/pi/amd_late_init.c D src/cpu/amd/pi/romstage.c M src/drivers/amd/agesa/Makefile.inc M src/drivers/amd/agesa/def_callouts.c M src/drivers/amd/agesa/eventlog.c M src/drivers/amd/agesa/romstage.c M src/include/cpu/amd/car.h M src/mainboard/amd/bettong/BiosCallOuts.c M src/mainboard/amd/bettong/Kconfig M src/mainboard/amd/bettong/OemCustomize.c M src/mainboard/amd/bettong/romstage.c M src/mainboard/amd/db-ft3b-lc/Kconfig M src/mainboard/amd/db-ft3b-lc/OemCustomize.c M src/mainboard/amd/db-ft3b-lc/romstage.c M src/mainboard/amd/lamar/Kconfig M src/mainboard/amd/lamar/OemCustomize.c M src/mainboard/amd/lamar/romstage.c M src/mainboard/amd/olivehillplus/Kconfig M src/mainboard/amd/olivehillplus/OemCustomize.c M src/mainboard/amd/olivehillplus/romstage.c M src/mainboard/bap/ode_e21XX/Kconfig M src/mainboard/bap/ode_e21XX/OemCustomize.c M src/mainboard/bap/ode_e21XX/romstage.c M src/northbridge/amd/agesa/state_machine.h M src/northbridge/amd/pi/00630F01/northbridge.c M src/northbridge/amd/pi/00660F01/northbridge.c M src/northbridge/amd/pi/00730F01/Makefile.inc M src/northbridge/amd/pi/00730F01/northbridge.c M src/northbridge/amd/pi/Makefile.inc D src/northbridge/amd/pi/agesawrapper.c D src/northbridge/amd/pi/agesawrapper.h D src/northbridge/amd/pi/agesawrapper_call.h M src/vendorcode/amd/Kconfig D src/vendorcode/amd/pi/00630F01/binaryPI/AGESA.c D src/vendorcode/amd/pi/00660F01/binaryPI/AGESA.c D src/vendorcode/amd/pi/00730F01/binaryPI/AGESA.c M src/vendorcode/amd/pi/Makefile.inc 39 files changed, 9 insertions(+), 2,074 deletions(-) Approvals: build bot (Jenkins): Verified Michał Żygowski: Looks good to me, approved diff --git a/src/cpu/amd/pi/Kconfig b/src/cpu/amd/pi/Kconfig index d2824f2..d18f873 100644 --- a/src/cpu/amd/pi/Kconfig +++ b/src/cpu/amd/pi/Kconfig @@ -26,15 +26,11 @@ select UDELAY_LAPIC select LAPIC_MONOTONIC_TIMER select SPI_FLASH if HAVE_ACPI_RESUME - select CAR_GLOBAL_MIGRATION if BINARYPI_LEGACY_WRAPPER select SMM_ASEG select NO_FIXED_XIP_ROM_SIZE if CPU_AMD_PI -config BINARYPI_LEGACY_WRAPPER - def_bool n - config UDELAY_LAPIC_FIXED_FSB int default 200 diff --git a/src/cpu/amd/pi/Makefile.inc b/src/cpu/amd/pi/Makefile.inc index 0a9b064..6b6447c 100644 --- a/src/cpu/amd/pi/Makefile.inc +++ b/src/cpu/amd/pi/Makefile.inc @@ -14,9 +14,3 @@ subdirs-$(CONFIG_CPU_AMD_PI_00630F01) += 00630F01 subdirs-$(CONFIG_CPU_AMD_PI_00730F01) += 00730F01 subdirs-$(CONFIG_CPU_AMD_PI_00660F01) += 00660F01 - -ifeq ($(CONFIG_BINARYPI_LEGACY_WRAPPER), y) -cpu_incs-y += $(src)/drivers/amd/agesa/cache_as_ram.S -romstage-y += romstage.c -ramstage-y += amd_late_init.c -endif diff --git a/src/cpu/amd/pi/amd_late_init.c b/src/cpu/amd/pi/amd_late_init.c deleted file mode 100644 index 46144c6..0000000 --- a/src/cpu/amd/pi/amd_late_init.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/acpi.h> -#include <bootstate.h> -#include <device/device.h> -#include <device/pci_def.h> - -#include <northbridge/amd/pi/agesawrapper.h> -#include <northbridge/amd/pi/agesawrapper_call.h> - -static void agesawrapper_post_device(void *unused) -{ - if (acpi_is_wakeup_s3()) - return; - - AGESAWRAPPER(amdinitlate); - - if (!acpi_s3_resume_allowed()) - return; - - AGESAWRAPPER(amdS3Save); -} - -BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, - agesawrapper_post_device, NULL); diff --git a/src/cpu/amd/pi/romstage.c b/src/cpu/amd/pi/romstage.c deleted file mode 100644 index cac5664..0000000 --- a/src/cpu/amd/pi/romstage.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/cpu.h> -#include <cbmem.h> -#include <cpu/amd/car.h> -#include <cpu/x86/mtrr.h> -#include <console/console.h> -#include <program_loading.h> -#include <romstage_handoff.h> -#include <northbridge/amd/agesa/agesa_helper.h> -#include <northbridge/amd/agesa/state_machine.h> - -void asmlinkage early_all_cores(void) -{ - amd_initmmio(); -} - -void *asmlinkage romstage_main(unsigned long bist) -{ - int s3resume = 0; - u8 initial_apic_id = cpuid_ebx(1) >> 24; - - /* Only BSP returns from here. */ - cache_as_ram_main(bist, initial_apic_id); - - cbmem_recovery(s3resume); - - romstage_handoff_init(s3resume); - - char *stack_top = cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK, HIGH_ROMSTAGE_STACK_SIZE); - stack_top += HIGH_ROMSTAGE_STACK_SIZE; - - printk(BIOS_DEBUG, "Move CAR stack.\n"); - return (void *)stack_top; -} - -void asmlinkage romstage_after_car(void) -{ - printk(BIOS_DEBUG, "CAR disabled.\n"); - - agesa_postcar(NULL); - - run_ramstage(); -} diff --git a/src/drivers/amd/agesa/Makefile.inc b/src/drivers/amd/agesa/Makefile.inc index 4d5bd3e..fb46d91 100644 --- a/src/drivers/amd/agesa/Makefile.inc +++ b/src/drivers/amd/agesa/Makefile.inc @@ -13,8 +13,6 @@ ifeq ($(CONFIG_DRIVERS_AMD_PI),y) -ifneq ($(CONFIG_BINARYPI_LEGACY_WRAPPER),y) - romstage-y += romstage.c romstage-y += mtrr_fixme.c romstage-y += state_machine.c @@ -24,12 +22,6 @@ cpu_incs-y += $(src)/drivers/amd/agesa/cache_as_ram.S postcar-y += cache_as_ram.S -else - -romstage-y += heapmanager.c - -endif - romstage-y += def_callouts.c romstage-y += eventlog.c diff --git a/src/drivers/amd/agesa/def_callouts.c b/src/drivers/amd/agesa/def_callouts.c index 2e75220..4b78d63 100644 --- a/src/drivers/amd/agesa/def_callouts.c +++ b/src/drivers/amd/agesa/def_callouts.c @@ -35,7 +35,7 @@ AGESA_STATUS status; UINTN i; - if (HAS_LEGACY_WRAPPER || ENV_RAMSTAGE) { + if (ENV_RAMSTAGE) { /* One HeapManager serves them all. */ status = HeapManagerCallout(Func, Data, ConfigPtr); if (status != AGESA_UNSUPPORTED) @@ -43,7 +43,7 @@ } #if HAS_AGESA_FCH_OEM_CALLOUT - if (!HAS_LEGACY_WRAPPER && Func == AGESA_FCH_OEM_CALLOUT) { + if (Func == AGESA_FCH_OEM_CALLOUT) { agesa_fch_oem_config(Data, ConfigPtr); return AGESA_SUCCESS; } @@ -120,24 +120,12 @@ AP_EXE_PARAMS ApExeParams; memset(&ApExeParams, 0, sizeof(AP_EXE_PARAMS)); - - if (HAS_LEGACY_WRAPPER) { - ApExeParams.StdHeader.AltImageBasePtr = 0; - ApExeParams.StdHeader.CalloutPtr = &GetBiosCallout; - ApExeParams.StdHeader.Func = 0; - ApExeParams.StdHeader.ImageBasePtr = 0; - } else { - memcpy(&ApExeParams.StdHeader, StdHeader, sizeof(*StdHeader)); - } + memcpy(&ApExeParams.StdHeader, StdHeader, sizeof(*StdHeader)); ApExeParams.FunctionNumber = Func; ApExeParams.RelatedDataBlock = ConfigPtr; -#if HAS_LEGACY_WRAPPER - status = AmdLateRunApTask(&ApExeParams); -#else status = module_dispatch(AMD_LATE_RUN_AP_TASK, &ApExeParams.StdHeader); -#endif ASSERT(status == AGESA_SUCCESS); return status; diff --git a/src/drivers/amd/agesa/eventlog.c b/src/drivers/amd/agesa/eventlog.c index df2c73c..aa0ea9b 100644 --- a/src/drivers/amd/agesa/eventlog.c +++ b/src/drivers/amd/agesa/eventlog.c @@ -180,11 +180,7 @@ do { AGESA_STATUS status; -#if HAS_LEGACY_WRAPPER - status = AmdReadEventLog(Event); -#else status = module_dispatch(AMD_READ_EVENT_LOG, &Event->StdHeader); -#endif if (status != AGESA_SUCCESS) return; if (Event->EventClass == 0) @@ -203,16 +199,7 @@ return; memset(&AmdEventParams, 0, sizeof(EVENT_PARAMS)); - - if (HAS_LEGACY_WRAPPER) { - AmdEventParams.StdHeader.AltImageBasePtr = 0; - AmdEventParams.StdHeader.CalloutPtr = &GetBiosCallout; - AmdEventParams.StdHeader.Func = 0; - AmdEventParams.StdHeader.ImageBasePtr = 0; - AmdEventParams.StdHeader.HeapStatus = StdHeader->HeapStatus; - } else { - memcpy(&AmdEventParams.StdHeader, StdHeader, sizeof(*StdHeader)); - } + memcpy(&AmdEventParams.StdHeader, StdHeader, sizeof(*StdHeader)); amd_flush_eventlog(&AmdEventParams); } diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c index 76a6ea4..72aac3e 100644 --- a/src/drivers/amd/agesa/romstage.c +++ b/src/drivers/amd/agesa/romstage.c @@ -30,9 +30,6 @@ #if !CONFIG(POSTCAR_STAGE) #error "Only POSTCAR_STAGE is supported." #endif -#if HAS_LEGACY_WRAPPER -#error "LEGACY_WRAPPER code not supported" -#endif void asmlinkage early_all_cores(void) { diff --git a/src/include/cpu/amd/car.h b/src/include/cpu/amd/car.h index e4dd142..59f5bb9 100644 --- a/src/include/cpu/amd/car.h +++ b/src/include/cpu/amd/car.h @@ -8,6 +8,5 @@ void asmlinkage early_all_cores(void); void *asmlinkage romstage_main(unsigned long bist); -void asmlinkage romstage_after_car(void); #endif diff --git a/src/mainboard/amd/bettong/BiosCallOuts.c b/src/mainboard/amd/bettong/BiosCallOuts.c index e983690..a6f424e 100644 --- a/src/mainboard/amd/bettong/BiosCallOuts.c +++ b/src/mainboard/amd/bettong/BiosCallOuts.c @@ -23,7 +23,6 @@ #include <stdlib.h> #include <string.h> #include <northbridge/amd/pi/dimmSpd.h> -#include <northbridge/amd/pi/agesawrapper.h> #include <boardid.h> #include "imc.h" diff --git a/src/mainboard/amd/bettong/Kconfig b/src/mainboard/amd/bettong/Kconfig index bcfceb1..0747bc1 100644 --- a/src/mainboard/amd/bettong/Kconfig +++ b/src/mainboard/amd/bettong/Kconfig @@ -20,7 +20,7 @@ config BOARD_SPECIFIC_OPTIONS def_bool y - select BINARYPI_LEGACY_WRAPPER + #select BINARYPI_LEGACY_WRAPPER select CPU_AMD_PI_00660F01 select NORTHBRIDGE_AMD_PI_00660F01 select SOUTHBRIDGE_AMD_PI_KERN diff --git a/src/mainboard/amd/bettong/OemCustomize.c b/src/mainboard/amd/bettong/OemCustomize.c index 4843b2a..0e7882f 100644 --- a/src/mainboard/amd/bettong/OemCustomize.c +++ b/src/mainboard/amd/bettong/OemCustomize.c @@ -14,7 +14,6 @@ */ #include <AGESA.h> -#include <northbridge/amd/pi/agesawrapper.h> #include <PlatformMemoryConfiguration.h> #include <boardid.h> diff --git a/src/mainboard/amd/bettong/romstage.c b/src/mainboard/amd/bettong/romstage.c index 5201fa3..32f52de 100644 --- a/src/mainboard/amd/bettong/romstage.c +++ b/src/mainboard/amd/bettong/romstage.c @@ -21,8 +21,6 @@ #include <cpu/x86/bist.h> #include <cpu/amd/car.h> #include <northbridge/amd/agesa/state_machine.h> -#include <northbridge/amd/pi/agesawrapper.h> -#include <northbridge/amd/pi/agesawrapper_call.h> #include <southbridge/amd/pi/hudson/hudson.h> void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) diff --git a/src/mainboard/amd/db-ft3b-lc/Kconfig b/src/mainboard/amd/db-ft3b-lc/Kconfig index eaee3e7..d765032 100644 --- a/src/mainboard/amd/db-ft3b-lc/Kconfig +++ b/src/mainboard/amd/db-ft3b-lc/Kconfig @@ -21,7 +21,7 @@ config BOARD_SPECIFIC_OPTIONS def_bool y - select BINARYPI_LEGACY_WRAPPER + #select BINARYPI_LEGACY_WRAPPER select CPU_AMD_PI_00730F01 select NORTHBRIDGE_AMD_PI_00730F01 select SOUTHBRIDGE_AMD_PI_AVALON diff --git a/src/mainboard/amd/db-ft3b-lc/OemCustomize.c b/src/mainboard/amd/db-ft3b-lc/OemCustomize.c index a7f6fec..e90b928 100644 --- a/src/mainboard/amd/db-ft3b-lc/OemCustomize.c +++ b/src/mainboard/amd/db-ft3b-lc/OemCustomize.c @@ -14,7 +14,6 @@ */ #include <AGESA.h> -#include <northbridge/amd/pi/agesawrapper.h> #include <PlatformMemoryConfiguration.h> diff --git a/src/mainboard/amd/db-ft3b-lc/romstage.c b/src/mainboard/amd/db-ft3b-lc/romstage.c index 3e9b1c8..495ce59 100644 --- a/src/mainboard/amd/db-ft3b-lc/romstage.c +++ b/src/mainboard/amd/db-ft3b-lc/romstage.c @@ -21,8 +21,6 @@ #include <console/console.h> #include <cpu/amd/car.h> #include <northbridge/amd/agesa/state_machine.h> -#include <northbridge/amd/pi/agesawrapper.h> -#include <northbridge/amd/pi/agesawrapper_call.h> #include <cpu/x86/bist.h> #include <southbridge/amd/pi/hudson/hudson.h> diff --git a/src/mainboard/amd/lamar/Kconfig b/src/mainboard/amd/lamar/Kconfig index 5527d59..e216e02 100644 --- a/src/mainboard/amd/lamar/Kconfig +++ b/src/mainboard/amd/lamar/Kconfig @@ -20,7 +20,7 @@ config BOARD_SPECIFIC_OPTIONS def_bool y - select BINARYPI_LEGACY_WRAPPER + #select BINARYPI_LEGACY_WRAPPER select CPU_AMD_PI_00630F01 select NORTHBRIDGE_AMD_PI_00630F01 select SOUTHBRIDGE_AMD_PI_BOLTON diff --git a/src/mainboard/amd/lamar/OemCustomize.c b/src/mainboard/amd/lamar/OemCustomize.c index 2cd013b..4c1832b 100644 --- a/src/mainboard/amd/lamar/OemCustomize.c +++ b/src/mainboard/amd/lamar/OemCustomize.c @@ -15,7 +15,6 @@ */ #include <AGESA.h> -#include <northbridge/amd/pi/agesawrapper.h> static const PCIe_PORT_DESCRIPTOR PortList[] = { diff --git a/src/mainboard/amd/lamar/romstage.c b/src/mainboard/amd/lamar/romstage.c index 3f7d33f..77a0ea0 100644 --- a/src/mainboard/amd/lamar/romstage.c +++ b/src/mainboard/amd/lamar/romstage.c @@ -21,8 +21,6 @@ #include <console/console.h> #include <cpu/amd/car.h> #include <northbridge/amd/agesa/state_machine.h> -#include <northbridge/amd/pi/agesawrapper.h> -#include <northbridge/amd/pi/agesawrapper_call.h> #include <cpu/x86/bist.h> #include <southbridge/amd/common/amd_defs.h> #include <southbridge/amd/pi/hudson/hudson.h> diff --git a/src/mainboard/amd/olivehillplus/Kconfig b/src/mainboard/amd/olivehillplus/Kconfig index 61ba33d..3a72b2b 100644 --- a/src/mainboard/amd/olivehillplus/Kconfig +++ b/src/mainboard/amd/olivehillplus/Kconfig @@ -20,7 +20,7 @@ config BOARD_SPECIFIC_OPTIONS def_bool y - select BINARYPI_LEGACY_WRAPPER + #select BINARYPI_LEGACY_WRAPPER select CPU_AMD_PI_00730F01 select NORTHBRIDGE_AMD_PI_00730F01 select SOUTHBRIDGE_AMD_PI_AVALON diff --git a/src/mainboard/amd/olivehillplus/OemCustomize.c b/src/mainboard/amd/olivehillplus/OemCustomize.c index b66a88b..76b7f25 100644 --- a/src/mainboard/amd/olivehillplus/OemCustomize.c +++ b/src/mainboard/amd/olivehillplus/OemCustomize.c @@ -14,7 +14,6 @@ */ #include <AGESA.h> -#include <northbridge/amd/pi/agesawrapper.h> static const PCIe_PORT_DESCRIPTOR PortList[] = { diff --git a/src/mainboard/amd/olivehillplus/romstage.c b/src/mainboard/amd/olivehillplus/romstage.c index 0181747..6df12e3 100644 --- a/src/mainboard/amd/olivehillplus/romstage.c +++ b/src/mainboard/amd/olivehillplus/romstage.c @@ -21,8 +21,6 @@ #include <console/console.h> #include <cpu/amd/car.h> #include <northbridge/amd/agesa/state_machine.h> -#include <northbridge/amd/pi/agesawrapper.h> -#include <northbridge/amd/pi/agesawrapper_call.h> #include <cpu/x86/bist.h> #include <southbridge/amd/pi/hudson/hudson.h> diff --git a/src/mainboard/bap/ode_e21XX/Kconfig b/src/mainboard/bap/ode_e21XX/Kconfig index 5b0d2fb..a35107d 100644 --- a/src/mainboard/bap/ode_e21XX/Kconfig +++ b/src/mainboard/bap/ode_e21XX/Kconfig @@ -20,7 +20,7 @@ config BOARD_SPECIFIC_OPTIONS def_bool y - select BINARYPI_LEGACY_WRAPPER + #select BINARYPI_LEGACY_WRAPPER select CPU_AMD_PI_00730F01 select NORTHBRIDGE_AMD_PI_00730F01 select SOUTHBRIDGE_AMD_PI_AVALON diff --git a/src/mainboard/bap/ode_e21XX/OemCustomize.c b/src/mainboard/bap/ode_e21XX/OemCustomize.c index 008e5da..97aaa4e 100644 --- a/src/mainboard/bap/ode_e21XX/OemCustomize.c +++ b/src/mainboard/bap/ode_e21XX/OemCustomize.c @@ -14,7 +14,6 @@ */ #include <AGESA.h> -#include <northbridge/amd/pi/agesawrapper.h> static const PCIe_PORT_DESCRIPTOR PortList[] = { diff --git a/src/mainboard/bap/ode_e21XX/romstage.c b/src/mainboard/bap/ode_e21XX/romstage.c index 10b7aab..774cd99 100644 --- a/src/mainboard/bap/ode_e21XX/romstage.c +++ b/src/mainboard/bap/ode_e21XX/romstage.c @@ -21,8 +21,6 @@ #include <console/console.h> #include <cpu/amd/car.h> #include <northbridge/amd/agesa/state_machine.h> -#include <northbridge/amd/pi/agesawrapper.h> -#include <northbridge/amd/pi/agesawrapper_call.h> #include <cpu/x86/bist.h> #include <southbridge/amd/pi/hudson/hudson.h> #include <superio/fintek/common/fintek.h> diff --git a/src/northbridge/amd/agesa/state_machine.h b/src/northbridge/amd/agesa/state_machine.h index 7d9fe9c..02a7a41 100644 --- a/src/northbridge/amd/agesa/state_machine.h +++ b/src/northbridge/amd/agesa/state_machine.h @@ -20,8 +20,6 @@ #include <AGESA.h> #include <AMD.h> -#define HAS_LEGACY_WRAPPER CONFIG(BINARYPI_LEGACY_WRAPPER) - /* eventlog */ void agesawrapper_trace(AGESA_STATUS ret, AMD_CONFIG_PARAMS *StdHeader, const char *func); AGESA_STATUS agesawrapper_amdreadeventlog(UINT8 HeapStatus); diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c index 6bb1217..6afea7c 100644 --- a/src/northbridge/amd/pi/00630F01/northbridge.c +++ b/src/northbridge/amd/pi/00630F01/northbridge.c @@ -34,10 +34,6 @@ #include <arch/acpigen.h> #include <northbridge/amd/pi/nb_common.h> #include <northbridge/amd/agesa/agesa_helper.h> -#if CONFIG(BINARYPI_LEGACY_WRAPPER) -#include <northbridge/amd/pi/agesawrapper.h> -#include <northbridge/amd/pi/agesawrapper_call.h> -#endif #define MAX_NODE_NUMS MAX_NODES @@ -608,16 +604,6 @@ static void domain_enable_resources(struct device *dev) { -#if CONFIG(BINARYPI_LEGACY_WRAPPER) - /* Must be called after PCI enumeration and resource allocation */ - if (!acpi_is_wakeup_s3()) { - /* Enable MMIO on AMD CPU Address Map Controller */ - amd_initcpuio(); - - agesawrapper_amdinitmid(); - } - printk(BIOS_DEBUG, " ader - leaving %s.\n", __func__); -#endif } #if CONFIG_HW_MEM_HOLE_SIZEK != 0 diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c index 723e6f4..c26f5ae 100644 --- a/src/northbridge/amd/pi/00660F01/northbridge.c +++ b/src/northbridge/amd/pi/00660F01/northbridge.c @@ -34,10 +34,6 @@ #include <arch/acpigen.h> #include <northbridge/amd/pi/nb_common.h> #include <northbridge/amd/agesa/agesa_helper.h> -#if CONFIG(BINARYPI_LEGACY_WRAPPER) -#include <northbridge/amd/pi/agesawrapper.h> -#include <northbridge/amd/pi/agesawrapper_call.h> -#endif #define MAX_NODE_NUMS MAX_NODES @@ -609,13 +605,6 @@ static void domain_enable_resources(struct device *dev) { -#if CONFIG(BINARYPI_LEGACY_WRAPPER) - /* Must be called after PCI enumeration and resource allocation */ - if (!acpi_is_wakeup_s3()) - AGESAWRAPPER(amdinitmid); - - printk(BIOS_DEBUG, " ader - leaving domain_enable_resources.\n"); -#endif } #if CONFIG_HW_MEM_HOLE_SIZEK != 0 diff --git a/src/northbridge/amd/pi/00730F01/Makefile.inc b/src/northbridge/amd/pi/00730F01/Makefile.inc index 94cf72e..33f2b79 100644 --- a/src/northbridge/amd/pi/00730F01/Makefile.inc +++ b/src/northbridge/amd/pi/00730F01/Makefile.inc @@ -18,7 +18,5 @@ ramstage-y += northbridge.c ramstage-y += iommu.c -ifneq ($(CONFIG_BINARYPI_LEGACY_WRAPPER), y) romstage-y += state_machine.c ramstage-y += state_machine.c -endif diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 3d7b883..acb20e6 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -36,10 +36,6 @@ #include <arch/acpigen.h> #include <northbridge/amd/pi/nb_common.h> #include <northbridge/amd/agesa/agesa_helper.h> -#if CONFIG(BINARYPI_LEGACY_WRAPPER) -#include <northbridge/amd/pi/agesawrapper.h> -#include <northbridge/amd/pi/agesawrapper_call.h> -#endif #define MAX_NODE_NUMS MAX_NODES @@ -835,13 +831,6 @@ static void domain_enable_resources(struct device *dev) { -#if CONFIG(BINARYPI_LEGACY_WRAPPER) - /* Must be called after PCI enumeration and resource allocation */ - if (!acpi_is_wakeup_s3()) - AGESAWRAPPER(amdinitmid); - - printk(BIOS_DEBUG, " ader - leaving domain_enable_resources.\n"); -#endif } #if CONFIG_HW_MEM_HOLE_SIZEK != 0 diff --git a/src/northbridge/amd/pi/Makefile.inc b/src/northbridge/amd/pi/Makefile.inc index c2c8d88..ffafc60 100644 --- a/src/northbridge/amd/pi/Makefile.inc +++ b/src/northbridge/amd/pi/Makefile.inc @@ -19,11 +19,6 @@ subdirs-$(CONFIG_NORTHBRIDGE_AMD_PI_00730F01) += 00730F01 subdirs-$(CONFIG_NORTHBRIDGE_AMD_PI_00660F01) += 00660F01 -ifeq ($(CONFIG_BINARYPI_LEGACY_WRAPPER), y) -romstage-y += agesawrapper.c -ramstage-y += agesawrapper.c -endif - romstage-y += ramtop.c postcar-y += ramtop.c ramstage-y += ramtop.c diff --git a/src/northbridge/amd/pi/agesawrapper.c b/src/northbridge/amd/pi/agesawrapper.c deleted file mode 100644 index e3bfd90..0000000 --- a/src/northbridge/amd/pi/agesawrapper.c +++ /dev/null @@ -1,317 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 - 2014 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <AGESA.h> -#include <cbfs.h> -#include <cbmem.h> -#include <delay.h> -#include <console/console.h> -#include <cpu/x86/mtrr.h> -#include <FchPlatform.h> -#include <heapManager.h> -#include <northbridge/amd/agesa/agesa_helper.h> -#include <northbridge/amd/agesa/state_machine.h> -#include <northbridge/amd/pi/agesawrapper.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> - -void __weak OemPostParams(AMD_POST_PARAMS *PostParams) {} - -#define FILECODE UNASSIGNED_FILE_FILECODE - -AGESA_STATUS agesawrapper_amdinitreset(void) -{ - AGESA_STATUS status; - AMD_INTERFACE_PARAMS AmdParamStruct; - AMD_RESET_PARAMS AmdResetParams; - - LibAmdMemFill (&AmdParamStruct, - 0, - sizeof(AMD_INTERFACE_PARAMS), - &(AmdParamStruct.StdHeader)); - - LibAmdMemFill (&AmdResetParams, - 0, - sizeof(AMD_RESET_PARAMS), - &(AmdResetParams.StdHeader)); - - AmdParamStruct.AgesaFunctionName = AMD_INIT_RESET; - AmdParamStruct.AllocationMethod = ByHost; - AmdParamStruct.NewStructSize = sizeof(AMD_RESET_PARAMS); - AmdParamStruct.NewStructPtr = &AmdResetParams; - AmdParamStruct.StdHeader.AltImageBasePtr = 0; - AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout; - AmdParamStruct.StdHeader.Func = 0; - AmdParamStruct.StdHeader.ImageBasePtr = 0; - AmdCreateStruct (&AmdParamStruct); - - AmdResetParams.FchInterface.Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE); - if (CONFIG(SOUTHBRIDGE_AMD_PI_BOLTON)) - AmdResetParams.FchInterface.Xhci1Enable = TRUE; - - AmdResetParams.FchInterface.SataEnable = !((CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3)); - AmdResetParams.FchInterface.IdeEnable = (CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3); - - status = AmdInitReset(&AmdResetParams); - if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); - AmdReleaseStruct (&AmdParamStruct); - return status; -} - -AGESA_STATUS agesawrapper_amdinitearly(void) -{ - AGESA_STATUS status; - AMD_INTERFACE_PARAMS AmdParamStruct; - AMD_EARLY_PARAMS *AmdEarlyParamsPtr; - - LibAmdMemFill (&AmdParamStruct, - 0, - sizeof(AMD_INTERFACE_PARAMS), - &(AmdParamStruct.StdHeader)); - - AmdParamStruct.AgesaFunctionName = AMD_INIT_EARLY; - AmdParamStruct.AllocationMethod = PreMemHeap; - AmdParamStruct.StdHeader.AltImageBasePtr = 0; - AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout; - AmdParamStruct.StdHeader.Func = 0; - AmdParamStruct.StdHeader.ImageBasePtr = 0; - AmdCreateStruct (&AmdParamStruct); - - AmdEarlyParamsPtr = (AMD_EARLY_PARAMS *)AmdParamStruct.NewStructPtr; - OemCustomizeInitEarly (AmdEarlyParamsPtr); - - AmdEarlyParamsPtr->GnbConfig.PsppPolicy = PsppDisabled; - status = AmdInitEarly ((AMD_EARLY_PARAMS *)AmdParamStruct.NewStructPtr); - /* - * init_timer() needs to be called on CZ PI, because AGESA resets the LAPIC reload value - * on the AMD_INIT_EARLY call - */ - if (CONFIG(CPU_AMD_PI_00660F01)) - init_timer(); - if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); - AmdReleaseStruct (&AmdParamStruct); - - return status; -} - -AGESA_STATUS agesawrapper_amdinitpost(void) -{ - AGESA_STATUS status; - AMD_INTERFACE_PARAMS AmdParamStruct; - AMD_POST_PARAMS *PostParams; - - LibAmdMemFill (&AmdParamStruct, - 0, - sizeof(AMD_INTERFACE_PARAMS), - &(AmdParamStruct.StdHeader)); - - AmdParamStruct.AgesaFunctionName = AMD_INIT_POST; - AmdParamStruct.AllocationMethod = PreMemHeap; - AmdParamStruct.StdHeader.AltImageBasePtr = NULL; - AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout; - AmdParamStruct.StdHeader.Func = 0; - AmdParamStruct.StdHeader.ImageBasePtr = 0; - - AmdCreateStruct (&AmdParamStruct); - PostParams = (AMD_POST_PARAMS *)AmdParamStruct.NewStructPtr; - - PostParams->MemConfig.UmaMode = CONFIG(GFXUMA) ? UMA_AUTO : UMA_NONE; - PostParams->MemConfig.UmaSize = 0; - PostParams->MemConfig.BottomIo = (UINT16) - (CONFIG_BOTTOMIO_POSITION >> 24); - - OemPostParams(PostParams); - - status = AmdInitPost (PostParams); - - /* If UMA is enabled we currently have it below TOP_MEM as well. - * UMA may or may not be cacheable, so Sub4GCacheTop could be - * higher than UmaBase. With UMA_NONE we see UmaBase==0. */ - if (PostParams->MemConfig.UmaBase) - backup_top_of_low_cacheable(PostParams->MemConfig.UmaBase << 16); - else - backup_top_of_low_cacheable(PostParams->MemConfig.Sub4GCacheTop); - - printk( - BIOS_SPEW, - "setup_uma_memory: umamode %s\n", - (PostParams->MemConfig.UmaMode == UMA_AUTO) ? "UMA_AUTO" : - (PostParams->MemConfig.UmaMode == UMA_SPECIFIED) ? "UMA_SPECIFIED" : - (PostParams->MemConfig.UmaMode == UMA_NONE) ? "UMA_NONE" : - "unknown" - ); - printk( - BIOS_SPEW, - "setup_uma_memory: syslimit 0x%08llX, bottomio 0x%08lx\n", - (unsigned long long)(PostParams->MemConfig.SysLimit) << 16, - (unsigned long)(PostParams->MemConfig.BottomIo) << 16 - ); - printk( - BIOS_SPEW, - "setup_uma_memory: uma size %luMB, uma start 0x%08lx\n", - (unsigned long)(PostParams->MemConfig.UmaSize) >> (20 - 16), - (unsigned long)(PostParams->MemConfig.UmaBase) << 16 - ); - if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(PostParams->StdHeader.HeapStatus); - AmdReleaseStruct (&AmdParamStruct); - - return status; -} - -AGESA_STATUS agesawrapper_amdinitenv(void) -{ - AGESA_STATUS status; - AMD_INTERFACE_PARAMS AmdParamStruct; - AMD_ENV_PARAMS *EnvParam; - - /* Initialize heap space */ - EmptyHeap(); - - LibAmdMemFill (&AmdParamStruct, - 0, - sizeof(AMD_INTERFACE_PARAMS), - &(AmdParamStruct.StdHeader)); - - AmdParamStruct.AgesaFunctionName = AMD_INIT_ENV; - AmdParamStruct.AllocationMethod = PostMemDram; - AmdParamStruct.StdHeader.AltImageBasePtr = 0; - AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout; - AmdParamStruct.StdHeader.Func = 0; - AmdParamStruct.StdHeader.ImageBasePtr = 0; - status = AmdCreateStruct (&AmdParamStruct); - EnvParam = (AMD_ENV_PARAMS *)AmdParamStruct.NewStructPtr; - - EnvParam->FchInterface.AzaliaController = AzEnable; - EnvParam->FchInterface.SataClass = CONFIG_HUDSON_SATA_MODE; - EnvParam->FchInterface.SataEnable = !((CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3)); - EnvParam->FchInterface.IdeEnable = (CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3); - EnvParam->FchInterface.SataIdeMode = (CONFIG_HUDSON_SATA_MODE == 3); - - status = AmdInitEnv (EnvParam); - if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(EnvParam->StdHeader.HeapStatus); - /* Initialize Subordinate Bus Number and Secondary Bus Number - * In platform BIOS this address is allocated by PCI enumeration code - Modify D1F0x18 - */ - - return status; -} - -AGESA_STATUS agesawrapper_amdinitmid(void) -{ - AGESA_STATUS status; - AMD_INTERFACE_PARAMS AmdParamStruct; - AMD_MID_PARAMS *MidParam; - - /* Enable MMIO on AMD CPU Address Map Controller */ - amd_initcpuio (); - - LibAmdMemFill (&AmdParamStruct, - 0, - sizeof(AMD_INTERFACE_PARAMS), - &(AmdParamStruct.StdHeader)); - - AmdParamStruct.AgesaFunctionName = AMD_INIT_MID; - AmdParamStruct.AllocationMethod = PostMemDram; - AmdParamStruct.StdHeader.AltImageBasePtr = 0; - AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout; - AmdParamStruct.StdHeader.Func = 0; - AmdParamStruct.StdHeader.ImageBasePtr = 0; - - AmdCreateStruct (&AmdParamStruct); - MidParam = (AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr; - - MidParam->GnbMidConfiguration.iGpuVgaMode = 0;/* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */ - MidParam->GnbMidConfiguration.GnbIoapicAddress = 0xFEC20000; - - MidParam->FchInterface.AzaliaController = AzEnable; - MidParam->FchInterface.SataClass = CONFIG_HUDSON_SATA_MODE; - MidParam->FchInterface.SataEnable = !((CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3)); - MidParam->FchInterface.IdeEnable = (CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3); - MidParam->FchInterface.SataIdeMode = (CONFIG_HUDSON_SATA_MODE == 3); - - status = AmdInitMid ((AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr); - if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); - AmdReleaseStruct (&AmdParamStruct); - - return status; -} - -AGESA_STATUS agesawrapper_amdinitlate(void) -{ - AGESA_STATUS Status; - AMD_INTERFACE_PARAMS AmdParamStruct; - AMD_LATE_PARAMS *AmdLateParams; - - if (!ENV_RAMSTAGE) - return AGESA_UNSUPPORTED; - - LibAmdMemFill (&AmdParamStruct, - 0, - sizeof(AMD_INTERFACE_PARAMS), - &(AmdParamStruct.StdHeader)); - - AmdParamStruct.AgesaFunctionName = AMD_INIT_LATE; - AmdParamStruct.AllocationMethod = PostMemDram; - AmdParamStruct.StdHeader.AltImageBasePtr = 0; - AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout; - AmdParamStruct.StdHeader.HeapStatus = HEAP_SYSTEM_MEM; - AmdParamStruct.StdHeader.Func = 0; - AmdParamStruct.StdHeader.ImageBasePtr = 0; - - /* NOTE: if not call amdcreatestruct, the initializer(AmdInitLateInitializer) would not be called */ - AmdCreateStruct(&AmdParamStruct); - AmdLateParams = (AMD_LATE_PARAMS *)AmdParamStruct.NewStructPtr; - AmdLateParams->GnbLateConfiguration.GnbIoapicId = CONFIG_MAX_CPUS + 1; - AmdLateParams->GnbLateConfiguration.FchIoapicId = CONFIG_MAX_CPUS; - /* Code for creating CDIT requires hop count table. If it is not - * present AGESA_ERROR is returned, which confuses users. CDIT is not - * written to the ACPI tables anyway. */ - AmdLateParams->PlatformConfig.UserOptionCdit = 0; - - Status = AmdInitLate(AmdLateParams); - if (Status != AGESA_SUCCESS) { - agesawrapper_amdreadeventlog(AmdLateParams->StdHeader.HeapStatus); - ASSERT(Status == AGESA_SUCCESS); - } - - agesawrapper_setlateinitptr(AmdLateParams); - - /* No AmdReleaseStruct(&AmdParamStruct), we need AmdLateParams later. */ - return Status; -} - -const void *agesawrapper_locate_module (const CHAR8 name[8]) -{ - const void *agesa; - const AMD_IMAGE_HEADER* image; - const AMD_MODULE_HEADER* module; - size_t file_size; - - if (CONFIG(VBOOT)) { - /* Use phys. location in flash and prevent vboot from searching cbmem */ - agesa = (void *)CONFIG_AGESA_BINARY_PI_LOCATION; - file_size = 0x100000; - } else { - agesa = cbfs_boot_map_with_leak((const char *)CONFIG_AGESA_CBFS_NAME, - CBFS_TYPE_RAW, &file_size); - } - - if (!agesa) - return NULL; - image = LibAmdLocateImage(agesa, agesa + file_size - 1, 4096, name); - module = (AMD_MODULE_HEADER*)image->ModuleInfoOffset; - - return module; -} diff --git a/src/northbridge/amd/pi/agesawrapper.h b/src/northbridge/amd/pi/agesawrapper.h deleted file mode 100644 index e1cec43..0000000 --- a/src/northbridge/amd/pi/agesawrapper.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _AGESAWRAPPER_H_ -#define _AGESAWRAPPER_H_ - -#if CONFIG(BINARYPI_LEGACY_WRAPPER) - -#include <stdint.h> -#include <Porting.h> -#include <AGESA.h> - -AGESA_STATUS agesawrapper_amdinitreset(void); -AGESA_STATUS agesawrapper_amdinitearly(void); -AGESA_STATUS agesawrapper_amdinitenv(void); -AGESA_STATUS agesawrapper_amdinitlate(void); -AGESA_STATUS agesawrapper_amdinitpost(void); -AGESA_STATUS agesawrapper_amdinitmid(void); - -AGESA_STATUS agesawrapper_amdinitresume(void); -AGESA_STATUS agesawrapper_amdS3Save(void); -AGESA_STATUS agesawrapper_amds3laterestore(void); - -AGESA_STATUS agesawrapper_fchs3earlyrestore(void); -AGESA_STATUS agesawrapper_fchs3laterestore(void); - -#define AGESA_EVENTLOG(status, stdheader) \ - agesawrapper_trace(status, stdheader, __func__) - -#else - -/* Defined to make unused agesa_main() build. */ -static inline int agesawrapper_amdinitreset(void) { return -1; } -static inline int agesawrapper_amdinitearly(void) { return -1; } -static inline int agesawrapper_amdinitenv(void) { return -1; } -static inline int agesawrapper_amdinitpost(void) { return -1; } -static inline int agesawrapper_amdinitresume(void) { return -1; } -static inline int agesawrapper_amds3laterestore(void) { return -1; } - -#endif - -#if CONFIG(BINARYPI_LEGACY_WRAPPER) -const void *agesawrapper_locate_module (const CHAR8 name[8]); - -VOID OemCustomizeInitEarly (IN OUT AMD_EARLY_PARAMS *InitEarly); -void OemPostParams(AMD_POST_PARAMS *PostParams); -#endif - -#endif /* _AGESAWRAPPER_H_ */ diff --git a/src/northbridge/amd/pi/agesawrapper_call.h b/src/northbridge/amd/pi/agesawrapper_call.h deleted file mode 100644 index b235b49..0000000 --- a/src/northbridge/amd/pi/agesawrapper_call.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _AGESAWRAPPER_CALL_H_ -#define _AGESAWRAPPER_CALL_H_ - -#include <stdint.h> -#include <console/console.h> -#include <AGESA.h> - -/* - * Possible AGESA_STATUS values: - * - * 0x0 = AGESA_SUCCESS - * 0x1 = AGESA_UNSUPPORTED - * 0x2 = AGESA_BOUNDS_CHK - * 0x3 = AGESA_ALERT - * 0x4 = AGESA_WARNING - * 0x5 = AGESA_ERROR - * 0x6 = AGESA_CRITICAL - * 0x7 = AGESA_FATAL - */ -static const char *decodeAGESA_STATUS(AGESA_STATUS sret) -{ - const char *statusStrings[] = { "AGESA_SUCCESS", "AGESA_UNSUPPORTED", - "AGESA_BOUNDS_CHK", "AGESA_ALERT", - "AGESA_WARNING", "AGESA_ERROR", - "AGESA_CRITICAL", "AGESA_FATAL" - }; - if (sret > 7) return "unknown"; /* Non-AGESA error code */ - return statusStrings[sret]; -} - -static inline u32 do_agesawrapper(AGESA_STATUS (*func)(void), const char *name) -{ - AGESA_STATUS ret; - printk(BIOS_DEBUG, "agesawrapper_%s() entry\n", name); - ret = func(); - printk(BIOS_DEBUG, "agesawrapper_%s() returned %s\n", - name, decodeAGESA_STATUS(ret)); - return (u32)ret; -} - -#define AGESAWRAPPER(func) do_agesawrapper(agesawrapper_ ## func, #func) - -#define AGESAWRAPPER_PRE_CONSOLE(func) agesawrapper_ ## func() - -#endif diff --git a/src/vendorcode/amd/Kconfig b/src/vendorcode/amd/Kconfig index 10a4947..4e66244 100644 --- a/src/vendorcode/amd/Kconfig +++ b/src/vendorcode/amd/Kconfig @@ -50,7 +50,6 @@ config AGESA_EXTRA_TIMESTAMPS bool "Add instrumentation for AGESA calls" default n - depends on !BINARYPI_LEGACY_WRAPPER depends on DRIVERS_AMD_PI help Insert additional timestamps around each entrypoint into diff --git a/src/vendorcode/amd/pi/00630F01/binaryPI/AGESA.c b/src/vendorcode/amd/pi/00630F01/binaryPI/AGESA.c deleted file mode 100644 index fa6c276..0000000 --- a/src/vendorcode/amd/pi/00630F01/binaryPI/AGESA.c +++ /dev/null @@ -1,512 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Agesa structures and definitions - * - * Contains AMD AGESA core interface - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: Include - * @e \$Revision: 85818 $ @e \$Date: 2013-01-11 17:04:21 -0600 (Fri, 11 Jan 2013) $ - */ -/***************************************************************************** - * - * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc. - * 2013 - 2014, Sage Electronic Engineering, LLC - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ -#include <AGESA.h> -#include <agesawrapper.h> -#include <AcpiLib.h> -#include <amdlib.h> -#include <cbfs.h> -#include <FchCommonCfg.h> -#include <Fch.h> -#include <FchDef.h> - -CONST UINT32 ImageSignature = IMAGE_SIGNATURE; -CONST UINT32 ModuleSignature = MODULE_SIGNATURE; -CONST CHAR8 ModuleIdentifier[] = AGESA_ID; - -/************************************************************************ - * - * AGESA Basic Level interface structure definition and function prototypes - * - ***********************************************************************/ - - -/********************************************************************** - * Interface call: AmdCreateStruct - **********************************************************************/ -AGESA_STATUS -AmdCreateStruct ( - IN OUT AMD_INTERFACE_PARAMS *InterfaceParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - InterfaceParams->StdHeader.Func = AMD_CREATE_STRUCT; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(InterfaceParams); -} - -/********************************************************************** - * Interface call: AmdReleaseStruct - **********************************************************************/ -AGESA_STATUS -AmdReleaseStruct ( - IN OUT AMD_INTERFACE_PARAMS *InterfaceParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - InterfaceParams->StdHeader.Func = AMD_RELEASE_STRUCT; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(InterfaceParams); -} - -/********************************************************************** - * Interface call: AmdInitReset - **********************************************************************/ -AGESA_STATUS -AmdInitReset ( - IN OUT AMD_RESET_PARAMS *ResetParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - ResetParams->StdHeader.Func = AMD_INIT_RESET; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(ResetParams); -} - -/********************************************************************** - * Interface call: AmdInitEarly - **********************************************************************/ -AGESA_STATUS -AmdInitEarly ( - IN OUT AMD_EARLY_PARAMS *EarlyParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - EarlyParams->StdHeader.Func = AMD_INIT_EARLY; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(EarlyParams); -} - -/********************************************************************** - * Interface call: AmdInitPost - **********************************************************************/ -AGESA_STATUS -AmdInitPost ( - IN OUT AMD_POST_PARAMS *PostParams ///< Amd Cpu init param - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - PostParams->StdHeader.Func = AMD_INIT_POST; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(PostParams); -} - -/********************************************************************** - * Interface call: AmdInitEnv - **********************************************************************/ -AGESA_STATUS -AmdInitEnv ( - IN OUT AMD_ENV_PARAMS *EnvParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - EnvParams->StdHeader.Func = AMD_INIT_ENV; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(EnvParams); -} - -/********************************************************************** - * Interface call: AmdInitMid - **********************************************************************/ -AGESA_STATUS -AmdInitMid ( - IN OUT AMD_MID_PARAMS *MidParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - MidParams->StdHeader.Func = AMD_INIT_MID; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(MidParams); -} - -/********************************************************************** - * Interface call: AmdInitLate - **********************************************************************/ -AGESA_STATUS -AmdInitLate ( - IN OUT AMD_LATE_PARAMS *LateParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - LateParams->StdHeader.Func = AMD_INIT_LATE; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(LateParams); -} - -/********************************************************************** - * Interface call: AmdInitRecovery - **********************************************************************/ -AGESA_STATUS -AmdInitRecovery ( - IN OUT AMD_RECOVERY_PARAMS *RecoveryParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - RecoveryParams->StdHeader.Func = AMD_INIT_RECOVERY; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(RecoveryParams); -} - -/********************************************************************** - * Interface call: AmdInitResume - **********************************************************************/ -AGESA_STATUS -AmdInitResume ( - IN AMD_RESUME_PARAMS *ResumeParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - ResumeParams->StdHeader.Func = AMD_INIT_RESUME; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(ResumeParams); -} - -/********************************************************************** - * Interface call: AmdS3LateRestore - **********************************************************************/ -AGESA_STATUS -AmdS3LateRestore ( - IN OUT AMD_S3LATE_PARAMS *S3LateParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - S3LateParams->StdHeader.Func = AMD_S3LATE_RESTORE; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(S3LateParams); -} - -/********************************************************************** - * Interface call: AmdS3Save - **********************************************************************/ -AGESA_STATUS -AmdS3Save ( - IN OUT AMD_S3SAVE_PARAMS *AmdS3SaveParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdS3SaveParams->StdHeader.Func = AMD_S3_SAVE; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdS3SaveParams); -} - -/********************************************************************** - * Interface call: AmdLateRunApTask - **********************************************************************/ -AGESA_STATUS -AmdLateRunApTask ( - IN AP_EXE_PARAMS *AmdApExeParams -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdApExeParams->StdHeader.Func = AMD_LATE_RUN_AP_TASK; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdApExeParams); -} - -/********************************************************************** - * Interface service call: AmdGetApicId - **********************************************************************/ -AGESA_STATUS -AmdGetApicId ( - IN OUT AMD_APIC_PARAMS *AmdParamApic -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdParamApic->StdHeader.Func = AMD_GET_APIC_ID; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdParamApic); -} - -/********************************************************************** - * Interface service call: AmdGetPciAddress - **********************************************************************/ -AGESA_STATUS -AmdGetPciAddress ( - IN OUT AMD_GET_PCI_PARAMS *AmdParamGetPci -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdParamGetPci->StdHeader.Func = AMD_GET_PCI_ADDRESS; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdParamGetPci); -} - -/********************************************************************** - * Interface service call: AmdIdentifyCore - **********************************************************************/ -AGESA_STATUS -AmdIdentifyCore ( - IN OUT AMD_IDENTIFY_PARAMS *AmdParamIdentify -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdParamIdentify->StdHeader.Func = AMD_IDENTIFY_CORE; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdParamIdentify); -} - -/********************************************************************** - * Interface service call: AmdReadEventLog - **********************************************************************/ -AGESA_STATUS -AmdReadEventLog ( - IN EVENT_PARAMS *Event -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - Event->StdHeader.Func = AMD_READ_EVENT_LOG; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(Event); -} - -/********************************************************************** - * Interface service call: AmdIdentifyDimm - **********************************************************************/ -AGESA_STATUS -AmdIdentifyDimm ( - IN OUT AMD_IDENTIFY_DIMM *AmdDimmIdentify -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdDimmIdentify->StdHeader.Func = AMD_IDENTIFY_DIMMS; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdDimmIdentify); -} - -AGESA_STATUS -AmdIdsRunApTaskLate ( - IN AP_EXE_PARAMS *AmdApExeParams - ) -{ - AmdApExeParams->StdHeader.Func = -1; - return AGESA_UNSUPPORTED; -} - -/********************************************************************** - * Interface service call: AmdGet2DDataEye - **********************************************************************/ -AGESA_STATUS -AmdGet2DDataEye ( - IN OUT AMD_GET_DATAEYE *AmdGetDataEye - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdGetDataEye->StdHeader.Func = AMD_GET_2D_DATA_EYE; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdGetDataEye); -} - -/********************************************************************** - * FCH Functions - **********************************************************************/ - -VOID FchInitS3LateRestore (IN FCH_DATA_BLOCK *FchDataPtr); -VOID FchInitS3EarlyRestore (IN FCH_DATA_BLOCK *FchDataPtr); - -VOID -FchInitS3EarlyRestore ( - IN FCH_DATA_BLOCK *FchDataPtr - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - FchDataPtr->StdHeader->Func = FCH_INIT_S3_EARLY_RESTORE; - if (!module) return; - Dispatcher = module->ModuleDispatcher; - Dispatcher(FchDataPtr); -} - -VOID -FchInitS3LateRestore ( - IN FCH_DATA_BLOCK *FchDataPtr - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - FchDataPtr->StdHeader->Func = FCH_INIT_S3_LATE_RESTORE; - if (!module) return; - Dispatcher = module->ModuleDispatcher; - Dispatcher(FchDataPtr); -} - -/** - * WaitForEcLDN9MailboxCmdAck - * - * - * @param[in] StdHeader - * - */ -VOID -WaitForEcLDN9MailboxCmdAck ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - StdHeader->Func = 0; -} - -/** - * ImcSleep - IMC Sleep. - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -ImcSleep ( - IN VOID *FchDataPtr - ) -{ - ((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0; -} - -/** - * SoftwareDisableImc - Software disable IMC strap - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -SoftwareDisableImc ( - IN VOID *FchDataPtr - ) -{ - ((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0; -} - -/** - * ImcEnableSurebootTimer - IMC Enable Sureboot Timer. - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -ImcEnableSurebootTimer ( - IN VOID *FchDataPtr - ) -{ - ((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0; -} - -/** - * ImcDisableSurebootTimer - IMC Disable Sureboot Timer. - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -ImcDisableSurebootTimer ( - IN VOID *FchDataPtr - ) -{ - ((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0; -} - -/** - * ImcWakeup - IMC Wakeup. - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -ImcWakeup ( - IN VOID *FchDataPtr - ) -{ - ((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0; -} - -/** - * ImcIdle - IMC Idle. - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -ImcIdle ( - IN VOID *FchDataPtr - ) -{ - ((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0; -} diff --git a/src/vendorcode/amd/pi/00660F01/binaryPI/AGESA.c b/src/vendorcode/amd/pi/00660F01/binaryPI/AGESA.c deleted file mode 100644 index a4eef5a..0000000 --- a/src/vendorcode/amd/pi/00660F01/binaryPI/AGESA.c +++ /dev/null @@ -1,402 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Agesa structures and definitions - * - * Contains AMD AGESA core interface - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: Include - * @e \$Revision: 85818 $ @e \$Date: 2013-01-11 17:04:21 -0600 (Fri, 11 Jan 2013) $ - */ -/***************************************************************************** - * - * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ -// TODO This list needs to be pruned of anything that is not API -#include "AGESA.h" -#include "agesawrapper.h" -#include "AcpiLib.h" -#include "FchCommonCfg.h" -#include "Fch.h" -#include "FchDef.h" -#include "amdlib.h" -#include "cbfs.h" -#include <console/console.h> -#include <commonlib/loglevel.h> - -CONST UINT32 ImageSignature = IMAGE_SIGNATURE; -CONST UINT32 ModuleSignature = MODULE_SIGNATURE; -CONST CHAR8 ModuleIdentifier[] = AGESA_ID; - -/********************************************************************** - * Interface call: AmdCreateStruct - **********************************************************************/ -AGESA_STATUS -AmdCreateStruct ( - IN OUT AMD_INTERFACE_PARAMS *InterfaceParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - InterfaceParams->StdHeader.Func = AMD_CREATE_STRUCT; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(InterfaceParams); -} - -/********************************************************************** - * Interface call: AmdReleaseStruct - **********************************************************************/ -AGESA_STATUS -AmdReleaseStruct ( - IN OUT AMD_INTERFACE_PARAMS *InterfaceParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - InterfaceParams->StdHeader.Func = AMD_RELEASE_STRUCT; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(InterfaceParams); -} - -/********************************************************************** - * Interface call: AmdInitReset - **********************************************************************/ -AGESA_STATUS -AmdInitReset ( - IN OUT AMD_RESET_PARAMS *ResetParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - ResetParams->StdHeader.Func = AMD_INIT_RESET; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(ResetParams); -} - -/********************************************************************** - * Interface call: AmdInitEarly - **********************************************************************/ -AGESA_STATUS -AmdInitEarly ( - IN OUT AMD_EARLY_PARAMS *EarlyParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - EarlyParams->StdHeader.Func = AMD_INIT_EARLY; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(EarlyParams); -} - -/********************************************************************** - * Interface call: AmdInitPost - **********************************************************************/ -AGESA_STATUS -AmdInitPost ( - IN OUT AMD_POST_PARAMS *PostParams ///< Amd Cpu init param - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - PostParams->StdHeader.Func = AMD_INIT_POST; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(PostParams); -} - -/********************************************************************** - * Interface call: AmdInitEnv - **********************************************************************/ -AGESA_STATUS -AmdInitEnv ( - IN OUT AMD_ENV_PARAMS *EnvParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - EnvParams->StdHeader.Func = AMD_INIT_ENV; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(EnvParams); -} - -/********************************************************************** - * Interface call: AmdInitMid - **********************************************************************/ -AGESA_STATUS -AmdInitMid ( - IN OUT AMD_MID_PARAMS *MidParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - MidParams->StdHeader.Func = AMD_INIT_MID; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(MidParams); -} - -/********************************************************************** - * Interface call: AmdInitLate - **********************************************************************/ -AGESA_STATUS -AmdInitLate ( - IN OUT AMD_LATE_PARAMS *LateParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - LateParams->StdHeader.Func = AMD_INIT_LATE; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(LateParams); -} - -/********************************************************************** - * Interface call: AmdInitRecovery - **********************************************************************/ -AGESA_STATUS -AmdInitRecovery ( - IN OUT AMD_RECOVERY_PARAMS *RecoveryParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - RecoveryParams->StdHeader.Func = AMD_INIT_RECOVERY; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(RecoveryParams); -} - -/********************************************************************** - * Interface call: AmdInitResume - **********************************************************************/ -AGESA_STATUS -AmdInitResume ( - IN AMD_RESUME_PARAMS *ResumeParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - ResumeParams->StdHeader.Func = AMD_INIT_RESUME; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(ResumeParams); -} - -/********************************************************************** - * Interface call: AmdS3LateRestore - **********************************************************************/ -AGESA_STATUS -AmdS3LateRestore ( - IN OUT AMD_S3LATE_PARAMS *S3LateParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - S3LateParams->StdHeader.Func = AMD_S3LATE_RESTORE; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(S3LateParams); -} - -/********************************************************************** - * Interface call: AmdInitRtb - **********************************************************************/ -AGESA_STATUS -AmdInitRtb ( - IN OUT AMD_RTB_PARAMS *AmdInitRtbParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdInitRtbParams->StdHeader.Func = AMD_INIT_RTB; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdInitRtbParams); -} - -/********************************************************************** - * Interface call: AmdLateRunApTask - **********************************************************************/ -AGESA_STATUS -AmdLateRunApTask ( - IN AP_EXE_PARAMS *AmdApExeParams -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdApExeParams->StdHeader.Func = AMD_LATE_RUN_AP_TASK; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdApExeParams); -} - -/********************************************************************** - * Interface service call: AmdGetApicId - **********************************************************************/ -AGESA_STATUS -AmdGetApicId ( - IN OUT AMD_APIC_PARAMS *AmdParamApic -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdParamApic->StdHeader.Func = AMD_GET_APIC_ID; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdParamApic); -} - -/********************************************************************** - * Interface service call: AmdGetPciAddress - **********************************************************************/ -AGESA_STATUS -AmdGetPciAddress ( - IN OUT AMD_GET_PCI_PARAMS *AmdParamGetPci -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdParamGetPci->StdHeader.Func = AMD_GET_PCI_ADDRESS; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdParamGetPci); -} - -/********************************************************************** - * Interface service call: AmdIdentifyCore - **********************************************************************/ -AGESA_STATUS -AmdIdentifyCore ( - IN OUT AMD_IDENTIFY_PARAMS *AmdParamIdentify -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdParamIdentify->StdHeader.Func = AMD_IDENTIFY_CORE; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdParamIdentify); -} - -/********************************************************************** - * Interface service call: AmdReadEventLog - **********************************************************************/ -AGESA_STATUS -AmdReadEventLog ( - IN EVENT_PARAMS *Event -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - Event->StdHeader.Func = AMD_READ_EVENT_LOG; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(Event); -} - -/********************************************************************** - * Interface service call: AmdIdentifyDimm - **********************************************************************/ -AGESA_STATUS -AmdIdentifyDimm ( - IN OUT AMD_IDENTIFY_DIMM *AmdDimmIdentify -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdDimmIdentify->StdHeader.Func = AMD_IDENTIFY_DIMMS; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdDimmIdentify); -} - -AGESA_STATUS -AmdIdsRunApTaskLate ( - IN AP_EXE_PARAMS *AmdApExeParams - ) -{ - AmdApExeParams->StdHeader.Func = -1; - return AGESA_UNSUPPORTED; -} - -/********************************************************************** - * Interface service call: AmdGet2DDataEye - **********************************************************************/ -AGESA_STATUS -AmdGet2DDataEye ( - IN OUT AMD_GET_DATAEYE *AmdGetDataEye - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdGetDataEye->StdHeader.Func = AMD_GET_2D_DATA_EYE; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdGetDataEye); -} - -/********************************************************************** - * FCH Functions - **********************************************************************/ - -VOID FchInitS3LateRestore (IN FCH_DATA_BLOCK *FchDataPtr); -VOID FchInitS3EarlyRestore (IN FCH_DATA_BLOCK *FchDataPtr); - -VOID -FchInitS3EarlyRestore ( - IN FCH_DATA_BLOCK *FchDataPtr - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - FchDataPtr->StdHeader->Func = FCH_INIT_S3_EARLY_RESTORE; - if (!module) return; - Dispatcher = module->ModuleDispatcher; - Dispatcher(FchDataPtr); -} - -VOID -FchInitS3LateRestore ( - IN FCH_DATA_BLOCK *FchDataPtr - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - FchDataPtr->StdHeader->Func = FCH_INIT_S3_LATE_RESTORE; - if (!module) return; - Dispatcher = module->ModuleDispatcher; - Dispatcher(FchDataPtr); -} diff --git a/src/vendorcode/amd/pi/00730F01/binaryPI/AGESA.c b/src/vendorcode/amd/pi/00730F01/binaryPI/AGESA.c deleted file mode 100644 index 7b1a98a..0000000 --- a/src/vendorcode/amd/pi/00730F01/binaryPI/AGESA.c +++ /dev/null @@ -1,511 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Agesa structures and definitions - * - * Contains AMD AGESA core interface - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: Include - * @e \$Revision: 85818 $ @e \$Date: 2013-01-11 17:04:21 -0600 (Fri, 11 Jan 2013) $ - */ -/***************************************************************************** - * - * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ -// TODO This list needs to be pruned of anything that is not API -#include "AGESA.h" -#include <agesawrapper.h> -#include "AcpiLib.h" -#include "FchCommonCfg.h" -#include "Fch.h" -#include "FchDef.h" -#include "amdlib.h" - -CONST UINT32 ImageSignature = IMAGE_SIGNATURE; -CONST UINT32 ModuleSignature = MODULE_SIGNATURE; -CONST CHAR8 ModuleIdentifier[] = AGESA_ID; - -/************************************************************************ - * - * AGESA Basic Level interface structure definition and function prototypes - * - ***********************************************************************/ - - -/********************************************************************** - * Interface call: AmdCreateStruct - **********************************************************************/ -AGESA_STATUS -AmdCreateStruct ( - IN OUT AMD_INTERFACE_PARAMS *InterfaceParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - InterfaceParams->StdHeader.Func = AMD_CREATE_STRUCT; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(InterfaceParams); -} - -/********************************************************************** - * Interface call: AmdReleaseStruct - **********************************************************************/ -AGESA_STATUS -AmdReleaseStruct ( - IN OUT AMD_INTERFACE_PARAMS *InterfaceParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - InterfaceParams->StdHeader.Func = AMD_RELEASE_STRUCT; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(InterfaceParams); -} - -/********************************************************************** - * Interface call: AmdInitReset - **********************************************************************/ -AGESA_STATUS -AmdInitReset ( - IN OUT AMD_RESET_PARAMS *ResetParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - ResetParams->StdHeader.Func = AMD_INIT_RESET; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(ResetParams); -} - -/********************************************************************** - * Interface call: AmdInitEarly - **********************************************************************/ -AGESA_STATUS -AmdInitEarly ( - IN OUT AMD_EARLY_PARAMS *EarlyParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - EarlyParams->StdHeader.Func = AMD_INIT_EARLY; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(EarlyParams); -} - -/********************************************************************** - * Interface call: AmdInitPost - **********************************************************************/ -AGESA_STATUS -AmdInitPost ( - IN OUT AMD_POST_PARAMS *PostParams ///< Amd Cpu init param - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - PostParams->StdHeader.Func = AMD_INIT_POST; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(PostParams); -} - -/********************************************************************** - * Interface call: AmdInitEnv - **********************************************************************/ -AGESA_STATUS -AmdInitEnv ( - IN OUT AMD_ENV_PARAMS *EnvParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - EnvParams->StdHeader.Func = AMD_INIT_ENV; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(EnvParams); -} - -/********************************************************************** - * Interface call: AmdInitMid - **********************************************************************/ -AGESA_STATUS -AmdInitMid ( - IN OUT AMD_MID_PARAMS *MidParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - MidParams->StdHeader.Func = AMD_INIT_MID; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(MidParams); -} - -/********************************************************************** - * Interface call: AmdInitLate - **********************************************************************/ -AGESA_STATUS -AmdInitLate ( - IN OUT AMD_LATE_PARAMS *LateParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - LateParams->StdHeader.Func = AMD_INIT_LATE; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(LateParams); -} - -/********************************************************************** - * Interface call: AmdInitRecovery - **********************************************************************/ -AGESA_STATUS -AmdInitRecovery ( - IN OUT AMD_RECOVERY_PARAMS *RecoveryParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - RecoveryParams->StdHeader.Func = AMD_INIT_RECOVERY; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(RecoveryParams); -} - -/********************************************************************** - * Interface call: AmdInitResume - **********************************************************************/ -AGESA_STATUS -AmdInitResume ( - IN AMD_RESUME_PARAMS *ResumeParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - ResumeParams->StdHeader.Func = AMD_INIT_RESUME; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(ResumeParams); -} - -/********************************************************************** - * Interface call: AmdS3LateRestore - **********************************************************************/ -AGESA_STATUS -AmdS3LateRestore ( - IN OUT AMD_S3LATE_PARAMS *S3LateParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - S3LateParams->StdHeader.Func = AMD_S3LATE_RESTORE; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(S3LateParams); -} - -/********************************************************************** - * Interface call: AmdS3Save - **********************************************************************/ -AGESA_STATUS -AmdS3Save ( - IN OUT AMD_S3SAVE_PARAMS *AmdS3SaveParams - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdS3SaveParams->StdHeader.Func = AMD_S3_SAVE; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdS3SaveParams); -} - -/********************************************************************** - * Interface call: AmdLateRunApTask - **********************************************************************/ -AGESA_STATUS -AmdLateRunApTask ( - IN AP_EXE_PARAMS *AmdApExeParams -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdApExeParams->StdHeader.Func = AMD_LATE_RUN_AP_TASK; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdApExeParams); -} - -/********************************************************************** - * Interface service call: AmdGetApicId - **********************************************************************/ -AGESA_STATUS -AmdGetApicId ( - IN OUT AMD_APIC_PARAMS *AmdParamApic -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdParamApic->StdHeader.Func = AMD_GET_APIC_ID; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdParamApic); -} - -/********************************************************************** - * Interface service call: AmdGetPciAddress - **********************************************************************/ -AGESA_STATUS -AmdGetPciAddress ( - IN OUT AMD_GET_PCI_PARAMS *AmdParamGetPci -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdParamGetPci->StdHeader.Func = AMD_GET_PCI_ADDRESS; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdParamGetPci); -} - -/********************************************************************** - * Interface service call: AmdIdentifyCore - **********************************************************************/ -AGESA_STATUS -AmdIdentifyCore ( - IN OUT AMD_IDENTIFY_PARAMS *AmdParamIdentify -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdParamIdentify->StdHeader.Func = AMD_IDENTIFY_CORE; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdParamIdentify); -} - -/********************************************************************** - * Interface service call: AmdReadEventLog - **********************************************************************/ -AGESA_STATUS -AmdReadEventLog ( - IN EVENT_PARAMS *Event -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - Event->StdHeader.Func = AMD_READ_EVENT_LOG; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(Event); -} - -/********************************************************************** - * Interface service call: AmdIdentifyDimm - **********************************************************************/ -AGESA_STATUS -AmdIdentifyDimm ( - IN OUT AMD_IDENTIFY_DIMM *AmdDimmIdentify -) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdDimmIdentify->StdHeader.Func = AMD_IDENTIFY_DIMMS; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdDimmIdentify); -} - -AGESA_STATUS -AmdIdsRunApTaskLate ( - IN AP_EXE_PARAMS *AmdApExeParams - ) -{ - AmdApExeParams->StdHeader.Func = -1; - return AGESA_UNSUPPORTED; -} - -/********************************************************************** - * Interface service call: AmdGet2DDataEye - **********************************************************************/ -AGESA_STATUS -AmdGet2DDataEye ( - IN OUT AMD_GET_DATAEYE *AmdGetDataEye - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - AmdGetDataEye->StdHeader.Func = AMD_GET_2D_DATA_EYE; - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - return Dispatcher(AmdGetDataEye); -} - -/********************************************************************** - * FCH Functions - **********************************************************************/ - -VOID FchInitS3LateRestore (IN FCH_DATA_BLOCK *FchDataPtr); -VOID FchInitS3EarlyRestore (IN FCH_DATA_BLOCK *FchDataPtr); - -VOID -FchInitS3EarlyRestore ( - IN FCH_DATA_BLOCK *FchDataPtr - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - FchDataPtr->StdHeader->Func = FCH_INIT_S3_EARLY_RESTORE; - if (!module) return; - Dispatcher = module->ModuleDispatcher; - Dispatcher(FchDataPtr); -} - -VOID -FchInitS3LateRestore ( - IN FCH_DATA_BLOCK *FchDataPtr - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - FchDataPtr->StdHeader->Func = FCH_INIT_S3_LATE_RESTORE; - if (!module) return; - Dispatcher = module->ModuleDispatcher; - Dispatcher(FchDataPtr); -} - -/** - * WaitForEcLDN9MailboxCmdAck - * - * - * @param[in] StdHeader - * - */ -VOID -WaitForEcLDN9MailboxCmdAck ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - StdHeader->Func = 0; -} - -/** - * ImcSleep - IMC Sleep. - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -ImcSleep ( - IN VOID *FchDataPtr - ) -{ - ((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0; -} - -/** - * SoftwareDisableImc - Software disable IMC strap - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -SoftwareDisableImc ( - IN VOID *FchDataPtr - ) -{ - ((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0; -} - -/** - * ImcEnableSurebootTimer - IMC Enable Sureboot Timer. - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -ImcEnableSurebootTimer ( - IN VOID *FchDataPtr - ) -{ - ((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0; -} - -/** - * ImcDisableSurebootTimer - IMC Disable Sureboot Timer. - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -ImcDisableSurebootTimer ( - IN VOID *FchDataPtr - ) -{ - ((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0; -} - -/** - * ImcWakeup - IMC Wakeup. - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -ImcWakeup ( - IN VOID *FchDataPtr - ) -{ - ((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0; -} - -/** - * ImcIdle - IMC Idle. - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -ImcIdle ( - IN VOID *FchDataPtr - ) -{ - ((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0; -} diff --git a/src/vendorcode/amd/pi/Makefile.inc b/src/vendorcode/amd/pi/Makefile.inc index 90714aa..9b3a0e6 100644 --- a/src/vendorcode/amd/pi/Makefile.inc +++ b/src/vendorcode/amd/pi/Makefile.inc @@ -110,10 +110,6 @@ agesa_raw_files += $(wildcard $(src)/vendorcode/amd/pi/Lib/*.[cS]) -ifeq ($(CONFIG_BINARYPI_LEGACY_WRAPPER),y) -agesa_raw_files += $(wildcard $(AGESA_ROOT)/binaryPI/*.[cS]) -endif - ifeq ($(CONFIG_CPU_AMD_PI_00660F01),y) agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Fch/Kern/KernImc/*.[cS]) agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Fch/Common/*.[cS]) -- To view, visit https://review.coreboot.org/c/coreboot/+/19275 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6c6fd19875cb57f0caf42a1a94f59efed83bfe0d Gerrit-Change-Number: 19275 Gerrit-PatchSet: 11 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: binaryPI: Drop BINARYPI_LEGACY_WRAPPER support
by Michał Żygowski (Code Review) 27 Nov '19

27 Nov '19

Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/19275 ) Change subject: binaryPI: Drop BINARYPI_LEGACY_WRAPPER support ...................................................................... Patch Set 10: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/19275 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6c6fd19875cb57f0caf42a1a94f59efed83bfe0d Gerrit-Change-Number: 19275 Gerrit-PatchSet: 10 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 27 Nov 2019 10:28:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: binaryPI: Drop S3_DATA_POS and S3_DATA_SIZE
by Kyösti Mälkki (Code Review) 27 Nov '19

27 Nov '19

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37192 ) Change subject: binaryPI: Drop S3_DATA_POS and S3_DATA_SIZE ...................................................................... binaryPI: Drop S3_DATA_POS and S3_DATA_SIZE Direct SPI flash manipulation is forbidden, need to go through respective FMAP and rdev APIs. Change-Id: I765a6084fb26398008f38c0403f808bae19fdae1 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/amd/pi/Kconfig 1 file changed, 0 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/37192/1 diff --git a/src/cpu/amd/pi/Kconfig b/src/cpu/amd/pi/Kconfig index 828f550..d18f873 100644 --- a/src/cpu/amd/pi/Kconfig +++ b/src/cpu/amd/pi/Kconfig @@ -47,14 +47,6 @@ hex default 0x10000 -config S3_DATA_POS - hex - default 0xFFFF0000 - -config S3_DATA_SIZE - int - default 32768 - endif # CPU_AMD_PI source "src/cpu/amd/pi/00630F01/Kconfig" -- To view, visit https://review.coreboot.org/c/coreboot/+/37192 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I765a6084fb26398008f38c0403f808bae19fdae1 Gerrit-Change-Number: 37192 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

3 5

Change in coreboot[master]: binaryPI: Disable boards from build
by Kyösti Mälkki (Code Review) 27 Nov '19

27 Nov '19

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37170 ) Change subject: binaryPI: Disable boards from build ...................................................................... binaryPI: Disable boards from build As per the 4.11 release requirement, POSTCAR_STAGE=y is a mandatory feature, which binaryPI currently lacks. Disable all binaryPI platforms from the build for the moment. If a platform does not reach POSTCAR_STAGE=y and C_ENVIRONMENT_BOOTBLOCK=y within a reasonable timeframe both the mainboard and the respective (now unused) platform support code will get removed. Change-Id: Id81ab0f168034187ecf62203b5a33ac6ba49a35d Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/amd/bettong/Kconfig M src/mainboard/amd/bettong/Kconfig.name M src/mainboard/amd/db-ft3b-lc/Kconfig M src/mainboard/amd/db-ft3b-lc/Kconfig.name M src/mainboard/amd/lamar/Kconfig M src/mainboard/amd/lamar/Kconfig.name M src/mainboard/amd/olivehillplus/Kconfig M src/mainboard/amd/olivehillplus/Kconfig.name M src/mainboard/bap/ode_e21XX/Kconfig M src/mainboard/bap/ode_e21XX/Kconfig.name M src/mainboard/pcengines/apu2/Kconfig M src/mainboard/pcengines/apu2/Kconfig.name 12 files changed, 53 insertions(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/37170/1 diff --git a/src/mainboard/amd/bettong/Kconfig b/src/mainboard/amd/bettong/Kconfig index eaebfb5..fd4650f 100644 --- a/src/mainboard/amd/bettong/Kconfig +++ b/src/mainboard/amd/bettong/Kconfig @@ -13,6 +13,9 @@ # GNU General Public License for more details. # +config BOARD_AMD_BETTONG + def_bool n + if BOARD_AMD_BETTONG config BOARD_SPECIFIC_OPTIONS diff --git a/src/mainboard/amd/bettong/Kconfig.name b/src/mainboard/amd/bettong/Kconfig.name index 09201b5..4bd1329 100644 --- a/src/mainboard/amd/bettong/Kconfig.name +++ b/src/mainboard/amd/bettong/Kconfig.name @@ -1,2 +1,3 @@ -config BOARD_AMD_BETTONG - bool "Bettong" +# Disabled +#config BOARD_AMD_BETTONG +# bool "Bettong" diff --git a/src/mainboard/amd/db-ft3b-lc/Kconfig b/src/mainboard/amd/db-ft3b-lc/Kconfig index ffb3f10..34df2e9 100644 --- a/src/mainboard/amd/db-ft3b-lc/Kconfig +++ b/src/mainboard/amd/db-ft3b-lc/Kconfig @@ -14,6 +14,9 @@ # GNU General Public License for more details. # +config BOARD_AMD_DB_FT3B_LC + def_bool n + if BOARD_AMD_DB_FT3B_LC config BOARD_SPECIFIC_OPTIONS diff --git a/src/mainboard/amd/db-ft3b-lc/Kconfig.name b/src/mainboard/amd/db-ft3b-lc/Kconfig.name index 7caf95d..3197a70 100644 --- a/src/mainboard/amd/db-ft3b-lc/Kconfig.name +++ b/src/mainboard/amd/db-ft3b-lc/Kconfig.name @@ -1,2 +1,3 @@ -config BOARD_AMD_DB_FT3B_LC - bool "DB-FT3b-LC" +# Disabled +#config BOARD_AMD_DB_FT3B_LC +# bool "DB-FT3b-LC" diff --git a/src/mainboard/amd/lamar/Kconfig b/src/mainboard/amd/lamar/Kconfig index 210b3c2..de00225 100644 --- a/src/mainboard/amd/lamar/Kconfig +++ b/src/mainboard/amd/lamar/Kconfig @@ -13,6 +13,9 @@ # GNU General Public License for more details. # +config BOARD_AMD_LAMAR + def_bool n + if BOARD_AMD_LAMAR config BOARD_SPECIFIC_OPTIONS diff --git a/src/mainboard/amd/lamar/Kconfig.name b/src/mainboard/amd/lamar/Kconfig.name index 1831b9a..75eec04 100644 --- a/src/mainboard/amd/lamar/Kconfig.name +++ b/src/mainboard/amd/lamar/Kconfig.name @@ -1,2 +1,3 @@ -config BOARD_AMD_LAMAR - bool "Lamar" +# Disabled +#config BOARD_AMD_LAMAR +# bool "Lamar" diff --git a/src/mainboard/amd/olivehillplus/Kconfig b/src/mainboard/amd/olivehillplus/Kconfig index 5779aaf..e45ac52 100644 --- a/src/mainboard/amd/olivehillplus/Kconfig +++ b/src/mainboard/amd/olivehillplus/Kconfig @@ -13,6 +13,9 @@ # GNU General Public License for more details. # +config BOARD_AMD_OLIVEHILLPLUS + def_bool n + if BOARD_AMD_OLIVEHILLPLUS config BOARD_SPECIFIC_OPTIONS diff --git a/src/mainboard/amd/olivehillplus/Kconfig.name b/src/mainboard/amd/olivehillplus/Kconfig.name index 85a3e86..1ce4a20 100644 --- a/src/mainboard/amd/olivehillplus/Kconfig.name +++ b/src/mainboard/amd/olivehillplus/Kconfig.name @@ -1,2 +1,3 @@ -config BOARD_AMD_OLIVEHILLPLUS - bool "Olive Hill Plus" +# Disabled +#config BOARD_AMD_OLIVEHILLPLUS +# bool "Olive Hill Plus" diff --git a/src/mainboard/bap/ode_e21XX/Kconfig b/src/mainboard/bap/ode_e21XX/Kconfig index 3bdb573..e5ae415 100644 --- a/src/mainboard/bap/ode_e21XX/Kconfig +++ b/src/mainboard/bap/ode_e21XX/Kconfig @@ -13,6 +13,9 @@ # GNU General Public License for more details. # +config BOARD_ODE_E21XX + def_bool n + if BOARD_ODE_E21XX config BOARD_SPECIFIC_OPTIONS diff --git a/src/mainboard/bap/ode_e21XX/Kconfig.name b/src/mainboard/bap/ode_e21XX/Kconfig.name index 5ef8804..64665da 100644 --- a/src/mainboard/bap/ode_e21XX/Kconfig.name +++ b/src/mainboard/bap/ode_e21XX/Kconfig.name @@ -1,2 +1,3 @@ -config BOARD_ODE_E21XX - bool "ODE_e21xx" +# Disabled +#config BOARD_ODE_E21XX +# bool "ODE_e21xx" diff --git a/src/mainboard/pcengines/apu2/Kconfig b/src/mainboard/pcengines/apu2/Kconfig index 6c3958b..d10c838 100644 --- a/src/mainboard/pcengines/apu2/Kconfig +++ b/src/mainboard/pcengines/apu2/Kconfig @@ -15,6 +15,18 @@ # GNU General Public License for more details. # +config BOARD_PCENGINES_APU2 + def_bool n + +config BOARD_PCENGINES_APU3 + def_bool n + +config BOARD_PCENGINES_APU4 + def_bool n + +config BOARD_PCENGINES_APU5 + def_bool n + if BOARD_PCENGINES_APU2 || BOARD_PCENGINES_APU3 || BOARD_PCENGINES_APU4 || \ BOARD_PCENGINES_APU5 diff --git a/src/mainboard/pcengines/apu2/Kconfig.name b/src/mainboard/pcengines/apu2/Kconfig.name index 45ec16f..15bdd0b 100644 --- a/src/mainboard/pcengines/apu2/Kconfig.name +++ b/src/mainboard/pcengines/apu2/Kconfig.name @@ -1,11 +1,14 @@ -config BOARD_PCENGINES_APU2 - bool "APU2" +# Disabled -config BOARD_PCENGINES_APU3 - bool "APU3" +#config BOARD_PCENGINES_APU2 +# bool "APU2" -config BOARD_PCENGINES_APU4 - bool "APU4" +#config BOARD_PCENGINES_APU3 +# bool "APU3" -config BOARD_PCENGINES_APU5 - bool "APU5" +#config BOARD_PCENGINES_APU4 +# bool "APU4" + +#config BOARD_PCENGINES_APU5 +# bool "APU5" + -- To view, visit https://review.coreboot.org/c/coreboot/+/37170 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id81ab0f168034187ecf62203b5a33ac6ba49a35d Gerrit-Change-Number: 37170 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

5 13

Change in ...coreboot[master]: /mainboard/pcengines/apu2: implement POSTCAR_STAGE
by Krystian Hebel (Code Review) 27 Nov '19

27 Nov '19

Krystian Hebel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32363 Change subject: /mainboard/pcengines/apu2: implement POSTCAR_STAGE ...................................................................... /mainboard/pcengines/apu2: implement POSTCAR_STAGE As in [1], POSTCAR_STAGE will be required since October 2019. [1]https://mail.coreboot.org/hyperkitty/list/coreboot@coreboot.org/thread/HN… Signed-off-by: Krystian Hebel <krystian.hebel(a)3mdeb.com> Change-Id: Iff3dbe68ac17eb2947ff40b9769c6650255656cf --- M src/mainboard/pcengines/apu2/BiosCallOuts.c M src/mainboard/pcengines/apu2/Kconfig M src/mainboard/pcengines/apu2/Makefile.inc M src/mainboard/pcengines/apu2/OemCustomize.c A src/mainboard/pcengines/apu2/postcar.c M src/mainboard/pcengines/apu2/romstage.c A src/mainboard/pcengines/apu2/state_machine.c 7 files changed, 213 insertions(+), 136 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/32363/1 diff --git a/src/mainboard/pcengines/apu2/BiosCallOuts.c b/src/mainboard/pcengines/apu2/BiosCallOuts.c index 535024a..0178018 100644 --- a/src/mainboard/pcengines/apu2/BiosCallOuts.c +++ b/src/mainboard/pcengines/apu2/BiosCallOuts.c @@ -16,6 +16,7 @@ #include <AGESA.h> #include <spd_bin.h> #include <northbridge/amd/agesa/BiosCallOuts.h> +#include <northbridge/amd/agesa/state_machine.h> #include <FchPlatform.h> #include <stdlib.h> @@ -23,7 +24,6 @@ #include "imc.h" #include "hudson.h" -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr); static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = @@ -34,8 +34,7 @@ {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp }, {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData }, {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, - {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess }, - {AGESA_FCH_OEM_CALLOUT, Fch_Oem_config } + {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess } }; const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); @@ -56,75 +55,66 @@ FchParams->Hwm.HwmFchtsiAutoPoll = FALSE; /* 1 enable, 0 disable TSI Auto Polling */ } -/** - * Fch Oem setting callback - * - * Configure platform specific Hudson device, - * such Azalia, SATA, IMC etc. - */ -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) +void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams) { - AMD_CONFIG_PARAMS *StdHeader = (AMD_CONFIG_PARAMS *)ConfigPtr; - if (StdHeader->Func == AMD_INIT_RESET) { - FCH_RESET_DATA_BLOCK *FchParams = (FCH_RESET_DATA_BLOCK *) FchData; - printk(BIOS_DEBUG, "Fch OEM config in INIT RESET "); - //FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */ - FchParams->LegacyFree = CONFIG(HUDSON_LEGACY_FREE); - FchParams->FchReset.SataEnable = hudson_sata_enable(); - FchParams->FchReset.IdeEnable = hudson_ide_enable(); - FchParams->FchReset.Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE); - FchParams->FchReset.Xhci1Enable = FALSE; - } else if (StdHeader->Func == AMD_INIT_ENV) { - FCH_DATA_BLOCK *FchParams = (FCH_DATA_BLOCK *)FchData; - printk(BIOS_DEBUG, "Fch OEM config in INIT ENV "); + printk(BIOS_DEBUG, "Fch OEM config in INIT RESET "); + //FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */ + FchParams->LegacyFree = CONFIG(HUDSON_LEGACY_FREE); + FchParams->FchReset.SataEnable = hudson_sata_enable(); + FchParams->FchReset.IdeEnable = hudson_ide_enable(); + FchParams->FchReset.Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE); + FchParams->FchReset.Xhci1Enable = FALSE; + printk(BIOS_DEBUG, "Done\n"); +} + +void board_FCH_InitEnv(struct sysinfo *cb_NA, FCH_DATA_BLOCK *FchParams) +{ + printk(BIOS_DEBUG, "Fch OEM config in INIT ENV "); - FchParams->Azalia.AzaliaEnable = AzDisable; + FchParams->Azalia.AzaliaEnable = AzDisable; - /* Fan Control */ - oem_fan_control(FchParams); + /* Fan Control */ + oem_fan_control(FchParams); - /* XHCI configuration */ - FchParams->Usb.Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE); - FchParams->Usb.Xhci1Enable = FALSE; + /* XHCI configuration */ + FchParams->Usb.Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE); + FchParams->Usb.Xhci1Enable = FALSE; - /* EHCI configuration */ - FchParams->Usb.Ehci3Enable = !CONFIG(HUDSON_XHCI_ENABLE); + /* EHCI configuration */ + FchParams->Usb.Ehci3Enable = !CONFIG(HUDSON_XHCI_ENABLE); - if (CONFIG(BOARD_PCENGINES_APU2)) { - // Disable EHCI 0 (port 0 to 3) - FchParams->Usb.Ehci1Enable = FALSE; - } else { - // Enable EHCI 0 (port 0 to 3) - FchParams->Usb.Ehci1Enable = TRUE; - } + if (CONFIG(BOARD_PCENGINES_APU2)) { + // Disable EHCI 0 (port 0 to 3) + FchParams->Usb.Ehci1Enable = FALSE; + } else { + // Enable EHCI 0 (port 0 to 3) + FchParams->Usb.Ehci1Enable = TRUE; + } - // Enable EHCI 1 (port 4 to 7) - // port 4 and 5 to EHCI header port 6 and 7 to PCIe slot. - FchParams->Usb.Ehci2Enable = TRUE; + // Enable EHCI 1 (port 4 to 7) + // port 4 and 5 to EHCI header port 6 and 7 to PCIe slot. + FchParams->Usb.Ehci2Enable = TRUE; - /* sata configuration */ - FchParams->Sata.SataDevSlpPort0 = 0; // Disable DEVSLP0 and 1 to make sure GPIO55 and 59 are not used by DEVSLP - FchParams->Sata.SataDevSlpPort1 = 0; + /* sata configuration */ + FchParams->Sata.SataDevSlpPort0 = 0; // Disable DEVSLP0 and 1 to make sure GPIO55 and 59 are not used by DEVSLP + FchParams->Sata.SataDevSlpPort1 = 0; - FchParams->Sata.SataClass = CONFIG_HUDSON_SATA_MODE; - switch ((SATA_CLASS)CONFIG_HUDSON_SATA_MODE) { - case SataRaid: - case SataAhci: - case SataAhci7804: - case SataLegacyIde: - FchParams->Sata.SataIdeMode = FALSE; - break; - case SataIde2Ahci: - case SataIde2Ahci7804: - default: /* SataNativeIde */ - FchParams->Sata.SataIdeMode = TRUE; - break; - } + FchParams->Sata.SataClass = CONFIG_HUDSON_SATA_MODE; + switch ((SATA_CLASS)CONFIG_HUDSON_SATA_MODE) { + case SataRaid: + case SataAhci: + case SataAhci7804: + case SataLegacyIde: + FchParams->Sata.SataIdeMode = FALSE; + break; + case SataIde2Ahci: + case SataIde2Ahci7804: + default: /* SataNativeIde */ + FchParams->Sata.SataIdeMode = TRUE; + break; } printk(BIOS_DEBUG, "Done\n"); - - return AGESA_SUCCESS; } static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr) diff --git a/src/mainboard/pcengines/apu2/Kconfig b/src/mainboard/pcengines/apu2/Kconfig index 6c3958b..28f9eb8 100644 --- a/src/mainboard/pcengines/apu2/Kconfig +++ b/src/mainboard/pcengines/apu2/Kconfig @@ -20,7 +20,6 @@ config BOARD_SPECIFIC_OPTIONS def_bool y - select BINARYPI_LEGACY_WRAPPER select CPU_AMD_PI_00730F01 select NORTHBRIDGE_AMD_PI_00730F01 select SOUTHBRIDGE_AMD_PI_AVALON diff --git a/src/mainboard/pcengines/apu2/Makefile.inc b/src/mainboard/pcengines/apu2/Makefile.inc index 4e6364e..7824996 100644 --- a/src/mainboard/pcengines/apu2/Makefile.inc +++ b/src/mainboard/pcengines/apu2/Makefile.inc @@ -14,10 +14,14 @@ # GNU General Public License for more details. # +romstage-y += state_machine.c romstage-y += BiosCallOuts.c romstage-y += OemCustomize.c romstage-y += gpio_ftns.c +postcar-y += postcar.c + +ramstage-y += state_machine.c ramstage-y += BiosCallOuts.c ramstage-y += OemCustomize.c ramstage-y += gpio_ftns.c diff --git a/src/mainboard/pcengines/apu2/OemCustomize.c b/src/mainboard/pcengines/apu2/OemCustomize.c index 700f4c7..7ef7e00 100644 --- a/src/mainboard/pcengines/apu2/OemCustomize.c +++ b/src/mainboard/pcengines/apu2/OemCustomize.c @@ -14,7 +14,7 @@ */ #include <AGESA.h> -#include <northbridge/amd/pi/agesawrapper.h> +#include <northbridge/amd/agesa/state_machine.h> static const PCIe_PORT_DESCRIPTOR PortList[] = { @@ -76,25 +76,7 @@ .DdiLinkList = NULL, }; -/*---------------------------------------------------------------------------------------*/ -/** - * OemCustomizeInitEarly - * - * Description: - * This stub function will call the host environment through the binary block - * interface (call-out port) to provide a user hook opportunity - * - * Parameters: - * @param[in] *InitEarly - * - * @retval VOID - * - **/ -/*---------------------------------------------------------------------------------------*/ -VOID -OemCustomizeInitEarly ( - IN OUT AMD_EARLY_PARAMS *InitEarly - ) +void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly) { InitEarly->GnbConfig.PcieComplexList = &PcieComplex; InitEarly->PlatformConfig.CStateMode = CStateModeC6; diff --git a/src/mainboard/pcengines/apu2/postcar.c b/src/mainboard/pcengines/apu2/postcar.c new file mode 100644 index 0000000..b57ea94 --- /dev/null +++ b/src/mainboard/pcengines/apu2/postcar.c @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/cpu.h> +#include <arch/io.h> + +void late_car_teardown(void) +{ + /* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */ + outb(0xEA, 0xCD6); + outb(0x1, 0xcd7); +} diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c index bd3c421..a6fe713 100644 --- a/src/mainboard/pcengines/apu2/romstage.c +++ b/src/mainboard/pcengines/apu2/romstage.c @@ -40,9 +40,11 @@ static void early_lpc_init(void); -void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) +void board_BeforeAgesa(struct sysinfo *cb) { u32 val; + pci_devfn_t dev; + u32 data; /* * In Hudson RRG, PMIOxD2[5:4] is "Drive strength control for @@ -57,51 +59,32 @@ hudson_lpc_port80(); - if (!cpu_init_detectedx && boot_cpu()) { - pci_devfn_t dev; - u32 data; + timestamp_init(timestamp_get()); + timestamp_add_now(TS_START_ROMSTAGE); - timestamp_init(timestamp_get()); - timestamp_add_now(TS_START_ROMSTAGE); + post_code(0x30); + early_lpc_init(); - post_code(0x30); - early_lpc_init(); + hudson_clk_output_48Mhz(); + post_code(0x31); - hudson_clk_output_48Mhz(); - post_code(0x31); + dev = PCI_DEV(0, 0x14, 3); + data = pci_read_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE); + /* enable 0x2e/0x4e IO decoding before configuring SuperIO */ + pci_write_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE, data | 3); - dev = PCI_DEV(0, 0x14, 3); - data = pci_read_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE); - /* enable 0x2e/0x4e IO decoding before configuring SuperIO */ - pci_write_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE, data | 3); + /* COM2 on apu5 is reserved so only COM1 should be supported */ + if ((CONFIG_UART_FOR_CONSOLE == 1) && + !CONFIG(BOARD_PCENGINES_APU5)) + nuvoton_enable_serial(SERIAL2_DEV, CONFIG_TTYS0_BASE); + else if (CONFIG_UART_FOR_CONSOLE == 0) + nuvoton_enable_serial(SERIAL1_DEV, CONFIG_TTYS0_BASE); - /* COM2 on apu5 is reserved so only COM1 should be supported */ - if ((CONFIG_UART_FOR_CONSOLE == 1) && - !CONFIG(BOARD_PCENGINES_APU5)) - nuvoton_enable_serial(SERIAL2_DEV, CONFIG_TTYS0_BASE); - else if (CONFIG_UART_FOR_CONSOLE == 0) - nuvoton_enable_serial(SERIAL1_DEV, CONFIG_TTYS0_BASE); - - console_init(); - } - - /* Halt if there was a built in self test failure */ - post_code(0x34); - report_bist_failure(bist); + console_init(); /* Load MPB */ val = cpuid_eax(1); printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val); - printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx); - - post_code(0x37); - AGESAWRAPPER(amdinitreset); - - post_code(0x38); - printk(BIOS_DEBUG, "Got past avalon_early_setup\n"); - - post_code(0x39); - AGESAWRAPPER(amdinitearly); /* Disable SVI2 controller to wait for command completion */ val = pci_read_config32(PCI_DEV(0, 0x18, 5), 0x12C); @@ -112,27 +95,17 @@ val |= (1 << 30); pci_write_config32(PCI_DEV(0, 0x18, 5), 0x12C, val); } - - timestamp_add_now(TS_BEFORE_INITRAM); - - post_code(0x40); - AGESAWRAPPER(amdinitpost); - - /* FIXME: Detect if TSC frequency changed during raminit? */ - timestamp_rescale_table(1, 4); - - timestamp_add_now(TS_AFTER_INITRAM); } -void agesa_postcar(struct sysinfo *cb) -{ - //PspMboxBiosCmdDramInfo(); - post_code(0x41); - AGESAWRAPPER(amdinitenv); +//~ void agesa_postcar(struct sysinfo *cb) +//~ { + //~ //PspMboxBiosCmdDramInfo(); + //~ post_code(0x41); + //~ AGESAWRAPPER(amdinitenv); - outb(0xEA, 0xCD6); - outb(0x1, 0xcd7); -} + //~ outb(0xEA, 0xCD6); + //~ outb(0x1, 0xcd7); +//~ } static void early_lpc_init(void) { diff --git a/src/mainboard/pcengines/apu2/state_machine.c b/src/mainboard/pcengines/apu2/state_machine.c new file mode 100644 index 0000000..4a10df9 --- /dev/null +++ b/src/mainboard/pcengines/apu2/state_machine.c @@ -0,0 +1,105 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Kyösti Mälkki + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <Porting.h> +#include <AGESA.h> +#include <binaryPI/FieldAccessors.h> + +#include <cbmem.h> +#include <northbridge/amd/agesa/state_machine.h> +#include <northbridge/amd/agesa/agesa_helper.h> + +void platform_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset) +{ +} + +void platform_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *Early) +{ +} + +void platform_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *Post) +{ +} + +void platform_AfterInitPost(struct sysinfo *cb, AMD_POST_PARAMS *Post) +{ + backup_top_of_low_cacheable(Post->MemConfig.Sub4GCacheTop); +} + +void platform_BeforeInitResume(struct sysinfo *cb, AMD_RESUME_PARAMS *Resume) +{ +} + +void platform_AfterInitResume(struct sysinfo *cb, AMD_RESUME_PARAMS *Resume) +{ +} + +void platform_BeforeInitEnv(struct sysinfo *cb, AMD_ENV_PARAMS *Env) +{ + EmptyHeap(); +} + +void platform_AfterInitEnv(struct sysinfo *cb, AMD_ENV_PARAMS *Env) +{ +} + +void platform_BeforeS3LateRestore(struct sysinfo *cb, AMD_S3LATE_PARAMS *S3Late) +{ +} + +void platform_AfterS3LateRestore(struct sysinfo *cb, AMD_S3LATE_PARAMS *S3Late) +{ + amd_initcpuio(); +} + +void platform_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *Mid) +{ + amd_initcpuio(); +} + +void platform_AfterInitLate(struct sysinfo *cb, AMD_LATE_PARAMS *Late) +{ +} + +void platform_AfterS3Save(struct sysinfo *cb, AMD_S3SAVE_PARAMS *S3Save) +{ +} + +AGESA_STATUS +AmdGetValue ( + IN CONST AGESA_FIELD_NAME name, + IN OUT VOID** value, + IN UINT32 size + ) +{ + AGESA_STATUS status; + struct sysinfo cb; + AMD_ACCESSOR_PARAMS Params = {}; + + agesa_set_interface(&cb); + Params.StdHeader.ImageBasePtr = cb.StdHeader.ImageBasePtr; + + Params.AllocationMethod = ByHost; + Params.FieldName = name; + Params.FieldValue = *value; + Params.FieldSize = size; + + status = module_dispatch(AMD_GET_VALUE, (AMD_CONFIG_PARAMS*) &Params); + + *value = Params.FieldValue; + size = Params.FieldSize; + + return status; +} -- To view, visit https://review.coreboot.org/c/coreboot/+/32363 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iff3dbe68ac17eb2947ff40b9769c6650255656cf Gerrit-Change-Number: 32363 Gerrit-PatchSet: 1 Gerrit-Owner: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-MessageType: newchange

8 21

Change in coreboot[master]: binaryPI: Drop CAR teardown without POSTCAR_STAGE
by Kyösti Mälkki (Code Review) 27 Nov '19

27 Nov '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/18526 ) Change subject: binaryPI: Drop CAR teardown without POSTCAR_STAGE ...................................................................... Patch Set 11: (3 comments) https://review.coreboot.org/c/coreboot/+/18526/8//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/18526/8//COMMIT_MSG@11 PS8, Line 11: POSTCAR_STAGE now. > I need to add references to changes and discussions. This is really a revert for the gcccar. […] Done https://review.coreboot.org/c/coreboot/+/18526/8/src/drivers/amd/agesa/cach… File src/drivers/amd/agesa/cache_as_ram.S: https://review.coreboot.org/c/coreboot/+/18526/8/src/drivers/amd/agesa/cach… PS8, Line 108: * calling to chipset_teardown_car below. > stale comment Done https://review.coreboot.org/c/coreboot/+/18526/8/src/drivers/amd/agesa/exit… File src/drivers/amd/agesa/exit_car.S: https://review.coreboot.org/c/coreboot/+/18526/8/src/drivers/amd/agesa/exit… PS8, Line 32: /* enable cache */ : movl %cr0, %eax : andl $(~(CR0_CD | CR0_NW)), %eax : movl %eax, %cr0 > > > It will be followup if we find this is redunant now. […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/18526 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I693c104c3aab3be537c00695cbd764a48bd603b0 Gerrit-Change-Number: 18526 Gerrit-PatchSet: 11 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 27 Nov 2019 09:55:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: amdfam10: Clean leftover prototypes
by Kyösti Mälkki (Code Review) 27 Nov '19

27 Nov '19

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37235 ) Change subject: amdfam10: Clean leftover prototypes ...................................................................... amdfam10: Clean leftover prototypes Change-Id: Ic3278cb1148c34284aba59f6f588713b683ca90b Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/include/cpu/amd/car.h 1 file changed, 0 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/37235/1 diff --git a/src/include/cpu/amd/car.h b/src/include/cpu/amd/car.h index 359fa6b..e4dd142 100644 --- a/src/include/cpu/amd/car.h +++ b/src/include/cpu/amd/car.h @@ -4,10 +4,6 @@ #include <arch/cpu.h> void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx); -asmlinkage void *post_cache_as_ram(void); -asmlinkage void cache_as_ram_new_stack(void); - -void disable_cache_as_ram(void); void asmlinkage early_all_cores(void); -- To view, visit https://review.coreboot.org/c/coreboot/+/37235 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic3278cb1148c34284aba59f6f588713b683ca90b Gerrit-Change-Number: 37235 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

3 6

Change in coreboot[master]: device/mmio.h: Add bit field helpers
by Hung-Te Lin (Code Review) 27 Nov '19

27 Nov '19

Hung-Te Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35463 ) Change subject: device/mmio.h: Add bit field helpers ...................................................................... device/mmio.h: Add bit field helpers When accessing register with multiple bit fields, the common approach is to use clrsetbits_le32, for example: clrsetbits(&reg, (1 << 0) | (0x3 << 1) | (0x7 << 10), (1 << 0) | (0x1 << 1) | (0x5 << 10)); This hard to maintain because we have to calculate the mask values manually, make sure the duplicated shift (offset) was set correctly. And it may be even worse if the value to set will be based on some runtime values (that many developers will do a if-block with two very similar argument list), and leaving lots of magic numbers. We want to encourage developers always giving field names, and have a better way of setting fields. The proposed utility macros are: DEFINE_BITFIELD(name, start, end) SET_BITFIELDS(addr, name, value, [name2, value2, ...]) Where a developer can easily convert from data sheet like BITS NAME 26:24 SEC_VIO Into a declaration DEFINE_BITFIELD(SEC_VIO, 26, 24) Then, a simple call can set the field as: SET_BITFIELDS(&reg, SEC_VIO, 2); That is much easier to understand than clrsetbits(&reg, 0x7 << 24, 0x2 << 24); Change-Id: I8a1b17142f7a7dc6c441b0b1ee67d60d73ec8cc8 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> --- M src/include/device/mmio.h 1 file changed, 78 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/35463/1 diff --git a/src/include/device/mmio.h b/src/include/device/mmio.h index e40b40f..b3b51c2 100644 --- a/src/include/device/mmio.h +++ b/src/include/device/mmio.h @@ -53,4 +53,82 @@ } #endif /* !__ROMCC__ */ +/* + * Utilities to help processing bit fields. + * + * To define a bit field (usually inside a register, do: + * + * DEFINE_BITFIELD(name, start end) + * + * - name: String for name of the field to access. + * - start: starting (high) bit from data sheet. + * - end: ending (low) bit from data sheet. + * + * Then, set the values using: + * + * SET_BITFIELDS(&reg, name, value, [name, value, ...]) + * + * Example: + * + * DEFINE_BITFIELD(DISP_TYPE, 2, 1); + * DEFINE_BITFIELD(DISP_EN, 0, 0); + * + * SET_BITFIELDS(&disp_regs.ctrl, DISP_TYPE, 2); + * SET_BITFIELDS(&disp_regs.ctrl, DISP_EN, 0); + * + * SET_BITFIELDS(&disp_regs.ctrl, DISP_TYPE, 1, DISP_EN, 1); + * + * This will be translated to: + * + * clrsetbits_le32(&disp_regs.ctrl, 0x6, 0x4); + * clrsetbits_le32(&disp_regs.ctrl, 0x1, 0x0); + * + * clrsetbits_le32(&disp_regs.ctrl, 0x7, 0x3); + */ + +#define DEFINE_BITFIELD(name, start, end) \ + _Static_assert(start >= end, "invalid bit field range"); \ + enum { \ + name##_FIELD_SHIFT = (end), \ + name##_FIELD_SIZE = (start) - (end) + 1 } + +#define _BF_MASK(name, value) \ + (((1 << name##_FIELD_SIZE) - 1) << name##_FIELD_SHIFT) + +#define _BF_VALUE(name, value) \ + ((value) << name##_FIELD_SHIFT) + +#define _BF_APPLY1(op, name, value, ...) (op(name, value)) +#define _BF_APPLY2(op, name, value, ...) ((op(name, value)) | \ + _BF_APPLY1(op, __VA_ARGS__)) +#define _BF_APPLY3(op, name, value, ...) ((op(name, value)) | \ + _BF_APPLY2(op, __VA_ARGS__)) +#define _BF_APPLY4(op, name, value, ...) ((op(name, value)) | \ + _BF_APPLY3(op, __VA_ARGS__)) +#define _BF_APPLY5(op, name, value, ...) ((op(name, value)) | \ + _BF_APPLY4(op, __VA_ARGS__)) +#define _BF_APPLY6(op, name, value, ...) ((op(name, value)) | \ + _BF_APPLY5(op, __VA_ARGS__)) +#define _BF_APPLY7(op, name, value, ...) ((op(name, value)) | \ + _BF_APPLY6(op, __VA_ARGS__)) +#define _BF_APPLY8(op, name, value, ...) ((op(name, value)) | \ + _BF_APPLY7(op, __VA_ARGS__)) +#define _BF_APPLYINVALID(...) \ + _Static_assert(0, "Invalid arguments to SET_BITFIELDS"); + +#define _SET_BITFIELDS_IMPL(addr, \ + n1, v1, n2, v2, n3, v3, n4, v4, n5, v5, n6, v6, n7, v7, n8, v8, \ + NARGS, ...) \ + \ + clrsetbits_le32(addr, \ + _BF_APPLY##NARGS(_BF_MASK, n1, v1, n2, v2, n3, v3, n4, v4, \ + n5, v5, n6, v6, n7, v7, n8, v8), \ + _BF_APPLY##NARGS(_BF_VALUE, n1, v1, n2, v2, n3, v3, n4, v4, \ + n5, v5, n6, v6, n7, v7, n8, v8)) + +#define SET_BITFIELDS(addr, ...) \ + _SET_BITFIELDS_IMPL(addr, __VA_ARGS__, \ + 8, INVALID, 7, INVALID, 6, INVALID, 5, INVALID, \ + 4, INVALID, 3, INVALID, 2, INVALID, 1, INVALID) + #endif /* __DEVICE_MMIO_H__ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/35463 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8a1b17142f7a7dc6c441b0b1ee67d60d73ec8cc8 Gerrit-Change-Number: 35463 Gerrit-PatchSet: 1 Gerrit-Owner: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newchange

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coreboot-gerrit November 2019