coreboot-gerrit November 2019

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: lib/fmap.c: Drop CAR_GLOBAL_MIGRATION support
by Arthur Heymans (Code Review) 29 Nov '19

29 Nov '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37033 ) Change subject: lib/fmap.c: Drop CAR_GLOBAL_MIGRATION support ...................................................................... lib/fmap.c: Drop CAR_GLOBAL_MIGRATION support Change-Id: Ibf80d3e37f702c75c30394a14ce0a91af84a6b93 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/lib/fmap.c 1 file changed, 6 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/37033/1 diff --git a/src/lib/fmap.c b/src/lib/fmap.c index 48aab8f..1a2a5ea 100644 --- a/src/lib/fmap.c +++ b/src/lib/fmap.c @@ -29,8 +29,8 @@ * See http://code.google.com/p/flashmap/ for more information on FMAP. */ -static int fmap_print_once CAR_GLOBAL; -static struct mem_region_device fmap_cache CAR_GLOBAL; +static int fmap_print_once; +static struct mem_region_device fmap_cache; #define print_once(...) do { \ if (!car_get_var(fmap_print_once)) \ @@ -114,15 +114,13 @@ { const struct region_device *boot; struct fmap *fmap; - struct mem_region_device *cache; size_t offset = FMAP_OFFSET; /* Try FMAP cache first */ - cache = car_get_var_ptr(&fmap_cache); - if (!region_device_sz(&cache->rdev)) + if (!region_device_sz(&fmap_cache.rdev)) setup_preram_cache(cache); - if (region_device_sz(&cache->rdev)) - return rdev_chain_full(fmrd, &cache->rdev); + if (region_device_sz(&fmap_cache.rdev)) + return rdev_chain_full(fmrd, &fmap_cache.rdev); boot_device_init(); boot = boot_device_ro(); @@ -277,9 +275,6 @@ static void fmap_register_cbmem_cache(int unused) { const struct cbmem_entry *e; - struct mem_region_device *mdev; - - mdev = car_get_var_ptr(&fmap_cache); /* Find the FMAP cache installed by previous stage */ e = cbmem_entry_find(CBMEM_ID_FMAP); @@ -287,7 +282,7 @@ if (!e) return; - mem_region_device_ro_init(mdev, cbmem_entry_start(e), cbmem_entry_size(e)); + mem_region_device_ro_init(&fmap_cache, cbmem_entry_start(e), cbmem_entry_size(e)); } /* -- To view, visit https://review.coreboot.org/c/coreboot/+/37033 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibf80d3e37f702c75c30394a14ce0a91af84a6b93 Gerrit-Change-Number: 37033 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

3 4

Change in coreboot[master]: lib/spd_bin.c: Drop CAR_GLOBAL_MIGRATION support
by Arthur Heymans (Code Review) 29 Nov '19

29 Nov '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37031 ) Change subject: lib/spd_bin.c: Drop CAR_GLOBAL_MIGRATION support ...................................................................... lib/spd_bin.c: Drop CAR_GLOBAL_MIGRATION support Change-Id: I1c307e1d5532929de6d876ce9215515ab1cf4652 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/lib/spd_bin.c 1 file changed, 3 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/37031/1 diff --git a/src/lib/spd_bin.c b/src/lib/spd_bin.c index 62e600b..90fe1ed 100644 --- a/src/lib/spd_bin.c +++ b/src/lib/spd_bin.c @@ -20,7 +20,7 @@ #include <device/early_smbus.h> #include <device/dram/ddr3.h> -static u8 spd_data[CONFIG_DIMM_MAX * CONFIG_DIMM_SPD_SIZE] CAR_GLOBAL; +static u8 spd_data[CONFIG_DIMM_MAX * CONFIG_DIMM_SPD_SIZE]; void dump_spd_info(struct spd_block *blk) { @@ -258,12 +258,10 @@ void get_spd_smbus(struct spd_block *blk) { u8 i; - unsigned char *spd_data_ptr = car_get_var_ptr(&spd_data); - for (i = 0 ; i < CONFIG_DIMM_MAX; i++) { - get_spd(spd_data_ptr + i * CONFIG_DIMM_SPD_SIZE, + get_spd(&spd_data + i * CONFIG_DIMM_SPD_SIZE, blk->addr_map[i]); - blk->spd_array[i] = spd_data_ptr + i * CONFIG_DIMM_SPD_SIZE; + blk->spd_array[i] = &spd_data + i * CONFIG_DIMM_SPD_SIZE; } update_spd_len(blk); -- To view, visit https://review.coreboot.org/c/coreboot/+/37031 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1c307e1d5532929de6d876ce9215515ab1cf4652 Gerrit-Change-Number: 37031 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

4 4

Change in coreboot[master]: lib/timestamp.c: Drop CAR_GLOBAL_MIGRATION support
by Arthur Heymans (Code Review) 29 Nov '19

29 Nov '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37030 ) Change subject: lib/timestamp.c: Drop CAR_GLOBAL_MIGRATION support ...................................................................... lib/timestamp.c: Drop CAR_GLOBAL_MIGRATION support Change-Id: I0ba97d7a2da02ba24de6932678c3bc936aa6554b Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/lib/timestamp.c 1 file changed, 6 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/37030/1 diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index dcb3124..7c7210c 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -22,7 +22,6 @@ #include <symbols.h> #include <timer.h> #include <timestamp.h> -#include <arch/early_variables.h> #include <smp/node.h> #define MAX_TIMESTAMPS 192 @@ -31,7 +30,7 @@ /* This points to the active timestamp_table and can change within a stage as CBMEM comes available. */ -static struct timestamp_table *glob_ts_table CAR_GLOBAL; +static struct timestamp_table *glob_ts_table; static void timestamp_cache_init(struct timestamp_table *ts_cache, uint64_t base) @@ -94,21 +93,17 @@ static struct timestamp_table *timestamp_table_get(void) { - struct timestamp_table *ts_table; + if (glob_ts_table) + return glob_ts_table; - ts_table = car_get_ptr(glob_ts_table); - if (ts_table) - return ts_table; + glob_ts_table = timestamp_cache_get(); - ts_table = timestamp_cache_get(); - car_set_ptr(glob_ts_table, ts_table); - - return ts_table; + return glob_ts_table; } static void timestamp_table_set(struct timestamp_table *ts) { - car_set_ptr(glob_ts_table, ts); + glob_ts_table = ts; } static const char *timestamp_name(enum timestamp_id id) -- To view, visit https://review.coreboot.org/c/coreboot/+/37030 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ba97d7a2da02ba24de6932678c3bc936aa6554b Gerrit-Change-Number: 37030 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

3 2

Change in coreboot[master]: security/tpm: Drop CAR_GLOBAL_MIGRATION support
by Arthur Heymans (Code Review) 29 Nov '19

29 Nov '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37029 ) Change subject: security/tpm: Drop CAR_GLOBAL_MIGRATION support ...................................................................... security/tpm: Drop CAR_GLOBAL_MIGRATION support Change-Id: I1c09eda6164efb390de4626f52aafba59962f9c4 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/drivers/crb/tis.c M src/drivers/crb/tpm.c M src/drivers/i2c/tpm/cr50.c M src/drivers/i2c/tpm/tis.c M src/drivers/i2c/tpm/tis_atmel.c M src/drivers/i2c/tpm/tpm.c M src/drivers/pc80/tpm/tis.c M src/security/tpm/tspi/log.c M src/security/tpm/tss/tcg-1.2/tss.c M src/security/tpm/tss/tcg-2.0/tss.c M src/security/tpm/tss/tcg-2.0/tss_marshaling.c M src/security/tpm/tss/vendor/cr50/cr50.c 12 files changed, 98 insertions(+), 130 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/37029/1 diff --git a/src/drivers/crb/tis.c b/src/drivers/crb/tis.c index 94bfb9e..17302cc 100644 --- a/src/drivers/crb/tis.c +++ b/src/drivers/crb/tis.c @@ -11,7 +11,6 @@ * GNU General Public License for more details. */ -#include <arch/early_variables.h> #include <console/console.h> #include <security/tpm/tis.h> #include <arch/acpigen.h> @@ -21,7 +20,7 @@ #include "tpm.h" #include "chip.h" -static unsigned tpm_is_open CAR_GLOBAL; +static unsigned tpm_is_open; static const struct { uint16_t vid; @@ -45,7 +44,7 @@ int tis_open(void) { - if (car_get_var(tpm_is_open)) { + if (tpm_is_open) { printk(BIOS_ERR, "%s called twice.\n", __func__); return -1; } @@ -63,13 +62,13 @@ int tis_close(void) { - if (car_get_var(tpm_is_open)) { + if (tpm_is_open) { /* * Do we need to do something here, like waiting for a * transaction to stop? */ - car_set_var(tpm_is_open, 0); + tpm_is_open = 0; } return 0; diff --git a/src/drivers/crb/tpm.c b/src/drivers/crb/tpm.c index 0393417..f2b7903 100644 --- a/src/drivers/crb/tpm.c +++ b/src/drivers/crb/tpm.c @@ -15,7 +15,6 @@ */ #include <timer.h> -#include <arch/early_variables.h> #include <console/console.h> #include <arch/mmio.h> #include <delay.h> diff --git a/src/drivers/i2c/tpm/cr50.c b/src/drivers/i2c/tpm/cr50.c index 6714bd4..5f016e4 100644 --- a/src/drivers/i2c/tpm/cr50.c +++ b/src/drivers/i2c/tpm/cr50.c @@ -27,7 +27,6 @@ * instead of just reading header and determining the remainder */ -#include <arch/early_variables.h> #include <commonlib/endian.h> #include <string.h> #include <types.h> @@ -55,15 +54,15 @@ uint8_t buf[CR50_MAX_BUFSIZE + sizeof(uint8_t)]; }; -static struct tpm_inf_dev g_tpm_dev CAR_GLOBAL; +static struct tpm_inf_dev g_tpm_dev; __weak int tis_plat_irq_status(void) { - static int warning_displayed CAR_GLOBAL; + static int warning_displayed ; - if (!car_get_var(warning_displayed)) { + if (!warning_displayed) { printk(BIOS_WARNING, "WARNING: tis_plat_irq_status() not implemented, wasting 20ms to wait on Cr50!\n"); - car_set_var(warning_displayed, 1); + warning_displayed = 1; } mdelay(CR50_TIMEOUT_NOIRQ_MS); @@ -101,16 +100,14 @@ static int cr50_i2c_read(struct tpm_chip *chip, uint8_t addr, uint8_t *buffer, size_t len) { - struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev); - - if (tpm_dev->addr == 0) + if (g_tpm_dev.addr == 0) return -1; /* Clear interrupt before starting transaction */ tis_plat_irq_status(); /* Send the register address byte to the TPM */ - if (i2c_write_raw(tpm_dev->bus, tpm_dev->addr, &addr, 1)) { + if (i2c_write_raw(g_tpm_dev.bus, g_tpm_dev.addr, &addr, 1)) { printk(BIOS_ERR, "%s: Address write failed\n", __func__); return -1; } @@ -120,7 +117,7 @@ return -1; /* Read response data from the TPM */ - if (i2c_read_raw(tpm_dev->bus, tpm_dev->addr, buffer, len)) { + if (i2c_read_raw(g_tpm_dev.bus, g_tpm_dev.addr, buffer, len)) { printk(BIOS_ERR, "%s: Read response failed\n", __func__); return -1; } @@ -145,22 +142,20 @@ static int cr50_i2c_write(struct tpm_chip *chip, uint8_t addr, uint8_t *buffer, size_t len) { - struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev); - - if (tpm_dev->addr == 0) + if (g_tpm_dev.addr == 0) return -1; if (len > CR50_MAX_BUFSIZE) return -1; /* Prepend the 'register address' to the buffer */ - tpm_dev->buf[0] = addr; - memcpy(tpm_dev->buf + 1, buffer, len); + g_tpm_dev.buf[0] = addr; + memcpy(g_tpm_dev.buf + 1, buffer, len); /* Clear interrupt before starting transaction */ tis_plat_irq_status(); /* Send write request buffer with address */ - if (i2c_write_raw(tpm_dev->bus, tpm_dev->addr, tpm_dev->buf, len + 1)) { + if (i2c_write_raw(g_tpm_dev.bus, g_tpm_dev.addr, g_tpm_dev.buf, len + 1)) { printk(BIOS_ERR, "%s: Error writing to TPM\n", __func__); return -1; } @@ -491,7 +486,6 @@ int tpm_vendor_init(struct tpm_chip *chip, unsigned int bus, uint32_t dev_addr) { - struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev); uint32_t did_vid = 0; if (dev_addr == 0) { @@ -499,8 +493,8 @@ return -1; } - tpm_dev->bus = bus; - tpm_dev->addr = dev_addr; + g_tpm_dev.bus = bus; + g_tpm_dev.addr = dev_addr; cr50_vendor_init(chip); diff --git a/src/drivers/i2c/tpm/tis.c b/src/drivers/i2c/tpm/tis.c index e466c45..aa8cc4b 100644 --- a/src/drivers/i2c/tpm/tis.c +++ b/src/drivers/i2c/tpm/tis.c @@ -12,7 +12,6 @@ * GNU General Public License for more details. */ -#include <arch/early_variables.h> #include <stdint.h> #include <string.h> #include <assert.h> @@ -27,25 +26,24 @@ #include "tpm.h" /* global structure for tpm chip data */ -static struct tpm_chip g_chip CAR_GLOBAL; +static struct tpm_chip g_chip; #define TPM_CMD_COUNT_BYTE 2 #define TPM_CMD_ORDINAL_BYTE 6 int tis_open(void) { - struct tpm_chip *chip = car_get_var_ptr(&g_chip); int rc; - if (chip->is_open) { + if (g_chip.is_open) { printk(BIOS_DEBUG, "tis_open() called twice.\n"); return -1; } - rc = tpm_vendor_init(chip, CONFIG_DRIVER_TPM_I2C_BUS, + rc = tpm_vendor_init(&g_chip, CONFIG_DRIVER_TPM_I2C_BUS, CONFIG_DRIVER_TPM_I2C_ADDR); if (rc < 0) - chip->is_open = 0; + g_chip.is_open = 0; if (rc) return -1; @@ -55,11 +53,9 @@ int tis_close(void) { - struct tpm_chip *chip = car_get_var_ptr(&g_chip); - - if (chip->is_open) { - tpm_vendor_cleanup(chip); - chip->is_open = 0; + if (g_chip.is_open) { + tpm_vendor_cleanup(&g_chip); + g_chip.is_open = 0; } return 0; @@ -76,12 +72,11 @@ { int rc; uint32_t count; - struct tpm_chip *chip = car_get_var_ptr(&g_chip); memcpy(&count, sbuf + TPM_CMD_COUNT_BYTE, sizeof(count)); count = be32_to_cpu(count); - if (!chip->vendor.send || !chip->vendor.status || !chip->vendor.cancel) + if (!g_chip.vendor.send || !g_chip.vendor.status || !g_chip.vendor.cancel) return -1; if (count == 0) { @@ -94,8 +89,8 @@ return -1; } - ASSERT(chip->vendor.send); - rc = chip->vendor.send(chip, (uint8_t *) sbuf, count); + ASSERT(g_chip.vendor.send); + rc = g_chip.vendor.send(chip, (uint8_t *) sbuf, count); if (rc < 0) { printk(BIOS_DEBUG, "tpm_transmit: tpm_send error\n"); goto out; @@ -103,14 +98,14 @@ int timeout = 2 * 60 * 1000; /* two minutes timeout */ while (timeout) { - ASSERT(chip->vendor.status); - uint8_t status = chip->vendor.status(chip); - if ((status & chip->vendor.req_complete_mask) == - chip->vendor.req_complete_val) { + ASSERT(g_chip.vendor.status); + uint8_t status = g_chip.vendor.status(&g_chip); + if ((status & g_chip.vendor.req_complete_mask) == + g_chip.vendor.req_complete_val) { goto out_recv; } - if (status == chip->vendor.req_canceled) { + if (status == g_chip.vendor.req_canceled) { printk(BIOS_DEBUG, "tpm_transmit: Operation Canceled\n"); rc = -1; @@ -120,15 +115,15 @@ timeout--; } - ASSERT(chip->vendor.cancel); - chip->vendor.cancel(chip); + ASSERT(g_chip.vendor.cancel); + g_chip.vendor.cancel(&g_chip); printk(BIOS_DEBUG, "tpm_transmit: Operation Timed out\n"); rc = -1; //ETIME; goto out; out_recv: - rc = chip->vendor.recv(chip, (uint8_t *) rbuf, rbufsiz); + rc = g_chip.vendor.recv(chip, (uint8_t *) rbuf, rbufsiz); if (rc < 0) printk(BIOS_DEBUG, "tpm_transmit: tpm_recv: error %d\n", rc); out: diff --git a/src/drivers/i2c/tpm/tis_atmel.c b/src/drivers/i2c/tpm/tis_atmel.c index 42df292..793418a 100644 --- a/src/drivers/i2c/tpm/tis_atmel.c +++ b/src/drivers/i2c/tpm/tis_atmel.c @@ -12,7 +12,6 @@ * GNU General Public License for more details. */ -#include <arch/early_variables.h> #include <assert.h> #include <commonlib/endian.h> #include <console/console.h> diff --git a/src/drivers/i2c/tpm/tpm.c b/src/drivers/i2c/tpm/tpm.c index e095084..dbf834b 100644 --- a/src/drivers/i2c/tpm/tpm.c +++ b/src/drivers/i2c/tpm/tpm.c @@ -28,7 +28,6 @@ */ -#include <arch/early_variables.h> #include <commonlib/endian.h> #include <stdint.h> #include <string.h> @@ -81,7 +80,7 @@ enum i2c_chip_type chip_type; }; -static struct tpm_inf_dev g_tpm_dev CAR_GLOBAL; +static struct tpm_inf_dev g_tpm_dev ; /* * iic_tpm_read() - read from TPM register @@ -99,24 +98,23 @@ */ static int iic_tpm_read(uint8_t addr, uint8_t *buffer, size_t len) { - struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev); int rc; int count; - if (tpm_dev->addr == 0) + if (g_tpm_dev.addr == 0) return -1; - switch (tpm_dev->chip_type) { + switch (g_tpm_dev.chip_type) { case SLB9635: case UNKNOWN: /* slb9635 protocol should work in both cases */ for (count = 0; count < MAX_COUNT; count++) { - rc = i2c_write_raw(tpm_dev->bus, tpm_dev->addr, + rc = i2c_write_raw(g_tpm_dev.bus, g_tpm_dev.addr, &addr, 1); if (rc == 0) break; /* success, break to skip sleep */ - udelay(tpm_dev->sleep_short); + udelay(g_tpm_dev.sleep_short); } if (rc) @@ -127,8 +125,8 @@ * retrieving the data */ for (count = 0; count < MAX_COUNT; count++) { - udelay(tpm_dev->sleep_short); - rc = i2c_read_raw(tpm_dev->bus, tpm_dev->addr, + udelay(g_tpm_dev.sleep_short); + rc = i2c_read_raw(g_tpm_dev.bus, g_tpm_dev.addr, buffer, len); if (rc == 0) break; /* success, break to skip sleep */ @@ -144,23 +142,23 @@ * retries should usually not be needed, but are kept just to * be safe on the safe side. */ - struct i2c_msg aseg = { .flags = 0, .slave = tpm_dev->addr, + struct i2c_msg aseg = { .flags = 0, .slave = g_tpm_dev.addr, .buf = &addr, .len = 1 }; struct i2c_msg dseg = { .flags = I2C_M_RD, - .slave = tpm_dev->addr, + .slave = g_tpm_dev.addr, .buf = buffer, .len = len }; for (count = 0; count < MAX_COUNT; count++) { - rc = i2c_transfer(tpm_dev->bus, &aseg, 1) || - i2c_transfer(tpm_dev->bus, &dseg, 1); + rc = i2c_transfer(g_tpm_dev.bus, &aseg, 1) || + i2c_transfer(g_tpm_dev.bus, &dseg, 1); if (rc == 0) break; /* break here to skip sleep */ - udelay(tpm_dev->sleep_short); + udelay(g_tpm_dev.sleep_short); } } } /* take care of 'guard time' */ - udelay(tpm_dev->sleep_short); + udelay(g_tpm_dev.sleep_short); if (rc) return -1; @@ -171,7 +169,6 @@ unsigned int sleep_time, uint8_t max_count) { - struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev); int rc = 0; int count; @@ -182,14 +179,14 @@ } /* prepare send buffer */ - tpm_dev->buf[0] = addr; - memcpy(&(tpm_dev->buf[1]), buffer, len); + g_tpm_dev.buf[0] = addr; + memcpy(&(g_tpm_dev.buf[1]), buffer, len); - if (tpm_dev->addr == 0) + if (g_tpm_dev.addr == 0) return -1; for (count = 0; count < max_count; count++) { - rc = i2c_write_raw(tpm_dev->bus, tpm_dev->addr, - tpm_dev->buf, len + 1); + rc = i2c_write_raw(g_tpm_dev.bus, g_tpm_dev.addr, + g_tpm_dev.buf, len + 1); if (rc == 0) break; /* success, break to skip sleep */ @@ -197,7 +194,7 @@ } /* take care of 'guard time' */ - udelay(tpm_dev->sleep_short); + udelay(g_tpm_dev.sleep_short); if (rc) return -1; @@ -222,8 +219,7 @@ */ static int iic_tpm_write(uint8_t addr, uint8_t *buffer, size_t len) { - struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev); - return iic_tpm_write_generic(addr, buffer, len, tpm_dev->sleep_short, + return iic_tpm_write_generic(addr, buffer, len, g_tpm_dev.sleep_short, MAX_COUNT); } @@ -233,8 +229,7 @@ * */ static int iic_tpm_write_long(uint8_t addr, uint8_t *buffer, size_t len) { - struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev); - return iic_tpm_write_generic(addr, buffer, len, tpm_dev->sleep_long, + return iic_tpm_write_generic(addr, buffer, len, g_tpm_dev.sleep_long, MAX_COUNT_LONG); } @@ -479,17 +474,16 @@ int tpm_vendor_probe(unsigned int bus, uint32_t addr) { - struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev); struct stopwatch sw; uint8_t buf = 0; int ret; long sw_run_duration = SLEEP_DURATION_PROBE_MS; - tpm_dev->chip_type = UNKNOWN; - tpm_dev->bus = bus; - tpm_dev->addr = addr; - tpm_dev->sleep_short = SLEEP_DURATION; - tpm_dev->sleep_long = SLEEP_DURATION_LONG; + g_tpm_dev.chip_type = UNKNOWN; + g_tpm_dev.bus = bus; + g_tpm_dev.addr = addr; + g_tpm_dev.sleep_short = SLEEP_DURATION; + g_tpm_dev.sleep_long = SLEEP_DURATION_LONG; /* * Probe TPM. Check if the TPM_ACCESS register's ValidSts bit is set(1) @@ -521,7 +515,6 @@ int tpm_vendor_init(struct tpm_chip *chip, unsigned int bus, uint32_t dev_addr) { - struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev); uint32_t vendor; if (dev_addr == 0) { @@ -529,11 +522,11 @@ return -1; } - tpm_dev->chip_type = UNKNOWN; - tpm_dev->bus = bus; - tpm_dev->addr = dev_addr; - tpm_dev->sleep_short = SLEEP_DURATION; - tpm_dev->sleep_long = SLEEP_DURATION_LONG; + g_tpm_dev.chip_type = UNKNOWN; + g_tpm_dev.bus = bus; + g_tpm_dev.addr = dev_addr; + g_tpm_dev.sleep_short = SLEEP_DURATION; + g_tpm_dev.sleep_long = SLEEP_DURATION_LONG; memset(&chip->vendor, 0, sizeof(struct tpm_vendor_specific)); chip->is_open = 1; @@ -554,9 +547,9 @@ goto out_err; if (vendor == TPM_TIS_I2C_DID_VID_9645) { - tpm_dev->chip_type = SLB9645; + g_tpm_dev.chip_type = SLB9645; } else if (be32_to_cpu(vendor) == TPM_TIS_I2C_DID_VID_9635) { - tpm_dev->chip_type = SLB9635; + g_tpm_dev.chip_type = SLB9635; } else { printk(BIOS_DEBUG, "Vendor ID 0x%08x not recognized.\n", vendor); @@ -564,8 +557,8 @@ } printk(BIOS_DEBUG, "I2C TPM %u:%02x (chip type %s device-id 0x%X)\n", - tpm_dev->bus, tpm_dev->addr, - chip_name[tpm_dev->chip_type], vendor >> 16); + g_tpm_dev.bus, g_tpm_dev.addr, + chip_name[g_tpm_dev.chip_type], vendor >> 16); /* * A timeout query to TPM can be placed here. diff --git a/src/drivers/pc80/tpm/tis.c b/src/drivers/pc80/tpm/tis.c index 5927377..98bf244 100644 --- a/src/drivers/pc80/tpm/tis.c +++ b/src/drivers/pc80/tpm/tis.c @@ -31,7 +31,6 @@ #include <device/device.h> #include <console/console.h> #include <security/tpm/tis.h> -#include <arch/early_variables.h> #include <device/pnp.h> #include "chip.h" @@ -162,7 +161,7 @@ * Cached vendor/device ID pair to indicate that the device has been already * discovered */ -static u32 vendor_dev_id CAR_GLOBAL; +static u32 vendor_dev_id ; static inline u8 tpm_read_status(int locality) { @@ -402,7 +401,7 @@ u16 vid, did; int i; - if (car_get_var(vendor_dev_id)) + if (vendor_dev_id) return 0; /* Already probed. */ didvid = tpm_read_did_vid(0); @@ -411,7 +410,7 @@ return TPM_DRIVER_ERR; } - car_set_var(vendor_dev_id, didvid); + vendor_dev_id = didvid; vid = didvid & 0xffff; did = (didvid >> 16) & 0xffff; diff --git a/src/security/tpm/tspi/log.c b/src/security/tpm/tspi/log.c index 9986d9a..8a9cc88 100644 --- a/src/security/tpm/tspi/log.c +++ b/src/security/tpm/tspi/log.c @@ -15,7 +15,6 @@ #include <console/console.h> #include <security/tpm/tspi.h> -#include <arch/early_variables.h> #include <region_file.h> #include <string.h> #include <security/vboot/symbols.h> diff --git a/src/security/tpm/tss/tcg-1.2/tss.c b/src/security/tpm/tss/tcg-1.2/tss.c index b11d6a3..9bc72d2 100644 --- a/src/security/tpm/tss/tcg-1.2/tss.c +++ b/src/security/tpm/tss/tcg-1.2/tss.c @@ -14,7 +14,6 @@ * time. */ -#include <arch/early_variables.h> #include <assert.h> #include <string.h> #include <security/tpm/tis.h> @@ -148,12 +147,11 @@ /* Exported functions. */ -static uint8_t tlcl_init_done CAR_GLOBAL; +static uint8_t tlcl_init_done; uint32_t tlcl_lib_init(void) { - uint8_t done = car_get_var(tlcl_init_done); - if (done) + if (tlcl_init_done) return VB2_SUCCESS; if (tis_init()) @@ -161,7 +159,7 @@ if (tis_open()) return VB2_ERROR_UNKNOWN; - car_set_var(tlcl_init_done, 1); + tlcl_init_done = 1; return VB2_SUCCESS; } diff --git a/src/security/tpm/tss/tcg-2.0/tss.c b/src/security/tpm/tss/tcg-2.0/tss.c index 16e40fe..6bc3096 100644 --- a/src/security/tpm/tss/tcg-2.0/tss.c +++ b/src/security/tpm/tss/tcg-2.0/tss.c @@ -5,7 +5,6 @@ * found in the LICENSE file. */ -#include <arch/early_variables.h> #include <console/console.h> #include <endian.h> #include <string.h> @@ -30,11 +29,9 @@ size_t in_size; const uint8_t *sendb; /* Command/response buffer. */ - static uint8_t cr_buffer[TPM_BUFFER_SIZE] CAR_GLOBAL; + static uint8_t cr_buffer[TPM_BUFFER_SIZE]; - uint8_t *cr_buffer_ptr = car_get_var_ptr(cr_buffer); - - obuf_init(&ob, cr_buffer_ptr, sizeof(cr_buffer)); + obuf_init(&ob, cr_buffer, sizeof(cr_buffer)); if (tpm_marshal_command(command, command_body, &ob) < 0) { printk(BIOS_ERR, "command %#x\n", command); @@ -44,12 +41,12 @@ sendb = obuf_contents(&ob, &out_size); in_size = sizeof(cr_buffer); - if (tis_sendrecv(sendb, out_size, cr_buffer_ptr, &in_size)) { + if (tis_sendrecv(sendb, out_size, cr_buffer, &in_size)) { printk(BIOS_ERR, "tpm transaction failed\n"); return NULL; } - ibuf_init(&ib, cr_buffer_ptr, in_size); + ibuf_init(&ib, cr_buffer, in_size); return tpm_unmarshal_response(command, &ib); } @@ -173,13 +170,12 @@ return TPM_SUCCESS; } -static uint8_t tlcl_init_done CAR_GLOBAL; +static uint8_t tlcl_init_done; /* This function is called directly by vboot, uses vboot return types. */ uint32_t tlcl_lib_init(void) { - uint8_t done = car_get_var(tlcl_init_done); - if (done) + if (tlcl_init_done) return VB2_SUCCESS; if (tis_init()) { @@ -192,7 +188,7 @@ return VB2_ERROR_UNKNOWN; } - car_set_var(tlcl_init_done, 1); + tlcl_init_done = 1; return VB2_SUCCESS; } diff --git a/src/security/tpm/tss/tcg-2.0/tss_marshaling.c b/src/security/tpm/tss/tcg-2.0/tss_marshaling.c index 1bf211a..e8ea947 100644 --- a/src/security/tpm/tss/tcg-2.0/tss_marshaling.c +++ b/src/security/tpm/tss/tcg-2.0/tss_marshaling.c @@ -5,7 +5,6 @@ * found in the LICENSE file. */ -#include <arch/early_variables.h> #include <commonlib/iobuf.h> #include <console/console.h> #include <stdlib.h> @@ -15,7 +14,7 @@ #include <security/tpm/tss/vendor/cr50/cr50.h> #include <security/tpm/tss.h> -static uint16_t tpm_tag CAR_GLOBAL; /* Depends on the command type. */ +static uint16_t tpm_tag; /* Depends on the command type. */ #define unmarshal_TPM_CAP(a, b) ibuf_read_be32(a, b) #define unmarshal_TPM_CC(a, b) ibuf_read_be32(a, b) @@ -165,7 +164,7 @@ struct tpm2_session_header session_header; int rc = 0; - car_set_var(tpm_tag, TPM_ST_SESSIONS); + tpm_tag = TPM_ST_SESSIONS; for (i = 0; i < handle_count; i++) rc |= marshal_TPM_HANDLE(ob, handles[i]); @@ -270,7 +269,7 @@ int rc = 0; struct tpm2_session_header session_header; - car_set_var(tpm_tag, TPM_ST_SESSIONS); + tpm_tag = TPM_ST_SESSIONS; rc |= marshal_TPM_HANDLE(ob, TPM_RH_PLATFORM); memset(&session_header, 0, sizeof(session_header)); @@ -335,7 +334,7 @@ const size_t hdr_sz = sizeof(uint16_t) + 2 * sizeof(uint32_t); int rc = 0; - car_set_var(tpm_tag, TPM_ST_NO_SESSIONS); + tpm_tag = TPM_ST_NO_SESSIONS; if (obuf_splice_current(ob, &ob_hdr, hdr_sz) < 0) return -1; @@ -407,7 +406,7 @@ return rc; /* Fix up the command header with known values. */ - rc |= obuf_write_be16(&ob_hdr, car_get_var(tpm_tag)); + rc |= obuf_write_be16(&ob_hdr, tpm_tag); rc |= obuf_write_be32(&ob_hdr, obuf_nr_written(ob)); return rc; @@ -552,19 +551,18 @@ struct tpm2_response *tpm_unmarshal_response(TPM_CC command, struct ibuf *ib) { - static struct tpm2_response tpm2_static_resp CAR_GLOBAL; - struct tpm2_response *tpm2_resp = car_get_var_ptr(&tpm2_static_resp); + static struct tpm2_response tpm2_static_resp; int rc = 0; - rc |= ibuf_read_be16(ib, &tpm2_resp->hdr.tpm_tag); - rc |= ibuf_read_be32(ib, &tpm2_resp->hdr.tpm_size); - rc |= unmarshal_TPM_CC(ib, &tpm2_resp->hdr.tpm_code); + rc |= ibuf_read_be16(ib, &tpm2_static_resp.hdr.tpm_tag); + rc |= ibuf_read_be32(ib, &tpm2_static_resp.hdr.tpm_size); + rc |= unmarshal_TPM_CC(ib, &tpm2_static_resp.hdr.tpm_code); if (rc != 0) return NULL; if (ibuf_remaining(ib) == 0) { - if (tpm2_resp->hdr.tpm_size != ibuf_nr_read(ib)) + if (tpm2_static_resp.hdr.tpm_size != ibuf_nr_read(ib)) printk(BIOS_ERR, "%s: size mismatch in response to command %#x\n", __func__, command); @@ -577,11 +575,11 @@ break; case TPM2_GetCapability: - rc |= unmarshal_get_capability(ib, &tpm2_resp->gc); + rc |= unmarshal_get_capability(ib, &tpm2_static_resp.gc); break; case TPM2_NV_Read: - rc |= unmarshal_nv_read(ib, &tpm2_resp->nvr); + rc |= unmarshal_nv_read(ib, &tpm2_static_resp.nvr); break; case TPM2_Hierarchy_Control: @@ -595,7 +593,7 @@ break; case TPM2_CR50_VENDOR_COMMAND: - rc |= unmarshal_vendor_command(ib, &tpm2_resp->vcr); + rc |= unmarshal_vendor_command(ib, &tpm2_static_resp.vcr); break; default: @@ -608,7 +606,7 @@ "Request to unmarshal unexpected command %#x," " code %#x", __func__, __LINE__, command, - tpm2_resp->hdr.tpm_code); + tpm2_static_resp.hdr.tpm_code); sz_left = ibuf_remaining(ib); data = ibuf_oob_drain(ib, sz_left); @@ -627,7 +625,7 @@ printk(BIOS_INFO, "%s:%d got %d bytes back in response to %#x," " failed to parse (%zd)\n", - __func__, __LINE__, tpm2_resp->hdr.tpm_size, + __func__, __LINE__, tpm2_static_resp.hdr.tpm_size, command, ibuf_remaining(ib)); return NULL; } diff --git a/src/security/tpm/tss/vendor/cr50/cr50.c b/src/security/tpm/tss/vendor/cr50/cr50.c index 4f128dc..ec69df4 100644 --- a/src/security/tpm/tss/vendor/cr50/cr50.c +++ b/src/security/tpm/tss/vendor/cr50/cr50.c @@ -4,7 +4,6 @@ * found in the LICENSE file. */ -#include <arch/early_variables.h> #include <console/console.h> #include <endian.h> #include <vb2_api.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/37029 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1c09eda6164efb390de4626f52aafba59962f9c4 Gerrit-Change-Number: 37029 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-MessageType: newchange

4 16

Change in coreboot[master]: security/vboot: Drop CAR_GLOBAL_MIGRATION support
by Arthur Heymans (Code Review) 29 Nov '19

29 Nov '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37028 ) Change subject: security/vboot: Drop CAR_GLOBAL_MIGRATION support ...................................................................... security/vboot: Drop CAR_GLOBAL_MIGRATION support Change-Id: I9dee03da028b9111b685e325368815a86e444a47 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/security/vboot/common.c M src/security/vboot/misc.h M src/security/vboot/vbnv.c M src/security/vboot/vbnv_flash.c M src/security/vboot/vboot_loader.c 5 files changed, 37 insertions(+), 65 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/37028/1 diff --git a/src/security/vboot/common.c b/src/security/vboot/common.c index 043748c..b0b841e 100644 --- a/src/security/vboot/common.c +++ b/src/security/vboot/common.c @@ -24,7 +24,7 @@ #include <security/vboot/symbols.h> #include <security/vboot/vboot_common.h> -static struct vb2_context *vboot_ctx CAR_GLOBAL; +static struct vb2_context *vboot_ctx; struct vboot_working_data *vboot_get_working_data(void) { @@ -49,20 +49,19 @@ struct vb2_context *vboot_get_context(void) { - struct vb2_context **vboot_ctx_ptr = car_get_var_ptr(&vboot_ctx); struct vboot_working_data *wd; /* Return if context has already been initialized/restored. */ - if (*vboot_ctx_ptr) - return *vboot_ctx_ptr; + if (vboot_ctx) + return vboot_ctx; wd = vboot_get_working_data(); /* Restore context from a previous stage. */ if (vboot_logic_executed()) { assert(vb2api_reinit(vboot_get_workbuf(wd), - vboot_ctx_ptr) == VB2_SUCCESS); - return *vboot_ctx_ptr; + &vboot_ctx) == VB2_SUCCESS); + return vboot_ctx; } assert(verification_should_run()); @@ -78,9 +77,9 @@ /* Initialize vb2_shared_data and friends. */ assert(vb2api_init(vboot_get_workbuf(wd), wd->buffer_size, - vboot_ctx_ptr) == VB2_SUCCESS); + &vboot_ctx) == VB2_SUCCESS); - return *vboot_ctx_ptr; + return vboot_ctx; } int vboot_get_selected_region(struct region *region) @@ -148,7 +147,7 @@ vb2api_relocate(vboot_get_workbuf(wd_cbmem), vboot_get_workbuf(wd_preram), cbmem_size - wd_cbmem->buffer_offset, - car_get_var_ptr(&vboot_ctx)); + &vboot_ctx); } ROMSTAGE_CBMEM_INIT_HOOK(vboot_migrate_cbmem) #else diff --git a/src/security/vboot/misc.h b/src/security/vboot/misc.h index 812bbe7..8496aa4 100644 --- a/src/security/vboot/misc.h +++ b/src/security/vboot/misc.h @@ -17,7 +17,6 @@ #define __VBOOT_MISC_H__ #include <assert.h> -#include <arch/early_variables.h> #include <security/vboot/vboot_common.h> struct vb2_context; @@ -100,7 +99,7 @@ need to check a global to see if verfication has run. */ if (verification_should_run() || (verstage_should_load() && CONFIG(VBOOT_RETURN_FROM_VERSTAGE))) - return car_get_var(vboot_executed); + return vboot_executed; if (CONFIG(VBOOT_STARTS_IN_BOOTBLOCK)) { /* All other stages are "after the bootblock" */ diff --git a/src/security/vboot/vbnv.c b/src/security/vboot/vbnv.c index eccd743..b455ee2 100644 --- a/src/security/vboot/vbnv.c +++ b/src/security/vboot/vbnv.c @@ -13,32 +13,13 @@ * GNU General Public License for more details. */ -#include <arch/early_variables.h> #include <string.h> #include <types.h> #include <security/vboot/vbnv.h> #include <security/vboot/vbnv_layout.h> -static int vbnv_initialized CAR_GLOBAL; -static uint8_t vbnv[VBOOT_VBNV_BLOCK_SIZE] CAR_GLOBAL; - -/* Wrappers for accessing the variables marked as CAR_GLOBAL. */ -static inline int is_vbnv_initialized(void) -{ - return car_get_var(vbnv_initialized); -} - -static inline uint8_t *vbnv_data_addr(int index) -{ - uint8_t *vbnv_arr = car_get_var_ptr(vbnv); - - return &vbnv_arr[index]; -} - -static inline uint8_t vbnv_data(int index) -{ - return *vbnv_data_addr(index); -} +static int vbnv_initialized; +static uint8_t vbnv[VBOOT_VBNV_BLOCK_SIZE]; /* Return CRC-8 of the data, using x^8 + x^2 + x + 1 polynomial. */ static uint8_t crc8_vbnv(const uint8_t *data, int len) @@ -66,9 +47,9 @@ /* Read VBNV data into cache. */ static void vbnv_setup(void) { - if (!is_vbnv_initialized()) { - read_vbnv(vbnv_data_addr(0)); - car_set_var(vbnv_initialized, 1); + if (!vbnv_initialized) { + read_vbnv(&vbnv[0])); + vbnv_initialized = 1; } } @@ -117,7 +98,7 @@ save_vbnv_flash(vbnv_copy); /* Clear initialized flag to force cached data to be updated */ - car_set_var(vbnv_initialized, 0); + vbnv_initialized = 0; } /* Save a recovery reason into VBNV. */ @@ -137,14 +118,14 @@ int get_recovery_mode_from_vbnv(void) { vbnv_setup(); - return vbnv_data(RECOVERY_OFFSET); + return vbnv[RECOVERY_OFFSET]; } /* Read the USB Device Controller(UDC) enable flag from VBNV. */ int vbnv_udc_enable_flag(void) { vbnv_setup(); - return (vbnv_data(DEV_FLAGS_OFFSET) & DEV_ENABLE_UDC) ? 1 : 0; + return (vbnv[DEV_FLAGS_OFFSET] & DEV_ENABLE_UDC) ? 1 : 0; } void vbnv_init(uint8_t *vbnv_copy) diff --git a/src/security/vboot/vbnv_flash.c b/src/security/vboot/vbnv_flash.c index 908846f..5600ef6 100644 --- a/src/security/vboot/vbnv_flash.c +++ b/src/security/vboot/vbnv_flash.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <arch/early_variables.h> #include <commonlib/region.h> #include <console/console.h> #include <string.h> @@ -40,7 +39,7 @@ /* Cache of the current nvdata */ uint8_t cache[BLOB_SIZE]; }; -static struct vbnv_flash_ctx vbnv_flash CAR_GLOBAL; +static struct vbnv_flash_ctx vbnv_flash; /* * This code assumes that flash is erased to 1-bits, and write operations can @@ -59,8 +58,7 @@ static int init_vbnv(void) { - struct vbnv_flash_ctx *ctx = car_get_var_ptr(&vbnv_flash); - struct region_device *rdev = &ctx->vbnv_dev; + struct region_device *rdev = &vbnv_flash.vbnv_dev; uint8_t buf[BLOB_SIZE]; uint8_t empty_blob[BLOB_SIZE]; int used_below, empty_above; @@ -77,7 +75,7 @@ for (i = 0; i < BLOB_SIZE; i++) empty_blob[i] = erase_value(); - ctx->top_offset = region_device_sz(rdev) - BLOB_SIZE; + vbnv_flash.top_offset = region_device_sz(rdev) - BLOB_SIZE; /* Binary search for the border between used and empty */ used_below = 0; @@ -102,21 +100,20 @@ offset = used_below * BLOB_SIZE; /* reread the nvdata and write it to the cache */ - if (rdev_readat(rdev, ctx->cache, offset, BLOB_SIZE) < 0) { + if (rdev_readat(rdev, vbnv_flash.cache, offset, BLOB_SIZE) < 0) { printk(BIOS_ERR, "failed to read nvdata\n"); return 1; } - ctx->blob_offset = offset; - ctx->initialized = 1; + vbnv_flash.blob_offset = offset; + vbnv_flash.initialized = 1; return 0; } static int erase_nvram(void) { - struct vbnv_flash_ctx *ctx = car_get_var_ptr(&vbnv_flash); - const struct region_device *rdev = &ctx->vbnv_dev; + const struct region_device *rdev = &vbnv_flash.vbnv_dev; if (rdev_eraseat(rdev, 0, region_device_sz(rdev)) < 0) { printk(BIOS_ERR, "failed to erase nvram\n"); @@ -129,38 +126,35 @@ void read_vbnv_flash(uint8_t *vbnv_copy) { - struct vbnv_flash_ctx *ctx = car_get_var_ptr(&vbnv_flash); - - if (!ctx->initialized) + if (!vbnv_flash.initialized) if (init_vbnv()) return; /* error */ - memcpy(vbnv_copy, ctx->cache, BLOB_SIZE); + memcpy(vbnv_copy, vbnv_flash.cache, BLOB_SIZE); } void save_vbnv_flash(const uint8_t *vbnv_copy) { - struct vbnv_flash_ctx *ctx = car_get_var_ptr(&vbnv_flash); int new_offset; int i; - const struct region_device *rdev = &ctx->vbnv_dev; + const struct region_device *rdev = &vbnv_flash.vbnv_dev; - if (!ctx->initialized) + if (!vbnv_flash.initialized) if (init_vbnv()) return; /* error */ /* Bail out if there have been no changes. */ - if (!memcmp(vbnv_copy, ctx->cache, BLOB_SIZE)) + if (!memcmp(vbnv_copy, vbnv_flash.cache, BLOB_SIZE)) return; - new_offset = ctx->blob_offset; + new_offset = vbnv_flash.blob_offset; /* See if we can overwrite the current blob with the new one */ for (i = 0; i < BLOB_SIZE; i++) { - if (!can_overwrite(ctx->cache[i], vbnv_copy[i])) { + if (!can_overwrite(vbnv_flash.cache[i], vbnv_copy[i])) { /* unable to overwrite. need to use the next blob */ new_offset += BLOB_SIZE; - if (new_offset > ctx->top_offset) { + if (new_offset > vbnv_flash.top_offset) { if (erase_nvram()) return; /* error */ new_offset = 0; @@ -171,8 +165,8 @@ if (rdev_writeat(rdev, vbnv_copy, new_offset, BLOB_SIZE) == BLOB_SIZE) { /* write was successful. safely move pointer forward */ - ctx->blob_offset = new_offset; - memcpy(ctx->cache, vbnv_copy, BLOB_SIZE); + vbnv_flash.blob_offset = new_offset; + memcpy(vbnv_flash.cache, vbnv_copy, BLOB_SIZE); } else { printk(BIOS_ERR, "failed to save nvdata\n"); } diff --git a/src/security/vboot/vboot_loader.c b/src/security/vboot/vboot_loader.c index 2b7ba83..23b4d7a 100644 --- a/src/security/vboot/vboot_loader.c +++ b/src/security/vboot/vboot_loader.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <arch/early_variables.h> #include <cbfs.h> #include <console/console.h> #include <ec/google/chromeec/ec.h> @@ -33,14 +32,14 @@ CONFIG(VBOOT_SEPARATE_VERSTAGE), "return from verstage only makes sense for separate verstages"); -int vboot_executed CAR_GLOBAL; +int vboot_executed; void vboot_run_logic(void) { if (verification_should_run()) { /* Note: this path is not used for VBOOT_RETURN_FROM_VERSTAGE */ verstage_main(); - car_set_var(vboot_executed, 1); + vboot_executed = 1; } else if (verstage_should_load()) { struct cbfsf file; struct prog verstage = @@ -67,7 +66,7 @@ if (!CONFIG(VBOOT_RETURN_FROM_VERSTAGE)) return; - car_set_var(vboot_executed, 1); + vboot_executed = 1; } } -- To view, visit https://review.coreboot.org/c/coreboot/+/37028 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9dee03da028b9111b685e325368815a86e444a47 Gerrit-Change-Number: 37028 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

3 6

Change in coreboot[master]: sb/intel/spi: Drop CAR_GLOBAL_MIGRATION
by Arthur Heymans (Code Review) 29 Nov '19

29 Nov '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37027 ) Change subject: sb/intel/spi: Drop CAR_GLOBAL_MIGRATION ...................................................................... sb/intel/spi: Drop CAR_GLOBAL_MIGRATION Change-Id: I693cf494522c3bc1e1697a09be3e98fcb6db634d Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/southbridge/intel/common/spi.c 1 file changed, 90 insertions(+), 107 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/37027/1 diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index a84a0df..96322e42d 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -16,7 +16,6 @@ */ /* This file is derived from the flashrom project. */ -#include <arch/early_variables.h> #include <stdint.h> #include <stdlib.h> #include <string.h> @@ -110,7 +109,7 @@ uint8_t fpr_max; }; -static struct ich_spi_controller g_cntlr CAR_GLOBAL; +static struct ich_spi_controller g_cntlr; enum { SPIS_SCIP = 0x0001, @@ -255,14 +254,13 @@ static void ich_set_bbar(uint32_t minaddr) { - struct ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr); const uint32_t bbar_mask = 0x00ffff00; uint32_t ichspi_bbar; minaddr &= bbar_mask; - ichspi_bbar = readl_(cntlr->bbar) & ~bbar_mask; + ichspi_bbar = readl_(g_cntlr.bbar) & ~bbar_mask; ichspi_bbar |= minaddr; - writel_(ichspi_bbar, cntlr->bbar); + writel_(ichspi_bbar, g_cntlr.bbar); } #if CONFIG(SOUTHBRIDGE_INTEL_I82801GX) @@ -273,7 +271,6 @@ void spi_init(void) { - struct ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr); uint8_t *rcrb; /* Root Complex Register Block */ uint32_t rcba; /* Root Complex Base Address */ uint8_t bios_cntl; @@ -292,42 +289,42 @@ rcrb = (uint8_t *)(rcba & 0xffffc000); if (CONFIG(SOUTHBRIDGE_INTEL_I82801GX)) { ich7_spi = (struct ich7_spi_regs *)(rcrb + 0x3020); - cntlr->ich7_spi = ich7_spi; - cntlr->opmenu = ich7_spi->opmenu; - cntlr->menubytes = sizeof(ich7_spi->opmenu); - cntlr->optype = &ich7_spi->optype; - cntlr->addr = &ich7_spi->spia; - cntlr->data = (uint8_t *)ich7_spi->spid; - cntlr->databytes = sizeof(ich7_spi->spid); - cntlr->status = (uint8_t *)&ich7_spi->spis; - cntlr->control = &ich7_spi->spic; - cntlr->bbar = &ich7_spi->bbar; - cntlr->preop = &ich7_spi->preop; - cntlr->fpr = &ich7_spi->pbr[0]; - cntlr->fpr_max = 3; + g_cntlr.ich7_spi = ich7_spi; + g_cntlr.opmenu = ich7_spi->opmenu; + g_cntlr.menubytes = sizeof(ich7_spi->opmenu); + g_cntlr.optype = &ich7_spi->optype; + g_cntlr.addr = &ich7_spi->spia; + g_cntlr.data = (uint8_t *)ich7_spi->spid; + g_cntlr.databytes = sizeof(ich7_spi->spid); + g_cntlr.status = (uint8_t *)&ich7_spi->spis; + g_cntlr.control = &ich7_spi->spic; + g_cntlr.bbar = &ich7_spi->bbar; + g_cntlr.preop = &ich7_spi->preop; + g_cntlr.fpr = &ich7_spi->pbr[0]; + g_cntlr.fpr_max = 3; } else { ich9_spi = (struct ich9_spi_regs *)(rcrb + 0x3800); - cntlr->ich9_spi = ich9_spi; + g_cntlr.ich9_spi = ich9_spi; hsfs = readw_(&ich9_spi->hsfs); - cntlr->hsfs = hsfs; - cntlr->opmenu = ich9_spi->opmenu; - cntlr->menubytes = sizeof(ich9_spi->opmenu); - cntlr->optype = &ich9_spi->optype; - cntlr->addr = &ich9_spi->faddr; - cntlr->data = (uint8_t *)ich9_spi->fdata; - cntlr->databytes = sizeof(ich9_spi->fdata); - cntlr->status = &ich9_spi->ssfs; - cntlr->control = (uint16_t *)ich9_spi->ssfc; - cntlr->bbar = &ich9_spi->bbar; - cntlr->preop = &ich9_spi->preop; - cntlr->fpr = &ich9_spi->pr[0]; - cntlr->fpr_max = 5; + g_cntlr.hsfs = hsfs; + g_cntlr.opmenu = ich9_spi->opmenu; + g_cntlr.menubytes = sizeof(ich9_spi->opmenu); + g_cntlr.optype = &ich9_spi->optype; + g_cntlr.addr = &ich9_spi->faddr; + g_cntlr.data = (uint8_t *)ich9_spi->fdata; + g_cntlr.databytes = sizeof(ich9_spi->fdata); + g_cntlr.status = &ich9_spi->ssfs; + g_cntlr.control = (uint16_t *)ich9_spi->ssfc; + g_cntlr.bbar = &ich9_spi->bbar; + g_cntlr.preop = &ich9_spi->preop; + g_cntlr.fpr = &ich9_spi->pr[0]; + g_cntlr.fpr_max = 5; - if (cntlr->hsfs & HSFS_FDV) { + if (g_cntlr.hsfs & HSFS_FDV) { writel_(4, &ich9_spi->fdoc); - cntlr->flmap0 = readl_(&ich9_spi->fdod); + g_cntlr.flmap0 = readl_(&ich9_spi->fdod); writel_(0x1000, &ich9_spi->fdoc); - cntlr->flcomp = readl_(&ich9_spi->fdod); + g_cntlr.flcomp = readl_(&ich9_spi->fdod); } } @@ -344,9 +341,9 @@ { struct ich_spi_controller *cntlr = &g_cntlr; if (CONFIG(SOUTHBRIDGE_INTEL_I82801GX)) { - return !!(readw_(&cntlr->ich7_spi->spis) & HSFS_FLOCKDN); + return !!(readw_(&g_cntlr.ich7_spi->spis) & HSFS_FLOCKDN); } else { - return !!(readw_(&cntlr->ich9_spi->hsfs) & HSFS_FLOCKDN); + return !!(readw_(&g_cntlr.ich9_spi->hsfs) & HSFS_FLOCKDN); } } @@ -415,7 +412,6 @@ static int spi_setup_opcode(spi_transaction *trans) { - struct ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr); uint16_t optypes; uint8_t opmenu[MENU_BYTES]; @@ -423,10 +419,10 @@ spi_use_out(trans, 1); if (!spi_locked()) { /* The lock is off, so just use index 0. */ - writeb_(trans->opcode, cntlr->opmenu); - optypes = readw_(cntlr->optype); + writeb_(trans->opcode, g_cntlr.opmenu); + optypes = readw_(g_cntlr.optype); optypes = (optypes & 0xfffc) | (trans->type & 0x3); - writew_(optypes, cntlr->optype); + writew_(optypes, g_cntlr.optype); return 0; } @@ -438,7 +434,7 @@ if (trans->opcode == SPI_OPCODE_WREN) return 0; - read_reg(cntlr->opmenu, opmenu, sizeof(opmenu)); + read_reg(g_cntlr.opmenu, opmenu, sizeof(opmenu)); for (opcode_index = 0; opcode_index < ARRAY_SIZE(opmenu); opcode_index++) { if (opmenu[opcode_index] == trans->opcode) break; @@ -450,7 +446,7 @@ return -1; } - optypes = readw_(cntlr->optype); + optypes = readw_(g_cntlr.optype); optype = (optypes >> (opcode_index * 2)) & 0x3; if (trans->type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS && optype == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS && @@ -495,15 +491,14 @@ */ static int ich_status_poll(u16 bitmask, int wait_til_set) { - struct ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr); int timeout = 600000; /* This will result in 6 seconds */ u16 status = 0; while (timeout--) { - status = readw_(cntlr->status); + status = readw_(g_cntlr.status); if (wait_til_set ^ ((status & bitmask) == 0)) { if (wait_til_set) - writew_((status & bitmask), cntlr->status); + writew_((status & bitmask), g_cntlr.status); return status; } udelay(10); @@ -516,16 +511,14 @@ static int spi_is_multichip(void) { - struct ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr); - if (!(cntlr->hsfs & HSFS_FDV)) + if (!(g_cntlr.hsfs & HSFS_FDV)) return 0; - return !!((cntlr->flmap0 >> 8) & 3); + return !!((g_cntlr.flmap0 >> 8) & 3); } static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout, size_t bytesout, void *din, size_t bytesin) { - struct ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr); uint16_t control; int16_t opcode_index; int with_address; @@ -551,7 +544,7 @@ if (ich_status_poll(SPIS_SCIP, 0) == -1) return -1; - writew_(SPIS_CDS | SPIS_FCERR, cntlr->status); + writew_(SPIS_CDS | SPIS_FCERR, g_cntlr.status); spi_setup_type(&trans); if ((opcode_index = spi_setup_opcode(&trans)) < 0) @@ -566,7 +559,7 @@ * issuing a transaction between WREN and DATA. */ if (!spi_locked()) - writew_(trans.opcode, cntlr->preop); + writew_(trans.opcode, g_cntlr.preop); return 0; } @@ -574,13 +567,13 @@ control = SPIC_SCGO | ((opcode_index & 0x07) << 4); /* Issue atomic preop cycle if needed */ - if (readw_(cntlr->preop)) + if (readw_(g_cntlr.preop)) control |= SPIC_ACS; if (!trans.bytesout && !trans.bytesin) { /* SPI addresses are 24 bit only */ if (with_address) - writel_(trans.offset & 0x00FFFFFF, cntlr->addr); + writel_(trans.offset & 0x00FFFFFF, g_cntlr.addr); /* * This is a 'no data' command (like Write Enable), its @@ -588,7 +581,7 @@ * spi_setup_opcode() above. Tell the chip to send the * command. */ - writew_(control, cntlr->control); + writew_(control, g_cntlr.control); /* wait for the result */ status = ich_status_poll(SPIS_CDS | SPIS_FCERR, 1); @@ -610,7 +603,7 @@ * and followed by other SPI commands, and this sequence is controlled * by the SPI chip driver. */ - if (trans.bytesout > cntlr->databytes) { + if (trans.bytesout > g_cntlr.databytes) { printk(BIOS_DEBUG, "ICH SPI: Too much to write. Does your SPI chip driver use" " spi_crop_chunk()?\n"); return -1; @@ -624,28 +617,28 @@ uint32_t data_length; /* SPI addresses are 24 bit only */ - writel_(trans.offset & 0x00FFFFFF, cntlr->addr); + writel_(trans.offset & 0x00FFFFFF, g_cntlr.addr); if (trans.bytesout) - data_length = min(trans.bytesout, cntlr->databytes); + data_length = min(trans.bytesout, g_cntlr.databytes); else - data_length = min(trans.bytesin, cntlr->databytes); + data_length = min(trans.bytesin, g_cntlr.databytes); /* Program data into FDATA0 to N */ if (trans.bytesout) { - write_reg(trans.out, cntlr->data, data_length); + write_reg(trans.out, g_cntlr.data, data_length); spi_use_out(&trans, data_length); if (with_address) trans.offset += data_length; } /* Add proper control fields' values */ - control &= ~((cntlr->databytes - 1) << 8); + control &= ~((g_cntlr.databytes - 1) << 8); control |= SPIC_DS; control |= (data_length - 1) << 8; /* write it */ - writew_(control, cntlr->control); + writew_(control, g_cntlr.control); /* Wait for Cycle Done Status or Flash Cycle Error. */ status = ich_status_poll(SPIS_CDS | SPIS_FCERR, 1); @@ -658,7 +651,7 @@ } if (trans.bytesin) { - read_reg(cntlr->data, trans.in, data_length); + read_reg(g_cntlr.data, trans.in, data_length); spi_use_in(&trans, data_length); if (with_address) trans.offset += data_length; @@ -667,7 +660,7 @@ spi_xfer_exit: /* Clear atomic preop now that xfer is done */ - writew_(0, cntlr->preop); + writew_(0, g_cntlr.preop); return 0; } @@ -675,10 +668,9 @@ /* Sets FLA in FADDR to (addr & 0x01FFFFFF) without touching other bits. */ static void ich_hwseq_set_addr(uint32_t addr) { - struct ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr); - uint32_t addr_old = readl_(&cntlr->ich9_spi->faddr) & ~0x01FFFFFF; + uint32_t addr_old = readl_(&g_cntlr.ich9_spi->faddr) & ~0x01FFFFFF; - writel_((addr & 0x01FFFFFF) | addr_old, &cntlr->ich9_spi->faddr); + writel_((addr & 0x01FFFFFF) | addr_old, &g_cntlr.ich9_spi->faddr); } /* Polls for Cycle Done Status, Flash Cycle Error or timeout in 8 us intervals. @@ -688,22 +680,21 @@ static int ich_hwseq_wait_for_cycle_complete(unsigned int timeout, unsigned int len) { - struct ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr); uint16_t hsfs; uint32_t addr; timeout /= 8; /* scale timeout duration to counter */ - while ((((hsfs = readw_(&cntlr->ich9_spi->hsfs)) & + while ((((hsfs = readw_(&g_cntlr.ich9_spi->hsfs)) & (HSFS_FDONE | HSFS_FCERR)) == 0) && --timeout) { udelay(8); } - writew_(readw_(&cntlr->ich9_spi->hsfs), &cntlr->ich9_spi->hsfs); + writew_(readw_(&g_cntlr.ich9_spi->hsfs), &g_cntlr.ich9_spi->hsfs); if (!timeout) { uint16_t hsfc; - addr = readl_(&cntlr->ich9_spi->faddr) & 0x01FFFFFF; - hsfc = readw_(&cntlr->ich9_spi->hsfc); + addr = readl_(&g_cntlr.ich9_spi->faddr) & 0x01FFFFFF; + hsfc = readw_(&g_cntlr.ich9_spi->hsfc); printk(BIOS_ERR, "Transaction timeout between offset 0x%08x and " "0x%08x (= 0x%08x + %d) HSFC=%x HSFS=%x!\n", addr, addr + len - 1, addr, len - 1, @@ -713,8 +704,8 @@ if (hsfs & HSFS_FCERR) { uint16_t hsfc; - addr = readl_(&cntlr->ich9_spi->faddr) & 0x01FFFFFF; - hsfc = readw_(&cntlr->ich9_spi->hsfc); + addr = readl_(&g_cntlr.ich9_spi->faddr) & 0x01FFFFFF; + hsfc = readw_(&g_cntlr.ich9_spi->hsfc); printk(BIOS_ERR, "Transaction error between offset 0x%08x and " "0x%08x (= 0x%08x + %d) HSFC=%x HSFS=%x!\n", addr, addr + len - 1, addr, len - 1, @@ -728,7 +719,6 @@ static int ich_hwseq_erase(const struct spi_flash *flash, u32 offset, size_t len) { - struct ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr); u32 start, end, erase_size; int ret; uint16_t hsfc; @@ -751,17 +741,17 @@ while (offset < end) { /* make sure FDONE, FCERR, AEL are cleared by writing 1 to them */ - writew_(readw_(&cntlr->ich9_spi->hsfs), &cntlr->ich9_spi->hsfs); + writew_(readw_(&g_cntlr.ich9_spi->hsfs), &g_cntlr.ich9_spi->hsfs); ich_hwseq_set_addr(offset); offset += erase_size; - hsfc = readw_(&cntlr->ich9_spi->hsfc); + hsfc = readw_(&g_cntlr.ich9_spi->hsfc); hsfc &= ~HSFC_FCYCLE; /* clear operation */ hsfc |= (0x3 << HSFC_FCYCLE_OFF); /* set erase operation */ hsfc |= HSFC_FGO; /* start */ - writew_(hsfc, &cntlr->ich9_spi->hsfc); + writew_(hsfc, &g_cntlr.ich9_spi->hsfc); if (ich_hwseq_wait_for_cycle_complete(timeout, len)) { printk(BIOS_ERR, "SF: Erase failed at %x\n", offset - erase_size); ret = -1; @@ -778,13 +768,12 @@ static void ich_read_data(uint8_t *data, int len) { - struct ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr); int i; uint32_t temp32 = 0; for (i = 0; i < len; i++) { if ((i % 4) == 0) - temp32 = readl_(cntlr->data + i); + temp32 = readl_(g_cntlr.data + i); data[i] = (temp32 >> ((i % 4) * 8)) & 0xff; } @@ -793,7 +782,6 @@ static int ich_hwseq_read(const struct spi_flash *flash, u32 addr, size_t len, void *buf) { - struct ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr); uint16_t hsfc; uint16_t timeout = 100 * 60; uint8_t block_len; @@ -807,20 +795,20 @@ } /* clear FDONE, FCERR, AEL by writing 1 to them (if they are set) */ - writew_(readw_(&cntlr->ich9_spi->hsfs), &cntlr->ich9_spi->hsfs); + writew_(readw_(&g_cntlr.ich9_spi->hsfs), &g_cntlr.ich9_spi->hsfs); while (len > 0) { - block_len = min(len, cntlr->databytes); + block_len = min(len, g_cntlr.databytes); if (block_len > (~addr & 0xff)) block_len = (~addr & 0xff) + 1; ich_hwseq_set_addr(addr); - hsfc = readw_(&cntlr->ich9_spi->hsfc); + hsfc = readw_(&g_cntlr.ich9_spi->hsfc); hsfc &= ~HSFC_FCYCLE; /* set read operation */ hsfc &= ~HSFC_FDBC; /* clear byte count */ /* set byte count */ hsfc |= (((block_len - 1) << HSFC_FDBC_OFF) & HSFC_FDBC); hsfc |= HSFC_FGO; /* start */ - writew_(hsfc, &cntlr->ich9_spi->hsfc); + writew_(hsfc, &g_cntlr.ich9_spi->hsfc); if (ich_hwseq_wait_for_cycle_complete(timeout, block_len)) return 1; @@ -839,7 +827,6 @@ */ static void ich_fill_data(const uint8_t *data, int len) { - struct ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr); uint32_t temp32 = 0; int i; @@ -853,17 +840,16 @@ temp32 |= ((uint32_t) data[i]) << ((i % 4) * 8); if ((i % 4) == 3) /* 32 bits are full, write them to regs. */ - writel_(temp32, cntlr->data + (i - (i % 4))); + writel_(temp32, g_cntlr.data + (i - (i % 4))); } i--; if ((i % 4) != 3) /* Write remaining data to regs. */ - writel_(temp32, cntlr->data + (i - (i % 4))); + writel_(temp32, g_cntlr.data + (i - (i % 4))); } static int ich_hwseq_write(const struct spi_flash *flash, u32 addr, size_t len, const void *buf) { - struct ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr); uint16_t hsfc; uint16_t timeout = 100 * 60; uint8_t block_len; @@ -877,24 +863,24 @@ } /* clear FDONE, FCERR, AEL by writing 1 to them (if they are set) */ - writew_(readw_(&cntlr->ich9_spi->hsfs), &cntlr->ich9_spi->hsfs); + writew_(readw_(&g_cntlr.ich9_spi->hsfs), &g_cntlr.ich9_spi->hsfs); while (len > 0) { - block_len = min(len, cntlr->databytes); + block_len = min(len, g_cntlr.databytes); if (block_len > (~addr & 0xff)) block_len = (~addr & 0xff) + 1; ich_hwseq_set_addr(addr); ich_fill_data(buf, block_len); - hsfc = readw_(&cntlr->ich9_spi->hsfc); + hsfc = readw_(&g_cntlr.ich9_spi->hsfc); hsfc &= ~HSFC_FCYCLE; /* clear operation */ hsfc |= (0x2 << HSFC_FCYCLE_OFF); /* set write operation */ hsfc &= ~HSFC_FDBC; /* clear byte count */ /* set byte count */ hsfc |= (((block_len - 1) << HSFC_FDBC_OFF) & HSFC_FDBC); hsfc |= HSFC_FGO; /* start */ - writew_(hsfc, &cntlr->ich9_spi->hsfc); + writew_(hsfc, &g_cntlr.ich9_spi->hsfc); if (ich_hwseq_wait_for_cycle_complete(timeout, block_len)) { printk(BIOS_ERR, "SF: write failure at %x\n", @@ -919,7 +905,6 @@ static int spi_flash_programmer_probe(const struct spi_slave *spi, struct spi_flash *flash) { - struct ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr); if (CONFIG(SOUTHBRIDGE_INTEL_I82801GX)) return spi_flash_generic_probe(spi, flash); @@ -932,7 +917,7 @@ flash->name = "Opaque HW-sequencing"; ich_hwseq_set_addr(0); - switch ((cntlr->hsfs >> 3) & 3) { + switch ((g_cntlr.hsfs >> 3) & 3) { case 0: flash->sector_size = 256; break; @@ -947,12 +932,12 @@ break; } - flash->size = 1 << (19 + (cntlr->flcomp & 7)); + flash->size = 1 << (19 + (g_cntlr.flcomp & 7)); flash->ops = &spi_flash_ops; - if ((cntlr->hsfs & HSFS_FDV) && ((cntlr->flmap0 >> 8) & 3)) - flash->size += 1 << (19 + ((cntlr->flcomp >> 3) & 7)); + if ((g_cntlr.hsfs & HSFS_FDV) && ((g_cntlr.flmap0 >> 8) & 3)) + flash->size += 1 << (19 + ((g_cntlr.flcomp >> 3) & 7)); printk(BIOS_DEBUG, "flash size 0x%x bytes\n", flash->size); return 0; @@ -999,7 +984,6 @@ const struct region *region, const enum ctrlr_prot_type type) { - struct ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr); u32 start = region_offset(region); u32 end = start + region_sz(region) - 1; u32 reg; @@ -1007,16 +991,16 @@ int fpr; uint32_t *fpr_base; - fpr_base = cntlr->fpr; + fpr_base = g_cntlr.fpr; /* Find first empty FPR */ - for (fpr = 0; fpr < cntlr->fpr_max; fpr++) { + for (fpr = 0; fpr < g_cntlr.fpr_max; fpr++) { reg = read32(&fpr_base[fpr]); if (reg == 0) break; } - if (fpr == cntlr->fpr_max) { + if (fpr == g_cntlr.fpr_max) { printk(BIOS_ERR, "ERROR: No SPI FPR free!\n"); return -1; } @@ -1057,7 +1041,6 @@ void spi_finalize_ops(void) { - struct ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr); u16 spi_opprefix; u16 optype = 0; struct intel_swseq_spi_config spi_config_default = { @@ -1106,12 +1089,12 @@ spi_opprefix = spi_config->opprefixes[0] | (spi_config->opprefixes[1] << 8); - writew_(spi_opprefix, cntlr->preop); + writew_(spi_opprefix, g_cntlr.preop); for (i = 0; i < ARRAY_SIZE(spi_config->ops); i++) { optype |= (spi_config->ops[i].type & 3) << (i * 2); - writeb_(spi_config->ops[i].op, &cntlr->opmenu[i]); + writeb_(spi_config->ops[i].op, &g_cntlr.opmenu[i]); } - writew_(optype, cntlr->optype); + writew_(optype, g_cntlr.optype); } __weak void intel_southbridge_override_spi(struct intel_swseq_spi_config *spi_config) -- To view, visit https://review.coreboot.org/c/coreboot/+/37027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I693cf494522c3bc1e1697a09be3e98fcb6db634d Gerrit-Change-Number: 37027 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

3 6

Change in coreboot[master]: vendorcode/siemens/hwilib: Fix current file string usage
by Arthur Heymans (Code Review) 29 Nov '19

29 Nov '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37077 ) Change subject: vendorcode/siemens/hwilib: Fix current file string usage ...................................................................... vendorcode/siemens/hwilib: Fix current file string usage The CAR_GLOBAL accessors likely hid a bug where strncmp/cpy was passed a pointer to a char array instead of the char array. Change-Id: I68788e47ef27a959d6e048e9385afcfb663cdebc Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/vendorcode/siemens/hwilib/hwilib.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/37077/1 diff --git a/src/vendorcode/siemens/hwilib/hwilib.c b/src/vendorcode/siemens/hwilib/hwilib.c index 35fb4ce..a4b8e54 100644 --- a/src/vendorcode/siemens/hwilib/hwilib.c +++ b/src/vendorcode/siemens/hwilib/hwilib.c @@ -476,7 +476,7 @@ return CB_ERR_ARG; /* Check if this file is already open. If yes, just leave as there is nothing left to do here. */ - if (!strncmp((char *)&current_hwi, hwi_filename, HWI_MAX_NAME_LEN)) { + if (!strncmp(current_hwi, hwi_filename, HWI_MAX_NAME_LEN)) { printk(BIOS_SPEW, "HWILIB: File \"%s\" already open.\n", hwi_filename); return CB_SUCCESS; @@ -543,7 +543,7 @@ if (all_blocks[BLK_HIB] || all_blocks[BLK_SIB] || all_blocks[BLK_EIB] || all_blocks[BLK_XIB]) { /* Save currently opened hwi filename. */ - strncpy((char *)&current_hwi, hwi_filename, HWI_MAX_NAME_LEN); + strncpy(current_hwi, hwi_filename, HWI_MAX_NAME_LEN); return CB_SUCCESS; } else -- To view, visit https://review.coreboot.org/c/coreboot/+/37077 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I68788e47ef27a959d6e048e9385afcfb663cdebc Gerrit-Change-Number: 37077 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: vendorcode/siemens/hwilib: Drop CAR_GLOBAL_MIGRATION
by Arthur Heymans (Code Review) 29 Nov '19

29 Nov '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37026 ) Change subject: vendorcode/siemens/hwilib: Drop CAR_GLOBAL_MIGRATION ...................................................................... vendorcode/siemens/hwilib: Drop CAR_GLOBAL_MIGRATION Change-Id: Icf44fee8f7f538df6c34dfbd98b852954d146896 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/vendorcode/siemens/hwilib/hwilib.c 1 file changed, 20 insertions(+), 27 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/37026/1 diff --git a/src/vendorcode/siemens/hwilib/hwilib.c b/src/vendorcode/siemens/hwilib/hwilib.c index a4d87ad..1b451d1 100644 --- a/src/vendorcode/siemens/hwilib/hwilib.c +++ b/src/vendorcode/siemens/hwilib/hwilib.c @@ -17,7 +17,6 @@ #include <string.h> #include <console/console.h> #include <device/mmio.h> -#include <arch/early_variables.h> #include <types.h> #include "hwilib.h" @@ -74,15 +73,15 @@ /* Storage for pointers to the different blocks. The contents will be filled * in hwilib_find_blocks(). */ -static uint8_t *all_blocks[MAX_BLOCK_NUM] CAR_GLOBAL; +static uint8_t *all_blocks[MAX_BLOCK_NUM]; /* As the length of extended block is variable, save all length to a global * variable so that they can be used later to check boundaries. */ -static uint16_t all_blk_size[MAX_BLOCK_NUM] CAR_GLOBAL; +static uint16_t all_blk_size[MAX_BLOCK_NUM]; /* Storage for the cbfs file name of the currently open hwi file. */ -static char current_hwi[HWI_MAX_NAME_LEN] CAR_GLOBAL; +static char current_hwi[HWI_MAX_NAME_LEN]; static uint32_t hwilib_read_bytes (const struct param_info *param, uint8_t *dst, @@ -405,16 +404,14 @@ uint32_t maxlen) { uint8_t i = 0, *blk = NULL; - uint8_t **blk_ptr = car_get_var_ptr(&all_blocks[0]); - uint16_t *all_blk_size_ptr = car_get_var_ptr(&all_blk_size[0]); if (!param || !dst) return 0; /* Take the first valid block to get the parameter from */ do { if ((param->pos[i].len) && (param->pos[i].offset) && - (blk_ptr[param->pos[i].blk_type])) { - blk = blk_ptr[param->pos[i].blk_type]; + (all_blocks[param->pos[i].blk_type])) { + blk = all_blocks[param->pos[i].blk_type]; break; } i++; @@ -425,7 +422,7 @@ */ if ((!blk) || (param->pos[i].len > maxlen) || (param->pos[i].len + param->pos[i].offset > - all_blk_size_ptr[param->pos[i].blk_type])) + all_blk_size[param->pos[i].blk_type])) return 0; /* We can now copy the wanted data. */ memcpy(dst, (blk + param->pos[i].offset), param->pos[i].len); @@ -472,9 +469,6 @@ { uint8_t *ptr = NULL, *base = NULL; uint32_t next_offset = 1; - uint8_t **blk_ptr = car_get_var_ptr(&all_blocks[0]); - uint16_t *all_blk_size_ptr = car_get_var_ptr(&all_blk_size[0]); - char *curr_hwi_name_ptr = car_get_var_ptr(&current_hwi); size_t filesize = 0; /* Check for a valid parameter */ @@ -482,8 +476,7 @@ return CB_ERR_ARG; /* Check if this file is already open. If yes, just leave as there is nothing left to do here. */ - if (curr_hwi_name_ptr && - !strncmp(curr_hwi_name_ptr, hwi_filename, HWI_MAX_NAME_LEN)) { + if (!strncmp(&current_hwi, hwi_filename, HWI_MAX_NAME_LEN)) { printk(BIOS_SPEW, "HWILIB: File \"%s\" already open.\n", hwi_filename); return CB_SUCCESS; @@ -504,15 +497,15 @@ * in prior calls to this function. * This way the caller do not need to "close" already opened blocks. */ - memset(blk_ptr, 0, (MAX_BLOCK_NUM * sizeof (uint8_t *))); + memset(all_blocks, 0, (MAX_BLOCK_NUM * sizeof (uint8_t *))); /* Check which blocks are available by examining the length field. */ base = ptr; /* Fill in sizes of all fixed length blocks. */ - all_blk_size_ptr[BLK_HIB] = LEN_HIB; - all_blk_size_ptr[BLK_SIB] = LEN_SIB; - all_blk_size_ptr[BLK_EIB] = LEN_EIB; + all_blk_size[BLK_HIB] = LEN_HIB; + all_blk_size[BLK_SIB] = LEN_SIB; + all_blk_size[BLK_EIB] = LEN_EIB; /* Length of BLK_XIB is variable and will be filled if block is found */ - all_blk_size_ptr[BLK_XIB] = 0; + all_blk_size[BLK_XIB] = 0; while(!(strncmp((char *)ptr, BLOCK_MAGIC, LEN_MAGIC_NUM)) && next_offset) { uint16_t len = read16(ptr + LEN_OFFSET); @@ -520,26 +513,26 @@ if ((ptr - base + len) > filesize) break; if (len == LEN_HIB) { - blk_ptr[BLK_HIB] = ptr; + all_blocks[BLK_HIB] = ptr; next_offset = read32(ptr + NEXT_OFFSET_HIB); if (next_offset) ptr = base + next_offset; } else if (len == LEN_SIB) { - blk_ptr[BLK_SIB] = ptr; + all_blocks[BLK_SIB] = ptr; next_offset = read32(ptr + NEXT_OFFSET_SIB); if (next_offset) ptr = base + next_offset; } else if (len == LEN_EIB) { /* Skip preliminary blocks */ if (!(read16(ptr + EIB_FEATRUE_OFFSET) & 0x01)) - blk_ptr[BLK_EIB] = ptr; + all_blocks[BLK_EIB] = ptr; next_offset = read32(ptr + NEXT_OFFSET_EIB); if (next_offset) ptr = base + next_offset; } else if (len >= MIN_LEN_XIB) { - blk_ptr[BLK_XIB] = ptr; + all_blocks[BLK_XIB] = ptr; next_offset = read32(ptr + NEXT_OFFSET_XIB); - all_blk_size_ptr[BLK_XIB] = len; + all_blk_size[BLK_XIB] = len; if (next_offset) ptr = base + next_offset; } else { @@ -547,10 +540,10 @@ } } /* We should have found at least one valid block */ - if (blk_ptr[BLK_HIB] || blk_ptr[BLK_SIB] || blk_ptr[BLK_EIB] || - blk_ptr[BLK_XIB]) { + if (all_blocks[BLK_HIB] || all_blocks[BLK_SIB] || all_blocks[BLK_EIB] || + all_blocks[BLK_XIB]) { /* Save currently opened hwi filename. */ - strncpy(curr_hwi_name_ptr, hwi_filename, HWI_MAX_NAME_LEN); + strncpy(&current_hwi, hwi_filename, HWI_MAX_NAME_LEN); return CB_SUCCESS; } else -- To view, visit https://review.coreboot.org/c/coreboot/+/37026 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icf44fee8f7f538df6c34dfbd98b852954d146896 Gerrit-Change-Number: 37026 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: coreboot: google/grunt: add G2 TS support
by Kevin Chiu (Code Review) 29 Nov '19

29 Nov '19

Kevin Chiu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37318 ) Change subject: coreboot: google/grunt: add G2 TS support ...................................................................... coreboot: google/grunt: add G2 TS support Add G2 GTCH7503 HID TS support BUG=b:141577276 BRANCH=master TEST=emerge-grunt coreboot Change-Id: I91e4f2b934b64b14bca20108037b721288d40942 Signed-off-by: Kevin Chiu <Kevin.Chiu(a)quantatw.com> --- M src/mainboard/google/kahlee/variants/careena/devicetree.cb 1 file changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/37318/1 diff --git a/src/mainboard/google/kahlee/variants/careena/devicetree.cb b/src/mainboard/google/kahlee/variants/careena/devicetree.cb index 635b237..3387b6f 100644 --- a/src/mainboard/google/kahlee/variants/careena/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/careena/devicetree.cb @@ -167,5 +167,19 @@ register "has_power_resource" = "1" device i2c 10 on end end + chip drivers/i2c/hid + register "generic.hid" = ""GTCH7503"" + register "generic.desc" = ""G2TOUCH Touchscreen"" + register "generic.probed" = "1" + register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" + register "generic.reset_delay_ms" = "50" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" + register "generic.enable_delay_ms" = "1" + register "generic.has_power_resource" = "1" + register "generic.disable_gpio_export_in_crs" = "1" + register "hid_desc_reg_offset" = "0x01" + device i2c 40 on end + end end end #chip soc/amd/stoneyridge -- To view, visit https://review.coreboot.org/c/coreboot/+/37318 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I91e4f2b934b64b14bca20108037b721288d40942 Gerrit-Change-Number: 37318 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: scpu/amd/{agesa,pi}/Kconfig: select SSE2
by Michał Żygowski (Code Review) 29 Nov '19

29 Nov '19

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37292 ) Change subject: scpu/amd/{agesa,pi}/Kconfig: select SSE2 ...................................................................... scpu/amd/{agesa,pi}/Kconfig: select SSE2 SSE2 instructions are supported by family14 and newer. SSE will be automatically enabled in bootblock_crt0 for platforms that migrate to C bootblock. Because of that family specific CAR setup may avoid additional code. TEST=boot PC Engines apu1 and apu2 Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I19f1793112439f0c706ebb066f9807364ad8c5a7 --- M src/cpu/amd/agesa/Kconfig M src/cpu/amd/pi/Kconfig 2 files changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/37292/1 diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig index ddfe707..9956579 100644 --- a/src/cpu/amd/agesa/Kconfig +++ b/src/cpu/amd/agesa/Kconfig @@ -29,6 +29,7 @@ select CBMEM_STAGE_CACHE if HAVE_ACPI_RESUME select SMM_ASEG select NO_FIXED_XIP_ROM_SIZE + select SSE2 if CPU_AMD_AGESA diff --git a/src/cpu/amd/pi/Kconfig b/src/cpu/amd/pi/Kconfig index d18f873..728c7b1 100644 --- a/src/cpu/amd/pi/Kconfig +++ b/src/cpu/amd/pi/Kconfig @@ -28,6 +28,7 @@ select SPI_FLASH if HAVE_ACPI_RESUME select SMM_ASEG select NO_FIXED_XIP_ROM_SIZE + select SSE2 if CPU_AMD_PI -- To view, visit https://review.coreboot.org/c/coreboot/+/37292 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19f1793112439f0c706ebb066f9807364ad8c5a7 Gerrit-Change-Number: 37292 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-MessageType: newchange

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coreboot-gerrit November 2019