coreboot-gerrit November 2019

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Change in ...coreboot[master]: mainboard/elmex: remove stdlib.h when unused
by HAOUAS Elyes (Code Review) 28 Nov '19

28 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33905 Change subject: mainboard/elmex: remove stdlib.h when unused ...................................................................... mainboard/elmex: remove stdlib.h when unused Change-Id: I299244a80051011aa4a9f3147c2619d4837ac86b Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/elmex/pcm205400/BiosCallOuts.c M src/mainboard/elmex/pcm205400/buildOpts.c 2 files changed, 0 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/33905/1 diff --git a/src/mainboard/elmex/pcm205400/BiosCallOuts.c b/src/mainboard/elmex/pcm205400/BiosCallOuts.c index 6e2eaed..ee0b4f2 100644 --- a/src/mainboard/elmex/pcm205400/BiosCallOuts.c +++ b/src/mainboard/elmex/pcm205400/BiosCallOuts.c @@ -17,7 +17,6 @@ #include <amdlib.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <SB800.h> -#include <stdlib.h> static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr); static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr); diff --git a/src/mainboard/elmex/pcm205400/buildOpts.c b/src/mainboard/elmex/pcm205400/buildOpts.c index 863a552..40c4fe1 100644 --- a/src/mainboard/elmex/pcm205400/buildOpts.c +++ b/src/mainboard/elmex/pcm205400/buildOpts.c @@ -25,9 +25,6 @@ * */ -#include <stdlib.h> - - /* Select the cpu family. */ #define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE -- To view, visit https://review.coreboot.org/c/coreboot/+/33905 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I299244a80051011aa4a9f3147c2619d4837ac86b Gerrit-Change-Number: 33905 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mainboard/pcengines: remove stdlib.h when unused
by HAOUAS Elyes (Code Review) 28 Nov '19

28 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33900 Change subject: mainboard/pcengines: remove stdlib.h when unused ...................................................................... mainboard/pcengines: remove stdlib.h when unused Change-Id: Ib63199cdeca0060cd7db22a504fefa284fb1241b Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/pcengines/apu1/BiosCallOuts.c M src/mainboard/pcengines/apu1/buildOpts.c M src/mainboard/pcengines/apu2/BiosCallOuts.c 3 files changed, 0 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/33900/1 diff --git a/src/mainboard/pcengines/apu1/BiosCallOuts.c b/src/mainboard/pcengines/apu1/BiosCallOuts.c index df5f037..8408112 100644 --- a/src/mainboard/pcengines/apu1/BiosCallOuts.c +++ b/src/mainboard/pcengines/apu1/BiosCallOuts.c @@ -18,7 +18,6 @@ #include <spd_bin.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <SB800.h> -#include <stdlib.h> #include "gpio_ftns.h" diff --git a/src/mainboard/pcengines/apu1/buildOpts.c b/src/mainboard/pcengines/apu1/buildOpts.c index 1f73eee..60ce0bb 100644 --- a/src/mainboard/pcengines/apu1/buildOpts.c +++ b/src/mainboard/pcengines/apu1/buildOpts.c @@ -25,9 +25,6 @@ * */ -#include <stdlib.h> - - /* Select the CPU family. */ #define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE diff --git a/src/mainboard/pcengines/apu2/BiosCallOuts.c b/src/mainboard/pcengines/apu2/BiosCallOuts.c index edacb22..13320f1 100644 --- a/src/mainboard/pcengines/apu2/BiosCallOuts.c +++ b/src/mainboard/pcengines/apu2/BiosCallOuts.c @@ -18,7 +18,6 @@ #include <spd_bin.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <FchPlatform.h> -#include <stdlib.h> #include "gpio_ftns.h" #include "imc.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/33900 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib63199cdeca0060cd7db22a504fefa284fb1241b Gerrit-Change-Number: 33900 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mainboard/bap: remove stdlib.h when unused
by HAOUAS Elyes (Code Review) 28 Nov '19

28 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33899 Change subject: mainboard/bap: remove stdlib.h when unused ...................................................................... mainboard/bap: remove stdlib.h when unused Change-Id: If31fc34a612cfb3d869c92a7c7dc60d00cef6472 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/bap/ode_e20XX/BiosCallOuts.c M src/mainboard/bap/ode_e20XX/buildOpts.c M src/mainboard/bap/ode_e21XX/BiosCallOuts.c 3 files changed, 0 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/33899/1 diff --git a/src/mainboard/bap/ode_e20XX/BiosCallOuts.c b/src/mainboard/bap/ode_e20XX/BiosCallOuts.c index 4f5ab88..9883ae6 100644 --- a/src/mainboard/bap/ode_e20XX/BiosCallOuts.c +++ b/src/mainboard/bap/ode_e20XX/BiosCallOuts.c @@ -18,7 +18,6 @@ #include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/agesa/state_machine.h> #include <FchPlatform.h> -#include <stdlib.h> #include <spd_bin.h> #include "imc.h" diff --git a/src/mainboard/bap/ode_e20XX/buildOpts.c b/src/mainboard/bap/ode_e20XX/buildOpts.c index 6c405cc..daf13b6 100644 --- a/src/mainboard/bap/ode_e20XX/buildOpts.c +++ b/src/mainboard/bap/ode_e20XX/buildOpts.c @@ -25,7 +25,6 @@ * */ -#include <stdlib.h> #include <AGESA.h> #define INSTALL_FT3_SOCKET_SUPPORT TRUE diff --git a/src/mainboard/bap/ode_e21XX/BiosCallOuts.c b/src/mainboard/bap/ode_e21XX/BiosCallOuts.c index 6458b97..2e38028 100644 --- a/src/mainboard/bap/ode_e21XX/BiosCallOuts.c +++ b/src/mainboard/bap/ode_e21XX/BiosCallOuts.c @@ -17,7 +17,6 @@ #include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <FchPlatform.h> -#include <stdlib.h> #include <spd_bin.h> #include "imc.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/33899 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If31fc34a612cfb3d869c92a7c7dc60d00cef6472 Gerrit-Change-Number: 33899 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: include: introduce update* for mmio operations
by Michael Niewöhner (Code Review) 28 Nov '19

28 Nov '19

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36596 ) Change subject: include: introduce update* for mmio operations ...................................................................... Patch Set 5: > Patch Set 5: > > Some of this discussion was split out into CB:35463, let's try to move it back here. Basically, it seems there's agreement that we shouldn't have different APIs for the same thing but we also want something that's not endian-specific, which clrsetbits_le32() currently is. > > So to move forward, would anyone object if I: > > 1. remove this file again (doesn't seem like any code is using this yet), > 2. add a new clrsetbits32() (and variants) API for this instead, and > 3. change all existing instances of clrsetbits_le32() that don't clearly need the endian-specificness to clrsetbits32()? ACK from me; I wasn't aware of them. Nico what do you say? -- To view, visit https://review.coreboot.org/c/coreboot/+/36596 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f188d586c09ee9f1e17290563f68970603204fb Gerrit-Change-Number: 36596 Gerrit-PatchSet: 5 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hung-Te Lin <hungte(a)chromium.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 28 Nov 2019 14:02:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mainboard/lippert: remove stdlib.h when unused
by HAOUAS Elyes (Code Review) 28 Nov '19

28 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33892 Change subject: mainboard/lippert: remove stdlib.h when unused ...................................................................... mainboard/lippert: remove stdlib.h when unused Change-Id: I7ec526759fce60247d58653d17fd74efd3f9bafe Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/lippert/frontrunner-af/BiosCallOuts.c M src/mainboard/lippert/frontrunner-af/buildOpts.c M src/mainboard/lippert/frontrunner-af/mainboard.c M src/mainboard/lippert/toucan-af/BiosCallOuts.c M src/mainboard/lippert/toucan-af/buildOpts.c M src/mainboard/lippert/toucan-af/mainboard.c 6 files changed, 0 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/33892/1 diff --git a/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c b/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c index 9ce9ec7..6d7f8cb 100644 --- a/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c +++ b/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c @@ -18,7 +18,6 @@ #include <northbridge/amd/agesa/BiosCallOuts.h> #include <SB800.h> #include <southbridge/amd/cimx/sb800/gpio_oem.h> -#include <stdlib.h> /* Should AGESA_GNB_PCIE_SLOT_RESET use agesa_NoopSuccess? * diff --git a/src/mainboard/lippert/frontrunner-af/buildOpts.c b/src/mainboard/lippert/frontrunner-af/buildOpts.c index 0563243..e5681aa 100644 --- a/src/mainboard/lippert/frontrunner-af/buildOpts.c +++ b/src/mainboard/lippert/frontrunner-af/buildOpts.c @@ -25,10 +25,6 @@ * */ -#include <stdlib.h> - - - /* Select the CPU family. */ #define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE diff --git a/src/mainboard/lippert/frontrunner-af/mainboard.c b/src/mainboard/lippert/frontrunner-af/mainboard.c index 6530276..74f3aba 100644 --- a/src/mainboard/lippert/frontrunner-af/mainboard.c +++ b/src/mainboard/lippert/frontrunner-af/mainboard.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <stdlib.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/mainboard/lippert/toucan-af/BiosCallOuts.c b/src/mainboard/lippert/toucan-af/BiosCallOuts.c index 7e6d0c4..c7b3b1b 100644 --- a/src/mainboard/lippert/toucan-af/BiosCallOuts.c +++ b/src/mainboard/lippert/toucan-af/BiosCallOuts.c @@ -18,7 +18,6 @@ #include <northbridge/amd/agesa/BiosCallOuts.h> #include <SB800.h> #include <southbridge/amd/cimx/sb800/gpio_oem.h> -#include <stdlib.h> /* Should AGESA_GNB_PCIE_SLOT_RESET use agesa_NoopSuccess? * diff --git a/src/mainboard/lippert/toucan-af/buildOpts.c b/src/mainboard/lippert/toucan-af/buildOpts.c index 0563243..e5681aa 100644 --- a/src/mainboard/lippert/toucan-af/buildOpts.c +++ b/src/mainboard/lippert/toucan-af/buildOpts.c @@ -25,10 +25,6 @@ * */ -#include <stdlib.h> - - - /* Select the CPU family. */ #define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE diff --git a/src/mainboard/lippert/toucan-af/mainboard.c b/src/mainboard/lippert/toucan-af/mainboard.c index b7126ea..59f140b 100644 --- a/src/mainboard/lippert/toucan-af/mainboard.c +++ b/src/mainboard/lippert/toucan-af/mainboard.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <stdlib.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/33892 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ec526759fce60247d58653d17fd74efd3f9bafe Gerrit-Change-Number: 33892 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/fsp2_0: drop support for FSP-T
by Michael Niewöhner (Code Review) 28 Nov '19

28 Nov '19

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36622 ) Change subject: drivers/fsp2_0: drop support for FSP-T ...................................................................... Patch Set 4: > Patch Set 4: > > Can we agree on a timeline to get this + the open source CAR bootguard code in? > Is the end of December ok? ACK -- To view, visit https://review.coreboot.org/c/coreboot/+/36622 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib791b30b621730f4b7c0a5f668a3b6559245daf5 Gerrit-Change-Number: 36622 Gerrit-PatchSet: 4 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Guckian Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michael Niewöhner Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 28 Nov 2019 14:01:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: {include,lib}: Use 'include <stdlib.h>' when appropriate
by HAOUAS Elyes (Code Review) 28 Nov '19

28 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32824 Change subject: {include,lib}: Use 'include <stdlib.h>' when appropriate ...................................................................... {include,lib}: Use 'include <stdlib.h>' when appropriate Change-Id: I49762ffee79274c39c0fdd62d127e1d0d57cd686 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/include/bootstate.h M src/include/string.h M src/lib/coreboot_table.c M src/lib/hardwaremain.c M src/lib/thread.c 5 files changed, 1 insertion(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/32824/1 diff --git a/src/include/bootstate.h b/src/include/bootstate.h index 26038c6..c53884e 100644 --- a/src/include/bootstate.h +++ b/src/include/bootstate.h @@ -16,7 +16,6 @@ #define BOOTSTATE_H #include <string.h> -#include <stdlib.h> #include <stddef.h> #include <stdint.h> /* Only declare main() when in ramstage. */ diff --git a/src/include/string.h b/src/include/string.h index 4a2f5e9..81afcf0 100644 --- a/src/include/string.h +++ b/src/include/string.h @@ -2,7 +2,6 @@ #define STRING_H #include <stddef.h> -#include <stdlib.h> #if !defined(__ROMCC__) #include <console/vtxprintf.h> diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 6e44f5d..24e10f4 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -27,10 +27,10 @@ #include <boardid.h> #include <device/device.h> #include <fmap.h> -#include <stdlib.h> #include <cbfs.h> #include <cbmem.h> #include <bootmem.h> +#include <stddef.h> #include <spi_flash.h> #include <security/vboot/misc.h> #include <security/vboot/vbnv_layout.h> diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index 2881162..608b683 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -28,7 +28,6 @@ #include <device/device.h> #include <device/pci.h> #include <delay.h> -#include <stdlib.h> #include <boot/tables.h> #include <program_loading.h> #if CONFIG(HAVE_ACPI_RESUME) diff --git a/src/lib/thread.c b/src/lib/thread.c index 281885f..a786b9f 100644 --- a/src/lib/thread.c +++ b/src/lib/thread.c @@ -15,7 +15,6 @@ #include <stddef.h> #include <stdint.h> -#include <stdlib.h> #include <arch/cpu.h> #include <bootstate.h> #include <console/console.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/32824 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I49762ffee79274c39c0fdd62d127e1d0d57cd686 Gerrit-Change-Number: 32824 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: {commonlib,device,drivers}: Use 'include <stdlib.h>' when appropriate
by HAOUAS Elyes (Code Review) 28 Nov '19

28 Nov '19

HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/32822 ) Change subject: {commonlib,device,drivers}: Use 'include <stdlib.h>' when appropriate ...................................................................... Abandoned see 32023 -- To view, visit https://review.coreboot.org/c/coreboot/+/32822 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I05422ee4b0aa5c02525ef0b4eccb4dc3ecf871e8 Gerrit-Change-Number: 32822 Gerrit-PatchSet: 3 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: abandon

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Change in ...coreboot[master]: src/security: Use 'include <stdlib.h>' when appropriate
by HAOUAS Elyes (Code Review) 28 Nov '19

28 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32827 Change subject: src/security: Use 'include <stdlib.h>' when appropriate ...................................................................... src/security: Use 'include <stdlib.h>' when appropriate Change-Id: I7c3ae72b4388ee12ab957ca516ed0fe19188895a Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/security/tpm/tspi/tspi.c M src/security/vboot/secdata_mock.c M src/security/vboot/secdata_tpm.c M src/security/vboot/vboot_handoff.c 4 files changed, 2 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/32827/1 diff --git a/src/security/tpm/tspi/tspi.c b/src/security/tpm/tspi/tspi.c index 4698a4d..7bb4362 100644 --- a/src/security/tpm/tspi/tspi.c +++ b/src/security/tpm/tspi/tspi.c @@ -19,12 +19,12 @@ #include <console/console.h> #include <security/tpm/tspi.h> #include <security/tpm/tss.h> -#include <stdlib.h> #if CONFIG(VBOOT) #include <vb2_api.h> #include <vb2_sha.h> #include <assert.h> #endif +#include <stddef.h> #if CONFIG(TPM1) static uint32_t tpm1_invoke_state_machine(void) diff --git a/src/security/vboot/secdata_mock.c b/src/security/vboot/secdata_mock.c index 3075d33..53265c1 100644 --- a/src/security/vboot/secdata_mock.c +++ b/src/security/vboot/secdata_mock.c @@ -32,7 +32,6 @@ * stored in the TPM NVRAM. */ -#include <stdlib.h> #include <security/tpm/tspi.h> #include <vb2_api.h> diff --git a/src/security/vboot/secdata_tpm.c b/src/security/vboot/secdata_tpm.c index 39cd614..5aff0d6 100644 --- a/src/security/vboot/secdata_tpm.c +++ b/src/security/vboot/secdata_tpm.c @@ -33,7 +33,7 @@ */ #include <security/vboot/antirollback.h> -#include <stdlib.h> +#include <stddef.h> #include <string.h> #include <security/tpm/tspi.h> #include <vb2_api.h> diff --git a/src/security/vboot/vboot_handoff.c b/src/security/vboot/vboot_handoff.c index 8a6b3d6..7f0d528 100644 --- a/src/security/vboot/vboot_handoff.c +++ b/src/security/vboot/vboot_handoff.c @@ -27,7 +27,6 @@ #include <console/console.h> #include <console/vtxprintf.h> #include <fmap.h> -#include <stdlib.h> #include <vboot_struct.h> #include <security/vboot/vbnv.h> #include <security/vboot/misc.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/32827 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c3ae72b4388ee12ab957ca516ed0fe19188895a Gerrit-Change-Number: 32827 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: northbridge: Use 'include <stdlib.h>' when appropriate
by HAOUAS Elyes (Code Review) 28 Nov '19

28 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32826 Change subject: northbridge: Use 'include <stdlib.h>' when appropriate ...................................................................... northbridge: Use 'include <stdlib.h>' when appropriate Change-Id: I9ccbca68ac7a2c049d917968310a6346353f4548 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/northbridge/amd/agesa/family12/dimmSpd.c M src/northbridge/amd/agesa/family12/northbridge.c M src/northbridge/amd/agesa/family14/dimmSpd.c M src/northbridge/amd/agesa/family14/northbridge.c M src/northbridge/amd/agesa/family15tn/dimmSpd.c M src/northbridge/amd/agesa/family16kb/dimmSpd.c M src/northbridge/amd/amdht/comlib.h M src/northbridge/amd/amdmct/wrappers/mcti.h M src/northbridge/amd/pi/00660F01/dimmSpd.c M src/northbridge/intel/e7505/debug.c M src/northbridge/intel/e7505/northbridge.c M src/northbridge/intel/e7505/raminit.c M src/northbridge/intel/fsp_rangeley/northbridge.c M src/northbridge/intel/gm45/northbridge.c M src/northbridge/intel/haswell/gma.c M src/northbridge/intel/haswell/minihd.c M src/northbridge/intel/nehalem/early_init.c M src/northbridge/intel/nehalem/northbridge.c M src/northbridge/intel/pineview/early_init.c M src/northbridge/intel/pineview/northbridge.c M src/northbridge/intel/pineview/raminit.c M src/northbridge/intel/sandybridge/finalize.c M src/northbridge/intel/x4x/northbridge.c M src/northbridge/via/vx900/chrome9hd.c 24 files changed, 7 insertions(+), 29 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/32826/1 diff --git a/src/northbridge/amd/agesa/family12/dimmSpd.c b/src/northbridge/amd/agesa/family12/dimmSpd.c index 822c577..8e72773 100644 --- a/src/northbridge/amd/agesa/family12/dimmSpd.c +++ b/src/northbridge/amd/agesa/family12/dimmSpd.c @@ -27,10 +27,8 @@ * */ -#include <stdlib.h> #include <Porting.h> #include <AGESA.h> - #include <northbridge/amd/agesa/dimmSpd.h> typedef struct _DIMM_INFO_SMBUS { diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c index 290ab16..4f5fd9c 100644 --- a/src/northbridge/amd/agesa/family12/northbridge.c +++ b/src/northbridge/amd/agesa/family12/northbridge.c @@ -22,11 +22,9 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/hypertransport.h> -#include <stdlib.h> #include <string.h> #include <lib.h> #include <cpu/cpu.h> - #include <cpu/x86/lapic.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> diff --git a/src/northbridge/amd/agesa/family14/dimmSpd.c b/src/northbridge/amd/agesa/family14/dimmSpd.c index 9877650..f95ff5e 100644 --- a/src/northbridge/amd/agesa/family14/dimmSpd.c +++ b/src/northbridge/amd/agesa/family14/dimmSpd.c @@ -15,9 +15,7 @@ #include <device/pci_def.h> #include <device/device.h> -#include <stdlib.h> #include <OEM.h> /* SMBUS0_BASE_ADDRESS */ - /* warning: Porting.h includes an open #pragma pack(1) */ #include <Porting.h> #include <AGESA.h> diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index a52f7ec..e4f26f6 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -22,7 +22,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/hypertransport.h> -#include <stdlib.h> #include <string.h> #include <lib.h> #include <cpu/cpu.h> diff --git a/src/northbridge/amd/agesa/family15tn/dimmSpd.c b/src/northbridge/amd/agesa/family15tn/dimmSpd.c index 7ca4709..30fd74b 100644 --- a/src/northbridge/amd/agesa/family15tn/dimmSpd.c +++ b/src/northbridge/amd/agesa/family15tn/dimmSpd.c @@ -15,7 +15,6 @@ #include <device/pci_def.h> #include <device/device.h> -#include <stdlib.h> /* warning: Porting.h includes an open #pragma pack(1) */ #include <Porting.h> diff --git a/src/northbridge/amd/agesa/family16kb/dimmSpd.c b/src/northbridge/amd/agesa/family16kb/dimmSpd.c index 8c453bb..78dc128 100644 --- a/src/northbridge/amd/agesa/family16kb/dimmSpd.c +++ b/src/northbridge/amd/agesa/family16kb/dimmSpd.c @@ -15,7 +15,6 @@ #include <device/pci_def.h> #include <device/device.h> -#include <stdlib.h> /* warning: Porting.h includes an open #pragma pack(1) */ #include <Porting.h> diff --git a/src/northbridge/amd/amdht/comlib.h b/src/northbridge/amd/amdht/comlib.h index d497fd2..d7b53c3 100644 --- a/src/northbridge/amd/amdht/comlib.h +++ b/src/northbridge/amd/amdht/comlib.h @@ -20,7 +20,6 @@ #define FILECODE 0xF001 #include <inttypes.h> -#include <stdlib.h> #include "porting.h" #ifdef AMD_DEBUG diff --git a/src/northbridge/amd/amdmct/wrappers/mcti.h b/src/northbridge/amd/amdmct/wrappers/mcti.h index 92dc0b8..baab526 100644 --- a/src/northbridge/amd/amdmct/wrappers/mcti.h +++ b/src/northbridge/amd/amdmct/wrappers/mcti.h @@ -19,7 +19,6 @@ #define MCTI_H #include <inttypes.h> -#include <stdlib.h> #include <pc80/mc146818rtc.h> struct DCTStatStruc; diff --git a/src/northbridge/amd/pi/00660F01/dimmSpd.c b/src/northbridge/amd/pi/00660F01/dimmSpd.c index 349dacf..d25a35f 100644 --- a/src/northbridge/amd/pi/00660F01/dimmSpd.c +++ b/src/northbridge/amd/pi/00660F01/dimmSpd.c @@ -15,7 +15,6 @@ #include <device/pci_def.h> #include <device/device.h> -#include <stdlib.h> /* warning: Porting.h includes an open #pragma pack(1) */ #include <Porting.h> diff --git a/src/northbridge/intel/e7505/debug.c b/src/northbridge/intel/e7505/debug.c index 357a963..baa0bf1 100644 --- a/src/northbridge/intel/e7505/debug.c +++ b/src/northbridge/intel/e7505/debug.c @@ -13,7 +13,6 @@ #include <device/pci_def.h> #include <console/console.h> -#include <stdlib.h> #include <arch/io.h> #include <device/pci_ops.h> #include <spd.h> diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c index 7cb0b5b..074f63a 100644 --- a/src/northbridge/intel/e7505/northbridge.c +++ b/src/northbridge/intel/e7505/northbridge.c @@ -18,7 +18,6 @@ #include <device/device.h> #include <device/pci.h> #include <cpu/cpu.h> -#include <stdlib.h> #include "e7505.h" diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c index 3bb1f67..18d3abe 100644 --- a/src/northbridge/intel/e7505/raminit.c +++ b/src/northbridge/intel/e7505/raminit.c @@ -30,7 +30,6 @@ #include <device/mmio.h> #include <device/pci_ops.h> #include <lib.h> -#include <stdlib.h> #include <commonlib/helpers.h> #include <console/console.h> #include <cpu/x86/mtrr.h> diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.c b/src/northbridge/intel/fsp_rangeley/northbridge.c index 63f2068..b89a8cf 100644 --- a/src/northbridge/intel/fsp_rangeley/northbridge.c +++ b/src/northbridge/intel/fsp_rangeley/northbridge.c @@ -23,7 +23,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <stdlib.h> #include <cpu/cpu.h> #include <drivers/intel/fsp1_0/fsp_util.h> #include <cpu/x86/lapic.h> diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index f011cce..261fef5 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -19,7 +19,6 @@ #include <stdint.h> #include <device/device.h> #include <device/pci.h> -#include <stdlib.h> #include <cpu/cpu.h> #include <boot/tables.h> #include <arch/acpi.h> diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index 607fab7..c4f6f76 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -29,7 +29,6 @@ #include <cpu/intel/haswell/haswell.h> #include <drivers/intel/gma/opregion.h> #include <southbridge/intel/lynxpoint/nvs.h> -#include <stdlib.h> #include <string.h> #include <types.h> diff --git a/src/northbridge/intel/haswell/minihd.c b/src/northbridge/intel/haswell/minihd.c index 61265dd..ff5b943 100644 --- a/src/northbridge/intel/haswell/minihd.c +++ b/src/northbridge/intel/haswell/minihd.c @@ -21,7 +21,6 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/mmio.h> -#include <stdlib.h> #include <southbridge/intel/lynxpoint/hda_verb.h> static const u32 minihd_verb_table[] = { diff --git a/src/northbridge/intel/nehalem/early_init.c b/src/northbridge/intel/nehalem/early_init.c index a5cac7b..f12416e 100644 --- a/src/northbridge/intel/nehalem/early_init.c +++ b/src/northbridge/intel/nehalem/early_init.c @@ -16,7 +16,6 @@ */ #include <stdint.h> -#include <stdlib.h> #include <console/console.h> #include <arch/io.h> #include <device/pci_ops.h> diff --git a/src/northbridge/intel/nehalem/northbridge.c b/src/northbridge/intel/nehalem/northbridge.c index a9032ba..aee98cd 100644 --- a/src/northbridge/intel/nehalem/northbridge.c +++ b/src/northbridge/intel/nehalem/northbridge.c @@ -25,11 +25,11 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <stdlib.h> #include <cpu/cpu.h> +#include <cpu/intel/smm/gen1/smi.h> + #include "chip.h" #include "nehalem.h" -#include <cpu/intel/smm/gen1/smi.h> static int bridge_revision_id = -1; diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c index ac187c1..d649c75 100644 --- a/src/northbridge/intel/pineview/early_init.c +++ b/src/northbridge/intel/pineview/early_init.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <stdlib.h> #include <console/console.h> #include <arch/io.h> #include <device/pci_ops.h> diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c index 4b67cfd..01d930b 100644 --- a/src/northbridge/intel/pineview/northbridge.c +++ b/src/northbridge/intel/pineview/northbridge.c @@ -20,7 +20,6 @@ #include <stdint.h> #include <device/device.h> #include <device/pci.h> -#include <stdlib.h> #include <cpu/cpu.h> #include <boot/tables.h> #include <arch/acpi.h> diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c index 282765e..c272767 100644 --- a/src/northbridge/intel/pineview/raminit.c +++ b/src/northbridge/intel/pineview/raminit.c @@ -21,10 +21,12 @@ #include <cpu/x86/cache.h> #include <delay.h> #include <lib.h> +#include <spd.h> +#include <stdlib.h> +#include <string.h> + #include "pineview.h" #include "raminit.h" -#include <spd.h> -#include <string.h> /* Debugging macros. */ #if CONFIG(DEBUG_RAM_SETUP) diff --git a/src/northbridge/intel/sandybridge/finalize.c b/src/northbridge/intel/sandybridge/finalize.c index 7051b24..3ae1280 100644 --- a/src/northbridge/intel/sandybridge/finalize.c +++ b/src/northbridge/intel/sandybridge/finalize.c @@ -14,8 +14,8 @@ * GNU General Public License for more details. */ -#include <stdlib.h> #include <device/pci_ops.h> + #include "sandybridge.h" #define PCI_DEV_SNB PCI_DEV(0, 0, 0) diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c index b6616e1..f6e6671 100644 --- a/src/northbridge/intel/x4x/northbridge.c +++ b/src/northbridge/intel/x4x/northbridge.c @@ -20,7 +20,6 @@ #include <stdint.h> #include <device/device.h> #include <device/pci.h> -#include <stdlib.h> #include <cpu/cpu.h> #include <boot/tables.h> #include <arch/acpi.h> diff --git a/src/northbridge/via/vx900/chrome9hd.c b/src/northbridge/via/vx900/chrome9hd.c index 163f6b1..bba8071 100644 --- a/src/northbridge/via/vx900/chrome9hd.c +++ b/src/northbridge/via/vx900/chrome9hd.c @@ -19,7 +19,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <pc80/vga_io.h> -#include <stdlib.h> #include "vx900.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/32826 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ccbca68ac7a2c049d917968310a6346353f4548 Gerrit-Change-Number: 32826 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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coreboot-gerrit November 2019